summaryrefslogtreecommitdiff
path: root/driver/retimer
Commit message (Collapse)AuthorAgeFilesLines
* DP/TBT/USB4: Retimer WA resolved Brya TBT lane bonding issue in AP modemadhusudanarao amara2021-08-061-0/+20
| | | | | | | | | | | | | | | | | In AP Mode DP exit to TBT entry is causing TBT lane bonding issue. Issue is not seen by calling the retimer reset as WA at the time of disconnect mode configuration. Revert this patch after getting the actual fix. BUG=b:193402306 BRANCH=None TEST=Checked TBT enumeration in AP Mode TOREVERT=b:195375738 Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com> Change-Id: Ia22e061a863940b2a13ad5a38f4fe130737c5c20 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058157 Reviewed-by: Keith Short <keithshort@chromium.org>
* bb_retimer: Restore timeout to original valueCaveh Jalali2021-06-251-1/+1
| | | | | | | | | | | | | | | | | This is a followup to chromium:2955609. Restore how long we try to talk to the burnside bridge. The intent is to retry after 10ms instead of 20ms since that speeds up the common case. I didn't mean to reduce how long we wait for the burnside bridge to be responsive. Restoring original 40ms timeout. BRANCH=none BUG=none TEST=boots on brya Change-Id: I6db2a9834d1b4ad11f28a9ac8b59e63356c223a5 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965847 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* guybrush: Adjust PS8811 Chan B pre-shootRob Barnes2021-06-221-0/+4
| | | | | | | | | | | | | | | Change PS8811 pre-shoot from 3dB to 1.5dB. This was incorrectly set to 3dB due to a misunderstanding of the datsheet. BUG=b:186586795 TEST=Boot guybrush BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I49e150433408fc2b44fafb4bed406166f110fbeb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964957 Reviewed-by: Rock Chiu <rock.chiu@paradetech.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* bb_retimer: cleanup: Change the power handler func name & paramsVijay Hiremath2021-06-181-6/+5
| | | | | | | | | | | | | | Changed the power handler function name from bb_retimer_power_handle() to bb_retimer_power_enable() and on_off param to enable. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ifad4c71a5d76b4841ea369a991160e221c051ec5 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973375 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* KB800x: Add DriverEric Herrmann2021-06-182-0/+649
| | | | | | | | | | | | | Add KB800x driver. Add config options to Kconfig. BUG=b:168930682 TEST=On Volteer, check USB4, TBT3, DPMF, DP, and USB3 functionality BRANCH=none Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: Ic71b0d4236037522455a0561ba87fd9a874a4968 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2930581 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* bb_retimer: Explicitly check EC status codesCaveh Jalali2021-06-151-4/+4
| | | | | | | | | | | | | | | This replaces inverted boolean logic with explicit comparison with EC_SUCCESS for improved readability. BRANCH=none BUG=b:181743576,b:188826559 TEST=compare_builds.sh matches Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Id5aaa167b2e9071e5757f561d788da49af03f9d9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962214 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
* guybrush: Add PS8811 driverRob Barnes2021-06-142-3/+87
| | | | | | | | | | | | | | | Add PS8811 USB A retimer driver. Reusing USB mux structure even though the retimer does not have a mux. BUG=b:176987937 TEST=Build and run BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ie11a105f344e6acc1312cda517fdfe54ecb8c8ea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2946307 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* bb_retimer: Reduce retry delay to 10msCaveh Jalali2021-06-121-2/+2
| | | | | | | | | | | | | | | | This reduces the delay between poll intervals of the burnside bridge register accesses. A 10 ms delay is typically sufficient to achieve a successful register read if the first register read failed. BRANCH=none BUG=none TEST=with added timestamps, observed register accesses succeed after a 10ms delay. Change-Id: I33941b26ef093b0a6c2f38d1f5223991c9b9d4ba Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2955609 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* bb_retimer: Return status from bb_retimer_power_handle()Caveh Jalali2021-06-121-2/+5
| | | | | | | | | | | | | | | | | | | | | | | This allows the implementation of bb_retimer_power_handle() to return a status value indicating whether the request was successful. The default implementation simply controls a GPIO and is expected to succeed unconditionally. More complex implementations may run into failure cases that leave the BB unreachable. When this happens, device initialization returns an error so the caller can take mitigating action. USB MUX operations tend to be called from timing sensitive code paths in the TCPM, so careful error handling helps avoid cascading problems like PD negotiation failures. BRANCH=none BUG=b:181743576,b:188826559 TEST=buildall passes, PD still works on brya Change-Id: If79078be26e47d758e2cd6cc385ff2b34fecff63 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954198 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* storo: tune tusb544 EQ settingMike Lee2021-06-081-0/+13
| | | | | | | | | | | | | | | | Modify strength value setting of tusb544, set vod dcgain setting_5,set usb eq 15,and set dp eq 6. BUG=b:183583917,b:183586638 BRANCH=dedede TEST=make BOARD=storo and verified pass by EE Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: Ic8b16fed18e06e4fa763faf47c2041dc1d3c29f1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784332 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* bb_retimer: update console command bbli feng2021-06-081-13/+21
| | | | | | | | | | | | | | | This handles multiple retimers in one PD port case. BRANCH=none BUG=none TEST=on ADL RVP, do "bb 0 r 4" "bb 0 w 4 <val>" can read/write both retimers. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: Ie4dc6da8dec83e95a090cbb68d4f53e5e12a62e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939382 Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* TDP142: Initial driverDiana Z2021-05-252-0/+80
| | | | | | | | | | | | | | | Initial driver for the TDP142, a DisplayPort redriver chip. The initial implementation simply provides access to the chip's control selection since it must be explicitly enabled after the chip powers on. BRANCH=None BUG=b:187856682 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4afe4b0453ef49154b766166f608bd3d0fb8848f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2915823 Reviewed-by: Rob Barnes <robbarnes@google.com>
* guybrush: Add header for ANX7491 retimerRob Barnes2021-04-081-0/+17
| | | | | | | | | | | | | | | Adding a header to hold register values for ANX7491. ANX7491 should work without configuration. More registers can be added as needed for tuning. BUG=b:184592168 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: If529bfdedff6b151147c8ef02840621b093be672 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809881 Reviewed-by: Diana Z <dzigterman@chromium.org>
* bb_retimer: Fix port bounds checkCaveh Jalali2021-03-041-1/+1
| | | | | | | | | | | | | This fixes a bounds check in the 'bb' command argument parsing. BRANCH=none BUG=none TEST=EC no longer resets when triggering the off-by-one error Change-Id: I4ff459781c047b3899150485b7fd3fe6363bdec3 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2730521 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* BB retimer: Do not need B16 to be set for USB4 modeAyushee Shah2021-03-021-12/+0
| | | | | | | | | | | | | | Retimer bit16 is don't care for USB4 mode, so do not update it BUG=None BRANCH=None TEST=Tested on voxel, USB4 enumerates fine. Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: I4e161542cd6eeda5b595cf3c071aafe71b8754cb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719197 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* BB Retimer: Cleanup setting USB4 speedAyushee Shah2021-02-231-13/+5
| | | | | | | | | | | | | | In the retimer_set_state_dfp() function, return either the USB4 speed or Thunderbolt speed depending on the mux setting BUG=None BRANCH=None TEST=make buildall -j Change-Id: I725386d7d23d50637b46b389082d369b09b4df66 Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682840 Reviewed-by: Keith Short <keithshort@chromium.org>
* nb7v904m : Add function to control Loss Profile MatchingYongBeum.Ha2021-02-172-0/+39
| | | | | | | | | | | | | | add function to control Loss Profile Matching BUG=b:176862264 BRANCH=None TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I5b4d0ff444c07c477add101fac05d33694a33982 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2684080 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* nb7v904m : add function to control aux channelYongBeum.Ha2021-02-172-0/+11
| | | | | | | | | | | | | Add function to control aux channel BUG=b:179624712 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I0dd474b52ee9058bfed3c7caec07e691d41f84dc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* nb7v904m : add config to disable LPMYongBeum.Ha2021-02-172-0/+11
| | | | | | | | | | | | | | Add config to disable LPM BUG=b:179624712 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I6ae0d08709fe0799843b6e225b480ffa617dfe84 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2684075 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* retimer: PD port retimer firmware update supportli feng2021-02-051-0/+6
| | | | | | | | | | | | | | | | Added one field to struct usb_mux_driver, which returns true if retimer update is supported. Moved query function from usb_retimer_fw_update.c to usb_mux.c. BUG=b:162528867 BRANCH=none TEST=Tested on Voxel, together with related coreboot and kernel changes. EC returns correct port information to kernel. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I5cab34a14adbf0470cffe6a13234ad53b6f6a90c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2651866 Reviewed-by: Keith Short <keithshort@chromium.org>
* nb7v904m : add function to tune eq and gainYongBeum.Ha2021-02-022-8/+86
| | | | | | | | | | | | | | add function to tune usb eq and gain BUG=b:176862264 BRANCH=None TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I50ff040643cd2635968c5cfb988998ad3a82a836 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649894 Reviewed-by: Diana Z <dzigterman@chromium.org>
* COIL: Rename comments in BB retimerDiana Z2021-01-261-2/+2
| | | | | | | | | | | | | | Rename i2c comments in the BB retimer to reflect current naming conventions. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8160b851b84795ffd13934c2be2e12fd2a04c5f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649350 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename comments and variables in PS8802 driverDiana Z2021-01-262-5/+6
| | | | | | | | | | | | | Rename i2c related comments and variables in the PS8802 driver. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id52177261edc604f610ace0e72b4d42f09a5de0c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649349 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* bb_retimer: Update read and write sequenceDivya Sasidharan2021-01-141-30/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the case of I2C failures on reading or writing to the BB retimer, sleep and resend same I2C message. The CL resends the I2C read/write message 3 times before giving up. The nvm exclusive access was to wait for RESET_N to deassert, but since the RESET_N lines are deasserted at same time this is handled in SPI flash HW logic we no longer require it. Also the mutex was introduced to reduce the delay from 40ms to 20ms, but since the delay is after the RESET_N lines, it is redundant as well. BUG=b:174240235 BRANCH=None TEST=1. Tested with TBT dock, enumeration on both the ports are fine and swapping between ports also works fine. 2. Tested the following: Hot plug TBT dock -> Enter S0ix -> Disconnect the dock -> Connect USB pen drive - Pen drive enumerates fine on both the ports. Change-Id: I6cf2a49af6c1ab463821448df92d9f9a8ca5041e Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2594438 Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* BB retimer: add vendor ID 0x8087 supportli feng2021-01-122-3/+4
| | | | | | | | | | | | | | | BB retimer firmware changed vendor ID to 0x8087 from firmware revision 2.8. Added support for this ID. BUG=None BRANCH=None TEST=Volteer with BB retimer firmware 2.18 which uses vendor ID 0x8087, connect a USB/TBT device, in retimer_init(), passed vendor ID checking. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I95f2d7f74866b2e077a4e3e4bffd0b1d0f6461b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2617512 Reviewed-by: Keith Short <keithshort@chromium.org>
* driver: support PS8802 setting power saving modeBen Chen2021-01-122-0/+30
| | | | | | | | | | | | | | Add function support setting operation to power saving mode(standby mode). BUG=b:172993414 BRANCH=none TEST=make buildall Change-Id: I579b3b2958a930d9d7d70b913d3449397f6fa9db Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2556741 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Create a public header for bb_retimerSimon Glass2021-01-092-31/+4
| | | | | | | | | | | | | | | | Add a separate public header for this driver so we can include it from Zephyr. Update the charger file to use that header, so it builds on Zephyr. BUG=b:175434113 BRANCH=none TEST=make BOARD=volteer -j30 With a zephyr-chrome CL, build volteer on zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I4613649b8cdca1f45c22922e4d1aa71460ea5382 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2615623 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* nb7v9004m: add function to tune usb_eq_rxYongBeum.Ha2021-01-092-0/+33
| | | | | | | | | | | | | | add function to tune usb_eq_rx BUG=b:176566398 BRANCH=None TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: Ib928b80c13cf5e0a46b19d5dd2d256be2af0a255 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2606178 Reviewed-by: Diana Z <dzigterman@chromium.org>
* BB retimer: Set UFP mode of BB retimerAyushee2021-01-071-44/+88
| | | | | | | | | | | | | | | | | | | | | This CL enables getting the enter mode information received from DFP and sets the following BB retimer bits accordingly. Bit 2: RE_TIMER_DRIVER Bit 18: CABLE_TYPE Bit 19: VPRO_DOCK_DETECTED Bit 20: TBT_ACTIVE_LINK_TRAINING Bit 22: ACTIVE/PASSIVE Bits 27-25: TBT Cable speed Bits 29-28: TBT_GEN_SUPPORT BUG=b:157163664 BRANCH=None TEST=Tested with volteer as UFP, able to set the retimer bits Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I661aa4630b42fbaa136ff3855c4f70e3dee61546 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382634 Reviewed-by: Keith Short <keithshort@chromium.org>
* Woomax: Modify strength value of PS8802 for USB-C signal quality.Jacky Wang2020-12-281-0/+16
| | | | | | | | | | | | | Modify strength value of PS8802 for USB-C signal quality. BUG=b:175350836 BRANCH=zork TEST=make BOARD=woomax Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I0f9199f596a27c1913eb650f063493796ac39ba6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2599730 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Woomax: Modify strength value of PS8818 for USB-C signal quality.Michael5 Chen2020-12-171-0/+1
| | | | | | | | | | | | | | | | Modify strength value of PS8818 for USB-C signal quality depend on b:175351902 comment #1. BUG=b:175351902 BRANCH=zork TEST=make BOARD=woomax Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I62974b5c41257a8f47b8d9217e958f1aad9d55bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2592306 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com>
* Revert "bb_retimer: Bypass safe mode configuration in retimer"Divya Sasidharan2020-12-111-15/+1
| | | | | | | | | | | | | | | | | This reverts commit 14a10f746d2e4ae195a14fbcf9c0a2fb57d42239. This was a workaround and is being removed for appropriate solution to synchronize time in safe mode for retimer and TCSS mux. BUG=b:166300460 BRANCH=none TEST=none Change-Id: I6d997caca59942a0bd14a987737997b48a1ede4f Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2504477 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
* BB retimer: Set USB2.0 bit to 0Ayushee Shah2020-12-101-16/+0
| | | | | | | | | | | | | Since the TCSS mux ignores the USB2.0, set it to 0 BUG=b:175119818 BRANCH=None TEST=Able to set the USB2.0 bit to 0 in the BB retimer config register Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: Ia76ede10f9bdbf746a400816017e7d36b0790764 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2580455 Reviewed-by: Keith Short <keithshort@chromium.org>
* delbin: Initial PS8811 registers.Michael5 Chen2020-12-071-1/+10
| | | | | | | | | | | | | | | | Depend on b/160937185 #32, initial PS8811 registers. BUG=b:160937185 BRANCH=firmware-volteer-13521.B TEST=manual Check register value under s0. Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I262858b61050f9ad857f44e703bbd3cfd0e989f0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2561904 Reviewed-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* driver: add custom PS8802 I2C slave addressBen Chen2020-11-202-0/+25
| | | | | | | | | | | | | | | | Add custom PS8802 slave address, page offset define, and switch PS8802 slave address change function. Be sure the slave device was not conflicted. BUG=b:168761485, b:168761483 BRANCH=none TEST=make buildall. Change-Id: I4c02b574de7dc932cacfffae0cb695cecf8f1a22 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537517 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* berknip: update hdmi retimer settingZick Wei2020-11-191-2/+4
| | | | | | | | | | | | | | | This patch update pi3hdx1204 eq setting, berknip use 0xAA on byte5, and keep other variant 0xFF. BUG=b:170708732 BRANCH=zork TEST=read back eq setting from i2c. Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I543f1137dc63b5494cc2e170fa4da025d7fef03b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452009 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* berknip: update tusb544 eq settingZick Wei2020-11-182-5/+67
| | | | | | | | | | | | | | This patch update tusb544 eq setting for berknip. BUG=b:170708727, b:170708972 BRANCH=zork TEST=verify USB type C 3.0 RX , DP eq can pass, make buildall. Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Ief018e02090f5bc409a57a93da86f9ff095773aa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2467602 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Add support for linear re-driver cablesAyushee2020-11-061-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linear re-driver cables enumerate as passive cables in the Discover mode SOP' response from the cable. But they have Active/Passive bit (B25) in the discover mode SOP' response set. Hence, if the cable is LRD, the port enters Thunderbolt mode SOP' before entering USB and it also sets the cable as active in the mux and retimer setting. USB4 PD flow for LRD cables: Is Discover mode SOP' B25? ----- N ----- Enter USB4 SOP with Gen 2 cable speed | y | Enter TBT SOP' | Enter USB4 SOP as per cable speed. TBT PD flow for LRD cables: Is Discover mode SOP' B25? ----- N ----- Enter TBT SOP | y | Enter TBT SOP' | Enter TBT SOP This CL also updates the retimer setting and Enter USB Data object for USB4 according to the type of cable detected (LRD/Active/passive) BUG=b:156749387 BRANCH=None TEST=With Linear re-driver cable, 1. Able to enter USB4 mode 2. Able to enter Thunderbolt mode 3. Able to exit and re-enter USB4 on reboot 4. Able to exit and re-enter Thunderbolt mode on reboot Change-Id: Ie5258f792e13a205dea71fc9f06b1d8987ec9194 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2470209 Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* BB retimer: Update USB4 related bitsAyushee2020-11-051-3/+21
| | | | | | | | | | | | | | | | | | | | | | This CL updates the following bits: Bit 4: USB3 bit - If active cable V3, according to Discover Idenitity SOP response, Product VDO 2 B5. else set to 1 Bit 16: Thunderbolt support - According to B3:B5 of Discover Identity SOP response. Bit 19: VPro Support - If host is vPro capable and according to Discover Mode SOP response B26/B31. This CL also updates the thunderbolt related bits for the retimer if the thunderbolt mode SOP' and SOP'' is entered. BUG=b:156749387 BRANCH=None TEST=Able to update the retimer bits on entering USB4 mode Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: Ic083001dee73d854379f1f3dfd85bebe5ee6ef5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2473597 Reviewed-by: Keith Short <keithshort@chromium.org>
* morphius: update ps8818 usb rx settingZick Wei2020-10-151-0/+7
| | | | | | | | | | | | | | | | | | | This patch will update the ps8818 usb rx setting based on a CONFIG value. This will be set for all as the default of 112 Ohms and overridden by morphius to be 85 Ohms. BUG=b:169409479 BRANCH=zork TEST=verify that ps8818 register setting is as expected Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Iff492287efc9b12487ca0bb089f61486c4344c5e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2469613 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* TUSB544: Set TUSB544 always to DP Alt mode sourceSue Chen2020-09-291-4/+2
| | | | | | | | | | | | | | | | | | Since all chromebooks are DP SRC, set TUSB544 always at DP Alt mode source (set TUSB544_DIR_SEL_USB_DP_SRC to register TUSB544_REG_GENERAL6). BUG=b:169303733 BRANCH=zork TEST=Plug in typeC monitor which can provide 20V power and make sure it can display while boot to S0 on Ezkinil. Change-Id: I893f7f0ca98ede6ffd678c1118212cad9184d2ba Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431313 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* bb_retimer: Bypass safe mode configuration in retimermadhusudanarao amara2020-09-231-1/+15
| | | | | | | | | | | | | | | | | BUG=b:161327513 BRANCH=none TEST=Type-C dock multiple hot plug enumerated successfully as SS device. TBT dock enumeration is successful. USB4 dock enumeration is successful. DP Type-C cable plug-in worked fine. Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com> Change-Id: Ie4a48dbdfc6904408f11d19b77b5afecf88d4fbe Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324812 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* bb retimer: Use mutex to lock the access to shared NVMVijay Hiremath2020-08-252-12/+15
| | | | | | | | | | | | | | | | | | | If the BB retimer has a shared NVM we need 40ms delay after releasing the RESET line to synchronize, load and initialize both the retimers. On a non-shared NVM we need 20ms delay to load and initialize. In order to synchronize, instead of 40ms delay this CL uses a MUTEX to lock the access of another retimer by not releasing the RESET line until the first retimer completes initialization. BUG=b:165895649 BRANCH=none TEST=Tested on volteer(non shared NVM), tglrvpu_ite (shared NVM) Retimer is able to initialize (DP, USB, TBT, USB4 are detected) Change-Id: I709377c2e6401faa26871289143d71665ee516d1 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2368223 Reviewed-by: Keith Short <keithshort@chromium.org>
* pi3hdx1204: Print error if enable failsEdward Hill2020-08-221-3/+9
| | | | | | | | | | | | BUG=none BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I33b574d42008330b58ae21d5bfbfc6fc73d50271 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2367313 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* Ezkinil: Fix HDMI retimer suspend / resumeEdward Hill2020-08-221-0/+3
| | | | | | | | | | | | BUG=none BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I9eac47383695156ca0d222eb75f75492065720b7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2364112 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* BB retimer: Remove FORCE_PWR GPIO from EC driverVijay Hiremath2020-08-192-6/+14
| | | | | | | | | | | | | | | | | | FORCE_PWR GPIO is used for keeping the BB retimer in active state during f/w updating. On TGLRVP, control to enable the FORCE_PWR GPIO was given to EC to support the I2C based F/W updating. I2C based f/w updating is deprecated and the LSx interface is POR hence the FORCE_PWR GPIO control is given to AP now. Thus, removing the FORCE_PWR GPIO from EC driver. BUG=b:165214747 BRANCH=none TEST=make buildall -j Change-Id: If9bb7199a68c93f704f698552e5594a58bd68f7c Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363334 Reviewed-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* BB retimer: Set USB3 speed only when USB mode is enabledAyushee2020-07-311-8/+9
| | | | | | | | | | | | | | | This commit sets USB3 speed (Bit 6) only if the mux state is set to USB_PD_MUX_USB_ENABLED BUG=b:152544514 BRANCH=None TEST=Abe to clear bit 6 when DP dock enters in Safe mode. Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I1955e22fccb1f86d38f063f614f789d67394de5b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2329152 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* retimer/tusb544: set the HPD pin for DP/Dock modeDivagar Mohandass2020-07-181-3/+7
| | | | | | | | | | | | | | | DP lanes are getting disabled if the HPD pin are not set. Drive the HPD_IN pin in USB type-c DP/Dock mode and clear it in the no MUX mode. BRANCH=None BUG=b:160572502 TEST=Check DP/HDMI display out on Waddledee USB type-c sub board Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Change-Id: Ie5a467572a88471155fe84e1054ffe64de5f7964 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304239 Reviewed-by: Diana Z <dzigterman@chromium.org>
* zork: Use CBI only and remove retimer probe codeDenis Brockus2020-07-174-35/+0
| | | | | | | | | | | | | | | | | | | Before CBI was being used, zork used I2C probing to detect basic hardware configuration. Now that CBI is supporting FW_CONFIG, this is being removed. BUG=b:151232257 BRANCH=none TEST=verify zork still boots with valid configuration Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I267d99f8f3894aff2f6301df167c470db373509e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304380 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* bb_retimer: add power up timingKeith Short2020-07-011-0/+14
| | | | | | | | | | | | | | | | | Ensure the Burnside Bridge is held in reset when the AP is off and add a delay to reset de-assertion to meet Burnside Bridge requirements. BUG=b:159743964 BRANCH=none TEST=make buildall TEST=Verify BB initialization is skipped when the AP is off (verified with extra debug) TEST=Verify operation of USB, DP, and USB4 devices on Burnside bridge. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I4a4f05aaf84bf93b3c3032998bc811591c8fbf35 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2271697 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
View Lorry Controller Status