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* gpio: cleanup header usage for i2cKeith Short2022-02-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | i2c.h only requires the enum gpio_signal, so use gpio_signal.h instead of gpio.h. The builld doesn't compare due to an ASSERT() calls in i2c-stm32f4.c because the line numbers changed. Before this change: 80068b2: f240 2332 movw r3, #562 80068b6: 48a4 ldr r0, [pc, #656] 80068b8: f7fc fb1a bl 8002ef0 <panic_assert_fail> After this change: 80068b2: f44f 730d mov.w r3, #564 80068b6: 48a4 ldr r0, [pc, #656] 80068b8: f7fc fb1a bl 8002ef0 <panic_assert_fail> BUG=b:218856245 BRANCH=none TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I0f9f428d5c575c444b9df69f71a0ed6c4b3e378c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3489094 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* driver/sb_rmi: Do not clear interrupt after transactionRob Barnes2021-12-161-10/+3
| | | | | | | | | | | | | | | | Do not clear software interrupt after transaction or error. This aligns with AMD guidance. BUG=b:205610230 BRANCH=None TEST=Boot guybrush, no STT errors Change-Id: I1d6892565572761e84cb1a81f4dc535c90925a09 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3273094 Reviewed-by: Fanli Zhou <fanliccc@gmail.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* driver/sb_rmi: Update retry delaysRob Barnes2021-12-161-3/+3
| | | | | | | | | | | | | Update retry delays to align with AMD guidance. BUG=b:205610230 BRANCH=None TEST=Boot guybrush, no STT errors Change-Id: Ib3dcaef3b3e81c524df671d1de9c2441758a71ae Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3272288 Reviewed-by: Diana Z <dzigterman@chromium.org>
* STT: Don't talk to the SoC outside S0Rob Barnes2021-08-311-0/+5
| | | | | | | | | | | | | | | | STT interface is not available outside of S0, so report that the interface is not powered and allow the STT hook to exit quickly in this condition. BRANCH=None BUG=b:197745639 TEST=No STT errors with board in G3 state Change-Id: Id0c926ce896cdb4d3096746b3e7cc99db83bdd2d Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3126700 Tested-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* driver/sb_rmi: Add AMD SB-RMI driverRob Barnes2021-08-161-0/+187
Add Side-Band Remote Management Interface driver. SB-RMI can be used to manage power limits of the SOC. SB-RMI uses a soft mail box for executing transactions. BUG=b:176994331 TEST=Build BRANCH=None Change-Id: Ie185985e4c8d2c2d915b2ae2447709ddc16adda6 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078049 Tested-by: Rob Barnes <robcb85@gmail.com> Commit-Queue: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Fanli Zhou <fanliccc@gmail.com> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
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