| Commit message (Collapse) | Author | Age | Files | Lines |
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Calling tcpm_init will reset the Analogix USB Mux on port 0. I'm not
sure if this is the proper behavior but I lean towards that it's not
because there is a separate function, usb_mux_init, for resetting
the usb mux. Also, calling tcpm_init for the Parade does not reset
it's mux.
BUG=b:134829988
BRANCH=none
TEST=manual
HATCH (Port 0): The original and new stack was tested as follows:
1) Plug in dock
2) Depending on dock, plug in HDMI or DP
3) Plug TypeC power into dock
4) Verify projection on external monitor isn't lost
Change-Id: I88d17479f4d5810be3686cd78545cc99b0c41347
Signed-off-by: Sam Hurst <shurst@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1650728
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Sam Hurst <shurst@google.com>
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Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an
embedded TCPC.
This patch adds bus_type field to struct tcpc_config_t so that a TCPC
location on other type of bus can be specified.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b
Reviewed-on: https://chromium-review.googlesource.com/1640305
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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ANX PD has two way to get VBUS present info, 1:ADC, 2:Comparator
the ADC has been reset at chip reset stage, the comparator(0x1e:bit2)
is analog part, it is not been reset by chip reset.
there is a corner case which EC TCPM detect VBUS present info at
chip reset stage(at system rebooting stage, EC TCPM issue TEST_R
signal, this will trigger chip hardware reset).
the original VBUS present function checks the VBUS from ADC, the
ADC register value became to 0 while at chip reset stage, so at this
moment, EC TCPM need check 0x1e:bit2 to get real VBUS present info.
BRANCH=None
BUG=b:129092057
TEST=Tested on Phaser, reboot stress test.
Change-Id: I1e847c88b22684bc9b17243628179bad534801b2
Signed-off-by: Xin Ji <xji@analogixsemi.com>
Reviewed-on: https://chromium-review.googlesource.com/1535085
Commit-Ready: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Prevent anx7447 to be recompiled all the time.
BUG=none
BRANCH=none
TEST=anx7447 is not recompiled all the time.
Change-Id: I3d3299c84bc0d60a594f21fe5f937e21fc51af27
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1459820
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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SW short protect current.
The default values of Vconn SW protection time of inrush current is 19us and power SW short protect current is 370mA, it finds that the current of Vconn will up to 656mA during press F3+power
button with Huawei dongle plugged in MB, then Vconn will drop when the large current happen. Vendor suggest to adjust Vconn SW protection time of inrush current(modify register 0xAA from 19us to
2.43ms) and power SW short protect current(modify register 0xA8 from 370mA to 440mA).
BUG=b:119540455
BRANCH=none
TEST=The HDMI display well with Huawei dongle at MB side when pressing F3+ power button to reboot OS.
Change-Id: Ibb7e602fc4a4aa9cb69231a7f199f4ea31265148
Reviewed-on: https://chromium-review.googlesource.com/1343643
Commit-Ready: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Tested-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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ANX initializes its muxes to (MUX_USB_ENABLED | MUX_DP_ENABLED)
at init, this is error prone when the display and USB devices are
attached before the ANX chip is powered on hence, overriding the
default mux state to TYPEC_MUX_NONE at init.
BRANCH=none
BUG=b:117789358
TEST=Manually tested on yorp
1. EC command "typec 0" shows 'No Superspeed Connection' when
nothing is connected.
2. Able to get the HDMI display working on ANX before and after
EC reboot.
Change-Id: Ic174ff77fbfac7bb7478f4f92abf80018480c406
Signed-off-by: Sanna Parmar <fnu.sanna@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1282017
Tested-by: Sanna Fnu <fnu.sanna@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
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The alert line for TCPC will stay asserted as long as there are RX
messages for the TCPM (i.e. EC) to pull from the TCPC. We should clear
all of the RX messages we know about during a single alert handling
session.
This CL can stand on its own, but it is a part of a CL stack that will
tighten the critical section of time between received messages from the
TCPC and sending follow up message out through the TCPC.
See go/usb-pd-slow-response-time for more details.
BRANCH=none
BUG=b:112088135,b:112344286,b:111909282,b:112848644,b:113124761
BUG=b:113057273,b:112825261
TEST=Reduces reset issue in most cases for phaser, bobba. Does not seem to
adversely affect state machine negotiation. Full CL stack consistently
sends a REQUEST at 18ms after a SRC_CAP GoodCRC, which is well below the
24 ms threshold we need to be under for USB PD spec compliance.
Also testing pd_suspend scenario manually and EC was responsive after
port 1 suspend because of "bad behavior"
Change-Id: I1654b46400e9881f2927a5f6d6ace589edd182de
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1185727
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This converts the compile time option of
CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better
support draggon egg designs and reduce CONFIG complexity in general.
Introduce new mux_read/write to read from tcpc_config_t or mux driver
depending on new flag setting.
Audited all mux drivers for any use of tcpc_read/write and updated to
mux_read/write.
BRANCH=none
BUG=b:110937880
TEST=On Bip with CL stack:
Verified by connecting DP monitor at boot;
Verified plug / unplug of DP cable works;
Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1200062
Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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CPRINTS already appends a \n, so we currently have 2
BRANCH=none
BUG=none
TEST=none
Change-Id: Ib782a1b760c771af5ac200c18e0fe84ad7f0aaa1
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1162073
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BUG=b:111813040
BRANCH=none
TEST=verified on N25, Apple HDMI dongle attached monitor can display picture.
Change-Id: Ib6503083c6ae1003f5451cf90482929c1c757113
Signed-off-by: Xin Ji <xji@analogixsemi.com>
Reviewed-on: https://chromium-review.googlesource.com/1114396
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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We need to keep track of the low-power mode hardware state for each TCPC
so we can put a TCPC back into low power mode when it exits low power
mode before the software TCPM state machine wants it out of low power
mode.
This change also breaks the low power mode entry out of the drp_toggle
method into its own method: enter_low_power_mode.
BRANCH=none
BUG=b:77544959
TEST=Verified Analogix does not get into low-power mode loop. Tested
other SRC/SNK capabilities as well. Tested the device will go back into
low power mode if the AP access the TCPC via the 'ectool usbpdmuxinfo'
command.
Change-Id: I2fdefeda2bf13c2b79d988f0017629115438d313
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1119255
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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New part did not make it in time for SMT, so we can work around issue in
firmware.
BRANCH=none
BUG=b:109928364
TEST=builds
Change-Id: I6bac65a2148755cb68020fb8a0de7ba5cf2de726
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1093112
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This makes anx7447 driver timeout if it waits for flash operation
completion more than 100ms.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:79985105
BRANCH=none
TEST=Run anx_ocm erase on Nami
Change-Id: I1fa722aa532bd8d07dd191ad45e793f70a3b0742
Reviewed-on: https://chromium-review.googlesource.com/1066931
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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When we write a 0 to the register it actually prevents
future calls from correctly determining if the OCM is
present.
BRANCH=none
BUG=b:79123179
TEST=board with OCM still reports ocm after multiple anx_ocm 0 calls
Change-Id: I3899e8999483518fb42ddbd044d29e32fc3380f3
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1047830
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch makes the EC configure the mux for USB3.0 devices correctly.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:77976249,b:78239795
BRANCH=none
TEST=Verify on Nami USB3.0 devices are recognized reliably on anx7447 port.
Flip the device and verify the same.
Change-Id: I3813bc6631d9a971a7d04a0593b9381c00c3ae5e
Reviewed-on: https://chromium-review.googlesource.com/1036470
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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We do not want to erase the OCM flash automatically so we
can ensure that we fix our supply chain issues. Add a command
that will erase the OCM if needed.
BRANCH=none
BUG=b:77658388
TEST=verified command works on yorp
Change-Id: Iaf6ada3b1e223d15ae0d9624bdcc54b90cb33b64
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1035428
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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This CL adds support to check if the OCM flash is erased and if not,
will erase it at initialization time. These changes are encapsulated
in a new config option CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE and this
option is enabled for Yorp boards.
BUG=b:77658388
BRANCH=NONE
TEST=make -j buildall. Tested on a board that hadn't yet been
erased. Verifed the message
"anx7447: OCM flash checked and successfully erased"
was in the EC log, but did not show up on subsequent reboots.
Change-Id: I660e76a9498d3dc1ba821a04317b324f716c5089
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/988414
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The ANX7447 has a sink/source control lines which can be connected to
a PPC. The NX20P3483 PPC requires this control to set it's sink/source
switch control. The ANX7447 contols these lines via the tcpci COMMAND
register. This CL adds new tcpm_set functions to set either SNK or SRC
control via the COMMAND register.
BUG=b:77583452
BRANCH=NONE
TEST=Tested on port 0 of Yorp with an external charger. Prior to this
CL the PPC would remain in standby state because both snk/src control
remained low. With these changes, verifed that snk_ctrl is driven high
and vbus_sink_enable() function no longer returns an error.
Change-Id: Icbea0d3edb63ad19f3d2c76636208497b6939a72
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/996239
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Driver implements TCPC for ANX7447 chip. Enable Type C
port for USB and DP alt mode.
BUG=b:73793947
BRANCH=NONE
TEST=tested compiled binary for pdeval-stm32f072 board with this patch.
Power contract establishment, port role swap, DP alt mode works fine.
Change-Id: Ic11e499fc5fb4aba7732c75e4cb2fee54828c616
Reviewed-on: https://chromium-review.googlesource.com/956790
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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