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* anx7447: Add proper mux setting for DP alt mode and DTS mode (CCD)Lee, Shawn C2019-09-121-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch must be with removing the external 100k pull up/down resistors on the Aux P/Aux N lines which avoids the 3.3V DC bias voltage adds 0.8V pulse of aux channel to turn on TCPC internal P-MOSFET that causes the signal effect on CCD communication. BUG=b:124410548 BRANCH=None TEST=Connect external monitor,usb device or CCD cable to type-c port0 Each type-c device should work normally. Signed-off-by: Xin Ji <xji@analogixsemi.com> Signed-off-by: Jack Lai <jack.lai@intel.com> Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org> Tested-by: Zhuohao Lee <zhuohao@chromium.org> Change-Id: Ic920c83232163292c3d6dbfce1b23a8e3a1c6b6e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1680664 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-10/+10
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* driver/anx7447: Modify Vconn SW protection time of inrush current and power ↵xiong.huang2018-11-261-0/+11
| | | | | | | | | | | | | | | | | | | SW short protect current. The default values of Vconn SW protection time of inrush current is 19us and power SW short protect current is 370mA, it finds that the current of Vconn will up to 656mA during press F3+power button with Huawei dongle plugged in MB, then Vconn will drop when the large current happen. Vendor suggest to adjust Vconn SW protection time of inrush current(modify register 0xAA from 19us to 2.43ms) and power SW short protect current(modify register 0xA8 from 370mA to 440mA). BUG=b:119540455 BRANCH=none TEST=The HDMI display well with Huawei dongle at MB side when pressing F3+ power button to reboot OS. Change-Id: Ibb7e602fc4a4aa9cb69231a7f199f4ea31265148 Reviewed-on: https://chromium-review.googlesource.com/1343643 Commit-Ready: Xiong Huang <xiong.huang@bitland.corp-partner.google.com> Tested-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Octopus: add reset logic for C0 TCPCDiana Z2018-10-091-0/+9
| | | | | | | | | | | | | | | | | This change adds a call to the C0 TCPC reset for standalone TCPC boards which have that pin hooked up in hardware, and adds the GPIO as unimplemented for boards which do not have this yet. BRANCH=None BUG=b:112756630 TEST=Added a log print and rebooted EC on bobba to verify TCPC C0 reset, then verified that charging on C0 worked. Also imaged yorp proto 2 and rebooted, verifying C0 reset was not attempted. Change-Id: I615861f0d9ce9b5a89692e3982ed2e19c7e0b237 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1257647 Reviewed-by: Jett Rink <jettrink@chromium.org>
* anx7447: configure VCONN OCP(Over Current Protection) threshold.Xin Ji2018-07-251-0/+7
| | | | | | | | | | | | | | BUG=b:111813040 BRANCH=none TEST=verified on N25, Apple HDMI dongle attached monitor can display picture. Change-Id: Ib6503083c6ae1003f5451cf90482929c1c757113 Signed-off-by: Xin Ji <xji@analogixsemi.com> Reviewed-on: https://chromium-review.googlesource.com/1114396 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* anx7447: Timeout when waiting for flash operation completionDaisuke Nojiri2018-05-211-0/+8
| | | | | | | | | | | | | | | | | This makes anx7447 driver timeout if it waits for flash operation completion more than 100ms. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:79985105 BRANCH=none TEST=Run anx_ocm erase on Nami Change-Id: I1fa722aa532bd8d07dd191ad45e793f70a3b0742 Reviewed-on: https://chromium-review.googlesource.com/1066931 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* anx7447: convert automatic OCM erase into commandJett Rink2018-05-011-2/+2
| | | | | | | | | | | | | | | We do not want to erase the OCM flash automatically so we can ensure that we fix our supply chain issues. Add a command that will erase the OCM if needed. BRANCH=none BUG=b:77658388 TEST=verified command works on yorp Change-Id: Iaf6ada3b1e223d15ae0d9624bdcc54b90cb33b64 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1035428 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* anx7447: Add functions to the anx7447 driver to check/erase OCM flashScott Collyer2018-04-131-0/+41
| | | | | | | | | | | | | | | | | | | | | This CL adds support to check if the OCM flash is erased and if not, will erase it at initialization time. These changes are encapsulated in a new config option CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE and this option is enabled for Yorp boards. BUG=b:77658388 BRANCH=NONE TEST=make -j buildall. Tested on a board that hadn't yet been erased. Verifed the message "anx7447: OCM flash checked and successfully erased" was in the EC log, but did not show up on subsequent reboots. Change-Id: I660e76a9498d3dc1ba821a04317b324f716c5089 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/988414 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TCPM: Add TCPM driver for Analogix anx7447 chipDylan Lai2018-04-031-0/+61
Driver implements TCPC for ANX7447 chip. Enable Type C port for USB and DP alt mode. BUG=b:73793947 BRANCH=NONE TEST=tested compiled binary for pdeval-stm32f072 board with this patch. Power contract establishment, port role swap, DP alt mode works fine. Change-Id: Ic11e499fc5fb4aba7732c75e4cb2fee54828c616 Reviewed-on: https://chromium-review.googlesource.com/956790 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
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