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* TCPM: Rename enum tcpm_sop_type and its constantsAbe Levkoy2021-08-311-10/+10
| | | | | | | | | | | | | | | As a followup to CL:3104290, give the TCPCI TRANSMIT and RX_BUF_FRAME_TYPE types more consistent names. Most of them can be used for receiving, not just transmitting. Fix lint errors thus revealed. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I399ec479eacc18622fc4d3f55f8bdabf4560fcff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3125995 Reviewed-by: Keith Short <keithshort@chromium.org>
* USB MUX: Convert usb_mux HPD functions to use mux_state_tDiana Z2021-08-301-1/+3
| | | | | | | | | | | | | | Since we have definitions for HPD IRQ and level in the mux flags, extend this to the HPD update function in the usb_mux structure as well. BRANCH=None BUG=b:172222942 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I19c3a65fc821a341338d73fabd7876339b37fe7d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095437 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPM: Remove enum pd_msg_typeAbe Levkoy2021-08-181-3/+3
| | | | | | | | | | | | | Convert usages of this enum to tcpm_sop_type. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I5fed273d72e7ad0e191db0cb0d121b70bdd9ecdb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104291 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPM: Rename enum tcpm_transmit_typeAbe Levkoy2021-08-181-1/+2
| | | | | | | | | | | | | | | Rename tcpm_transmit_type to tcpm_sop_type to reflect that it can be used for Rx as well. Describe it in comments. This prepares to consolidate enum pd_msg_type into this enum. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ife97d4ad51c48f2e832b94e007954919e236a309 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104290 Reviewed-by: Keith Short <keithshort@chromium.org>
* USB MUX: Generalize mux ACKDiana Z2021-08-141-2/+7
| | | | | | | | | | | | | | | | | | | | Currently, only the virtual mux driver uses the mux ACK feature, but the actual wait for the host command ACK is a part of the usb_mux general code. Generalize this mux ACK wait so it's available if needed in the future for more muxes. Additionally, moving this wait out of the mux set will allow us to lock the muxes intelligently between tasks, without keeping the muxes locked during the inactive ACK wait. BRANCH=None BUG=b:172222942,b:186777984 TEST=tast typec.Mode*.manual on voxel Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I61a043425a482cc6f3170548c888d91ec20c2a82 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078411 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Support BIST Test ModeAbe Levkoy2021-01-221-0/+1
| | | | | | | | | | | | | | | | | | After the first BIST Test Data packet, enable BIST Test Mode if the TCPC supports it (currently just TCPCI). While in BIST Test Mode, mask ALERT.ReceivedSOP*MessageStatus. Unmask it when the test ends, due to Hard Reset or to detach. BUG=b:173023378,b:169385081,b:172709198,b:173028832,b:173028791 BUG=b:173141941,b:173142113 TEST=Complete TDA.2.1.2.2 BMC PHY RX INT REJ on volteer without running out of Rx buffer space or watchdog timeout (still fail though) BRANCH=firmware-volteer-13521.B-master Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I03bbc4cfacceebd0334aa814e11a16e09177a322 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2545667 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Move tcpic.h header into include/driverSimon Glass2021-01-071-1/+1
| | | | | | | | | | | | | | | | | | This header cannot currently be accessed by Zephyr since it is in a driver directory, not an include directory. This header has quite a bit of public stuff in it, so it seems reasonable to consider everything public. Move the header file and update all users. BUG=b:175434113 BRANCH=none TEST=make buildall -j30 build volteer on zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
* tcpm: Move tcpm.h into an include directorySimon Glass2020-12-221-1/+1
| | | | | | | | | | | | | | | | | | This header file is used from quite a few files, relying on the EC build system to find includes in the driver/tcpm directory. For Zephyr we don't want to add that as an include. It makes more sense for header files to be in an include directory, so move it and fix up the users. BUG=b:175434113 BRANCH=none TEST=build Zephyr and ECOS on volteer Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I5851914b1a7d3fdc1ba911c0fbe9046afbaf6f5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597985 Reviewed-by: Keith Short <keithshort@chromium.org>
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-2/+2
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* tcpm/anx74xx: Provide implementation of sop_prime_enable functionPatryk Duda2020-11-301-0/+3
| | | | | | | | | | | | | | | | | | | | CL:2542865 adds calls to tcpm_sop_prime_enable() function but there is no implementation of sop_prime_enable() provided in anx74xx_tcpm_drv. This causes EC crashes during firmware_PDTrySrc test. This patch adds tcpci_tcpm_sop_prime_enable() and implementation of sop_prime_enable() in anx74xx_tcpm_drv, similarly to other ANX drivers. BUG=b:168560801, b:162254118 BRANCH=none TEST=Flash eve with EC ToT, run firmware_PDTrySrc test. Make sure that EC doesn't crash during test. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I7cb2738f2a238901d03e3d8cb98ee39ce26bf38a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2560635 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* ANX3429: Disallow PD 3.0 operationDiana Z2020-08-131-0/+5
| | | | | | | | | | | | | | | The ANX3429 was developed before the PD 3.0 specification and is not PD 3.0 compliant. Disallow building this driver with PD 3.0 enabled. BRANCH=None BUG=b:159253723 TEST=make -j buidall passes; configure eve for PD 3.0 and see it fails Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I1d46d313f2914e98180e9a599b8ccdeb430afdef Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2354629 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* driver/tcpm: set PD_EVENT_RX_HARD_RESET event when receive hard resetRuibin Chang2020-07-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | When we receive hard reset, we should do Vbus on-off cycle and should keep cc connection. So I change the event setting from PD_EVENT_TCPC_RESET to PD_EVENT_RX_HARD_RESET for ITE TCPC. Stand alone TCPCs also use hard reset event instead of calling pd_execute_hard_reset(), because waked up pd_task() may have chance setting to other state. BRANCH=None BUG=b:159394180 TEST=On board reef_it8320, and it81202_pdevb: 1.TCPMv1: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. 2.TCPMv2: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Change-Id: Ie94757580e8fed4fb33896f9c1e071def49ff03d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284504 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* tcpm: Change the get_chip_info() to prevent race conditionsWai-Hong Tam2020-06-251-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original get_chip_info() returns a point of point to the chip_info. This way helps to cache the chip_info to a static variable and the function just returns the pointer to the static variable. This static variable has a race condition on the PS8805 chip. The PS8805 chip returns a different PID when the firmware is corrupted, i.e. 0x8803 instead of 0x8805. The !live case fixes the PID, by modifying the static variable directly. When another task calls the same function for the live case, the static variable is modified and has a race condition. This change fixes the issue by changing the get_chip_info() parameter to a point of the chip_info. The caller has to allocate a buffer in the stack and pass the address to the function. For the !live case, the function copies the cache value from the static variable to the buffer. So the static variable doesn't have a race condition. BRANCH=None BUG=b:159588335 TEST=Used ectool to check the PD chip PID 0x8805 (was 0x8803). localhost ~ # ectool pdchipinfo 1 vendor_id: 0x1da0 product_id: 0x8805 device_id: 0x1 fw_version: 0x0 min_req_fw_version: 0x0 Change-Id: Ic24615af77ea58016d286480572d2a282c4fa09a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2264477 Reviewed-by: Julius Werner <jwerner@chromium.org>
* tcpc: Add framework for Safe0V VBus Level checkingDenis Brockus2020-05-151-1/+4
| | | | | | | | | | | | | | | | | | | | In TCPCI Rev2, the extended status register was added that allows Safe0V to be known. For other platforms, this code will revert back to using Safe0V will be !Safe5V, as it currently is. BUG=none BRANCH=none TEST=verify USB functionality Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ifd6b5c3bb45ff076fd0d3b4b0bb687ccf6f4c91b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2199037 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* tcpc: change name of get_vbus_level to check_vbus_levelDenis Brockus2020-05-151-2/+2
| | | | | | | | | | | | | | | | | | | | this is to add near future functionality to allow not only the current PRESENT range check but to add Save0V range checking as well, for platforms that allow for this. This just lays the framework and is functionally equivalent. BUG=none BRANCH=none TEST=verify basic USB functionality Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I1eb3411bc3aa9b792c9b97799e1721e5cb229f64 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2199036 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* tcpci: remove cached pullDenis Brockus2020-03-201-6/+0
| | | | | | | | | | | | | | | | The cached pull is no longer needed, so removing the code. BUG=none BRANCH=none TEST=make buildall -j Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ib408b085452d6956ebbff04c038f6385a5202227 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2107995 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* driver/tcpm: fix incorrect pd message enum namesTing Shen2020-03-061-2/+2
| | | | | | | | | | | | | | | | CL:2001938 renamed SOPP/SOPPP to SOP_PRIME/SOP_PRIME_PRIME, but didn't change some affected code. This CL fixes the incorrect names. BUG=none TEST=`make BOARD=kappa` with TCPMV2 enabled BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I91526f5552a188e01338b72bc47125fb12ff53b2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2088826 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* usb_mux: retimer: mux as chained mux and retimerDenis Brockus2020-02-281-30/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes retimers appear as generic muxes. By allowing a chain of muxes they can be stacked up to the new configurations that zork requires and will continue to work as they did before on configurations that only have a single mux. The code used to have two different arrays, 1) muxes and 2) retimers. On one of the zork configurations the processor MUX stopped being the primary mux and the retimer took its place. In a different configuration of that same platform it left the primary and secondary alone but the mux_set FLIP operation had to be ignored. Since the same interfaces needed to be available for both it stopped making sense to have two different structures and two different methods of handling them. This consolodates the two into one. The platforms that do not have retimers, this change will not make any difference. For platforms like zork, it will remove the retimers and make them chained muxes. So testing on trembyle makes sense to verify, BUG=b:147593660 BRANCH=none TEST=verify USB still works on trembyle Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usbc: remove tri-state polarityDenis Brockus2020-02-151-10/+0
| | | | | | | | | | | | | | | | | | TCPCIr2 had an issue with setting CC coming out of DRP that if the polarity was not retained that the connection dropped back to OPEN. Unfortunately this change broke many of the other TCPCI implementations. I am working on a different method of dealing with coming out of DRP and this is no longer needed. BUG=none BRANCH=none TEST=verify USB-C is working Change-Id: Ifa8f26d417df2f5d5f41a23fbf7e6f9129031e94 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056968 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb: differentiate DTS polarity and normal device polarityDenis Brockus2020-01-301-2/+2
| | | | | | | | | | | | | | | | | When we have SNK_DTS polarity, we still want to drive both CC lines with the appropriate pull. SRC_DTS should not show as having a polarity. Non-DTS should show the correct polarity. We were only handling the last sentence of that. BUG=b:147754772 BRANCH=none TEST=verify SuzyQ works on zork Change-Id: I013f9d881427d6d97b655f88cfb3a94e3ed10c61 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2022914 Tested-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb_mux: cleanup: Replace mux state enums with ec_command bit flagVijay Hiremath2020-01-281-16/+17
| | | | | | | | | | | BUG=b:145796172 BRANCH=none TEST=make buildall -j Change-Id: Ie4ffaf208745764262931501f0dff77b525a4e59 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2017569 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tcpci: Only drive one CC line when attachedDenis Brockus2020-01-081-6/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the NCT38XX driver code was more generic TCPCI than specific to the chip. So moved a number of the functions over to be generically handled. In doing this I propagated the idea of tri-state polarity. It is now either NORMAL, FLIPPED, or NONE for unattached. This is needed for the generic handling of correctly setting CC. This required changing the polarity from NONE to the appropriate detected polarity when in auto toggle. tcpci_tcpm_set_cc will now only set a single CC line when attached and both when unattached. BUG=b:146003980, chromium:951681 BRANCH=none TEST=Charging works with both plug orientations with AP on TEST=Device works with both plug orientations with AP on TEST=Charging works with both plug orientations with AP off Change-Id: Ie4b5cc998902a346a4f4a2c1480204b3a81017dd Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1967932 Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-4/+4
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* usb: convert cc1 from int to enumJett Rink2019-08-091-1/+2
| | | | | | | | | | | | | | Refactor code to use proper type for cc1 and cc2 lines. BRANCH=none BUG=none TEST=builds. No functional change. Change-Id: Id292db8480920e2b191bac9d9ecc2685f61e4ea9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1744654 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-2/+2
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ec_commands: Rename 'renew' to 'live' in EC_CMD_USB_PD_CHIP_INFOKarthikeyan Ramasubramanian2019-07-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | Semantics of renew field in EC_CMD_USB_PD_CHIP_INFO is changing as follows: 0 -> Return hard-coded info for Vendor ID/Product ID and cached info for the Firmware Version 1 -> Return the live chip info for Vendor ID/Product ID/Firmware Version Also rename the 'renew' field to 'live' to match the new semantics. BUG=b:128820536,b:119046668 BRANCH=None TEST=make -j buildall; Boot to ChromeOS. Change-Id: Ie3dd022336b0be5c9728bb0ebabef32b7a6b5d57 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1617893 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org> Auto-Submit: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* tcpm: Refactor tcpc_config to include a flags fieldScott Collyer2019-04-171-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | tcpc_config contained a field for both the alert polarity and open drain/push pull configuration. There is also a possible difference in TCPC reset polarity. Instead of adding yet another field to describe this configuration, it would be better to convert alert polairty, open drain and reset polarity into a single flags field. This CL modifies the tcpc_config struct to use a single flags field and adds defines for what existing flag options can be. BUG=b:130194031 BRANCH=none TEST=make -j buildall Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e Signed-off-by: Scott Collyer <scollyer@google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1551581 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* anx74xx: Make ML0/ML1 unconnected if USB is enabled but DP isn'tWai-Hong Tam2019-02-011-7/+13
| | | | | | | | | | | | | | | | | | | If USB is enabled, the original logic uses the pin assignment D which also connects the ML0 and ML1 switches, not matter DP is enabled or not. It affects some DP signal integrity on the other port which shares the same DP source. Should make the ML0/ML1 switches unconnected if DP is not enabled. BRANCH=none BUG=b:116879483 TEST=According to the bug, manually typing the i2c command like this change to disconnect ML0/ML1 fixes the issue. Change-Id: Icfa10b97331be7935bb626771b41eb509fa61f50 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1282005 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* pd: Remove unneeded code from anx74xx.c tcpc driverSam Hurst2019-01-131-10/+5
| | | | | | | | | | | | | | | Remove unneeded mask from variable BUG=b:122109575 BRANCH=none TEST=manual Change-Id: I257233f73db4f76dc251814cde88ea38eaffef88 Signed-off-by: Sam Hurst <shurst@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1401122 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* anx74xx: Rename the registers to more meaningfulWai-Hong Tam2019-01-111-14/+22
| | | | | | | | | | | | | | | Rename the registers which configures the internal switches. No logic change. BRANCH=None BUG=b:116879483 TEST=None. No logic change. Change-Id: I10bcbc7d0da1b8e97be0811b8f3a188037c5d68c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1282004 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* pd: Enable USB PD SOP' and SOP'' CommunicationSam Hurst2019-01-071-3/+55
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, the PD stack ignores messages received from SOP' and SOP'' and this prevents the stack from communicating with VCONN Power Devices and Cable Plugs in general. I propose encoding the message address (SOP*) in the message header. The message header is encoded as a 16-bit value but the TCPC drivers use a 32-bit type for the header. The SOP* address will be stored in bits 31 to 28 of the message header and the PD stack can check those bits to determine the address of the message. BUG=b:122109575 BRANCH=none TEST=manual Change-Id: I2b34c16cae186202c9cf0bc5f940e05151e88cbf Signed-off-by: Sam Hurst <shurst@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1390951 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* tcpm: cache the firmware version for anx74xx and ps8xxx chips.Paul Moy2018-10-231-9/+7
| | | | | | | | | | | | | | | | | | | | All chip info for the anx74xx and ps8xxx chips should be cached after the first read, so that the info can be accessed in the future without worrying about chip state. Now that we check the version registers for these two chips, we need to cache that information as well. BRANCH=none BUG=b:117301622 TEST=on warm reboot with GBB flags cleared, cbmem -t shows the EC verification stage taking ~30ms instead of ~65ms. Change-Id: I6077438b58e64b66a23db2992ba025ae3a864c19 Signed-off-by: Paul Moy <pmoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1291794 Commit-Ready: Martin Roth <martinroth@chromium.org> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cleanup: rename Rp enum values for clarityJett Rink2018-10-121-3/+3
| | | | | | | | | | | | | | | | | | | | The tcpc_cc_voltage_status enum contains different values for different detected resister values of the port partner. Both Ra and Rd values contained that in the name, but Rp values did not. Update _SNK_ tag to _RP_ tag to make it more clear what resistor is being applied by port partner. Also adding a few more comments in usb_pd_tcpm.h for clarify on the different uses of CC resistor enums. BRANCH=none BUG=none TEST=builds. just a rename change. Change-Id: Id5f7bb502f735bef5937585e2e8bd516ad428a99 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1278103 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* tcpc: Resume suspended ports after an intervalJonathan Brandmeyer2018-10-041-3/+4
| | | | | | | | | | | | | | | | | | | | | When it appears that the TCPC queue handling logic may be stuck in an infinite loop, the EC will break the loop by disabling the port in order to avoid task starvation. However, nothing attempts to resume the port, and it therefore remains disabled until the next EC reset. Wake back up after a reasonable interval in order to automatically retry. On port suspend, completely drain the TCPM message queue. BUG=chromium:891713 TEST=On Careena hardware, with analogix TCPC firmware v1.5 and an electronically marked cable that sends SOP' messages, verify that the EC auto-retries every second. After removing the offending cable, and PD power supply will work. BRANCH=grunt Change-Id: I563b763501333eb36ee1f76e6f484ebb3245c82a Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1258571 Reviewed-by: Jett Rink <jettrink@chromium.org>
* anx3429: mark that version 1.6V is requiredJett Rink2018-09-281-0/+9
| | | | | | | | | | | | | | | | | | | | Due to SOP' false detection issues, anyone using ANX3429 should upgrade the firmware to version 1.6 This new field will be used by factory/automated tests to ensure new boards (and existing board that cherry pick these changes) remember to upgrade the TCPC FW thus avoiding discovering the same bugs in each project. BRANCH=none BUG=b:64752060,b:116255749 TEST=tested ps8751 path with is the same as ANX. I don't have a device with ANX3429 right now. Change-Id: Id4df192aca30f82baee3021189aef72a62deee4e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1246266 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* pdchipinfo: add min firmware version to pdchipinfoJett Rink2018-09-281-2/+21
| | | | | | | | | | | | | | | | Add a new field to the pdchipinfo host command that exposes the minimum required firmware version that we know about. This will allow factory tests or automated test to compare this version to the current version and fail. BRANCH=none BUG=b:116068318 TEST=with corresponding ectool change, min value is reported correctly Change-Id: Idf338795c3fd6f9f95e51471d0f6a7a422901d52 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1240457 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* pd: Don't auto toggle when DRP state is not dual role.Edward Hill2018-09-171-38/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When in PD_STATE_DRP_AUTO_TOGGLE, we were always enabling DRP auto-toggle, even when drp_state is PD_DRP_TOGGLE_OFF or PD_DRP_FORCE_SINK, which prevents us from acting as source. This caused an infinite loop of entering and exiting low power mode when a sink-only device was plugged into a PS8751 port when the system is in S5/G3. To fix this, only enable DRP auto-toggle when drp_state allows us to be dual-role. One problem with doing this is that the ANX3429 doesn't support low power mode with auto-toggle disabled. Luckily, the ANX3429 will stay in low power mode when a sink-only device is connected. BRANCH=none BUG=b:72007056,b:111663127 TEST=sink device + ANX3429: low power mode [1] TEST=sink device + PS8751: low power mode [1] TEST=charger via hub + ANX3429: 50% chance fail to charge [2] TEST=charger via hub + PS8751: starts charging (all tests with Grunt in G3) [1] dut-control pp3300_tcpc_mw -> 3.5 [2] b/72007056 still remains to be fixed. Change-Id: Id190a3daa78847871288e66d8f229a485a6522e3 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194352 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Change tcpm_set_drp_toggle() to tcpm_enable_drp_toggle()Edward Hill2018-09-171-8/+3
| | | | | | | | | | | | | | | Change tcpm_set_drp_toggle() to tcpm_enable_drp_toggle(), since enable=0 was unused. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I760a067b11984a579261deac856419d46400497b Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194353 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* tcpm: add TCPC RX circular buffer in ECJett Rink2018-09-071-20/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The alert line for TCPC will stay asserted as long as there are RX messages for the TCPM (i.e. EC) to pull from the TCPC. We should clear all of the RX messages we know about during a single alert handling session. This CL can stand on its own, but it is a part of a CL stack that will tighten the critical section of time between received messages from the TCPC and sending follow up message out through the TCPC. See go/usb-pd-slow-response-time for more details. BRANCH=none BUG=b:112088135,b:112344286,b:111909282,b:112848644,b:113124761 BUG=b:113057273,b:112825261 TEST=Reduces reset issue in most cases for phaser, bobba. Does not seem to adversely affect state machine negotiation. Full CL stack consistently sends a REQUEST at 18ms after a SRC_CAP GoodCRC, which is well below the 24 ms threshold we need to be under for USB PD spec compliance. Also testing pd_suspend scenario manually and EC was responsive after port 1 suspend because of "bad behavior" Change-Id: I1654b46400e9881f2927a5f6d6ace589edd182de Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185727
* ss-mux: update semantics for TCPC/MUX only used as MUXJett Rink2018-09-051-25/+21
| | | | | | | | | | | | | | | | | | | | | | | | This converts the compile time option of CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better support draggon egg designs and reduce CONFIG complexity in general. Introduce new mux_read/write to read from tcpc_config_t or mux driver depending on new flag setting. Audited all mux drivers for any use of tcpc_read/write and updated to mux_read/write. BRANCH=none BUG=b:110937880 TEST=On Bip with CL stack: Verified by connecting DP monitor at boot; Verified plug / unplug of DP cable works; Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200062 Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* anx74xx: consolidating anx74xx alert handlerJett Rink2018-08-301-90/+42
| | | | | | | | | | | | | | | | | There is a unneeded level on indirection for the anx74xx alert handler that we can remove. This also make is more clear what is happening in the child CLs. See go/usb-pd-slow-response-time for more information. BRANCH=none BUG=none TEST=no change on grunt device Change-Id: I61f7caf09fc5cb5fa889fb727ee39bea681a97e9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185726 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* cheza: Configure ANX3429 interrupt as open-drainWai-Hong Tam2018-08-231-0/+8
| | | | | | | | | | | | | | | | | This interrupt pin by default is a push-pull. It causes leak to EC VSPI power during EC watchdog reset. As in our design, we use this interrupt pin as open-drain. Should configure the register to make it open-drain. BRANCH=none BUG=b:112906111 TEST=Flashed the EC image to Cheza rev-2 board. Typed "reboot" command and then EC reset properly. Change-Id: Iee5db3cb5b5291778d97dee4fc70369d34344ce7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1185871 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* tcpc: debounce entry into low-power modeJett Rink2018-07-181-5/+22
| | | | | | | | | | | | | | | | | | | | | | We need to keep track of the low-power mode hardware state for each TCPC so we can put a TCPC back into low power mode when it exits low power mode before the software TCPM state machine wants it out of low power mode. This change also breaks the low power mode entry out of the drp_toggle method into its own method: enter_low_power_mode. BRANCH=none BUG=b:77544959 TEST=Verified Analogix does not get into low-power mode loop. Tested other SRC/SNK capabilities as well. Tested the device will go back into low power mode if the AP access the TCPC via the 'ectool usbpdmuxinfo' command. Change-Id: I2fdefeda2bf13c2b79d988f0017629115438d313 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1119255 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* anx3429: force chip reset on PD_RESUMECaveh Jalali2017-08-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | we need to properly restart the anx3429 after a firmware update. simply initializing the chip doesn't seem to get it to reload its firmware - at least not the portion of the chip that implements the firmware version register. so, we explicitly power down and reset the chip before reinitializing it to force it to run the new firmware. the chip also needs a 10ms "off" time so the reset is properly seen by the chip, so i did a light refactoring of the code paths that reset the anx3429. TEST=used 2 different firmware blobs and verified it switches between them during software sync. BRANCH=none BUG=b:35586895 Change-Id: I967898dd906f21bdc5bc4ce9c1dff9f873d198c1 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/631976
* anx3429: read chip firmware version during initCaveh Jalali2017-08-251-0/+2
| | | | | | | | | | | | | | | | | | | | fetching the chip firmware version toward the end of the chip anx74xx_tcpm_init() sequence is a good place to do this. we need this info in any case and this is a safe place to access device registers and cache the values. subsequent chip firmware queries typically return the cached value. also, tcpci_tcpm_init() is already structured this way. TEST=verified with follow-up CL that firmware update succeeds and new version is reported BRANCH=none BUG=b:35586895 Change-Id: Ic3fd07bbf8a220bfd506d59d8a1f3ea25b14e94c Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/634513 Reviewed-by: Shawn N <shawnn@chromium.org>
* anx74xx: enable driver "release".Caveh Jalali2017-08-241-1/+5
| | | | | | | | | | | | | | | | | | | TEST="make buildall" succeeds, "make runtests" passes for reef. returning SUCCESS instead of UNIMPLEMENTED from .release() means the pd_task() is allowed to reinitialize the TCPC when coming out of PD_STATE_SUSPENDED or similar scenario. TEST=verified anx3429 firmware update succeeds, USB port still usable for charging after update. BRANCH=none BUG=b:35586895 Change-Id: I1a624ccf25dfa6468de72f8564f936bc0a35edb1 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/596797 Reviewed-by: Shawn N <shawnn@chromium.org>
* tcpm: add .release driver operation.Caveh Jalali2017-06-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | similar to the USB_PD_TCPC case, add release/init operations when the pd_task enters/leaves the PD_STATE_SUSPENDED state. one use case for PD_SUSPEND is to get exlusive access to the TCPC for things like firmware update, so the release/init operation is needed to get the TCPC and driver into a good state. updated all tcpm_drv style drivers. for backward compatibility, "old" drivers that may not handle init/release properly simply return EC_ERROR_UNIMPLEMENTED for tcpm_release(). pd_task() uses this as a signal that it should not try to re-init() the driver. TEST=tested in combination with follow-on CLs to do TCPC firmware update on electro. also built for kevin, eve, sand which are some of the other boards using these drivers. "make buildall -j" passes. BRANCH=none BUG=b:35586896 Change-Id: I3d2964a79e710428f7a6e7004d68ab424af85be8 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/544660 Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: ensure tighter timings for IRQ_HPD pulseKevin K Wong2017-05-291-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to ensure we are always meeting the deadlines for the IRQ_HPD pulse, increase the priority of the processing by moving the rising edge from the low-priority HOOK task (in a deferred function) to the caller task (which is the high-priority PD task). The downside is we are now sleeping in the PD task blocking the processing of the PD messages during this time. Changed HPD_DSTREAM_DEBOUNCE_IRQ to 500us instead of 750us. According to DP spec, the IRQ_HPD pulse width is between 500us and 1000us. Ensure there is a minimum of 2ms delay in between each IRQ_HPD as specified by the DP spec, by sleeping before sending the next pulse if needed. (in practice, this should not wait if we are not too off processing the messages) BUG=chromium:711334 BRANCH=glados strago reef oak TEST=manual, on SKL platform with kernel 3.18 and MST, verify display is functional on USB-C dock. Change-Id: Ib2e9dd608c5f1c671cc5a0fd979a5742101375ff Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/508629 Reviewed-by: Todd Broch <tbroch@chromium.org>
* tcpm: anx74xx: Improvements to low power mode for S3/G3 chipset stateScott2017-04-111-13/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before entering standby mode, bit 7 (cable_det) or analog_ctrl_0 is cleared. This allows a new cable detect event to trigger the EC to put the ANX4329 into normal mode. However, in some cases such as when in S3/S5/G3 chipset power states a port will be in sink only mode and therefore won't attach when a sink only adapter is connected to the port. This results in the an indefinite toggle of standby<->normal mode transitions. This constant toggle floods the EC console and more importantly prevents the ANX4329 from remaining in standby mode and the power consumption remains at ~9.5 mW instead of ~1.2 mW when no adapter is connected. This CL adds logic around clearing the cable_det bit so that it's only cleared if both CC lines are open or if an Emark cable is attached. Emark cable is determined from the presence of Ra on one CC line and no Rd on the other CC line. The special consideration for an Emark cable is reqiured because when an Emark cable is connected, the USB PD auto toggle state may require some number of iterations until the attach event is recognized. In order to support handle cases where the drp mode is changed via either the EC console command or host command, added a call to tcpm_set_drp_toggle whenever the drp state is updated. Since the drp mode is updated upon chipset resume events, the chipset resume hook in board.c for anx74xx_cable_det_handler() became redundant and hence it was removed. BUG=b:35775019,b:35586188 BRANCH=reef TEST=Tested the following cases: - Sink, source adapters in chipset S0. Verified that adapters connected as expected. Also, used Emark cable to connect to both USB PD chargers (source) and Pixel phone (sink). - Run 'lidclose' on EC console then connect Type C -> A adatper [3490.370125 TCPC p0 reset!] [3490.389588 TCPC p0 Low Power Mode] It no longer toggles indefintely and after running 'lidopen' verified that port 0 is now in SRC_DISCOVERY. - In S3/G3 connected USB PD charger with regular and Emark typeC cable. Verified that port 0 is in SNK_READY state. - use 'pd dualrole sink' and test with Type C -> A adatper. Verified that tcpc wakes up, but goes into standby mode until entering 'pd dualrole on'. - When sink only adapter is connected in S3/G3, measure power level ~1.2 mW as opposed to ~10 mW in S0. - Repeated similar tests on port 1 (parade tcpc) to verify that adapters connected as expected. Change-Id: Ib8de666f72723934186fee7869f9dda01381c7a8 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/463991 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: S Wang <swang@analogix.corp-partner.google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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