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* Merge remote-tracking branch 'cros/main' into firmware-gwc-fsiScott Collyer2021-11-2341-383/+1499
|\ | | | | | | Change-Id: Id9b5b5cb1db7428cd9f12452d73842d8c1f2705a
| * usb_mux: tusb1064: Add method to set DP Rx EQ gainScott Collyer2021-11-232-21/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds a method to set DP Rx EQ gain. The previous version of the driver was enabling a 10 dB gain by default in the init function. This CL removes setting both gain and EQ_OVERRIDE by default. A separate CL in the stack moves the 10dB gain setting to the board.c file for the only other board that currently is using the TUSB1064. BUG=b:206059703 BRANCH=quiche TEST=Verified on gingerbread that both EQ_OVERRIDE is set and the gain is set in both registers as expected. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Id2dc6127d27304d8149f7c51a8d527e046595baf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291129 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
| * driver: bmi3xx: Fix offset values read/write issueLatchia2021-11-232-50/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bmi323 accelerometer offset values read out doesnot match with the values which we set This issue is solved by, 1.Power mode should be in suspend mode before writing to DMA 2.Resetting the offset using bits of 0x3F in DMA followed by 0x301 CMD 3.Wait time of 120ms after every DMA offset related transaction NOTE: Offset reset will happen everytime when we write but FOC should not reset the existing offset BRANCH=none BUG=b:204795428 TEST=1. make BOARD=guybrush -j 2. Flash EC binary on the gurbrush proto 2 device 3. In kernel run: ectool motionsense cd /sys/bus/iio/devices/iio:device2 && cat location cat in_accel_x_calibbias # Displays sensor offset for x axes in terms of milli-g echo 10 > in_accel_x_calibbias # Sets 10 mg as x axes offset cat in_accel_x_calibbias # Should show value as 10 Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Change-Id: If6478624519aaa6bbe6ae13e9af67e7677365a1f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3283203 Tested-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Auto-Submit: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
| * driver/temp_sensor: support thermal sensor pct2075Zick Wei2021-11-233-0/+162
| | | | | | | | | | | | | | | | | | | | | | BUG=b:206704936 BRANCH=main TEST=verify thermal sensor work as intended on nipperkin Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Id76d6c09c48a9927e85a0b81b629e9a5639041bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3290824 Reviewed-by: Rob Barnes <robbarnes@google.com>
| * bq25710: Allow PKPWR_TOVLD_DEG to be configuredCaveh Jalali2021-11-232-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for customizing the input current overload time when in peak power mode. This means ILIM2 can momentarily be exceeded to support system power spikes. BRANCH=none BUG=b:190737958 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I8acb53372eaf63c23f5380cdbb3a4b5b1f9d5ab6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3296744 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * zephyr: test: sn5s330 dead battery boot initAaron Massey2021-11-221-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Verify sn5s330 PP2 are force enabled. BRANCH=none BUG=b:203364783 TEST=zmake configure --test zephyr/test/drivers Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: I118b05140228b89d27790863a3c8ddc62793fedc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271367 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
| * bq25710: Allow PP_IDCHG2 to be configuredCaveh Jalali2021-11-191-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for enabling PROCHOT assertion when the 2nd battery discharge current limit (IDCHG_TH2) is reached. BRANCH=none BUG=b:190737958 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I4e035c6437a728556804adbb142b59e62168cb4e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3292921 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * bq25710: Add PP_IDCHG2 definitionCaveh Jalali2021-11-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the register field definition for PP_IDCHG2. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ic3e61d7e1e32f8b9fbb28bb4185a9cc9eb080b81 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3292442 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * ps8xxx: disable low power mode for PS8815Scott Chao2021-11-191-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't send TCPC_REG_COMMAND_I2CIDLE to PS8815 since it will enter sleep mode by itself. Also skip the zephyr "tcpc low power mode" test on PS8751/PS8815. BUG=b:206553720 BRANCH=none TEST=make -j BOARD=gimble TEST=zmake configure --test zephyr/test/drivers Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: If49079e30137bc08125c8b58c0a535efd4e9931f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3282971 Tested-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * bq25710: Update bq25710 BATOC_VTH definitionsCaveh Jalali2021-11-182-20/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the bq25710 register definitions based on the February 2021 datasheet revision. The updated bq25710 definitions matche the bq25720, so we can simplify BATOC_VTH handling. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I6c6e6989545b5f58c276e11b99dda551ba68c7e4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3288755 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * bq25710: Update IL_AVG handlingCaveh Jalali2021-11-182-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original bq25710 datasheet specifies different IL_AVG encodings form the bq25710 february 2021 revision. The update actually matches the bq25720 encoding, so we can merge the two cases. We only have one board family using the bq25720 and it calls for a 10 A limit. We can leave the code as-is for now. There is no need for a config option until another bq25720 design needs a different limit. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I2a7466dec4a2d35ffb33a6684d9c19600e627086 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3288756 Reviewed-by: Boris Mittelberg <bmbm@google.com>
| * bq25710: Allow IDCHG_TH2 to be customizedCaveh Jalali2021-11-171-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for configuring the charger's 2nd battery discharge current limit (IDCHG_TH2). BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I84512b7a93ccea8e8b0a53e6a655f59e85845e2b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3284638 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Replace CONFIG_BQ* with CONFIG_CHARGER_BQ*Caveh Jalali2021-11-171-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a series of copy-paste errors where CONFIG_BQ25710_* was used instead of CONFIG_CHARGER_BQ25710_*. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I6a1271fd1140d4bc5f092a216e441e71960bcf13 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3284641 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Allow VSYS_MIN to be customizedCaveh Jalali2021-11-171-9/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for configuring the minimum system voltage. Since the MIN_SYSTEM_VOLTAGE register was renamed to VSYS_MIN on the bq25720, the code has been updated to reflect the new name as it is more descriptive. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Icfa0a8c433e7ce69671b120bf00369e8c4bae1b9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3284640 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Add VSYS_MIN to register definitionsCaveh Jalali2021-11-173-13/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds VSYS_MIN register definitions to bq257x0_regs.h. This register is called MIN_SYSTEM_VOLTAGE on the bq25710, so that has also been added for completeness. Code referring to this register has been updated to use the chip specific macros as the layout and encoding of the voltage field is different. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ib456d66e10cb274282deca11a15262e8242ddb08 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3284639 Reviewed-by: Keith Short <keithshort@chromium.org>
| * Virtual mux: Clear HPD state when DP inactiveDiana Z2021-11-161-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HPD state is meaningless if DP is no longer active, so only preserve HPD if DP is still set on the mux. BRANCH=None BUG=b:205812849 TEST=on voxel, ensure HPD state is cleared on BB retimer and virtual mux at the same time when we start mode exit Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I58d37c781e5c926731080c483c8e9dd9d481ce9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3283197 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Allow IDCHG_DEG2 to be customizedCaveh Jalali2021-11-161-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for configuring the IDCHG_TH2 deglitch time (IDCHG_DEG2). BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I6426b46b253863a28edeb431da6c581953484db7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3284637 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * bq25710: Allow VSYS_UVP to be configuredCaveh Jalali2021-11-161-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for customizing the VSYS under voltage (VSYS_UVP) lockout threshold. This is a 3 bit field with default value 0. The actual voltage encoded is (0.8 * <value> + 2.4), allowing a range 0f 2.4 V to 8.0 V to be specified. The CONFIG_BQ25720_CHARGE_OPTION_4_VSYS_UVP_CUSTOM option specifies if this field should be set. If so, it is set to the value of CONFIG_BQ25720_CHARGE_OPTION_4_VSYS_UVP. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I81f538edc9f68ccb6236a5eb0205edfa3441664a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3283416 Reviewed-by: Boris Mittelberg <bmbm@google.com>
| * bq25710: Allow PP_ACOK to be configuredCaveh Jalali2021-11-161-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for configuring PP_ACOK as a prochot trigger. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I183c31daf89df316f7bcb1dc7b66e89bfc66c26c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3283415 Reviewed-by: Boris Mittelberg <bmbm@google.com>
| * bq25710: Allow PP_BATPRES to be configuredCaveh Jalali2021-11-161-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for configuring PP_BATPRES as a prochot trigger. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I83a46e597f0ed117b0e686531b00eedbeb66412a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3283414 Reviewed-by: Boris Mittelberg <bmbm@google.com>
| * bq25710: Allow PP_INOM to be configuredCaveh Jalali2021-11-161-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for configuring PP_INOM as a prochot trigger. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I7e797cd06dac8cf15e4ec9c1704d9d6b6e56bdd5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3283413 Reviewed-by: Boris Mittelberg <bmbm@google.com>
| * TCPMv2: Handle timing corner case in TCPC PRL discardDiana Z2021-11-151-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a message is received by the PD_INT task between the PRL_RX run and PRL_TX run, we may end up sending a message to the TCPC even though the PRL_RX will be forcing a discard next PRL cycle. This will get the PE out of sync, as it will assume the message was discarded when it was in fact sent. Peek into our receive queue right before sending a message to the TCPC, in order to reduce the liklihood of a mix-up like this happening. BRANCH=None BUG=None TEST=on voxel, run tast typec.Mode*.manual and observe we can successfully exit DP mode even when a VDM:Attention command comes in mid-PRL cycle Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6979bf53972e40794dfae83f631b865a00d73302 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3192236 Reviewed-by: Scott Collyer <scollyer@chromium.org>
| * USB MUX: Add timing debug for mux taskDiana Z2021-11-151-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding a debug option which may be enabled in order to print out how long mux sets are taking on a board. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I69ba73982825d047ff8e1fe4f2b60bf53d4e166f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078416 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
| * USB MUX: Create a task to perform mux setsDiana Z2021-11-151-18/+229
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms may have very extended times to complete mux sets (in the 100s of ms range), so isolate these mux sets to a dedicated task, which the PD task may query to know when they have completed. Also enqueue HPD sets, since they will need to be in correct sequence with some mux sets such as setting the DP pins. BRANCH=None BUG=b:186777984,b:172222942 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I45ec7bd9a0c42112ec5b59f2f23988a8b810b57c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078415 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
| * bq25710: Refactor prochot option 1 register initializationCaveh Jalali2021-11-132-31/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This separates the initialization of the prochot option 1 register into a dedicated function. Multiple bit-fields will need to set in this register based on board configuration, so it's best to group these operations in one place. Also, numeric/boolean values are replaced with symbolic values when setting register fields for clarity where appropriate. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I73e6bd4f719f19ae21677b9fca90f10cf05665c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277940 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
| * bq25710: Refactor Vmin Active Protection register initializationCaveh Jalali2021-11-131-18/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This separates the initialization of the Vmin Active Protection register into a dedicated function. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ib75d028c0a5bb5982fe34bf756a68f942769fad1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277939 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
| * bq25710: Make VSYS_TH2 Kconfig friendlyCaveh Jalali2021-11-132-17/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM config option to decide if CONFIG_CHARGER_BQ25720_VSYS_TH2_DV should be applied. It is no longer sufficient to set CONFIG_CHARGER_BQ25720_VSYS_TH2_DV to the desired value. This matches how defines are generated by kconfig and allows IS_ENABLED() to be used. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ie3a6aa2d585d7975ada2863fd20ad296b23d504c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277938 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
| * bq25710: Separate Vmin Active Protection register settingCaveh Jalali2021-11-121-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves the Vmin Active Protection register setting out of a conditional. Setting this register only needs to depend on relevant config options which are already in place. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I3998d5b04064d4dda1c2bdf3881954ef4068d05d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277942 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * bq25710: Set IL_AVG to 10A on bq25720Caveh Jalali2021-11-121-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reduces the converter inductor average current clamp to 10 A on the bq25720 from the default 15 A. This means both chip variants will use the same 10 A limit. All current designs using the bq25720 prefer the 10 A setting, so it makes sense to over-ride the default on the bq25720 to mimic the bq25710 behavior. There is no need to make this configurable at this time. BRANCH=none BUG=b:185190976,b:192108571 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I8d903eb8d46e145467b26fe8d6f6336ca20f3f5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277937 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * ISL923x: Set charge current to 0 when ocpc precharge completeMichael5 Chen12021-11-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Set primary charge current to 0 when enable ocpc charge. BUG=b:202796060 BRANCH=dedede TEST=SIT check function is PASS Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Change-Id: I0c635624c79935f50da591400d16fe77a66b70be Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3274732 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| * RAA489000: Configure I2C wake functionDiana Z2021-11-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Configure the function for i2c wake. BRANCH=None BUG=b:195393479 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I2149e6ca91322e850393a26946128da9d11cde2b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262586 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| * TCPCI: Add an interface for I2C wakeDiana Z2021-11-111-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we wake a TCPC from I2C idle, there is a procedure in the TCPCI specificaiton to follow. Implementing the full procedure will take some refactoring, but for now at least send the i2c wake to the chip when we plan to wake it. Otherwise, we don't actually wake the chip until the LPM exit debounce finishes, which isn't in the intended use of the LPM exit debounce. BRANCH=None BUG=b:195393479 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6d5a6d27cce653ab02b59ab0e09d06657f640c39 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262585 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| * bq25710: Allow BATOC threshold to be configuredCaveh Jalali2021-11-111-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for selecting the minimum BATOC protection threshold to be used with EN_BATOC. The minimum threshold is 150% of PROCHOT IDCHG on the bq25710 and 133% of PROCHOT IDCHG_TH2 on the bq25720. The default threshold is 200% on both chips. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I22576d1cf7c78bfefeb1c2582434ddc0220a1928 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3275001 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Allow ACOC_VTH to be configuredCaveh Jalali2021-11-111-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for selecting 133% of ILIM2 for the AC over-current protection threshold. The chip default is 200% of ILIM2. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I75457185fca905519897b66d460752989b3a7ff2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3275000 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Allow EN_ACOC to be configuredCaveh Jalali2021-11-111-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for enabling AC over-current protection (EN_ACOC bit). The converter turns off when the OC threshold is reached. The threshold is determined by the ACOC_VTH bit. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I1bc8e34ee4e7cef0d6d796387eb4f290fada82d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3274999 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Refactor charge option 2 register initializationCaveh Jalali2021-11-111-9/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This separates the initialization of the charge option 2 register into a dedicated function. Multiple bit-fields will need to set in this register based on board configuration, so it's best to group these operations in one place. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ief0f5b3d956f199544afe4f68217cfff01cb0c3b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3274998 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * ppc: add an interrupt pointer to the ppc driver APIDawid Niedzwiecki2021-11-114-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a pointer to interrupt handler to ppc driver API. It allows calling the pointer from ppc_chips array instead of hardcoded functions. BUG=b:194432779 TEST=build EC for all boards BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I163a8ec91a02f8095d8dca76a56b9c9c91962228 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3270681 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * bq25710: Allow CMP_REF to be configuredCaveh Jalali2021-11-111-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for selecting 1.2 V for the CMP_REF field in the charge option 1 register. When CONFIG_CHARGER_BQ25710_CMP_REF_1P2 is defined, the charger chip will be initialized to use 1.2 V for CMP_REF. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I8793506b318b61505aa7c0afbc4d8e898680b44d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3272352 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Refactor charge option 1 register initializationCaveh Jalali2021-11-111-15/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This separates the initialization of the charge option 1 register into a dedicated function. Multiple bit-fields will need to set in this register based on board configuration, so it's best to group these operations in one place. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I2e5bd6d9d25fe8ec7d164dcbe1e985bd55b87783 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3272351 Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Simplify EN_PSYS enablingCaveh Jalali2021-11-111-13/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This simplifies the bit-field manipulation code for enabling PSYS monitoring. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I5be41adc6edca94db531e3cf5157b0d3a4f50d71 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3272350 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * zephyr: emul: sn5s330 add int status registersAaron Massey2021-11-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Added status registers used by driver during initialization. BRANCH=none BUG=b:203364783 TEST=zmake configure --test zephyr/test/drivers (checked coverage change) Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: Id86d92001ebde11ece907ebdb3116e70883cd44b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3257778 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
| * bq25710: Update with new bq257x0 definitionsCaveh Jalali2021-11-102-117/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the bq25710 driver to use the new style register layout definitions from bq257x0_regs.h. The original bq25710.h no longer includes register layout information. BRANCH=none BUG=b:185190976 TEST=util/compare_build.sh -b all reports MATCH Cq-Depend: chromium:3263232 Change-Id: I63a7ba6df53513c4a8953a7c33f2bad86cdaa163 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3263233 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
| * bq25710: Refactor bq25710 register definitionsCaveh Jalali2021-11-091-0/+267
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces the bq257x0_regs.h header file that more accurately describes the bq25710 and bq25720 charger chip registers. BRANCH=none BUG=b:185190976 TEST=with rest of patch series, util/compare_build.sh -b all reports MATCH Change-Id: I08ee6d2f22e7a13d411d489f41df78c0e2c91fbb Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3263231 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
| * zephyr: bmi160: Test interrupt handler and bug fixTristan Honscheid2021-11-091-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test the interrupt handler in the BMI160 driver. Also, correct an error from an earlier CL (3229647) where I moved the BMI260 event flag in to BMI160 driver's header. BRANCH=None BUG=b:184856157 TEST=zmake -D configure --test test-drivers Signed-off-by: Tristan Honscheid <honscheid@google.com> Change-Id: Icb08d9e1142066ba0ef22b9633895e60e6b40e90 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262878 Reviewed-by: Wai-Hong Tam <waihong@google.com>
| * zephyr: bmi160: Remove redundant check from config_interruptTristan Honscheid2021-11-091-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We check twice that the sensor being passed in to `config_accel_interrupt()` is an accelerometer. This is unnecessary and creates unreachable code. BRANCH=None BUG=b:184856157 TEST=zmake -D configure --test test-drivers; make runhosttests Signed-off-by: Tristan Honscheid <honscheid@google.com> Change-Id: Ic07bfe76ae20e1615bcf52717a106cc622d32d84 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262106 Reviewed-by: Keith Short <keithshort@chromium.org>
| * zephyr: bmi160: Test offset and calib on unsupported sensor typesTristan Honscheid2021-11-091-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Try running perform_calib() and set_offset() on sensor types that don't support it. BRANCH=None BUG=b:184856157 TEST=zmake -D configure --test test-drivers; make runhosttests Signed-off-by: Tristan Honscheid <honscheid@google.com> Change-Id: I978dfc87bd2915c4da2ccd58d2da9f3f597164d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262105 Reviewed-by: Aaron Massey <aaronmassey@google.com>
| * ps8xxx: define PS8815 USB EQ registerstabilize-14333.B-mainWill Tsai2021-11-091-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=b:204719059 TEST=make -j BOARD=gimble Signed-off-by: Will Tsai <will_tsai@wistron.corp-partner.google.com> Change-Id: I4fbfad16697648f31cbbf708ad4d2fb5dc5b1004 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3268034 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
| * ps8815: Limit Rp detect workaround to PS8815Tomasz Michalec2021-11-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch test if product ID is PS8815 in Rp detect workaround check. Without this change it is possible that this workaround is activated for PS8xxx different than PS8815. BUG=none BRANCH=none TEST=make buildall Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: Ied30749e3fad617780a40e138cb3bb74e949f6dd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3259942 Tested-by: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * ioex: add error message if driver doesn't support get_portMichał Barnaś2021-11-055-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If support for ioex get_port was enabled and driver doesn't support it, there will be a compilation error. The get_port function is required for zephyr ioex implementation. BRANCH=main BUG=b:202701452 TEST=enable any driver that doesn't support get_port function and check if compilation fails with corresponding message Change-Id: I3f5c6d2eae95b8a63c6655595dd1e658bfd0c8da Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262094 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
| * KB800X: Fix build errorstabilize-14324.72.B-mainstabilize-14324.62.B-mainstabilize-14324.41.B-mainstabilize-14324.13.B-mainrelease-R97-14324.B-mainDavid Huang2021-11-041-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the build error for kb800x. BUG=b:197505149 BRANCH=none TEST=make buildall -j success. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I99cfaed0beff8b56532efdd549ac05c9900b1493 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3261448 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
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