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* Clear OWNERS for factory/firmware branchfirmware-volteer-13672.130.B-mainBrian Norris2021-09-111-1/+0
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155274 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* isl9241: Toggle learning mode when fully chargedDevin Lu2021-04-091-0/+25
| | | | | | | | | | | | | | | | | | In low-power states, the ISL9241 may become stuck in CCM, consuming excess power. Toggle learning mode to enter DCM and save power. This is a workaround recommended by Renasas. BUG=b:183771327 BRANCH=firmware-volteer-13672.B-main TEST=Verifed charger doesn't stuck in CCM mode. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I70bf088b9214fd4b3cee137da561ba84e854106a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789811 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org> (cherry picked from commit 393c3c20dfd15d666c84b88a23cadac1c6dadb3f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2814719
* ppc/syv682x: support C versionEric Yilun Lin2021-04-012-11/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | C version won't block I2C accessing to CONTROL4(to on/off Vconn) reg when smart discahrge enabled. This allows us to re-enable the smart discahrge on boards using SYV682C. This CL support the feature by adding: 1. CONFIG_USBC_PPC_SYV682C 2. CONFIG_USBC_PPC_SYV682X_SMART_DISCHARGE also, hayato uses different SYV682 versions across revisions, add a overridable function syv682x_board_is_syv682c() for handling board revision issue. BUG=b:160548079 b:176876036 TEST=Hayato meets tVconnOff, and tVbusDischarge BRANCH=asurada Change-Id: I89b57b8c20907249d5d97140289fb0570bd58b46 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738506 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799922 Tested-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* SYV682x: Fix Source OCP for SYV682B revisionEric Herrmann2021-04-012-14/+19
| | | | | | | | | | | | | | | | | | | | | | | Force the EC to wait at least 15ms before checking to see if the alerts are cleared. This will fix source OCP for the SYV682B, which added a 10ms HW deglitch to the source OC alert. BUG=b:183761055 TEST=Check that OCP is triggered instead of TSD when the port is overloaded on SYV682B TEST=Check that the SYV682A OCP still works with 100ms deglitch TEST=make buildall BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I40207fecc034a8e8238f0deaa7beeaf8dab2a2d6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787706 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799921 Tested-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* Create a public header for bmi160Hyungwoo Yang2021-04-011-21/+1
| | | | | | | | | | | | | | | | | | | | Create a separate public header for bmi160 so we can include it from Zephyr. BUG=b:173507858 BRANCH=none TEST=make BOARD=lazor -j4 Change-Id: Ib35d473b3f4e1a566ef35cd5e203b6acbf93319b Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793047 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799919 Tested-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* Revert "ps8815: delete CONFIG_USB_PD_TCPM_PS8815_FORCE_DID"Zhuohao Lee2021-03-311-0/+45
| | | | | | | | | | | | | | | | | | | | | This reverts commit e2761c8be4571adcfc425a9187290872ffa9d02d. In order to support the old TCPC chip which bcd revision is smaller than 0x7, we need to bring back the CONFIG_USB_PD_TCPM_PS8815_FORCE_DID and force the TCPC firmware be updated in the factory line. BUG=b:177251013, b:159289062, b:182018599, b:178978970 BRANCH=firmware-volteer-13672.B TEST=the old TCPC chip can update its firmware. Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Change-Id: I66d12aee569137cc7823a186e3251ca8b187e767 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784327 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2786886 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Tested-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* isl9241: Add devicetree property for switching frequencyKeith Short2021-03-191-12/+4
| | | | | | | | | | | | | | | | | | | | Update the isl9241 driver to support overriding the charger switching frequency using a devicetree property. BUG=b:182300938 BRANCH=none TEST=make buildall, zmake testall TEST=Boot zephyr-ec on volteer, verify ISL9241 charging frequency via register dump. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ic1c3bb24b79ae6e10082cdb79bdb9edc327064a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2754489 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2774585 Tested-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* RT1715: Reset on EC reboot instead of POREric Herrmann2021-03-101-7/+6
| | | | | | | | | | | | | | | | | | | | | | | Currently we reset the RT1715 only when it is coming out of power-down mode; however this requires explicitly putting it into power-down mode or a full power cycle. An EC reboot will not power cycle the TCPC though, and we really should be doing the reset following an EC reboot. Do a soft_reset the 1st time we initialize the TCPC following an EC reboot. Don't check the power-down bit. BUG=b:179234089 TEST=Write to unused vendor registers such as 0x99; check that the values are reset when "reboot" is used to reset the EC. BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I0cc05ac88ec1314c20ceb357605156292b57b7c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2698779 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2750041 Tested-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* tusb422: Don't perform soft reset during initializationPatryk Duda2021-03-102-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | After waking from Low Power Mode, TCPMv2 always performs TCPC initialization. Issuing soft reset during initialization leads to lose information about DRP result and set CC lines to Rd. When attaching sink, TCPC will report that nothing is connected and as a result TCPMv2 will enable DRP and go to Low Power Mode again. When LPM debounce delay is longer than tDRP (time in which TCPC will advertise source and sink, between 50ms and 100ms according to Type-C specification), then TCPC will always find connection before going to Low Power Mode. If it is smaller, TCPMv2 will loop between LowPowerMode and DRPAutoToggle states. BUG=b:176986511 BRANCH=none TEST=Run EC on Volteer board. Check if TCPC works. TEST=Change PD_LPM_DEBOUNCE_US to 10ms and check if sink (eg. pendrive) is detected correctly. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I0cd56d9a9ca31239afb4e41302e98b7996fb3a47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682482 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748433 Tested-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* delbin: Setting charger switching frequency to 724kHz.Michael5 Chen12021-03-102-0/+34
| | | | | | | | | | | | | | | | | | | Setting charger switching frequency to 724kHz. BUG=b:180779740 BRANCH=volteer TEST=manual 1. Check charger register 0x3C 2. Check waveform Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I97512742dfc778c22615f8385fbe1fecf5ff2d7b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719786 Reviewed-by: Keith Short <keithshort@chromium.org> (cherry picked from commit 4d2c6d035a921dd0293384b3733682e2c0de45a9) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2742043 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* TCPMv1/v2: Move SOP' enabling to tcpm_set_vconnEric Herrmann2021-03-041-6/+0
| | | | | | | | | | | | | | | | | | | | | | Currently SOP' enabling is done as part of the TCPCI driver when vconn is set - however if we aren't using VCONN from the TCPC, we need to enable SOP' separately. So, instead of enabling it in the TCPCI driver, enable it in the general TCPM set VCONN function. BUG=b:181692098,b:181691263,b:173459141 TEST=Make sure cable discovery works TEST=make buildall BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: Iecc06760f2b8af588c427b9565c6aa31ee719edf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2733574 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> (cherry picked from commit 8fffb7f40b72742551a343209a97a7a9add6a827) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2734116 Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Tested-by: Abe Levkoy <alevkoy@chromium.org> Auto-Submit: Abe Levkoy <alevkoy@chromium.org>
* driver: tcs3400: Check for device status only onceGwendal Grignou2021-02-251-28/+31
| | | | | | | | | | | | | | | | | | | | Since ASIEN (interrupt on ALS saturation) and ALS threshold interrupts are disabled, we can only get interrupt on RBGC cycle read. Therefore, when using the interrupt, not need to check if RGB data is ready in post_events(). Only check while in force mode. Remove recheck when accounting for saturation. BUG=b:177860358 BRANCH=kukui,hatch,puff,volteer TEST=compile Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I7fc419a98828b9b188849e04a15cfefaf9e96c8a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2572739 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> (cherry picked from commit ba15cc92f2050175b50db3baa84228e49a081a10) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2720383
* Virtual mux: Set disconnect latch flag only in s3/s0ixAyushee Shah2021-02-231-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | When the AP comes up after G3 and since the disconnect flag is set, EC sends disconnect info to the AP probe functions. But the DUT is still in low power mode thus the AP doesn't receive the current mux state hence enumeration of USB4/TBT device fails when hotplugged at G3. This CL ensures that disconnect flag is only set in chipset suspend states i.e. s3 and s0ix BUG=b:180377259 BRANCH=None TEST=Connected USB4 device connect in G3 and checked enumeration Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: I6992c528c7c39bf604d4e305b362ef04bc3c100e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2705561 Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Reviewed-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> (cherry picked from commit 7e6d2aaf3bcc1c1876a678e462851689c7e16fe0) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2714263 Tested-by: Keith Short <keithshort@chromium.org>
* RT1715: Enable power saving modesEric Herrmann2021-02-182-33/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RT1715 implements its own low-power mode (LPM) to save power. Switch from using the default I2CIdle LPM to using the RT1715-specific one. Disable the 24MHz oscillator in LPM, and enable the interrupt to wake from LPM. For interrupts, clear the WAKEUP interrupt before checking the TCPCI interrupts. Enable auto-idle to save power with a device connected. Disable when the TCPC is sourcing Vconn. BUG=b:179256608 TEST=On Voxel: while no device attached, make sure both SNK and SRC devices wake up the TCPC from LPM TEST=On Voxel: with no devices connected, measure fake G3 power consuption and make sure it has decreased TEST=On Voxel: with a pass-through hub configured as a sink, check that connecting a charger will prompt Voxel to begin charging TEST=make buildall BRANCH=None Change-Id: Ifb2fa5a7940e5862e217c04c5c1082aae6b43989 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2676934 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2704622 Tested-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* rt1715: Reset properly coming out of LPMScott Chao2021-02-091-5/+16
| | | | | | | | | | | | | | | | | | | After the initial power-on-reset, reset registers by writing to SOFT_RESET. On subsequent register resets after exiting low-power mode, do not write this register. BUG=b:179234089 BRANCH=firmware-volteer-13672.B-master TEST=test firmware_PDTrySrc pass TEST=make buildall Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: I9e8f2c7fc46bbd84debcb565a4d93a6e87bdebf6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2671265 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2684760 Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Tested-by: Abe Levkoy <alevkoy@chromium.org>
* retimer: PD port retimer firmware update supportli feng2021-02-092-0/+25
| | | | | | | | | | | | | | | | | | | | Added one field to struct usb_mux_driver, which returns true if retimer update is supported. Moved query function from usb_retimer_fw_update.c to usb_mux.c. BUG=b:162528867 BRANCH=none TEST=Tested on Voxel, together with related coreboot and kernel changes. EC returns correct port information to kernel. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I5cab34a14adbf0470cffe6a13234ad53b6f6a90c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2651866 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2681290 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Tested-by: Abe Levkoy <alevkoy@chromium.org>
* guybrush: Add FP6 USB mux driverRob Barnes2021-02-043-0/+247
| | | | | | | | | | | | | | | | | FP6 USB mux driver is similar to the FP5 USB mux driver, but uses two addresses instead of an index to select the different USB ports. Also a low power bit has been added to the control register. Datasheet can be found in the bug. BUG=b:177057723 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I94a3db5f7d643a17dfdf89d721dd7f14cb75e402 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654387 Reviewed-by: Diana Z <dzigterman@chromium.org>
* raa489000 : Set Vbus Target VoltageYongBeum.Ha2021-02-042-0/+10
| | | | | | | | | | | | | | | set CONFIG_VBUS_VOLTAGE_TARGET BUG=b:178066852 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I462d4afd8e9c258191798d922a3a4c600ca119a3 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2670622 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* sasuke : change prochot debounce timeYongBeum.Ha2021-02-031-1/+6
| | | | | | | | | | | | | | | change PROCHOT debounc time : 1ms -> 500us BUG=b:178064079 BRANCH=None TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: Id28aadb53e0f70309fc4864653a2f8f4258782ee Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2666561 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* RAA489000 : Change Charge Voltage StepYongBeum.Ha2021-02-021-1/+1
| | | | | | | | | | | | | Chagne CHARGE_V_STEP from 64mV to 8mV BUG=b:179098188 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: Ia6e221cf4f91c8684c5ab152022ca767146da59b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2666311 Reviewed-by: Diana Z <dzigterman@chromium.org>
* nb7v904m : add function to tune eq and gainYongBeum.Ha2021-02-022-8/+86
| | | | | | | | | | | | | | add function to tune usb eq and gain BUG=b:176862264 BRANCH=None TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I50ff040643cd2635968c5cfb988998ad3a82a836 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649894 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ps8815: Add workaround for incorrect CC linesKeith Short2021-02-022-1/+57
| | | | | | | | | | | | | | | | | | Add code to disable internal Rp detection in the PS8815 prior to presenting Rp. BUG=b:178664884 BRANCH=volteer TEST=make buildall TEST=Connect SNK devices to Delbin and observe PD contract established reliably. TEST=Connect dual-role USB-DP monitor, observe display comes up. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ic1f58a7fc0e01a4c19c8d1de7fafda0b5d4551c3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2659678 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* NCT3807: Enable full VCONN protectionJacky Wang2021-02-012-0/+20
| | | | | | | | | | | | | | | | | | | | Modify VBUS and VCONN Fault Detection Control Register(Offset 0xD7). 1. Enable VCONN Over-Current Protection. 2. Enable VCONN Short-Circuit Protection. 3. Enable VCONN Off on Fault. BUG=b:178664890 BRANCH=none TEST=make BOARD=shuboz 1. Use ectool i2cread 8 0 0xe0 0xd7 to check status(port 0). 1. Use ectool i2cread 8 1 0xe0 0xd7 to check status(port 1). Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Ie297713236b29a53585b6f3e568b311147586d65 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2659136 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Isaac Lee <isaaclee@google.com>
* RAA489000: Add TCPC interface to control output currentDiana Z2021-01-292-10/+33
| | | | | | | | | | | | | | | | | Since the TCPC is controlling Vbus, output current must be updated through the TCPC i2c address. Introduce a function which boards will use for their implementation of typec_set_source_current_limit() with this TCPC. BRANCH=None BUG=b:178064507 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5bcf83a8bb0221f232f85952ce03e82f49de1602 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2658376 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* driver: icm426xx: Use calibration unit to set/get offsetGwendal Grignou2021-01-291-20/+13
| | | | | | | | | | | | | | | EC interface use constant (not range dependent) units to get/set offsets. Use them in icm426xx driver. BUG=b:177292639 BRANCH=hatch,nami,kukui,dedede,grunt,zork,octopus,volteer TEST=compile Change-Id: I6e6b1551464ea389db34646ba5b2bb553d683d7a Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2657955 Reviewed-by: Ching-Kang Yen <chingkang@chromium.org> Reviewed-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
* ctn730: Add delay between INITIALIZATION and ENABLE (2)Daisuke Nojiri2021-01-291-3/+9
| | | | | | | | | | | | | | | ctn730 isn't immediately ready for i2c write after normal mode initialization. This patch adds 5 msec delay between WLC_HOST_CTRL_RESET_EVT_NORMAL_MODE and ENABLE_CMD. BUG=b:173235954, b:178096436 BRANCH=trogdor TEST=CoachZ Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ib3dd96637d772a611cd12d394df492276481c412 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2657722 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Revert "ctn730: Add delay between INITIALIZATION and ENABLE"Daisuke Nojiri2021-01-291-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit de6e089385317a4379fa2e884d11da4453784a00. Reason for revert: Replaced by CL:2657722 Original change's description: > ctn730: Add delay between INITIALIZATION and ENABLE > > ctn730 isn't immediately ready for i2c write after normal mode > initialization. > > This patch adds 5 msec delay between INITIALIZATION and ENABLE > commands. > > BUG=b:173235954, b:178096436 > BRANCH=trogdor > TEST=CoachZ > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > Change-Id: Ic3c51212c2f9a7bca827b040166aa18ec0a06b63 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2656765 > Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Bug: b:173235954 Bug: b:178096436 Change-Id: If9323c6e40e7b88b5393ff645f2fe89e6231b2c0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2657968 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* RAA489000: Organize header fileDiana Z2021-01-291-10/+13
| | | | | | | | | | | | | | | Put register definitions in ascending order and note some definitions are no longer applicable. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic840a59fafbf2fc711900103118d6ac7361ab249 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2658375 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* COIL: Rename variables in MT6360 driverDiana Z2021-01-292-10/+10
| | | | | | | | | | | | | | Rename variables in MT6360 driver to match current i2c naming conventions. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ifc7cae2f7cb012e4078c6a348219b51199811cc3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649356 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* driver: rt1715 : Improve noise rejectionBen Chen2021-01-282-19/+172
| | | | | | | | | | | | | | | | | Adjust CC noise rejection parameters based on CC voltage after getting CC levels and before setting polarity. Adjust electrical parameters to Richtek-recommended values. BUG=b:173023411, b:171461736 BRANCH=cros/main TEST=Pass TDA.2.1.2.1 BMC PHY RX BUSIDL with Volteer+RT1715 Change-Id: I70990e59d15cb59e868d51852dec27100f8d732c Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2599786 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Tested-by: Abe Levkoy <alevkoy@chromium.org>
* ctn730: Add delay between INITIALIZATION and ENABLEDaisuke Nojiri2021-01-281-0/+6
| | | | | | | | | | | | | | | | | ctn730 isn't immediately ready for i2c write after normal mode initialization. This patch adds 5 msec delay between INITIALIZATION and ENABLE commands. BUG=b:173235954, b:178096436 BRANCH=trogdor TEST=CoachZ Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ic3c51212c2f9a7bca827b040166aa18ec0a06b63 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2656765 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb_mux: Use atomic_or when setting flag during muxer initPatryk Duda2021-01-281-1/+1
| | | | | | | | | | | | | | | | | CL:2633981 was created when flags in usb_mux was set using bitwise OR assignment. During review, all set and clear flag operations in usb_mux was changed to use atomic functions. This CL changes recently added flag set to atomic one. BUG=b:151155658 BRANCH=none TEST=make buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I10813deaa8b9f4799d29f06f8fe482974257b715 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2656035 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* max14637: call bc12_detect in VBUS off can't update charge as availableMarco Chen2021-01-281-23/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | Originally bc12_detect function not only detects BC12 status but also update result to charge manager. Now bc12_detect can be called not only when VBUS is on but also off because of CL:2626791. The result is that charge manager would report charging available even if VBUS is off. As a result, we split charger manager update from bc12_detect as the single function so bc12_detect can be called when VBUS is on or off but charger manager update for available charging will be triggered when VBUS is on. BUG=b:177845650, b:177265749, b:178509655 BRANCH=octopus TEST=make buildall -j 8 TEST=check online parameter in /sys/class/power_supply can report correct value when PD adapter or BC12 charger is plugged in/out. TEST=check `ectool usbpdpower` can report correct values for PD adapter and BC12 charger. Change-Id: Ifc4f23edb9272177a6b3637b812b86cf9bef2378 Signed-off-by: Marco Chen <marcochen@chromium.org> Signed-off-by: Marco Chen <marcochen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652112 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ps8xxx: Set RP during LPM enter if TCPC acts as mux onlyPatryk Duda2021-01-282-1/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards (eg. ampton) uses TCPC/MUX chips (eg. PS8751) as muxers only. In this case CC lines are simply not connected. Nevertheless setting CC lines to approptiate value can decrease power consumption. This patch implements custom PS8xxx MUX driver which is responsible for setting RP on both CC lines on Low Power Mode enter when this TCPC is used as muxer only (USB_MUX_FLAG_NOT_TCPC flag is set). Due to flash size constraints, this driver is only available when appropriate config is defined. Unfortunately, RP can't be set once during initialization because after switching mux appropriately there is no connection. To work properly RD should be set on both CC lines. Changing RD -> RP after switching mux doesn't work (breaks connection), even with some delay before switching to RP again. Moreover, when PS8751 is in standby mode, first I2C transaction always fails. Documentation suggests that device could be woken up by performing I2C read from PS8XXX_REG_I2C_DEBUGGING_ENABLE register. For more information about purpose of this change please refer to b:113830171#comment18 and further. BUG=b:151155658 BRANCH=none TEST=Flash EC ToT on Ampton. Check if power consumption is lower. Don't connect devices to tested USB-C port. Issue 'i2cxfer r 2 0xB 0x1A' 2 times within 2 seconds and check if it returns 0x05 (DRP disabled, RP default, CC1, CC2 set to RP). Repeat above with command 'i2cxfer r 4 0xB 0x1A'. NOTE: PS8751 goes to Low Power Mode automatically after 2 seconds when RP is set that is why we need to read register 2 times, first to wake up device, second to read value. TEST=Connect device to USB-C port, check in dmesg that device is recognised as SuperSpeed device. Repeat this test 10 times. Check also different rotation. Change-Id: Ie1bac6caa9912c024c87792536d7a35863fa96a0 Signed-off-by: Patryk Duda <pdk@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2614618 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* COIL: Rename variables and comments for ANX7447Diana Z2021-01-272-20/+20
| | | | | | | | | | | | | | Rename variables and comments for the ANX7447 driver to match current i2c naming conventions. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I42ea7b190bf82c900a4ce9bc5ac49f155d9ecf14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649355 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename fusb302 driver variablesDiana Z2021-01-271-5/+5
| | | | | | | | | | | | | Rename i2c variables in the fusb302 driver and c-file references. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ifaf7984c52fc197403d447e00c02af036e54987e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649354 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename fusb307 variablesDiana Z2021-01-271-1/+1
| | | | | | | | | | | | | Rename i2c variables in fusb307 driver. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib1e4b25a0b2b233d8d4c828590cb48b771faa418 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649353 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename comments in PI3USB2x532 driverDiana Z2021-01-271-1/+1
| | | | | | | | | | | | | Rename i2c comments in PI3USB2x532 driver to match current naming. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I08e7b94cc3c1cbe7b2f5e1a9dc9f0757a7cd85ea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649352 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename comments in SB-TSI driverDiana Z2021-01-272-2/+2
| | | | | | | | | | | | | | | Rename i2c comments in SBI-TSI temperature driver to match current naming. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib1c281964105624a733057ed896efcd9b1e357ea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649351 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* elan_private: Implement elan fp sensor on stm32f4herman lin2021-01-275-4/+40
| | | | | | | | | | | | | | | | | | | | This patch implements the ELAN FP API, which is used to control the ELAN FP sensor and matching algorithm on stm32f4. Therefore, we reduce the size of TEMPLATE_SIZE on STM32f4 and implements elan sensor reset API. BRANCH=None BUG=None TEST=We build on bloonchipper and dartmonkey, and testing Elan sensor with libelan_515_m4/m7.a and libelan_80_m4/m7.a successfully. Signed-off-by: herman lin <herman.lin@emc.com.tw> Change-Id: Iaf4b85744a49a3ae12f20d91740515b7dc198e56 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643744 Reviewed-by: Yicheng Li <yichengli@chromium.org> Commit-Queue: Yicheng Li <yichengli@chromium.org> Tested-by: Yicheng Li <yichengli@chromium.org>
* usb_mux: Check if muxer is initialized before taking actionPatryk Duda2021-01-271-0/+22
| | | | | | | | | | | | | | | | | | | | Current code allows setting or getting muxer state without initializing it. During mux initialization driver can prepare some internal structures for use by other driver functions. This patch implements checking if there was at least one mux initialization before performing action. BUG=b:151155658 BRANCH=none TEST=Flash ToT EC on octopus (eg. ampton) board. Make sure that muxer initialization is performed before performing any other muxer action. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I2766305a49d377bd9a0ac91eea7988e58eb1059a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633981 Reviewed-by: Diana Z <dzigterman@chromium.org>
* COIL: Rename comments in BB retimerDiana Z2021-01-261-2/+2
| | | | | | | | | | | | | | Rename i2c comments in the BB retimer to reflect current naming conventions. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8160b851b84795ffd13934c2be2e12fd2a04c5f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649350 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename comments and variables in PS8802 driverDiana Z2021-01-262-5/+6
| | | | | | | | | | | | | Rename i2c related comments and variables in the PS8802 driver. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id52177261edc604f610ace0e72b4d42f09a5de0c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2649349 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* usb_mux: Send missed disconnect mode in S3/S0ixMadhusudanarao Amara2021-01-261-1/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the Type-C devices are connected in S0 and when DUT enters S3/S0ix, if the type-C devices are disconnected and re-connected, Kernel won't receive the disconnected state from EC once DUT boots to S0 as EC moves on and updates the new connected state to Kernel Mux driver. This leads to failure of Type-C device detection on resuming to S0 from S3/S0iX. To overcome this scenario, adding an explicit condition to send previous disconnect state to Kernel Mux driver once initial mux request is received upon resuming from S3/S0iX. Missing Disconnect mode Patch Details: Set disconnect latch flag for the init and disconnect requests For AP to EC PD command: EC_CMD_USB_PD_CONTROL -Check disconnect latch flag if it is true set pd.enabled = 0 For AP to EC mux command: EC_CMD_USB_PD_MUX_INFO -Check the disconnect latch flag if it is true then send disconnect mode -Reset the disconnect latch flag -Send host event EC_HOST_EVENT_USB_MUX for configuring the virtual mux with the latest Mux configuration BUG=b:176604380 BRANCH=None TEST=Type C devices in s0ix disconnect/connect or swapping across the ports scenarios tested Change-Id: Ic38d3632cb0fadb29393405e13ed3606a740c81e Signed-off-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com> Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2632551 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* usb_mux: Use atomic operations for updating the flagMadhusudanarao Amara2021-01-261-4/+5
| | | | | | | | | | | | | | | | Atomic operations used in updating the LPM flag BUG=None BRANCH=None TEST=Disconnect typeC devices and then connect back, devices are detected Signed-off-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com> Change-Id: I6c3fa4b9c63436a16465012fe715ce28995ed179 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648145 Tested-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* ctn730: Print payload and handle download modeDaisuke Nojiri2021-01-251-3/+14
| | | | | | | | | | | | | This patch makes ctn730 driver print payload and handle download mode. BUG=b:173235954 BRANCH=trogdor TEST=CoachZ Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I74626c726c18c30a039fc521e419688796db9c3b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2646124 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* max14637: Switch should not be kept open when PD adapter is disconnectedyu-an.chen2021-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Root Cause: D+ and D- of PD adapter are shorted so chip would detect PD adapter as the DCP. As a result, chip would set USB 2 switch open based on product spec. Later on once USB 2.0 storage is attached, DUT can't recognize it because USB 2.0 data path is blocked by chip now before introducing this CL. Solution: Whenever adapter or USB client device is disconnected from a port of DUT, we re-trigger the bc12_detect() so chip will be off then on for detecting the status again. In this case, the D+/D- are NC so chip will detect it as the SDP and keep this status afterward. When USB 2.0 storage is connected later, bc12_detect will not be called again due to DUT is in source role. At this moment, USB switch is closed so USB 2.0 path is good. And there is no BC12 detecting cycle happened so we will not hit issue resolved in CL:*2364342 as well. When adapter is connected again, bc12_detect will be triggered for detecting DCP / SDP / CDP. BUG=b:177265749 BRANCH=octopus TEST=make buildall -j 8 TEST=check lsblk , usb2 device is exist after reproduce step Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I769e9f97daf86992259d8da0bbb38a1068bd8a5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626791 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* ioexpander: Fix interrupt handler signalEdward Hill2021-01-222-2/+2
| | | | | | | | | | | | | | | Fix ioexpander drivers to pass the correct signal (starting from IOEX_SIGNAL_START) to the interrupt handler. BUG=b:176517051 b:176696599 BRANCH=zork TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: If3c145a43dda66bbd95455c2ffd1591bfddf2958 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643225 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-222-4/+4
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Madoo: Fix main board charger can't wake from hibernateKo_Ko2021-01-222-4/+6
| | | | | | | | | | | | | | | | | | | | | | | In madoo's design, there is a protection IC between USB connector and TCPC. When EC is hibernate, the CC lines will be disconnected, which cause the result that TCPC can't detect AC power and Chromebook won't wake the system. Enalbing ADC for all modes by setting 0x4C bit 0 to 1 (to be more precise is that we don't clear bit 0 during hibernation) can prevent issue mention above. BUG=b:174971576 BRANCH=dedede TEST=flash code and make sure ac in can wake system from hibernation Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com> Change-Id: I2a83c69e34cbc4bfdff90d760f32817a7924dc26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626803 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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