| Commit message (Collapse) | Author | Age | Files | Lines |
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Split after-reset time for NCT3807 and NCT3808, since the after-reset
time is not the same.
From the datasheet (section 4.4.2 Reset Timing) as following:
* | Min | Max |
* ----------------------+-------+-------+
* NCT3807 (single port) | x | 1.5ms |
* ----------------------+-------+-------+
* NCT3808 (dual port) | x | 3ms |
* ----------------------+-------+-------+
Currently the after-reset time for NCT3807 is zero. Change to 2ms to
fit specification as well.
BUG=none
BRANCH=none
TEST=On Redrix. Initial success with NCT3807.
TEST=On Dirinboz. Initial success with NCT3807.
TEST=make buildall.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I1f47f57c0d8955946b1c2522e1a1736739217f41
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3068492
Reviewed-by: caveh jalali <caveh@chromium.org>
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Add this function to let each board can control it.
BUG=b:196184163
BRANCH=none
TEST=make -j BOARD=gimble
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Ic47c67e11eba1bfadef5f5942cff9fcad8b49ad2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3086786
Reviewed-by: caveh jalali <caveh@chromium.org>
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In AP Mode DP exit to TBT entry is causing TBT lane bonding issue.
Issue is not seen by calling the retimer reset as WA at the time of
disconnect mode configuration.
Revert this patch after getting the actual fix.
BUG=b:193402306
BRANCH=None
TEST=Checked TBT enumeration in AP Mode
TOREVERT=b:195375738
Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com>
Change-Id: Ia22e061a863940b2a13ad5a38f4fe130737c5c20
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058157
Reviewed-by: Keith Short <keithshort@chromium.org>
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The original code can't compile if CONFIG_USB_PD_TCPC_LOW_POWER not
defined. Compiler complains that tcpci_enter_low_power_mode not found.
BUG=none
TEST=make
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: If59bf9e82bf5db879d83eb02b64a36c32c9613b8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3076474
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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samus: AUE in M91, M92 pushed to stable already
samus_pd: samus pd chip
dragonegg: canceled
cheza: canceled
flapjack_scp: flapjack was canceled
atlas_ish: atlas shipped, but ish project canceled
sklrvp,glkrvp: these are pretty old intel reference boards and the
portage overlays were already deleted ... assume nobody needs the
EC firmware anymore either
BUG=none
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I794867ac82f37ffa2267e2e59ac02bc381688c57
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069716
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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We have been lucky the accelerometer was always in first position,
as the FIFO filling routine always set the sensor number to 0.
Fix for hayato.
BUG=b:192649615
TEST=On hayato, using
iioservice_simpleclient --channels="accel_x accel_y accel_z"
--device_id=0 --frequency=10 --samples=10
Check the sensor data is constant. (device_id 0 is the base
accelerometer), we get data for that sensor only.
Checking with device_id set to 2 (the lid accelerometer),
that we get samples for that sensor.
BRANCH=asurada
Signed-off-by: Gwendal Grignou <gwendal@google.com>
Change-Id: I96ea5f696c38b8c54aed7537f93eba70a647dc53
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069990
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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Implement the software workarounds suggested by Richtek.
See issue link for details.
BUG=b:194982205
TEST=On Cherry & Tomato, manually verify PD works
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I7d9c6c5fd3c9266f27e52c1756a7ecedc75f1846
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848280
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Add config option for the ps8805 to override the TCPCI Device
ID field based on the page 0 register 0x62 bit 7-4.
A2 chip: reg 0x62 bit7-4 = 0x0
A3 chip: reg 0x62 bit7-4 = 0xA
BUG=b:193099851
BRANCH=trogdor
TEST=ectool pdchipinfo can show overridden DID for both A2
and A3 chip on Lazor DUTs
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I99767c92a97c2fcefd3bbe03e3cd2b90de192ff3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3056225
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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BRANCH=none
BUG=b:181607131
TEST=compare_build.sh matches
Change-Id: I2dc308bfc80c5921dcc172bee433a6502105852f
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jora Jacobi <jora@google.com>
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BUG=b:177391887
TEST=verify pd works
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ied4516abef3d544b8b4bdf8355f0f9fc305629a3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793783
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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rt1718s driver incorrectly used the common alert function instead of its
own implementation.
This bug was not detected by `make buildall` because no one actually
enables rt1718s until CL:2793783.
BUG=b:177391887
TEST=make
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I303cb0b6b7d0177648871ea36c1fc5c513fbb336
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058082
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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PPC driver is responsible to notify charger task about vbus change.
Original driver didn't implementation this.
Also make BC1.2 driver correctly enables BC1.2 detection on vbus
change.
BUG=b:192422592
TEST=manually verify PD and BC1.2 works
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I0bcbe0a1a43d9a9bcae61d69e247829648dd0d7c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3045249
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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This fixes a typo where the CTRL_DB_EXIT was being set on the wrong
variable. this appears to date back to the very first commit of this
driver with chromium:966926.
BRANCH=none
BUG=b:74206647
TEST=buildall passes
Change-Id: I2c389419c09b0bed1e341dcd6ae6d187a698efcd
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058078
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Add TCS3400 emulator which is emulated device on i2c bus. Emulator
properties can be defined using device tree or runtime TCS emulator API.
It allows to set custom handlers for write and read messages. Emulator
is able to convert internal values to register values that can be
obtained by driver through i2c interface. Conversion takes current state
set by driver into account (gain and data acquisition time).
BUG=b:184856080
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I16f25de43e047df39f84ce86044736d50c9a49c8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3048094
Reviewed-by: Simon Glass <sjg@chromium.org>
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One of the boards under test having charging process interrupted due to
early triggering of SM5803A battery over voltage comparator (OVP_VBAT).
Programmed OVP_VBAT comparator has +/-5% setpoint accuracy. Current
setpoint was 9.2V. so the possible triggering range is from 8.74V to
9.66V. In order to avoid this issue OVP_VBAT was set to new setpoint
and simultaneously setting GPADC threshold to 9V. VBAT_SENSP high
interrupt is configured. When this interrupt happens battery charge is
disabled.
Although this issue only found for 2S batteries this tolerance range can
possibly effect 3S batteries too.
BUG=b:182373694
BRANCH=dedede
TEST=Fix was verified by Silicon Mitus.
Signed-off-by: udaykiran <udaykiran@google.com>
Change-Id: Ibc7bb51af56ec9d8ef8d27b58cdab9c59a03ae87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2927935
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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On dragonclaw, setting GPIO_DIVIDER_HIGHSIDE to 1 is necessary to
enable communication with FP sensor. Until now it was enabled during
fp_sensor_init() which was called from fp_task() only in private build
(when HAVE_FP_PRIVATE_DRIVER is defined). This was causing problems with
fpsensor_hw hardware unittest, which is public build.
The problem was solved by enabling GPIO_DIVIDER_HIGHSIDE in
configure_fp_sensor_spi(). This approach also required to change
get_fp_sensor_type() function to leave GPIO pin enabled.
BUG=b:170432597
BRANCH=none
TEST=./test/run_device_tests.py --board bloonchipper --tests fpsensor_hw
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I9cf50ef1377da2dec57d73f9e1374928da86481d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3034857
Reviewed-by: Craig Hesling <hesling@chromium.org>
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This initializes the Device Control Register (0x0b) to its power-on
reset value. This chip is not connected to the system reset signal, so
we need to explicitly set registers to their power-on reset value so we
start from the same configuration when we reboot as we do on system
power on.
BRANCH=none
BUG=b:193211352
TEST=charging from another chromebook is reliable now
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Change-Id: I82ce3fd624091b89668a682cb8748af171552d72
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044412
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This explicitly disables VBUS discharge when entering sink
mode. According to the vendor, keeping VBUS discharge enabled can cause
some noise and that explains some of the instability we had observed
when charging from another chromebook and 5V3A charger.
BRANCH=none
BUG=b:193211352
TEST=charging from another chromebook is reliable now
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Change-Id: I117dd3f7f9efddce00f903c2b290fa85c6052c5d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044411
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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According to the RAA489000 manual, extend the time
to read the vbus after the ADC initialization is
completed.
BUG=b:193402296
BRANCH=keeby
TEST=make BOARD=cappy2 pass
Signed-off-by: jesen <wangganxiang@huaqin.corp-partner.google.com>
Change-Id: Ie326932a9a5d3849e31e15a090074ad1274a7266
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3023762
Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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enable low power mode to further decrease power consumption.
BUG=b:192815893
TEST=manually measure power
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ib5d22d1d3c9cc8ed644075b8ed239f96d0eea67e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3004127
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Reduce FOC sample limit to avoid EC command
timeout when factory toolkit rums the calibration
process.
BRANCH=none
BUG=b:192409667
TEST=Accel implementation tested on Guybrush
$ ectool motionsense calibrate 2
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I75a0d4dfa1e2b3b947000f97f2f15142e597e657
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3034961
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This patch does following:
1. Fix enable_fifo to selectively enable accel or gyro
2. Fixes the fifo read level.
3. Rotates the fifo data before staging the data.
4. Enables fifo when rate > 0.
BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> acceldata
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I882a8e4a487e9e58026c2e60be2aa22e4b8a18a8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3029014
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The bmi3xx driver init is called multiple times, first for BASE_ACCEL
then for BASE_GYRO. The BMI3xx feature resiter and interrupt register
should be configured once.
BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> acceldata
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I5c8522ef7c529ef25e976f2369dfefee76f216e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3029016
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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This patch sets the FIFO watermark to 6 words. This accounts for
3 ACCEL words and 3 GYRO words.
BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
Kernel
$ ectool motionsense
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I641a595aabb8ac06665c9c7d02a479de2be3d982
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3029015
Commit-Queue: Diana Z <dzigterman@chromium.org>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> accelrate 0
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I9b3a30eb84304ab0109b23f86686c33d9b3bdfe6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033969
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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We should retain the saved conf value of BMI3_REG_ACC_CONF in case
new write fails and changes the register unintentionally.
BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
$ ectool motionsense calibrate 0
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: Ie4d7ddcae1ab5fa804d4e2de7a1c35f4b9a16d41
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033779
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
Accel init works on Guybrush
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I326152fb99d31b33c6e594ddcb9b4e5ad9e8379c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033778
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Reduce FOC sample limit to avoid EC command
timeout when factory toolkit rums the calibration
process.
BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> acceldata
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: Ida3deda271b7cbd08306e0183f9809b146139697
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033336
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Address of enroll_ctx array is provided to the FP library and under
some circumstances library can perform 4 byte load/store which needs
address to be 4 byte aligned.
This was found when debugging problem with skipped initialization
during fp_sensor_init(). Bio_sensor pointer was uninitialized, and when
enrollment was requested, FPMCU crashed. It looked like library was
performing 4 bytes access to enroll_ctx when bio_sensor was NULL.
BUG=b:170432597
BRANCH=none
TEST=make BOARD=dartmonkey
TEST=make BOARD=bloonchipper
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I90b64d560448b4d737b09c706a636a567a3db943
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033242
Reviewed-by: Craig Hesling <hesling@chromium.org>
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Latch configuration force interrupt to stay in high state which
results in prolonged interrupts. This is not needed on ChromeOS EC
BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> acceldata
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I50e28cbd252345a3d6fac2b449680197d7419212
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3027680
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
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This improves support for the nx20p3483 PPC. The original driver
supports both the nx20p3481 as well as nx20p3483, but did not capture
some of the differences. VBUS source and sink control has been improved
as that is one of the main functional differences between these chips.
The nx20p3481 controls these using a switch control register while the
nx20p3483 uses external signals from the TCPC.
BRANCH=none
BUG=b:192370665
TEST=delbin can charge reliably from brya USB3 DB
Change-Id: Ic7f90a92f1ead50673157a0255021c49d70e8a80
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3003965
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Fix three issues with BMI160 and BMI260 drivers:
- get/set acclerometer/gyroscope offset will return error on failed read
of offset register
- BMI160 calibration function returns error when setting range fail
- Invalid temperature is properly recognized by driver
BUG=none
BRANCH=none
TEST=run zmake drivers test
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I545c0a931227ef7efc000ec97c1f6297a48e6d1a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3027039
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add BMI emulator which is emulated device on i2c bus. Emulated
accelerometer and gyroscope properties are defined through device tree,
but they can be changed in runtime through BMI emulator API. It allows
to set custom handlers for write and read messages to emulate more
complex scenarios or malfunctioning device.
BMI emulator is designed to implement support for different BMI models
as an extension to common emulator code.
BUG=b:184856157
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I63e9d3aca98c8923372437f7a66257a4c82817f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977559
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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The NCT38xx TCPC takes over the GPIO we otherwise use to control the
Burnside Bridge on Brya P1 devices. To get the BB out of reset we add
the flag to tcpc_config structure to take the control back to TCPM.
BRANCH=none
BUG=b:191516281
TEST=running deployment in the lab; running FAFT PD test
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: I73ddf26964cc6363640ddd80fbcbf353704d3198
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3016406
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BMI323 is one of BMI3XX series accel sensor series.
Adding defines, driver from Bosch APIs based initial patches
submitted by Bosch team members in crrev/c/2966530.
BRANCH=none
BUG=b:178398789
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> acceldata
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Change-Id: I9fa9d80aa25231261994adb4ef0ac5d71ac2f81a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2984740
Reviewed-by: Diana Z <dzigterman@chromium.org>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
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Separate pd interrupt functions to ite_pd_intc for
easier maintenance on cros_ec and zephyr.
And enable PD interrupt functions for zephyr.
BRANCH=none
BUG=none
TEST=1.can zmake hayato and make asurada
2.PD port functions work on board hayato
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Change-Id: I67082bb442da7dfb669e23d8315d81f4abe7ba76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2999358
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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1. This patch implements calibration functionality for BMA422.
2. This patch has manual calibration (FOC > Fast Offset Compensation).
3. This patch has corrected implementation for get and set offset.
BRANCH=none
BUG=b:192409667
TEST=Calibration implementation tested on Guybrush
$ motionsense calibrate NUM
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com>
Change-Id: I8ba44b696e1947844f08d8ed05ec4e280511e8eb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2998504
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
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The NCT3807 requires a few steps for FRS enablement. Specifically:
- Zero out VBUS_SINK_DISCONNECT_THRESHOLD
- Enable FRS interrupt (already done in TCPCI code)
- Set FRS enable to 1
Note that it should not use the TCPCI specification method of clearing
AutoDischargeDisconnect as soon as FRS is set. This results in the CC
lines immediately reading as Open.
BRANCH=None
BUG=b:183586640,b:192012189
TEST=on guybrush C0, confirm FRS can execute successfully with WooHubs,
HooToo, and Moshi
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ida0d33ae9ce4b8660615a0b9f3064cf90f5ae3bd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987598
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Ultra low power mode is not low enough, vendor recommends that power
saving mode is more suitable for us.
BUG=b:192426163
TEST=measure power
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I788e2ed3b2a9deef5ed1dae4061ec5536783ad33
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002707
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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set_range and set_data_rate functions of BMA2x2 driver should check
input values to not set values outside of range supported by device.
BUG=none
BRANCH=none
TEST=makeall
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ie9650975e00a99e86a5229ee200dab24be536076
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953222
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Add BMA255 emulator which is emulated device on i2c bus. Emulated
accelerometer properties are defined through device tree, but they can
be changed in runtime through BMA255 emulator API. It allows to set
custom handlers for write and read messages to emulate more complex
scenarios or malfunctioning device.
BUG=b:184855546
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I4def7fcc54edbf9cb346fda0f21f647a5ad5f8d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2933301
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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This patch makes the battfake command apply the fake SoC to the
display SoC as well as the raw battery SoC.
This patch also cleans up battery_compensate_params.
BUG=None
BRANCH=None
TEST=Atlas
Change-Id: Ifbdaa81204d27501df8a4f5e025c19a79d62feff
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994748
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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With dark resume enabled, disconnect latch flag is obsolete
BUG=None
BRANCH=None
TEST=Swapping Type C devices in s0ix works
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Ica1b55f820f5b3fff5b7dabf88ca57ac0993f246
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2846417
Reviewed-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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BMA422 is one of BMA4XX series accel sensor series.
Adding defines, driver from Bosch APIs based initial patches
submitted by Bosch team members in crrev/c/2894333.
Reference code can be found on
https://github.com/BoschSensortec/BMA423-Sensor-API.
BRANCH=none
BUG=b:178400750
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> acceldata
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Change-Id: I8117283e54980379989fb01f68c29b7d6c501eca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981465
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
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Messages without payload are allowed in the specification though
they're currently not used in the implementation. This patch makes
ctn730 driver properly handle such messages.
BUG=b:192087974, b:190841496
BRANCH=None
TEST=make run-pchg_fuzz
Change-Id: I2d53ba3d45eb3684db7777627d392b1c8570b5ca
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987906
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This avoids taking an nct38xx port out of low power mode when it is not
alerting. The nct38xx chips exit low power mode when they assert Alert.
This means we don't have to explicitly take the port out of LPM to check
its Alert status register. So, directly access the Alert register to
check if the associated port was the source of the Alert.
The nct3808 is a dual port chip with a single Alert pin. We need to be
careful when servicing Alerts because the usual tcpc_read(),
et. al. functions are wrappers that take the port out of LPM mode. When
this happens, the nct3808 generates a CC status change alert on a
disconnected port. Servicing this "phantom" Alert causes the other port
to similarly generate a "phantom" alert. These CC status Alerts can
effectively oscilalte between the two ports for a long time.
BRANCH=none
BUG=b:191531291
TEST=brya no longer gets into ALERT loops on C0/C2
Change-Id: Ib4be6b49a98f3053e5639477e8651b6ba487a0f9
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977473
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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This adds a set of light-weight TCPC register access functions for
special cases where the caller arranges for the TCPC to be accessible
and the complexity of fully taking a TCPC out of LPM mode is not
desirable. A typical use case is for alert service routines to be able
to peek at a TCPCs alert register to determine if further processing is
requested.
BRANCH=none
BUG=b:191531291
TEST=buildall passes
Change-Id: Ib5c9add95f04be311315808168b070793b51cb24
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2986601
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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This is a followup to chromium:2955609. Restore how long we try to talk
to the burnside bridge. The intent is to retry after 10ms instead of
20ms since that speeds up the common case. I didn't mean to reduce how
long we wait for the burnside bridge to be responsive. Restoring
original 40ms timeout.
BRANCH=none
BUG=none
TEST=boots on brya
Change-Id: I6db2a9834d1b4ad11f28a9ac8b59e63356c223a5
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965847
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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This patch adds method to allow boards to customize with ps8xxx
tcpc initial.
BUG=b:189587527
BRANCH=firmware-volteer-13672.B-main
TEST=make buildall
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I0c160eb140500847505a367af08b3d2e82cbbec5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972022
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This patch adds one more register for displayport related settings
with ps8815.
BUG=b:189587527
BRANCH=firmware-volteer-13672.B-main
TEST=make buildall
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: If79dce87a581923bb1f382786042018bc37c737a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972021
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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