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* zephyr: Add Smart Battery emulatorTomasz Michalec2021-05-181-3/+6
| | | | | | | | | | | | | | | | | | | | Add Smart Battery emulator which is emulated device on i2c bus. Emulated battery properties are defined through device tree, but they can be changed in runtime through Smart Battery emulator API. It allows to set custom handlers for write and read messages to emulate more complex scenarios or malfunctioning device. BUG=b:184855975 BRANCH=none TEST=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: Ia94a0a122123e3259882dfdc80d067c61c98379b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903206 Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* driver: add ICM-42607 driver supportJuHyun Kim2021-05-183-0/+1415
| | | | | | | | | | | | | | | | | Add ICM-42607 accel/gyro driver code. BUG=chromium:1198171 BRANCH=None TEST=ectool motionsense && CROS-EC IIO drivers Signed-off-by: JuHyun Kim <jkim@invensense.com> Change-Id: If2cff2bd20ac69ca40bc56af50dcabbd4f5910d6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822268 Reviewed-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org>
* raa489000: enable adc functionMike Lee2021-05-131-10/+31
| | | | | | | | | | | | | | | | | Enable adc function so that We can quickly get the bus voltage. and move clear ADC bit after charger_get_vbus_voltage to reduce power consumption BUG=b:178981107,b:178728138 BRANCH=dedede TEST=storo can keep asgate not drop with ac only TEST=sasukette can keep asgate not drop with AC only Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I39db6f80a5439dbd890c788981796165abb49415 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2890492 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* anx3443: fix incorrect set_mux implementationTing Shen2021-05-121-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | Current driver code sets 0xF8 bit [1:0] to 0b00 when USB_PD_MUX_NONE. However, according to the programming guide (b/181282482#comment3). 0b00 means "power-off", not "disable both paths". This is not what we want because power-off mode blocks all subsequent i2c transactions. Since this mux does not have a "none" state, this CL maps USB_PD_MUX_NONE to USB enabled instead. BUG=b:181282482 TEST=Boot Cherry, verify that error messages like "mux config:0, port:1, rv:1" disappeared BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I2c87c839242fa61e4ba0e1dfca54ebe5bb3beb37 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2870537 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* hayato: Modify HS Detector threshold of PS8743 setting valueMichael5 Chen12021-05-101-0/+11
| | | | | | | | | | | | | | | Modify HS detector threshold setting (0x3C) to 0x60 for USB-C C1 port signal quality. BUG=b:177980418 BRANCH=asurada TEST=manual Run command "ectool i2cread 8 4 0x20 0x3c" to check register value. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I97b6bb16e7c5298ff42e35d936e0f9e60ec3b730 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845564 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* fingerprint: Add test that reads hwidKevin Shelton2021-05-084-2/+8
| | | | | | | | | | | | | | | | | | | | | BUG=b:157576189 BRANCH=none TEST=make buildall -j, Using dragonclaw v0.2 and servo_micro: ./test/run_device_test.py -t fpsensor_hw --flasher=servo_micro, Using icetower and servo_micro: ./test/run_device_test.py -t fpsensor_wh --flasher=servo_micro --board dartmonkey; note: the testrunner hung after printing Test "fpsensor_hw": PASSED, but this hang seems unrelated Cq-Depend: chromium:2872432 Change-Id: I2a3b31776cd40d7f0b422f4845869953b8f07249 Signed-off-by: Kevin Shelton <kmshelton@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314101 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* NX20P348x: Only check sink bit for sink_enable errorDiana Z2021-05-071-1/+1
| | | | | | | | | | | | | | | | | | | When a port is sourcing (ex. to a dongle), running sink disable on the port will currently return failure because the 5VSRC bit is set. However, sinking has been successfully disabled. Reflect this in the error return by only checking the specific sinking bit in the status register. BRANCH=None BUG=b:187220141 TEST=on guybrush, plug and unplug AC on C0 with a dongle on C1. Verify no failures to disable sinking are present. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I529d33b41dc4bc55f7c647742c70832a125fd367 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2877866 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* ln9310: check software workaround is in place for every power-upJohn Crossley2021-05-071-0/+26
| | | | | | | | | | | | | | | | | | | | | | Current software sets some registers only during initial powering of LN9310 (when battery is plugged in). If LN9310 was reset for any reason and then a system power on was attempted (power button press), then LN9310 would attempt a startup without the workaround (bad idea). This change adds a check before every LN9310 enable/disable event and re-initializes LN9310 if a reset has occurred . BRANCH=Trogdor BUG=b:185308433 TEST=Should not break the current boot flow, i.e. power-up and power-down (using long-press of the power button) should function Change-Id: I98c08f50bfd48e09776033eac64658f6e27fb58f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2876869 Reviewed-by: John Crossley <crossley@lionsemi.corp-partner.google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: John Crossley <crossley@lionsemi.corp-partner.google.com> Tested-by: John Crossley <crossley@lionsemi.corp-partner.google.com>
* ln9310: Stronger workaround to prevent SCOUT overvoltage at startupJohn Crossley2021-05-061-23/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This improved workaround (compared to the previous 2520279) moves the CFLY precharge step out of the ln9310's internal startup sequence and implements it using I2C commands sent by the EC just before the I2C command that triggers the ln9310 startup. The workaround additionally modifies the ln9310's internal startup sequence to use the precharged CFLY capacitors as decoupling of an internal node during the startup sequence which should help prevent an OV glitch from appearing on the LN9310 output even if the internal level shifter on SW1 glitches and pulls up on the C1PA/B nodes. BRANCH=Trogdor BUG=b:185308433 TEST=Should not break the current boot flow, i.e. power-up and power-down (using long-press of the power button) should function similar to before this change. Testing the efficacy at preventing the SCOUT overvoltage glitch must be done with LN9310 parts screened out at wafer test that have a higher likelihood of exhibiting the glitch at the SCOUT output. With these parts, startup should be observed with a scope probe monitoring LN9310 SCOUT for overvoltagee. Change-Id: I216991f950196225cabbbfdaa2333f1650f7f4fa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2837531 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: John Crossley <crossley@lionsemi.corp-partner.google.com> Commit-Queue: John Crossley <crossley@lionsemi.corp-partner.google.com>
* I/O Expander: Add CCG6XX driverVijay Hiremath2021-05-053-0/+175
| | | | | | | | | | | | | | | Cypress CCGXXF PD has built-in I/O Expander, added driver to enable GPIO functionality. BUG=none BRANCH=none TEST=Tested on ADLRVP, ioexget & ioexset works as expected Change-Id: I8503178703ad166ac77e96d1990133c88169d23a Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853143 Tested-by: Svyatoslav Paliy <svpaliy@gmail.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* touchpad_elan: ignore unknown ic_typeTing Shen2021-05-051-7/+3
| | | | | | | | | | | | | | | | | | | | | | | Unknown ic_type is not a fatal error, it only affects fw update, but not other usual touchpad functions. We can ignore this error to keep touchpad working. BUG=none TEST=EC able to ignore the unknown ic type error [1.299220 elan_tp_init: ic_type:1500.] [1.299820 elan_tp_init: iap_version:0204.] [1.299976 unknown ic_type: 21] [1.302292 max=3282/1793 width=82/76 adj=0 dpi=800/800] [1.302570 *** TP mismatch!] [1.303245 elan_tp_init:0] BRANCH=trogdor Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ic0471989bb669482deee973c0e4495a65f6928f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2874947 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* touchpad_elan: add ic type 0x15 supportTing Shen2021-05-051-1/+2
| | | | | | | | | | | | | | | Sync the elan_get_fwinfo function from kernel v5.12 to ec codebase. BUG=b:183899273 TEST=no "unknown ic_type: 21" in ec console BRANCH=trogdor Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I0499d2666151448a504d1759d1ee6c3f5376a97a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2874946 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* virtual mux: Wait for mux config ACK from AP on disconnectAyushee Shah2021-05-011-5/+11
| | | | | | | | | | | | | | | | | | | | | | While switching from DP to Thunderbolt mode, EC sends a mux disconnect followed by a USB mux connect. Since these events are one behind the other, AP might miss the disconnect mux event. Hence, this CL waits for an ACK from AP, to synchronize the disconnect mux event between AP and EC. BUG=b:186609339 BRANCH=None TEST=1.Both the monitors behind the Tortilla based dock enumerate after coldboot. 2.Checked Disconnect-Connect with TBT/USB4 device in S0ix, they enumerate fine on full resume. 3.Checked coldboot with non-Tortilla based dock based dock. it enumerates fine. Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: Ib32c3426c2b52b1af582729453d748902447900c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2857374 Reviewed-by: Keith Short <keithshort@chromium.org>
* ps8xxx: Handle null pointersCaveh Jalali2021-04-301-1/+9
| | | | | | | | | | | | | | | This adds a null pointer check to prevent undefined behavior. Also, add check for board_get_ps8xxx_product_id() returning an error. BRANCH=none BUG=b:186189039 TEST=buildall passes Change-Id: I40f5836528e9beaabac27d39ef6dd25013b9302c Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2857795 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* cherry: Add ANX3443 mux/retimer driverParker Lin2021-04-293-0/+136
| | | | | | | | | | | | | | | Add basic support for ANX3443. Datasheets available in bug. BUG=b:181282482 BRANCH=None TEST=Build Signed-off-by: Parker Lin <parkerlin@google.com> Change-Id: Id779547704408b9563f803885cd755ae96d38ef7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728001 Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* raa489000: Check VBUS ADC over POWER_STATUSAseda Aboagye2021-04-291-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | In order to boot without a battery, we need to send the SinkVBUS command to the TCPC as soon as possible once we are aware. Previously, we were checking the TCPC registers, however since this is being done in the TCPC init, the TCPC registers weren't initialised yet so we couldn't really use this field. However, this part is a combined TCPC and charger IC, therefore we can use the charger IC-side APIs to check if VBUS is present. This commit simply checks the VBUS ADC register over consulting the POWER_STATUS TCPC register. BUG=b:178728138,b:178981107 BRANCH=dedede TEST=Build and flash madoo, unplug battery, verify DUT can boot up from either Type-C port with a 45W PD charger. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I4801fcd2655a65e74dc8feddc06e369635a2ce34 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848245 Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* isl9241: fix the system can't boot due to DCM modeZhuohao Lee2021-04-281-1/+5
| | | | | | | | | | | | | | | | | | | | | When the device recover from the battery cutoff, the battery is not ready to output the power to the system. If we toggle the DCM mode at that time, the system power will be cutoff. To avoid this problem, we check the battery battery_get_disconnect_state() before setting the DCM. BUG=b:186188004 BRANCH=firmware-volteer-13672.B TEST=1. charge the battery to near full 2. battery cutoff 3. plug in AC Change-Id: Ic2d959c89a9e37479b919133e10a69be8148a26e Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853885 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* raa489000: Disable DVC in hibernateAseda Aboagye2021-04-271-0/+8
| | | | | | | | | | | | | | | | | | | Leaving DVC enabled on the primary charger in hibernate will increase the power consumption of the system. When we enter hibernate, DVC isn't needed so we can safely disable it. BUG=b:184219851 BRANCH=dedede TEST=Build and flash madoo, verify that DUT is able to hibernate and can charge from sub board when woken up. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I027cceac0cb7eff9ac08293449a06712e9d1daaf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848292 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* ANX7451: Set upstream AUX FLIPRob Barnes2021-04-272-0/+30
| | | | | | | | | | | | | | | | | AUX flip control must be enabled. Otherwise alternate mode will not work on ANX7451 when cable is flipped. The USB registers use a separate i2c address that must be dynamically configured. Since there may be multiple ANX74** parts on a board, this address must be dynamically configured using a board callback. BUG=b:185276137 TEST=Display works when cable is flipped on B2 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I144131b2f53985d97e0be960e202366f726dd90b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2854120 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Sasukette: Fix main board charger can't wake from hibernateMike Lee2021-04-271-0/+2
| | | | | | | | | | | | | | | | | | | | In Sasukette's design, there is a protection IC between USB connector and TCPC. When EC is hibernate, the CC lines will be disconnected, which cause the result that TCPC can't detect AC power and Chromebook won't wake the system. Enalbing ADC for all modes by setting 0x4C bit 0 to 1 can prevent issue mention above. BUG=b:186335659 BRANCH=dedede TEST=flash sasukette and test typeC adapter can wake system from hibernate mode. Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I04e80815ebfb5aa4022835a5fd8a59de1305e3ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853087 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Coachz:PS8XXX: Add 5ms delay to make CC being judged correntlytongjian2021-04-271-0/+10
| | | | | | | | | | | | | | | | | | | This may be a PS8XXX firmware issue, Parade is still trying. BUG=b:185202064 TEST=emerge-strongbad chromeos-ec 0. Insert the Dock to the typeC ports and shutdown the devices; 2. Press powerbutton and poweron the unit; 3. Use lsusb command, list can not find the Dock information; 4. Can find the Dock. BRANCH=Trogdor Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com> Change-Id: Ib667df88549fc9e4f0e4603574af5d70ef326e11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847867 Reviewed-by: Rock Chiu <rock.chiu@paradetech.corp-partner.google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* raa489000: Sink VBUS before switching to TCPC sideMike Lee2021-04-231-1/+1
| | | | | | | | | | | | | | | | | Modify start sinking VBUS condition. in the first initial state, the power status is in the uninit state. BUG=b:178728138 BRANCH=dedede TEST=build and flash sasukette, remove battery, plug in 45W charger, verify that DUT can boot up. Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: Id7223474046528ebece0e1267ec56d1c4d148f41 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847866 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* driver: kionix: Add check for either KXCJ9 or KX022Yuval Peress2021-04-231-0/+4
| | | | | | | | | | | | | | | For the accel_kionix.c module to work, either the KXCJ9 or KX022 configs must be defined. BRANCH=none BUG=none TEST=make buildall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ib015f16d335dcee37f00faee6bcaccb8bf2f3ef6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848431 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* driver: bmi*: Add check for BMI160/BMI260 configYuval Peress2021-04-231-0/+4
| | | | | | | | | | | | | | | The common logic doesn't work if neither the BMI160/BMI260 configs are defined. Add a check for this so the build would fail. BRANCH=none BUG=b:185966444 TEST=make buildall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I3288c5481eba25c8c1858122c83018073e0eaab8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848429 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* driver: kionix: fix imports for zephyrYuval Peress2021-04-231-3/+3
| | | | | | | | | | | | | | In Zephyr builds we don't add the root platform/ec in the include path so we'll need to remove the "driver/" prefix BRANCH=none BUG=b:185966444 TEST=make buildall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ib757d4c7459e6f99178e03f1ef7fa1fc5e413c34 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2844790 Reviewed-by: Keith Short <keithshort@chromium.org>
* pca9675: Add code to fit standard I/O expander functionalityVijay Hiremath2021-04-232-95/+88
| | | | | | | | | | | | | | | Added code so that PCA9675 I/O expander driver fits standard I/O expander functionality. BUG=b:169814014 BRANCH=none TEST=Manually tested on ADLRVP, ioexget & ioexset works Cq-Depend: chromium:2845014 Change-Id: I07957a3f1de9b70fc396d767e8cc3ac8884b9c2e Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2829985 Reviewed-by: caveh jalali <caveh@chromium.org>
* bq25710: Replace some macros with functionsCaveh Jalali2021-04-231-9/+15
| | | | | | | | | | | | | | This replaces the IIN_DPM_REG_TO_CURRENT and IIN_HOST_CURRENT_TO_REG macros with equivalent functions to make the implementation more robust. BRANCH=none BUG=b:185190976 TEST=buildall passes Change-Id: I9fac69d38efd197a916bc18d12869b04a89adb5a Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2842705 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* bq25710: Fix register field access macrosCaveh Jalali2021-04-232-14/+17
| | | | | | | | | | | | | | | | This cleans up the use of CURRENT_SHIFT and CURRENT_STEP_MA in related macros. Also, in one case INPUT_RESISTOR_RATIO was not applied to IIN_DPM - luckily, this ratio is 1 for all affected boards, so fixing this has not functional impact. BRANCH=none BUG=b:185190976 TEST=ran util/compare_build.sh on affected boards Change-Id: Ib3e8321d3d7ed69d33d7266077a67c5d2893182a Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785269 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* usb_mux/amd_fp6: Handle chipset_resetRob Barnes2021-04-221-1/+7
| | | | | | | | | | | | | | The driver was only handling chipset_resume. chipset_reset also needs to be handled. Otherwise mux won't be set on an apreset. BUG=None TEST=C1 display works after apreset BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I0ec336a733e51d44be7ea95f8fcfeb8a606d50a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845269 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ANX7451: Add power off and wake up routinesRob Barnes2021-04-222-10/+56
| | | | | | | | | | | | | | | | Add anx7451_power_off and anx7451_wake_up routines. ANX7451 is powered off whenever both USB and DP are disabled. ANX7451 is woken up via i2c before mux set or get. BUG=b:184907521 TEST=Mux is powering off when nothing is connected. Mux is waking up when cable is connected. BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Idf1343735cb94eb8bbaebe93794195d2f115b086 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2840056 Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: driver: bmi160: Add interrupt handler using devicetreeYuval Peress2021-04-221-0/+17
| | | | | | | | | | | | | | Add the interrupt handler using the same model used in the bmi260. BRANCH=none BUG=b:185966444 TEST=zmake testall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I7aa3bcade8c3bc0fe526d44f8223bab8760cf279 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2842714 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* gl3590: Add a delay to allow hub release i2c linesJan Dabros2021-04-221-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | GL3590 (USB3 hub) chip may drive I2C_SDA and I2C_SCL lines after being released from reset. Max time for such "activities" is 200ms. In order to ensure correct operations on the i2c bus, we need to delay all i2c transactions in the system by such value. Implementation is using hook with higher priority than I2C_INIT. This guarantees that: * SoC won't start i2c transactions before 200ms mark after GL3590's RESETJ# pin deassertion; * Original order of loading all generic modules (e.g. ioex_init, board_init) won't need to be changed; * Workaround applied only in platform-specific code. BUG=b:181930164 BRANCH=main TEST=build and flash new servo_v4p1 firmware Plug in CHG and DUT cables. _Then_ plug in HOST cable and verify that green diode is lit on servo_v4p1 board indicating proper pass-through charging. Signed-off-by: Jan Dabros <jsd@semihalf.com> Change-Id: I32971d421eb541c788a87701ce5e8c62a8b35777 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2829770 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* thermisor: move header to include dirDawid Niedzwiecki2021-04-225-154/+4
| | | | | | | | | | | | | | | | Move the "thermistor.h" header to the include/driver/temp_sensor directory. It is used by the Zephyr shim, so the change is useful to include the header. BUG=b:180403276 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I0e83df97e50a3b324440b65ddb900ddf135f2439 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2843323 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* driver: bmi160: Fix imports for zephyr include pathYuval Peress2021-04-211-3/+3
| | | | | | | | | | | | | | | | | Zephyr builds do not use the platform/ec root in the include path so we need to remove the "driver/" prefix for these includes. BRANCH=none BUG=b:185966444 TEST=zmake testall TEST=make buildall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ic8682ad2b5c53621ea54984d6d7d711fc4e7173f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2842708 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPC: Cleanup: Get Sink & SRC state from PD or PPCVijay Hiremath2021-04-213-29/+11
| | | | | | | | | | | | | | Added option to get the Sinking or Sourcing state from either PD or PPC. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ibb21ef69b5825ea5722ceacd5d7ef6f535aad17c Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2838127 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* raa489000: Sink VBUS before switching to TCPC sideAseda Aboagye2021-04-211-15/+15
| | | | | | | | | | | | | | | | | | | | When the RAA48900 switches from charger IC control to TCPC control, it will disable the ASGATE. In cases where the board is booted without a battery, this can cause a loss in VSYS. This commit has the board attempt to sink VBUS if it's present prior to switching the part to TCPC control. BUG=b:181712325 BRANCH=dedede TEST=Build and flash galith, remove battery, plug in 45W charger, verify that DUT can boot up. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Id5b3269911d3b8222b28886f66ef724e3e82c637 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2829115 Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* TCPC/PPC: Add code for Cypress EZ-PD CCG6DF, CCG6SFVijay Hiremath2021-04-201-0/+17
| | | | | | | | | | | | | | | | | | | | | | CCG6DF and CCG6SF are dual-port and single-port USB Type-C controllers respectively. These can act as either PD or TCPC based on the Phy firmware flashed on the internal flash. These chips use standard TCPCI driver. BUG=none BRANCH=none TEST=With the initial Phy F/W able to test following on ADL RVP 1. Single port Type-C is validated 2. Dead battery boot 3. Source & Sink path 4. SOP* 5. USB, DP, TBT 6. 100K, 400K, 1MHz I2C Change-Id: I1b1a2f759139ac1c7aab42d851b8a7866664e28a Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2551653 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPC: Cleanup: Enable PPC from PD or Power MUXVijay Hiremath2021-04-207-8/+12
| | | | | | | | | | | | | | | Some PD chips have integrated SRC FET and control the SRC/SINK FET from GPIOs hence cleaned up the code to enable Power Path Control from either from PD or from Power MUX. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I77f96b681fd2e5fca35bce425e4bd5ec87d5ccfd Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2828980 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* driver: bmi: fix use of I2C_PORT_ACCELYuval Peress2021-04-162-143/+94
| | | | | | | | | | | | | | | | | | | | | The BMI driver is currently using I2C_PORT_ACCEL incorrectly as a CONFIG_ value. Update the use cases to a new config option that selects between SPI and I2C communication specifically for the chip. To avoid a lot of device.h changes, the value of the config value is automatically inferred if not explicitly set. BRANCH=none BUG=b:185392974, b:146065507 TEST=zmake testall TEST=make buildall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I6196cc595dc61877ab2b8ed5416bebee51276927 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2829010 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* driver: icm: fix use of I2C_PORT_ACCELYuval Peress2021-04-163-119/+79
| | | | | | | | | | | | | | | | | | | | | The ICM driver is currently using I2C_PORT_ACCEL incorrectly as a CONFIG_ value. Update the use cases to a new config option that selects between SPI and I2C communication specifically for the chip. To avoid a lot of device.h changes, the value of the config value is automatically inferred if not explicitly set. BRANCH=none BUG=b:185392974, b:146065507 TEST=zmake testall TEST=make buildall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I8b1a507a76031c2bb1aaf4ca7b14b92252a941f8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2826920 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* guybrush: Refactor FP6 mux driver to retry in S0Rob Barnes2021-04-161-74/+80
| | | | | | | | | | | | | | FP6 USB mux is not ready until sometime after S0. Refactor driver to keep trying every 1 second until mux is ready. BUG=b:184680878, b:184966860 TEST=C0 and C1 display connects on B1 and B2 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: If744182879461d8452426deaf0e74a84dacfd510 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2819023 Reviewed-by: Diana Z <dzigterman@chromium.org>
* drive: lsm6dso: Modify interrupt from high active to low activeOwen_Ou2021-04-161-2/+3
| | | | | | | | | | | | | | | | | | | HW design the motion sensor interrupt pin to active low, but in the EC codebase, the sensor initial value for LSM6DSO_CTRL3_ADDR (0x12) didn't set the bit 5 (LSM6DSO_H_L_ACTIVE) to high. BUG=b:185282500 BRANCH=none TEST=ectool motionsense can read the base accel and gyro value. Signed-off-by: Owen_Ou <owen_ou@compal.corp-partner.google.com> Change-Id: Iaecdab388a218ae7ae8c586b70f576612c7f85de Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2825989 Reviewed-by: Owen Ou <owen_ou@compal.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Owen Ou <owen_ou@compal.corp-partner.google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
* raa489000 : control ALERT_B when wake from hibernationYongBeum.Ha2021-04-161-0/+11
| | | | | | | | | | | | | | | | When 'Enable ADC' on Control3 is cleared, EN_DIS_MCU_LDO_IN_BAT on Control8 and EN_DIS_GP_COMP_IN_BAT on Control4 must be cleared to set ALERT_B. BUG=b:185434129 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I6f77c0cfb727a66128ef95115a02d2fd49a04ad9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2830654 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* mp2964: Add PMIC driverCaveh Jalali2021-04-163-0/+177
| | | | | | | | | | | | | | | | | This adds a driver for the mp2964 IMVP9.1 PMIC. This driver enables programming control registers within the PMIC. BRANCH=none BUG=b:185424011 TEST=buildall passes. functional testing was done with the follow-on patch. Change-Id: I9b2d89007b5f6933ceeb9a1bcd3bbefb819888a3 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2827950 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* bq25710: Sort registers in numerical orderCaveh Jalali2021-04-162-14/+14
| | | | | | | | | | | | | | | | This sorts the register reporting in the charger_dump command to be numeric order. The original order was probably motivated by the bq25710 datasheet which lists registers out of order. The bq25720 datasheet lists registers in numeric order which makes cross referencing easier. BRANCH=none BUG=b:185190976 TEST=buildall passes Change-Id: I79eca2d1926bd87d77d710e812fc6d18e4b4d2e8 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2819587 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* zed: update touchpad parameterTing Shen2021-04-151-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update touchpad parameter for zed. There's no integer solution for CONFIG_USB_HID_TOUCHPAD_PHYSICAL_MAX_Y (calculation appended below), this CL also modified the runtime check in elan tp driver to allow rounding errors. Math details: Given dpi_y = 800, LOGICAL_MAX_Y = 1811, we want to find an integer PHYSICAL_MAX_Y such that dpi == 254 * LOGICAL_MAX_Y / PHYSICAL_MAX_Y. The closest solution is 1) PHYSICAL_MAX_Y = 574, 254 * LOGICAL_MAX_Y / PHYSICAL_MAX_Y = 801.3832 != dpi_y, or 2) PHYSICAL_MAX_Y = 575, 254 * LOGICAL_MAX_Y / PHYSICAL_MAX_Y = 799.9895 != dpi_y Both cannot pass our runtime verification. BUG=None TEST=No "TP mismatch" in ec console BRANCH=trogdor Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I9d0c54d029bb2f9e78114341a6246857b41937b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2825473 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* raa489000 : clear 'Enable ADC' bit on port 1YongBeum.Ha2021-04-151-9/+10
| | | | | | | | | | | | | | 9mW is reduced on S0iX power consumption by clearing 'Enable ADC' bit. BUG=b:178356507 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I585ce87bf778f8386edfe8ccaaf1aa53f0374eff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2801175 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* sm5803: Add hysteresis control for TINTDevin Lu2021-04-142-7/+26
| | | | | | | | | | | | | | | | To prevent sm5803 is triggering INT2 continually when temperature near to 330 K. This patch adds hysteresis control for TINT. BUG=b:185209738 BRANCH=firmware-dedede-13606.B-master TEST=i2c analyzer to see INT2 is not trigger continually. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ib83fbc3c84a872bc393084a0c651e14b35efbdcf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2825077 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* ISL923x: Add the conversion of the written valueMike Lee2021-04-141-2/+2
| | | | | | | | | | | | | | | Use "AC_CURRENT_TO_REG(CUR)" "CURRENT_TO_REG(CUR)" to convert the written value in set_ac_prochot and set_dc_prochot. BUG=None BRANCH=dedede TEST=make BOARD=sasukette successfully,and local build test ok Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I429a3de95d42eec6b55961c286c2eaa7a0328b94 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2781501 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* bq25720: Add new register for dumpingCaveh Jalali2021-04-132-0/+2
| | | | | | | | | | | | | | | This adds the BQ25720_REG_CHARGE_OPTION_4 register to the list of registers dumped by the charger_dump command. This register does not exist on the bq25710. BRANCH=none BUG=b:185190976 TEST=buildall passes Change-Id: I475007951cc1dd770ccca7c3704c2d5d3f6de04e Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2819585 Reviewed-by: Boris Mittelberg <bmbm@google.com>
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