| Commit message (Collapse) | Author | Age | Files | Lines |
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set_range and set_data_rate functions of BMA2x2 driver should check
input values to not set values outside of range supported by device.
BUG=none
BRANCH=none
TEST=makeall
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ie9650975e00a99e86a5229ee200dab24be536076
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953222
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Add BMA255 emulator which is emulated device on i2c bus. Emulated
accelerometer properties are defined through device tree, but they can
be changed in runtime through BMA255 emulator API. It allows to set
custom handlers for write and read messages to emulate more complex
scenarios or malfunctioning device.
BUG=b:184855546
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I4def7fcc54edbf9cb346fda0f21f647a5ad5f8d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2933301
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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This patch makes the battfake command apply the fake SoC to the
display SoC as well as the raw battery SoC.
This patch also cleans up battery_compensate_params.
BUG=None
BRANCH=None
TEST=Atlas
Change-Id: Ifbdaa81204d27501df8a4f5e025c19a79d62feff
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994748
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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With dark resume enabled, disconnect latch flag is obsolete
BUG=None
BRANCH=None
TEST=Swapping Type C devices in s0ix works
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Ica1b55f820f5b3fff5b7dabf88ca57ac0993f246
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2846417
Reviewed-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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BMA422 is one of BMA4XX series accel sensor series.
Adding defines, driver from Bosch APIs based initial patches
submitted by Bosch team members in crrev/c/2894333.
Reference code can be found on
https://github.com/BoschSensortec/BMA423-Sensor-API.
BRANCH=none
BUG=b:178400750
TEST=Accel implementation tested on Guybrush
EC commands:
> accelinfo
> acceldata
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Change-Id: I8117283e54980379989fb01f68c29b7d6c501eca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981465
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
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Messages without payload are allowed in the specification though
they're currently not used in the implementation. This patch makes
ctn730 driver properly handle such messages.
BUG=b:192087974, b:190841496
BRANCH=None
TEST=make run-pchg_fuzz
Change-Id: I2d53ba3d45eb3684db7777627d392b1c8570b5ca
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987906
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This avoids taking an nct38xx port out of low power mode when it is not
alerting. The nct38xx chips exit low power mode when they assert Alert.
This means we don't have to explicitly take the port out of LPM to check
its Alert status register. So, directly access the Alert register to
check if the associated port was the source of the Alert.
The nct3808 is a dual port chip with a single Alert pin. We need to be
careful when servicing Alerts because the usual tcpc_read(),
et. al. functions are wrappers that take the port out of LPM mode. When
this happens, the nct3808 generates a CC status change alert on a
disconnected port. Servicing this "phantom" Alert causes the other port
to similarly generate a "phantom" alert. These CC status Alerts can
effectively oscilalte between the two ports for a long time.
BRANCH=none
BUG=b:191531291
TEST=brya no longer gets into ALERT loops on C0/C2
Change-Id: Ib4be6b49a98f3053e5639477e8651b6ba487a0f9
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977473
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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This adds a set of light-weight TCPC register access functions for
special cases where the caller arranges for the TCPC to be accessible
and the complexity of fully taking a TCPC out of LPM mode is not
desirable. A typical use case is for alert service routines to be able
to peek at a TCPCs alert register to determine if further processing is
requested.
BRANCH=none
BUG=b:191531291
TEST=buildall passes
Change-Id: Ib5c9add95f04be311315808168b070793b51cb24
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2986601
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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This is a followup to chromium:2955609. Restore how long we try to talk
to the burnside bridge. The intent is to retry after 10ms instead of
20ms since that speeds up the common case. I didn't mean to reduce how
long we wait for the burnside bridge to be responsive. Restoring
original 40ms timeout.
BRANCH=none
BUG=none
TEST=boots on brya
Change-Id: I6db2a9834d1b4ad11f28a9ac8b59e63356c223a5
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965847
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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This patch adds method to allow boards to customize with ps8xxx
tcpc initial.
BUG=b:189587527
BRANCH=firmware-volteer-13672.B-main
TEST=make buildall
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I0c160eb140500847505a367af08b3d2e82cbbec5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972022
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This patch adds one more register for displayport related settings
with ps8815.
BUG=b:189587527
BRANCH=firmware-volteer-13672.B-main
TEST=make buildall
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: If79dce87a581923bb1f382786042018bc37c737a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972021
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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When detaching from debug accessories, we need to set the CC lines to
Open which may cause a loss of Vbus. However, if the port isn't sinking
Vbus, then it should be okay to run this detach regardless of our
current battery level.
BRANCH=None
BUG=b:191465743
TEST=on blipper, run the battery down with servo_v4 attached and observe
the DUT can be woken normally by a charger on C0 after hibernate
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I5f946b23607c0bb3936132e93355875ff5688b30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2983694
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Set VBUS_VOL_SEL to 20V (4'b1111).
BUG=b:191609106
BRANCH=none
TEST=boot up system by plugging in adapter to typc port 1
with battery on Cherry dut.
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: If3c3a82b2e0dbcecb1adaa62cb5d8ade4bae1942
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977866
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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There is a name mismatch with some of the registers needed in this
driver. Use #define for now until we can change these in ECOS, or
remove the ECOS code.
BUG=b:189855648, b:190860075
BRANCH=none
TEST=with other CLs, build asurada for Zephyr
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I73da708c6e876db092b345ff7e0b28d99960b4d1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2957548
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Change PS8811 pre-shoot from 3dB to 1.5dB. This was incorrectly set to
3dB due to a misunderstanding of the datsheet.
BUG=b:186586795
TEST=Boot guybrush
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I49e150433408fc2b44fafb4bed406166f110fbeb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964957
Reviewed-by: Rock Chiu <rock.chiu@paradetech.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Changed the power handler function name from bb_retimer_power_handle()
to bb_retimer_power_enable() and on_off param to enable.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ifad4c71a5d76b4841ea369a991160e221c051ec5
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973375
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Add KB800x driver. Add config options to Kconfig.
BUG=b:168930682
TEST=On Volteer, check USB4, TBT3, DPMF, DP, and USB3 functionality
BRANCH=none
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: Ic71b0d4236037522455a0561ba87fd9a874a4968
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2930581
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Compiler in nocturne cros SDK doesn't allow for variable declaration
inside for loop. This patch removes variable declaration inside for
loop in code which is used by nocturne board.
This patch doesn't introduce any logical changes.
BUG=b:160676144
BRANCH=none
TEST=Make sure EC points to commit on cros/main.
On nocturne SDK:
cros_workon-nocturne start chromeos-ec
emerge-nocturne chromeos-ec chromeos-bootimage
Make sure that firmware compiles
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I75ff21d966d5e353d1f7873695127bac4357fb32
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965922
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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This patch adds a fuzz test for PCHG and ctn730 driver.
With the given corpus, the test currently reaches all the normal mode
states.
BUG=b:190841496
BRANCH=trogdor
TEST=make run-pchg_fuzz
TEST=pchg_fuzz.exe -seed=1 -runs=1000000 -dict=fuzz/pchg_fuzz.corpus
Change-Id: I6eedbbbdbf3396dfa2b98ca302e16d142ea251d5
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2956076
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An external reset of the chip will reset some information we've gathered
from that chip. Notify the driver so stored information may be reset as
well.
BRANCH=None
BUG=b:183660105
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib3335cf2984f2b13bbed7cacee603ba47edd2a51
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953875
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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Outside code may need an understanding of our board's boot type, so
allow it to be exported from the driver.
BRANCH=None
BUG=b:183660105
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iec61872be283f9ef65ccf71e99d89cee7184f2f8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953874
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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Replace spaces with tabs and align all indents in defines.
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I4bc656f757f6d3fe62822676c6b8698e0038a3f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2959793
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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This CL changes the stm32gx TCPM driver to allow
CONFIG_USB_PD_VBUS_DETECT_TCPC to still be defined on boards that also
use the stm32gx TCPM driver. This is required for gingerbread which
has a PPC on C0 for VBUS detection, but relies on the TCPC to detect
VBUS on port C1.
BUG=b:159330563
BRANCH=quiche
TEST=validated that can attach as SRC/DFP on C1
> pd 1 state
Port C1 CC2, Enable - Role: SRC-DFP-VC TC State: Attached.SRC,
[10.435540 C1: PE_SRC_Ready]
[10.436511 pin_mode: 4, mf: 0, mux: 2]
[10.442645 C1: PE_VDM_Request_DPM]
[10.470346 C1: Entered DP mode]
[10.470480 C1: PE_SRC_Ready]
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I986d504b1306c02132869abe7cbd630a966e0acd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2949954
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This adds additional checks to avoid mux device accesses when the
generic mux driver knows that the device has not been initialized or is
in low power mode. This avoids spurious I2C transaction failures when
attempting to access unavailable devices.
BRANCH=none
BUG=none
TEST=observed "C0: Retimer I2C write err=1" messages are gone
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Change-Id: I762a878f2cab91ca98fd7a602e0b20be8b85ccd8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2955610
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The PS8805 has 3 GPIO signals which can be controlled by the EC with
I2C register accesses. This CL adds functions to both set and get a
one of the 3 PS8805 GPIO signals.
BUG=b:159330563
BRANCH=quiche
TEST=verified on gingerbread that VBUS control is functioning.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I1ef688e713ea84d2b0c6a6c23385fe6afb4f96b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953868
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This replaces inverted boolean logic with explicit comparison with
EC_SUCCESS for improved readability.
BRANCH=none
BUG=b:181743576,b:188826559
TEST=compare_builds.sh matches
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Change-Id: Id5aaa167b2e9071e5757f561d788da49af03f9d9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962214
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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BUG=none
BRANCH=none
TEST=Tested on ADLRVP, all the I/O pins are at default state as
in GPIO.inc
Change-Id: Id1f19d500860749183b4eaed90685efda3bbc716
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954729
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com>
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Add PS8811 USB A retimer driver. Reusing USB mux structure even though
the retimer does not have a mux.
BUG=b:176987937
TEST=Build and run
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: Ie11a105f344e6acc1312cda517fdfe54ecb8c8ea
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2946307
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This reduces the delay between poll intervals of the burnside bridge
register accesses. A 10 ms delay is typically sufficient to achieve a
successful register read if the first register read failed.
BRANCH=none
BUG=none
TEST=with added timestamps, observed register accesses succeed after a
10ms delay.
Change-Id: I33941b26ef093b0a6c2f38d1f5223991c9b9d4ba
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2955609
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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This allows the implementation of bb_retimer_power_handle() to return a
status value indicating whether the request was successful. The default
implementation simply controls a GPIO and is expected to succeed
unconditionally. More complex implementations may run into failure cases
that leave the BB unreachable. When this happens, device initialization
returns an error so the caller can take mitigating action.
USB MUX operations tend to be called from timing sensitive code paths in
the TCPM, so careful error handling helps avoid cascading problems like
PD negotiation failures.
BRANCH=none
BUG=b:181743576,b:188826559
TEST=buildall passes, PD still works on brya
Change-Id: If79078be26e47d758e2cd6cc385ff2b34fecff63
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954198
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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We'll extend the period for a stylus to be statically charged so that
EEPROM corruption can be avoided by not entering negotiated mode with
a depleted battery.
During this static charge period, the user currently doesn't see any
charging indication. To prevent users from removing a stylus, we'll
add a new state 'device docked' to ctn730.
The EC firmware is updated to handle this new state as follows:
- PCHG_STATE_DETECTED will be reused to indicate a device is in
proximity but not ready for communication.
- PCHG_STATE_CONNECTED will be added to indicate a device is ready
for digital communication. This is formerly called DETECTED.
- CTN730 driver produces PCHG_EVENT_DETECTED on 'docked' event and
PCHG_EVENT_CONNECTED on 'detected' event.
- When DEVICE_UNDOCKED is received in PCHG_STATE_DETECTED,
transition to PCHG_STATE_ENABLED.
BUG=b:189323070, b:173235954
BRANCH=trogdor
TEST=Verify unpowered listener board can be detected.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I7fa83f6dd31cf74eab7c158e557ddc09f8976798
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2920628
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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We need to add a condition for vbusmv to avoid that
when the vbus_mv value is small but not zero vbus_mv,
it is still considered as an adapter and open asgate.
BUG=b:189090988
BRANCH=dedede
TEST=make BOARD=storo
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: Ic046e65ed69f8616d6bc7d8ca28fc27cf894ed07
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2949627
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Add a separate public header for this chip so we can include it from
Zephyr.
Drop the #ifdef since the linker will give an error if the function is
missing.
BUG=b:189855648
BRANCH=none
TEST=make BOARD=hayato -j30
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ic4c755da2b576d6cd3465cfd803dfb0e4ad0fbef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941810
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
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Add a separate public header for this chip so we can include it from
Zephyr.
BUG=b:189855648
BRANCH=none
TEST=make BOARD=hayato -j30
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ieefe30bbacac0fea2132355c88626525fa37c3d2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941809
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
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Add a separate public header for this chip so we can include it from
Zephyr.
BUG=b:189855648
BRANCH=none
TEST=make BOARD=hayato -j30
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Idf2cfbf31e32880ca8cb7d5e72ba0d844cda31b9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941808
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
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Update the motion_sense.h address macros to reflect our current i2c
terms, and also to specify that these are used exclusively in the
accelerometer code.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ibad287df2ba1ecd0b6f3061599476636ac7a5354
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2946316
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Add a separate public header for this chip so we can include it from
Zephyr.
BUG=b:189855648
BRANCH=none
TEST=make BOARD=hayato -j30
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Iaf93bf7f0f7336b17d06bd5c5691624a3877a43b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941807
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
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Update RT1718S address define to match current i2c naming conventions in
the codebase.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ieed8871d02185a55335fa2e1ebe87d40a5cb6fac
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2946315
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Update the comment for the IT8801 i2c address to match new i2c
conventions.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I868c9416a3b36396154df41f2e026691de75491c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2946314
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
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Modify strength value setting of tusb544,
set vod dcgain setting_5,set usb eq 15,and
set dp eq 6.
BUG=b:183583917,b:183586638
BRANCH=dedede
TEST=make BOARD=storo and verified pass by EE
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: Ic8b16fed18e06e4fa763faf47c2041dc1d3c29f1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784332
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This handles multiple retimers in one PD port case.
BRANCH=none
BUG=none
TEST=on ADL RVP, do "bb 0 r 4" "bb 0 w 4 <val>" can read/write
both retimers.
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: Ie4dc6da8dec83e95a090cbb68d4f53e5e12a62e5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939382
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Since not all boards will power the TMP112 in all power states, allow
boards to trigger init themselves when they power up the chip.
BRANCH=None
BUG=b:188539950
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id24f559d745e86cdcf2f39a10111decc0797bf28
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2940574
Reviewed-by: Rob Barnes <robbarnes@google.com>
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Some boards may not power their temperature i2c port at all times. If
this is the case, don't bother to attempt reading the device.
BRANCH=None
BUG=b:188539950
TEST=on guybrush version 1, ensure there's no unwedge spam in G3 when
the sensor rail is off
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I01516f82a847fba0a5840c507851551f28f59197
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2938047
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BUG=b:180980668,b:189857004
BRANCH=none
TEST=make buildall
TEST=zmake configure -b $PROJ_HAYATO
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ib743f0dbcc4a9731ccb575344413f161cd0dbba2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2944617
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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If a TCPC supports OCP and the TCPC has reported OCP in its fault
register, assume we should report this to the OCP module. Additionally,
enable fault alerts for all TCPCI TCPCs.
BRANCH=None
BUG=b:174334068
TEST=on galtic, verify OCP events are reported when current is
overdrawn
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I1a13b4a0869d8917f8660fd356d43c28e0e43814
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923237
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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A board may have more than one TMP112, in which case we need an array to
know which address to use for each sensor and for retrieving that
sensor's last read temperature.
BRANCH=None
BUG=b:188539950
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If3ad286010698683f25825872bd8bfd53b8795e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2938044
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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This sensor may support up to 4 addresses, so add all possible options.
BRANCH=None
BUG=b:188539950
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I6132df521ab57448a8b501c0e4c0ebcdc9eb0bfb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2938043
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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BUG=none
BRANCH=none
TEST=Tested voltage levels on CCGXX validation platform
Change-Id: Ibc8f0dc05ac4351e96d9479a99227633742ec7bc
Signed-off-by: Iurii Berezhanskyi <iurii.berezhanskyi@infineon.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891837
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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If we've booted in dead battery mode with a debug accessory connected,
then changing the TCPC_CONTROL.DebugAccessoryControl bit will result in
a significant delay to detecting the CC line state. Track our boot type
and use it plus the presence of a debug accesssory to determine if we'll
change this bit.
BRANCH=None
BUG=b:186799392
TEST=on mancomb, boot and reboot with servo_v4 power only and ensure we
detect the CC lines correctly with no dealy. Also plug in servo_v4 with
BJ power attached first to ensure we set the debug accessory control bit
correctly and verify we can PR swap back and forth.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I5bcdee1de61ed198cab82bae1ab6ac5996b9e80b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919942
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=buildall
Change-Id: Iebf0817c1b605d74348c9b20c01df74bd69468d2
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929338
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