| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=b:180980668,b:189857004
BRANCH=none
TEST=make buildall
TEST=zmake configure -b $PROJ_HAYATO
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ib743f0dbcc4a9731ccb575344413f161cd0dbba2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2944617
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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If a TCPC supports OCP and the TCPC has reported OCP in its fault
register, assume we should report this to the OCP module. Additionally,
enable fault alerts for all TCPCI TCPCs.
BRANCH=None
BUG=b:174334068
TEST=on galtic, verify OCP events are reported when current is
overdrawn
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I1a13b4a0869d8917f8660fd356d43c28e0e43814
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923237
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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A board may have more than one TMP112, in which case we need an array to
know which address to use for each sensor and for retrieving that
sensor's last read temperature.
BRANCH=None
BUG=b:188539950
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If3ad286010698683f25825872bd8bfd53b8795e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2938044
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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This sensor may support up to 4 addresses, so add all possible options.
BRANCH=None
BUG=b:188539950
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I6132df521ab57448a8b501c0e4c0ebcdc9eb0bfb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2938043
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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BUG=none
BRANCH=none
TEST=Tested voltage levels on CCGXX validation platform
Change-Id: Ibc8f0dc05ac4351e96d9479a99227633742ec7bc
Signed-off-by: Iurii Berezhanskyi <iurii.berezhanskyi@infineon.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891837
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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If we've booted in dead battery mode with a debug accessory connected,
then changing the TCPC_CONTROL.DebugAccessoryControl bit will result in
a significant delay to detecting the CC line state. Track our boot type
and use it plus the presence of a debug accesssory to determine if we'll
change this bit.
BRANCH=None
BUG=b:186799392
TEST=on mancomb, boot and reboot with servo_v4 power only and ensure we
detect the CC lines correctly with no dealy. Also plug in servo_v4 with
BJ power attached first to ensure we set the debug accessory control bit
correctly and verify we can PR swap back and forth.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I5bcdee1de61ed198cab82bae1ab6ac5996b9e80b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919942
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=buildall
Change-Id: Iebf0817c1b605d74348c9b20c01df74bd69468d2
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929338
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BUG=b:177391887
TEST=manually
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I250c33c8e7c433679fa3a2fcc31e0c59656190e8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2880133
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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BUG=b:177391887
TEST=none
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I8f017e21b74c1e27ca7f257b76b0ef74fd0343f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639734
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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This debug accessory control setting was initially added to the TCPCI
driver to support the NCT3807, but now should move into the NCT driver
since it will need to be conditional on specific register conditions.
Note that NCT is the only driver currently implementing the
debug_accessory driver field, so it's not expected to affect other
TCPCs.
BRANCH=None
BUG=b:186799392
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id5832c474378a3f8735c6c72c5535ddb5d9229d4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919940
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Enable Auto Discharge functionality in TCPM driver by hooking
tcpci_tcpc_enable_auto_discharge_disconnect() wrapper
into tcpci_tcpm_drv structure.
BUG=none
BRANCH=none
TEST=Tested on ADLRVP, USB4 with TCPCI works as expected
Change-Id: I87af20b031ce58e74f9fa7e9b4a8b5eee0002d72
Signed-off-by: Iurii Berezhanskyi <iurii.berezhanskyi@infineon.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2914973
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
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Initial driver for the TDP142, a DisplayPort redriver chip. The initial
implementation simply provides access to the chip's control selection
since it must be explicitly enabled after the chip powers on.
BRANCH=None
BUG=b:187856682
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I4afe4b0453ef49154b766166f608bd3d0fb8848f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2915823
Reviewed-by: Rob Barnes <robbarnes@google.com>
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BUG=none
BRANCH=none
TEST=make BOARD=cherry
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: Ib3ea251706f9ee933e5ddf28945ca9e11225e215
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2909955
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Fix data table for:
- 3v3 51.1K pull-up resistor divider with the 47K thermistor
- 3v3 13.7K pull-up resistor divider with the 47K thermistor
- 3v0 22.6K pull-up resistor divider with the 47K thermistor
Now they are using table based on manufacturer resistance table instead
of constant B parameter Steinhart-Hart equation.
BRANCH=none
BUG=b:184857072
TEST=makeall
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ib1998c5e528731e4c2f00e0eb76a568eb4acba6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2886887
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Add the resistance table we used in the lookup table calculation in the
thermistor.c file.
BRANCH=none
BUG=none
TEST=none
Change-Id: If9d2e11b5e1b40bf67698187d99849220ff97ea6
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2904831
Reviewed-by: Tomasz Michalec <tm@semihalf.com>
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The dedede boards erroneously assumed that if VBUS was present, then
"extpower" was present. "extpower" is generally connected to the ACOK
signal for the battery charger IC. It indicates that the voltage
present at the switching node is valid for bucking or boosting. For our
Type-C systems, this needs to be at least 4V. However, just because
VBUS is present doesn't mean that the voltage is present at the
switching node. The FETs on the selected charge port needs to be
enabled first.
This commit simply changes the logic to check the battery charger ICs'
ACOK status to reflect whether extpower is present.
BUG=b:187965740
BRANCH=dedede
TEST=Build and flash drawcia and madoo, verify that "AC on" prints are
emitted when the charge port is selected and not just when VBUS appears
on the port.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: If5a4a10d502f2f08ccf1d3228e42f48fa6d45909
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901254
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This commit adds a function to return whether the voltage before the
switching FETs is greater than ~4V. This would generally be the
criteria for other buck-boost chargers which have an "ACOK" signal.
BUG=b:187965740
BRANCH=dedede
TEST=With other changes, build and flash drawcia, verify that "AC on"
prints are only printed when we decide to charge from a port and not
just when VBUS is present
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: If3a5398197fb0a251b5290d107daf88e56ca12b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901253
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This commit adds a function to return the status of the ACOK pin in FW.
BUG=b:187965740
BRANCH=dedede
TEST=Build and flash madoo, verify that "AC on" is on printed when we
actually decide to charge from a port and not just when VBUS is present.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Iacff19542587d102798c645d66a0ea15aaa51439
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901252
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Add Smart Battery emulator which is emulated device on i2c bus. Emulated
battery properties are defined through device tree, but they can be
changed in runtime through Smart Battery emulator API. It allows to set
custom handlers for write and read messages to emulate more complex
scenarios or malfunctioning device.
BUG=b:184855975
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ia94a0a122123e3259882dfdc80d067c61c98379b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903206
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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Add ICM-42607 accel/gyro driver code.
BUG=chromium:1198171
BRANCH=None
TEST=ectool motionsense && CROS-EC IIO drivers
Signed-off-by: JuHyun Kim <jkim@invensense.com>
Change-Id: If2cff2bd20ac69ca40bc56af50dcabbd4f5910d6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822268
Reviewed-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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Enable adc function so that We can quickly get the bus voltage.
and move clear ADC bit after charger_get_vbus_voltage to reduce
power consumption
BUG=b:178981107,b:178728138
BRANCH=dedede
TEST=storo can keep asgate not drop with ac only
TEST=sasukette can keep asgate not drop with AC only
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: I39db6f80a5439dbd890c788981796165abb49415
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2890492
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Current driver code sets 0xF8 bit [1:0] to 0b00 when USB_PD_MUX_NONE.
However, according to the programming guide (b/181282482#comment3).
0b00 means "power-off", not "disable both paths".
This is not what we want because power-off mode blocks all subsequent
i2c transactions.
Since this mux does not have a "none" state, this CL maps
USB_PD_MUX_NONE to USB enabled instead.
BUG=b:181282482
TEST=Boot Cherry, verify that error messages like
"mux config:0, port:1, rv:1" disappeared
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I2c87c839242fa61e4ba0e1dfca54ebe5bb3beb37
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2870537
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Modify HS detector threshold setting (0x3C) to 0x60 for USB-C C1 port
signal quality.
BUG=b:177980418
BRANCH=asurada
TEST=manual
Run command "ectool i2cread 8 4 0x20 0x3c" to check register value.
Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: I97b6bb16e7c5298ff42e35d936e0f9e60ec3b730
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845564
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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BUG=b:157576189
BRANCH=none
TEST=make buildall -j,
Using dragonclaw v0.2 and servo_micro:
./test/run_device_test.py -t fpsensor_hw
--flasher=servo_micro,
Using icetower and servo_micro:
./test/run_device_test.py -t fpsensor_wh
--flasher=servo_micro --board dartmonkey;
note: the testrunner hung after printing Test
"fpsensor_hw": PASSED, but this hang seems
unrelated
Cq-Depend: chromium:2872432
Change-Id: I2a3b31776cd40d7f0b422f4845869953b8f07249
Signed-off-by: Kevin Shelton <kmshelton@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314101
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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When a port is sourcing (ex. to a dongle), running sink disable on the
port will currently return failure because the 5VSRC bit is set.
However, sinking has been successfully disabled. Reflect this in the
error return by only checking the specific sinking bit in the status
register.
BRANCH=None
BUG=b:187220141
TEST=on guybrush, plug and unplug AC on C0 with a dongle on C1. Verify
no failures to disable sinking are present.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I529d33b41dc4bc55f7c647742c70832a125fd367
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2877866
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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Current software sets some registers only during initial
powering of LN9310 (when battery is plugged in). If LN9310
was reset for any reason and then a system power on was
attempted (power button press), then LN9310 would attempt a
startup without the workaround (bad idea). This change adds a
check before every LN9310 enable/disable event and
re-initializes LN9310 if a reset has occurred .
BRANCH=Trogdor
BUG=b:185308433
TEST=Should not break the current boot flow, i.e. power-up and
power-down (using long-press of the power button) should function
Change-Id: I98c08f50bfd48e09776033eac64658f6e27fb58f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2876869
Reviewed-by: John Crossley <crossley@lionsemi.corp-partner.google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: John Crossley <crossley@lionsemi.corp-partner.google.com>
Tested-by: John Crossley <crossley@lionsemi.corp-partner.google.com>
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This improved workaround (compared to the previous 2520279) moves
the CFLY precharge step out of the ln9310's internal startup
sequence and implements it using I2C commands sent by the EC just before
the I2C command that triggers the ln9310 startup. The workaround
additionally modifies the ln9310's internal startup sequence to use
the precharged CFLY capacitors as decoupling of an internal node
during the startup sequence which should help prevent an OV glitch
from appearing on the LN9310 output even if the internal level
shifter on SW1 glitches and pulls up on the C1PA/B nodes.
BRANCH=Trogdor
BUG=b:185308433
TEST=Should not break the current boot flow, i.e. power-up and
power-down (using long-press of the power button) should function
similar to before this change. Testing the efficacy at preventing
the SCOUT overvoltage glitch must be done with LN9310 parts screened
out at wafer test that have a higher likelihood of exhibiting the
glitch at the SCOUT output. With these parts, startup should be
observed with a scope probe monitoring LN9310 SCOUT for overvoltagee.
Change-Id: I216991f950196225cabbbfdaa2333f1650f7f4fa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2837531
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Tested-by: John Crossley <crossley@lionsemi.corp-partner.google.com>
Commit-Queue: John Crossley <crossley@lionsemi.corp-partner.google.com>
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Cypress CCGXXF PD has built-in I/O Expander, added driver to enable
GPIO functionality.
BUG=none
BRANCH=none
TEST=Tested on ADLRVP, ioexget & ioexset works as expected
Change-Id: I8503178703ad166ac77e96d1990133c88169d23a
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853143
Tested-by: Svyatoslav Paliy <svpaliy@gmail.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Unknown ic_type is not a fatal error, it only affects fw update, but not
other usual touchpad functions. We can ignore this error to keep
touchpad working.
BUG=none
TEST=EC able to ignore the unknown ic type error
[1.299220 elan_tp_init: ic_type:1500.]
[1.299820 elan_tp_init: iap_version:0204.]
[1.299976 unknown ic_type: 21]
[1.302292 max=3282/1793 width=82/76 adj=0 dpi=800/800]
[1.302570 *** TP mismatch!]
[1.303245 elan_tp_init:0]
BRANCH=trogdor
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ic0471989bb669482deee973c0e4495a65f6928f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2874947
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Sync the elan_get_fwinfo function from kernel v5.12 to ec codebase.
BUG=b:183899273
TEST=no "unknown ic_type: 21" in ec console
BRANCH=trogdor
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I0499d2666151448a504d1759d1ee6c3f5376a97a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2874946
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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While switching from DP to Thunderbolt mode, EC sends a mux disconnect
followed by a USB mux connect. Since these events are one behind the
other, AP might miss the disconnect mux event. Hence, this CL waits for
an ACK from AP, to synchronize the disconnect mux event between AP and
EC.
BUG=b:186609339
BRANCH=None
TEST=1.Both the monitors behind the Tortilla based dock enumerate after
coldboot.
2.Checked Disconnect-Connect with TBT/USB4 device in S0ix, they
enumerate fine on full resume.
3.Checked coldboot with non-Tortilla based dock based dock. it
enumerates fine.
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Ib32c3426c2b52b1af582729453d748902447900c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2857374
Reviewed-by: Keith Short <keithshort@chromium.org>
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This adds a null pointer check to prevent undefined behavior. Also, add
check for board_get_ps8xxx_product_id() returning an error.
BRANCH=none
BUG=b:186189039
TEST=buildall passes
Change-Id: I40f5836528e9beaabac27d39ef6dd25013b9302c
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2857795
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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Add basic support for ANX3443. Datasheets available in bug.
BUG=b:181282482
BRANCH=None
TEST=Build
Signed-off-by: Parker Lin <parkerlin@google.com>
Change-Id: Id779547704408b9563f803885cd755ae96d38ef7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728001
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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In order to boot without a battery, we need to send the SinkVBUS
command to the TCPC as soon as possible once we are aware.
Previously, we were checking the TCPC registers, however since this is
being done in the TCPC init, the TCPC registers weren't initialised
yet so we couldn't really use this field. However, this part is a
combined TCPC and charger IC, therefore we can use the charger IC-side
APIs to check if VBUS is present.
This commit simply checks the VBUS ADC register over consulting the
POWER_STATUS TCPC register.
BUG=b:178728138,b:178981107
BRANCH=dedede
TEST=Build and flash madoo, unplug battery, verify DUT can boot up
from either Type-C port with a 45W PD charger.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I4801fcd2655a65e74dc8feddc06e369635a2ce34
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848245
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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When the device recover from the battery cutoff,
the battery is not ready to output the power to the
system. If we toggle the DCM mode at that time, the
system power will be cutoff. To avoid this problem,
we check the battery battery_get_disconnect_state()
before setting the DCM.
BUG=b:186188004
BRANCH=firmware-volteer-13672.B
TEST=1. charge the battery to near full
2. battery cutoff
3. plug in AC
Change-Id: Ic2d959c89a9e37479b919133e10a69be8148a26e
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853885
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Leaving DVC enabled on the primary charger in hibernate will increase
the power consumption of the system. When we enter hibernate, DVC
isn't needed so we can safely disable it.
BUG=b:184219851
BRANCH=dedede
TEST=Build and flash madoo, verify that DUT is able to hibernate and
can charge from sub board when woken up.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I027cceac0cb7eff9ac08293449a06712e9d1daaf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848292
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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AUX flip control must be enabled. Otherwise alternate mode will not work
on ANX7451 when cable is flipped. The USB registers use a separate i2c
address that must be dynamically configured. Since there may be multiple
ANX74** parts on a board, this address must be dynamically configured
using a board callback.
BUG=b:185276137
TEST=Display works when cable is flipped on B2
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I144131b2f53985d97e0be960e202366f726dd90b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2854120
Reviewed-by: Diana Z <dzigterman@chromium.org>
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In Sasukette's design, there is a protection IC between USB
connector and TCPC. When EC is hibernate, the CC lines will
be disconnected, which cause the result that TCPC can't
detect AC power and Chromebook won't wake the system.
Enalbing ADC for all modes by setting 0x4C bit 0 to 1 can
prevent issue mention above.
BUG=b:186335659
BRANCH=dedede
TEST=flash sasukette and test typeC adapter can wake system from
hibernate mode.
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: I04e80815ebfb5aa4022835a5fd8a59de1305e3ba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853087
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This may be a PS8XXX firmware issue, Parade is still trying.
BUG=b:185202064
TEST=emerge-strongbad chromeos-ec
0. Insert the Dock to the typeC ports and shutdown the devices;
2. Press powerbutton and poweron the unit;
3. Use lsusb command, list can not find the Dock information;
4. Can find the Dock.
BRANCH=Trogdor
Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Change-Id: Ib667df88549fc9e4f0e4603574af5d70ef326e11
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847867
Reviewed-by: Rock Chiu <rock.chiu@paradetech.corp-partner.google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Modify start sinking VBUS condition. in the first initial state, the
power status is in the uninit state.
BUG=b:178728138
BRANCH=dedede
TEST=build and flash sasukette, remove battery, plug in 45W charger,
verify that DUT can boot up.
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: Id7223474046528ebece0e1267ec56d1c4d148f41
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847866
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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For the accel_kionix.c module to work, either the KXCJ9 or KX022 configs
must be defined.
BRANCH=none
BUG=none
TEST=make buildall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: Ib015f16d335dcee37f00faee6bcaccb8bf2f3ef6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848431
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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The common logic doesn't work if neither the BMI160/BMI260 configs are
defined. Add a check for this so the build would fail.
BRANCH=none
BUG=b:185966444
TEST=make buildall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I3288c5481eba25c8c1858122c83018073e0eaab8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848429
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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In Zephyr builds we don't add the root platform/ec in the include path
so we'll need to remove the "driver/" prefix
BRANCH=none
BUG=b:185966444
TEST=make buildall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: Ib757d4c7459e6f99178e03f1ef7fa1fc5e413c34
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2844790
Reviewed-by: Keith Short <keithshort@chromium.org>
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Added code so that PCA9675 I/O expander driver fits standard
I/O expander functionality.
BUG=b:169814014
BRANCH=none
TEST=Manually tested on ADLRVP, ioexget & ioexset works
Cq-Depend: chromium:2845014
Change-Id: I07957a3f1de9b70fc396d767e8cc3ac8884b9c2e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2829985
Reviewed-by: caveh jalali <caveh@chromium.org>
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This replaces the IIN_DPM_REG_TO_CURRENT and IIN_HOST_CURRENT_TO_REG
macros with equivalent functions to make the implementation more robust.
BRANCH=none
BUG=b:185190976
TEST=buildall passes
Change-Id: I9fac69d38efd197a916bc18d12869b04a89adb5a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2842705
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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This cleans up the use of CURRENT_SHIFT and CURRENT_STEP_MA in related
macros. Also, in one case INPUT_RESISTOR_RATIO was not applied to
IIN_DPM - luckily, this ratio is 1 for all affected boards, so fixing
this has not functional impact.
BRANCH=none
BUG=b:185190976
TEST=ran util/compare_build.sh on affected boards
Change-Id: Ib3e8321d3d7ed69d33d7266077a67c5d2893182a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785269
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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The driver was only handling chipset_resume. chipset_reset also needs to
be handled. Otherwise mux won't be set on an apreset.
BUG=None
TEST=C1 display works after apreset
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I0ec336a733e51d44be7ea95f8fcfeb8a606d50a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845269
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add anx7451_power_off and anx7451_wake_up routines. ANX7451 is powered
off whenever both USB and DP are disabled. ANX7451 is woken up via i2c
before mux set or get.
BUG=b:184907521
TEST=Mux is powering off when nothing is connected.
Mux is waking up when cable is connected.
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: Idf1343735cb94eb8bbaebe93794195d2f115b086
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2840056
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add the interrupt handler using the same model used in the bmi260.
BRANCH=none
BUG=b:185966444
TEST=zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I7aa3bcade8c3bc0fe526d44f8223bab8760cf279
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2842714
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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GL3590 (USB3 hub) chip may drive I2C_SDA and I2C_SCL lines after being
released from reset. Max time for such "activities" is 200ms. In order
to ensure correct operations on the i2c bus, we need to delay all i2c
transactions in the system by such value.
Implementation is using hook with higher priority than I2C_INIT. This
guarantees that:
* SoC won't start i2c transactions before 200ms mark after GL3590's
RESETJ# pin deassertion;
* Original order of loading all generic modules (e.g. ioex_init,
board_init) won't need to be changed;
* Workaround applied only in platform-specific code.
BUG=b:181930164
BRANCH=main
TEST=build and flash new servo_v4p1 firmware
Plug in CHG and DUT cables. _Then_ plug in HOST cable and verify that
green diode is lit on servo_v4p1 board indicating proper pass-through
charging.
Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I32971d421eb541c788a87701ce5e8c62a8b35777
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2829770
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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