| Commit message (Collapse) | Author | Age | Files | Lines |
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Add Smart Battery emulator which is emulated device on i2c bus. Emulated
battery properties are defined through device tree, but they can be
changed in runtime through Smart Battery emulator API. It allows to set
custom handlers for write and read messages to emulate more complex
scenarios or malfunctioning device.
BUG=b:184855975
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ia94a0a122123e3259882dfdc80d067c61c98379b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2903206
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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* Fix the typo: should be SB_MANUFACTURE_DATE (manufacture without r)
* Fix the register, i.e. SB_MANUFACTURE_DATE, not SB_SPECIFICATION_INFO
* Fix the format parsing. The LSB of year is bit-9, not bit-8.
BRANCH=None
BUG=b:160784792
TEST=With the later CL, checked the manufacture date.
Change-Id: I5b5f2bfefec4bbe700bb1ec0d9d6048123f4ad16
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300688
Reviewed-by: Douglas Anderson <dianders@chromium.org>
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This is a reland of daccb3adea9394116d7ab2c807e4a360cb5a93a1
Original change's description:
> smart_battery: add smbus error checking support
>
> Jacuzzi/Kodama has a unstable software controlled i2c bus, its data
> transmission may be interrupted by other higher priority tasks and
> causes device timeout.
>
> If timeout happens when ec is reading data, it has no knowledge about
> what's happening on slave, and keep receiving bad data (0xFF's) until
> end. The standard i2c/smbus error handling mechanism can not handle this
> case, so we need the error checking feature from smbus 1.1 to ensure our
> received data is correct.
>
> This CL adds the error checking (PEC) functions to i2c and smart battery
> module.
>
> BUG=b:138415463
> TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST,
> no failure after 100k read/writes.
> test code at CL:1865054
> BRANCH=master
>
> Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3
> Signed-off-by: Ting Shen <phoenixshen@google.com>
> Reviewed-on: http://crrev.com/c/1827138
> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
> Tested-by: Ting Shen <phoenixshen@chromium.org>
> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
BUG=b:138415463
TEST=in addition to the TESTs above, verified this CL boots on
hatch(npcx chips), and reef_it8320(it83xx chips).
BRANCH=master
Change-Id: I67975eee677cfd6e383742d48103662372cac061
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913940
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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This reverts commit daccb3adea9394116d7ab2c807e4a360cb5a93a1.
Reason for revert: <INSERT REASONING HERE>
broke USB-C charging. all we get now is:
2019-10-30 01:26:15 New chg p0[49.441303 CL: p0 s2 i500 v5000]
2019-10-30 01:26:16 C0 st5
2019-10-30 01:26:16 C0 Req [1] 5000mV 3000mA
2019-10-30 01:26:16 New chg p0[50.305144 CL: p0 s0 i500 v5000]
2019-10-30 01:26:16 C0 HARD RST RX
2019-10-30 01:26:16 C0 st4
2019-10-30 01:26:16 New chg p0[50.354280 CL: p0 s2 i500 v5000]
2019-10-30 01:26:17 C0 st5
2019-10-30 01:26:17 C0 Req [1] 5000mV 3000mA
...
Original change's description:
> smart_battery: add smbus error checking support
>
> Jacuzzi/Kodama has a unstable software controlled i2c bus, its data
> transmission may be interrupted by other higher priority tasks and
> causes device timeout.
>
> If timeout happens when ec is reading data, it has no knowledge about
> what's happening on slave, and keep receiving bad data (0xFF's) until
> end. The standard i2c/smbus error handling mechanism can not handle this
> case, so we need the error checking feature from smbus 1.1 to ensure our
> received data is correct.
>
> This CL adds the error checking (PEC) functions to i2c and smart battery
> module.
>
> BUG=b:138415463
> TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST,
> no failure after 100k read/writes.
> test code at CL:1865054
> BRANCH=master
>
> Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3
> Signed-off-by: Ting Shen <phoenixshen@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827138
> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
> Tested-by: Ting Shen <phoenixshen@chromium.org>
> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Bug: b:138415463
Change-Id: Ibd8a512dd6d43cca95628f698e7a66a695b7fc59
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889435
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
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Jacuzzi/Kodama has a unstable software controlled i2c bus, its data
transmission may be interrupted by other higher priority tasks and
causes device timeout.
If timeout happens when ec is reading data, it has no knowledge about
what's happening on slave, and keep receiving bad data (0xFF's) until
end. The standard i2c/smbus error handling mechanism can not handle this
case, so we need the error checking feature from smbus 1.1 to ensure our
received data is correct.
This CL adds the error checking (PEC) functions to i2c and smart battery
module.
BUG=b:138415463
TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST,
no failure after 100k read/writes.
test code at CL:1865054
BRANCH=master
Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827138
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Ran the following command:
git grep -l 'Copyright (c)' | \
xargs sed -i 's/Copyright (c)/Copyright/g'
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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As requested for integration in kernel mfd subsystem, use BIT(...)
instead of (1 << ... ).
Add the macros, apply just to ec_commands.h for now.
BUG=None
BRANCH=None
TEST=Compile
Change-Id: I8509f1e8dc966799c3c4f0269b15f1ccc4138c07
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518658
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Implements battery-cutoff SMBus write block function
BUG=b:122944526
BRANCH=None
TEST=Verify battery cuff on fleex via SMBus block write.
Change-Id: Ib52146cd3042c4a6d2dbafadd430591936230891
Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1470462
Commit-Ready: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org>
Tested-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
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BRANCH=reef
BUG=chrome-os-partner:61849
TEST=1. DC mode, enter battery cutoff.
2. After system shutdown, wait 10sec.
3. Plug in AC to check system power on.
Change-Id: I5f4cf023fa70cff42c2d1cc888b1d2ee39226af4
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/427441
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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BUG=chrome-os-partner:61173
BRANCH=none
TEST=Manually tested on Reef. Battery info works.
Change-Id: I6e867eee38885186f8e63a934f52e826f0cf72fd
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/422998
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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No functional changes.
BUG=none
BRANCH=none
TEST=make buildall passes
Change-Id: Ie852feb8e3951975d99dce5a49c17f5f0e8bc791
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403417
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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Smart battery code has I2C read/write code for smart chargers
which is an unreachable code for few boards hence removed it.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I79933f61893c66447c686a81073c92f6a16e2d48
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/396279
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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The Samus battery can be placed into a disconnect state by asserting a
disconnect input signal. In this state, the battery will not function
until a charging current is applied. This patch adds detection of the
disconnect state. If a battery in disconnect state is found, a current
is force-applied to the battery to kick it out of disconnect.
BRANCH=None
TEST=Manual on Samus.
1. Put battery into disconnect state
2. Pull AC, then reattach AC
3. Verify "found battery in disconnect state" is seen on the
EC console.
4. Pull AC and verify that EC console is still accessable
Also verify that battery gets out of reset state:
1. Pull AC
2. Issue "i2cxfer w16 0 0x16 0x0 0x12" command on EC console
3. Re-attach AC
4. Pull AC and verify that EC console is still accessable
BUG=chrome-os-partner:29465
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ib4268887fb483094ac4e641749200268160d3014
Reviewed-on: https://chromium-review.googlesource.com/209013
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
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The smart battery status register holds some useful info. This displays it
along with all the other stuff.
This decodes the alarm and status bits, but not the error code, since that
field is only valid immediately after a failed i2c transaction (that's how
the battery indicates error). Since we do all sorts of automatic battery
probing in other threads, that value will never be reliable when we run the
"battery" console command.
BUG=none
BRANCH=none
TEST=manual
Run "battery". You should see a new line amongst the output:
Status: 0x00c0 DCHG INIT
Change-Id: I5e684198af2cf7767f89786c91a7d946ad95d4c2
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175659
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battery.h is the high-level interface. battery_smart.h is the
low-level interface. Most things don't need the low-level interface,
but were including smart_battery.h solely to get at battery.h. Fixed
this. Also merged battery_pack.h into battery.h, since it was odd to
split that data across multiple header files. Tidied the function
comments in battery.h as well.
No functional changes, just renaming files and adding comments.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I5ef372f0a5f8f5f36e09a3a1ce24008685c1fd0d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171967
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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