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* Samus: Support capsense input as keyboard events.Bill Richardson2014-02-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | This is experimental for now; the capsense chip simply reports its buttons as the number keys on the keyboard (1-8). BUG=chrome-os-partner:23382 BRANCH=samus,ToT TEST=manual To test, you'll need a reworked and correctly programmed capsense module. Boot the system, and switch to VT2. Touch the capsense bar and you'll see the input appear on the console as though you were typing numbers. Note that the capsense hardware is still buggy. Refer to the bug for workarounds. Change-Id: I4c3a8b70b8197ffd538c38c59c9336383365afa7 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/185434 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Dave Parker <dparker@chromium.org>
* Add support for extra buttons not on the keyboardChromeOS Developer2014-02-071-0/+8
| | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:24370 BRANCH=tot TEST=Run button unit test. Orig-Change-Id: I61b4a6624d62831ce0bfdf7a0f36a45349b37f96 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/184544 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit f6426cc21c20a4f876cff28b9ce7e3115f0b054a) Change-Id: I4face9bf0797a91ec8bef390093aab8e3d8f97ab Reviewed-on: https://chromium-review.googlesource.com/185243 Tested-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Randall Spangler <rspangler@chromium.org>
* Add configs for battery detect via gpio or custom functionChromeOS Developer2014-02-061-3/+15
| | | | | | | | | | | | BUG=chrome-os-partner:24649 BRANCH=baytrail TEST=Boot target device w/o battery. There should be no 30 second delay prior to boot. Change-Id: If7a60919701d1c241670d0b32e04f3e188a643f1 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182921 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Config option for using power button with lid closedstabilize-5414.Bstabilize-5412.BChromeOS Developer2014-02-011-0/+3
| | | | | | | | | | | | | | | BUG=chrome-os-partner:24912 BRANCH=baytrail TEST=Manual. Enable CONFIG_POWER_BUTTON_IGNORE_LID on a device, boot it, and go into dock mode with external monitor attached. Fake-close the lid with a magnet or servo. Verify the power button still sends press/release events to the host with evtest. Change-Id: Idb05375eee0743a8a2c459070854c03fe3afe894 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/184493 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* rambi: Enable low-power idleRandall Spangler2014-01-291-0/+6
| | | | | | | | | | | | | | | | | This should reduce EC power consumption in S3 and S5. BUG=chrome-os-partner:25377 BRANCH=baytrail TEST=make sure jtag is not active (not running openocd via servo) boot system; suspend system wait 60 seconds; should see "Disabling console in deep sleep" type on console; should still allow typing wait 60 seconds; press spacebar; should still resume from suspend Change-Id: I47e33e158c1b90077f944a6af4374f39efa68d94 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/184165 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* rambi: Leave 5V rail on in S3 if USB ports are poweredRandall Spangler2014-01-231-0/+6
| | | | | | | | | | | | | | | | | Previously, the 5V rail was disabled unconditionally in the S0->S3 transition. Now, the rail is left powered if one or both of the USB ports are powered. BUG=chrome-os-partner:25178 BRANCH=rambi TEST=Modify the OS to leave USB ports powered in S3. Then suspend. On the EC console, 'gpioget pp5000_en' should be 1. Change-Id: I3c73f3fe228e940317c0da7330f117c7ab0a6d0c Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/183548 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* x86 & tegra: add CONFIG_POWER_COMMON.Yung-Chieh Lo2014-01-211-6/+6
| | | | | | | | | | | | | | For the better naming for power/common.h, we rename CONFIG_CHIPSET_X86 to CONFIG_POWER_COMMON (no one is actually using it). But keep CONFIG_CHIPSER_TEGRA for power/build.mk. BUG=chrome-os-partner:25068 BRANCH=nyan,falco,link,peppy,rambi,samus,squawks TEST=build only Change-Id: Ibf1a4c24088dfddac39b38a95b3b887c195152d5 Signed-off-by: Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182732
* baytrail: Add config option to enable WiFi in suspendstabilize-5254.BDuncan Laurie2014-01-171-0/+5
| | | | | | | | | | | | | | | | | | | Some WiFi devices do not tolerate losing power in suspend and will not function properly after resume if they have lost power. Enable this on the Rambi device. BUG=chrome-os-partner:24114 BRANCH=baytrail TEST=complete mutiple successful suspend/resume cycles on rambi and ensure that wifi continues to function and not cause a crash. Change-Id: Id421f3138e429b247bfb3f5ffb92a06c0353bb97 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/183047 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Convert vboot hash calculation from task to deferred functionRandall Spangler2014-01-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vboot hash calculation takes ~350 ms during EC boot. Since the hash task is higher priority than the hook task, this starves all the hooks during boot. We could, in theory, fix that simply by swapping the priority of the hook and hash tasks. But then watchdog detection (in the hook task) wouldn't detect hangs in the hash task. A better fix (implemented here) is to convert the hashing operation to a series of deferred function calls. This gets rid of the hash task entirely, and allows all pending hooks and other deferred function calls to take place between each chunk of hashing. On STM32-based boards, we need to bump up the hook task stack size, since hashing is called from several layers deep in the hook task instead of at the top of its own task, but this is still a net win of several hundred bytes of SRAM. BUG=chrome-os-partner:24892 BRANCH=rambi TEST=Boot EC; look for "hash start" and "hash done" debug output. 'taskinfo' shows at least 32 bytes of unused stack for HOOKS task. 'hash ro' runs properly from EC console. Change-Id: I9e580dc10fc0bc8e44896d84451218ef67578bbe Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181954
* rambi: Add config option for simplified USB power controlRandall Spangler2014-01-071-0/+6
| | | | | | | | | | | | | | It will be used by all variants of Rambi, so #ifdef BOARD_RAMBI is too restrictive. BUG=chrome-os-partner:24864 BRANCH=rambi TEST=boot rambi 1.5 board; plug in USB mouse Change-Id: I0ff02077388a6c6621c5746a693dde894cf8ad77 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181682 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Add AP hang detectionRandall Spangler2013-12-171-0/+3
| | | | | | | | | | | BUG=chrome-os-partner:24558 BRANCH=none TEST=see procedure in bug Change-Id: I42614a1da5f24c93b6267d81339ff9d721bf0d8f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180080 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Change PECI_TJMAX to a board config optionChromeOS Developer2013-12-131-0/+9
| | | | | | | | | | | | | BUG=chrome-os-partner:24455 BRANCH=none TEST=Manual: Verify that CONIFG_PECI_TJMAX set per-board matches the value queried over the PECI bus with the restricted "peciprobe" command. Change-Id: I8e99a23a66f26d6101e01cc751d0a8ca79686321 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179682 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Basic driver for tmp432 temperature sensorChromeOS Developer2013-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | This allows local and remote temp values to be added to a board's list of temp sensors. It also adds a 'tmp432' EC console command to query temps and set alert thresholds. Fractional degrees are not supported. DPTF support is not addressed. BUG=chrome-os-partner:23985 BRANCH=none TEST=Add tmp432 support to a board with the sensor then run the 'tmp432' and 'temps' EC console commands. Signed-off-by: Dave Parker <dparker@chromium.org> Change-Id: Ifee47cf4d4cf5eedef9ef2bfa2149f183f1d7a7b Reviewed-on: https://chromium-review.googlesource.com/178688 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org> Tested-by: Dave Parker <dparker@chromium.org>
* extract common core codeVincent Palatin2013-12-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | Move the non-core dependent code out of core/$(CORE) directory to common/ directory. Put all panic printing code in common/panic_output.c Put timer management code in common/timer.c Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:23574 TEST=./util/make_all.sh use "crash divzero" and "panicinfo" on Link. Change-Id: Ia4e1ebc74cd53da55fe24f69e96f39f512b9336d Reviewed-on: https://chromium-review.googlesource.com/178871 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Jeremy Thorpe <jeremyt@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* Remove bolt, daisy, kirby, puppy, slippy boardsRandall Spangler2013-11-211-4/+1
| | | | | | | | | | | | | | | | | | These boards are unloved and unsupported. They'll never grow up to be laptops, and hardware is increasingly hard to come by. Comparable functionality is available in the other, more-loved boards. Removing these boards speeds up util/make_all.sh by 40%. (If you're not running that before every upload, you should be...) BUG=chrome-os-partner:24062 BRANCH=none TEST=build all remaining platforms and pass unit tests Change-Id: I4d8a49e4d52d7393471f1b1cbef059c8db4a4f77 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/177373
* lm4: add option for using gpio as kebyoard interruptAaron Durbin2013-11-211-0/+3
| | | | | | | | | | | | | | | | | | | | On certain boards it's no feasible to use the SERIRQ method for generating the kebyboard interrupt. To that end provide CONFIG_KEYBOARD_IRQ_GPIO option which specifies the negative edge-triggered gpio for the keyaboard interrupt. BUG=chrome-os-partner:23965 BRANCH=None TEST=Built and booted rambi using this option. Keyboard works in kernel with interrupts for i8042 device. Change-Id: I64f7e9530841c184d2a33821126ec446c96bb0f0 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/177188 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: Bernie Thompson <bhthompson@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* lm4: allow the lpc module to use GPIO for SCIAaron Durbin2013-11-151-0/+3
| | | | | | | | | | | | | | | | | | The LPC module has a dedicated control for SCI#. However, certain situations require a dedicated GPIO for asserting the SCI# signal. Introduce CONFIG_SCI_GPIO to meet this requirement. BUG=chrome-os-partner:24003 BRANCH=None TEST=Built and booted rambi with dependency change. 'lidclose' and 'lidopen' cause ACPI interrupts. Change-Id: I34c5f0ba5ff60151972921f251c71d3769a9ef8b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176804 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add ALS driver for light sensors connected to ECBill Richardson2013-11-071-0/+7
| | | | | | | | | | | | | | | | | This adds the driver and a console command to read an Intersil ISL29305 light sensor connected to the EC. BUG=chrome-os-partner:23380 BRANCH=samus TEST=manual Run the "als" command from the EC console, while pointing the sensor in various directions. It should give higher numbers when facing a light source. If you get "Error 1", it means the ALS isn't powered. Change-Id: I855ed64dab7fc60e29126ab3e97669be24dc6a64 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176056
* Enable stack overflow checking on all context switchesRandall Spangler2013-11-071-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | Changes somewhere in the recent past have caused I2C operations to consume more stack space. The current failure mode is that after some debug command or infrequent battery operation, the system fails. Clean up and enable stack overflow detection by default, and add a debug command (disabled by default) to verify overflow detection works. This adds several instructions to each context switch, but it's still fairly inexpensive, and represents only a few percent increase in the size of svc_handler(). That's better than silent failures. BUG=chrome-os-partner:23938 BRANCH=none TEST=Enable CONFIG_CMD_STACKOVERFLOW, then run the 'stackoverflow' command. This should cause a stack overflow to be detected in the CONSOLE task. Change-Id: I9303aee5bd9318f1d92838b399d15fb8f6a2bbf9 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176113 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* lm4: Fixed low power idle doesn't always wake up.stabilize-4920.6.Brelease-R32-4920.BAlec Berg2013-11-051-0/+6
| | | | | | | | | | | | | | | | | | | | | Temporary fix to the bug in which we miss wake events when in deep sleep with the LFIOSC (32kHz) clock and the EC is cold. This fix involves simply using a faster clock, 250kHz, when in low speed deep sleep. This fix consumes more power but solves the bug. Renamed EC console command dsleepmask to dsleep. BRANCH=none BUG=chrome-os-partner:23678 TEST=Go in to low speed deep sleep by going into either S3 or G3 and letting the EC console timeout. Then freeze-spray the EC chip. Wake up the EC via the console and make sure that the idlestats show that we have not missed a deadline. Change-Id: I4f9844f1937bc8c95cf1540502f7d8fb4cbc097e Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175614 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Pad jump tags to 4 bytes inside the system moduleRandall Spangler2013-11-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | That way all the users of jump tags don't need to know about the padding requirements. BUG=chrome-os-partner:23851 BRANCH=none TEST=enable CONFIG_CMD_JUMPTAGS, then 'jumptags'. Output should be something like this: 20007fbc: 0x5550 UP.1 2 20007fc4: 0x4b42 KB.2 3 20007fcc: 0x4c50 LP.1 12 20007fdc: 0x4d54 MT.1 8 All the addresses in the first column should be word-aligned. The sizes in the last column don't need to be a multiple of 4. Change-Id: I91f9c29701a007ef8a56b5b7e0ea09930dfbea31 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175591 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: Improve / remove more TODO commentsRandall Spangler2013-11-011-3/+3
| | | | | | | | | | | | | Add bug references. Remove one assert that can no longer be triggered. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all boards; pass unit tests Change-Id: I3f4d2e4f2f3343a8d0531cb0715d151eaa4d0b50 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175293 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: TODO comments in extpower_springRandall Spangler2013-10-311-0/+2
| | | | | | | | | | | | | | | No code changes, just comment fixes. Added config #ifdefs for the debug commands as requested; they're enabled for Spring, so functionality is unchanged. BUG=chrome-os-partner:18343 BRANCH=none TEST=build spring; see that ilim and batdebug commands still exist Change-Id: I7c9f12281afa7ec68aa7e62dcfcd51682d88a16a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175216 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: mkbp keyboard moduleRandall Spangler2013-10-301-0/+5
| | | | | | | | | | | | | | | | | | | Rather than compile it by default for host-based tests, only compile it for the few tests that actually use it. Since those (and all boards) now only use if if they also have a keyscan task, we can get rid of the #ifdefs in keyboard_mkbp.c as well. And remove a TODO we'll never do... BUG=chrome-os-partner:18343 BRANCH=none TEST=build all boards; pass unit tests. These pass: util/make_all.sh make BOARD=pit tests Change-Id: I44d1806cfb375027a7ed0b33a5e9bdbbed8ccddc Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174513
* Separate fan_t from pwm_tBill Richardson2013-10-301-20/+2
| | | | | | | | | | | | | | | | There is a logical difference between PWM controls for things like backlights and fan controls for actual fans. This change separates them into two different data structures, for better abstraction. BUG=chrome-os-partner:23530 BRANCH=none TEST=manual make runtests, make all boards, test on Link and Falco. Change-Id: Ib63f2d1518fcc2ee367f81bf5d803360c1aa5c76 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175151
* Rename CONFIG_FAN to CONFIG_FANSBill Richardson2013-10-301-2/+2
| | | | | | | | | | | | | | | | | | Instead of just configuring fan support as yes/no, we'll use it to specify the number of fans on the board. Undefined (not zero!) means no fan support at all. Syntax change only. No new functionality. BUG=chrome-os-partner:23530 BRANCH=none TEST=manual make runtests, build all platforms, build and test on Link. Change-Id: Iff65efa69e05f3e1a54fdc2a8da9001b4e8487ca Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175150
* Separate common fan behavior from implementationBill Richardson2013-10-301-1/+1
| | | | | | | | | | | | | | | | | | This looks like a lot, but it's really just moving the non-board-specific stuff from chip/lm4/fan.c into common/fan.c, updating the appropriate headers, and renaming functions to better match the new location. This is entirely code refactoring and renaming. No new functionality. BUG=chrome-os-partner:23530 BRANCH=none TEST=manual make runtests, build all platforms, build and test on Link. Change-Id: I7dc03d6732bad83cf838a86600b42a7cff5aa7aa Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175012
* cleanup: Comments about PMU powerinfo moduleRandall Spangler2013-10-221-1/+5
| | | | | | | | | | | | | | | Document some Pit-platform-specific assumptions. No code changes. BUG=none BRANCH=none TEST=build pit Change-Id: I601ca4a57645ba45e7db01e271556a30d334f9cd Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174056 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* ec: add nyan boardYen Lin2013-10-171-0/+2
| | | | | | | | | | | | | | | | | | | This is to add nyan board support: - new files in board/nyan folder, including battery.c - new common/chipset_tegra.c, which is mostly based on chipset_gaia.c - new include/tegra_power.h - modified build.mk and flash_ec for nyan BUG=none BRANCH=nyan TEST=tested on Venice 2 board Change-Id: I36895f34f2f4d144a9440aff358c8274797ebbd6 Signed-off-by: Yen Lin <yelin@nvidia.com> Reviewed-on: https://chromium-review.googlesource.com/168078 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Config definesRandall Spangler2013-10-161-48/+56
| | | | | | | | | | | | | | | | Add some missing descriptions in config.h and rename a few defines to be more consistent. No functional changes, just comments and symbol renaming. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms; pass unit tests Change-Id: I05a9a2ed6fd7bc8b14a18a0dc57d7d22430de21a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173111 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Do not compile Baytrail chipset code if chipset task is absentVic Yang2013-10-151-0/+1
| | | | | | | | | | | | | | | Like other chipset code files, we shouldn't compile Baytrail chipset code if chipset task is absent. BUG=None TEST=basic tests now compile on Rambi without error BRANCH=None Change-Id: I231de06310b2e0d7ff7b3e1e21bbff89636cd5c0 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172980 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* lm4: Add a low power idle task.stabilize-4825.BAlec Berg2013-10-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First implementation of a low power idle task for the LM4 chip. The low power mode is selected by defining CONFIG_LOW_POWER_IDLE in a board.h file. This commit turns it on for Peppy, Slippy, and Falco only because those are the only boards tested. When using the low power idle task, the chip goes in to deep sleep when it can. Deep sleep disables clocks to most peripherals and puts the onboard flash and RAM into a low power mode. The chip is woken out of deep sleep using the RTC in the hibernate module. Increased the idle task stack size to handle more involved idle task. In board.c, the array of GPIO info can be used to select which GPIO points can wake up the EC from deep sleep. Currenlty selected are the power button, lid open, AC present, PCH_SLP_S3, and PCH_SLP_S5. Additionally the port with the KB scan row GPIO point is also enabled to wake up the EC from deep sleep. Signed-off-by: Alec Berg <alecaberg@chromium.org> BUG=None BRANCH=none TEST=Passes all unit tests. Runs on slippy, peppy, and falco with no noticeable side affects. Verified that the power consumed by the EC is lower when in S3, S5 and G3 by scoping the sense resistor powering the chip. Change-Id: I83fa9a159a4b79201b99f2c32678dc4fc8921726 Reviewed-on: https://chromium-review.googlesource.com/172183 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* Enforce a minimum number of clocks between keyboard scansRandall Spangler2013-10-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | When the EC CPU is running at a decreased clock frequency, frequent keyboard scans can starve other EC tasks of CPU and lead to dropped data or watchdog timeouts. Enforce a minimum number of EC clocks between keyboard scans to prevent this from happening. The default chosen (16000 clocks) is equal to the shortest post-scan delay (1 ms) of any current board when the AP is in S0, so this should have no effect when the AP is in S0. When the AP is in S3 or S5, we don't need to scan the keyboard as frequently anyway. This can be overridden on a per-board basis for future boards if needed. BUG=chrome-os-partner:23247 BRANCH=pit TEST=apshutdown, then hold down a key for 10 seconds. Should not see a watchdog reset. Change-Id: I228f53a32ad4769f6a137a9ab06903111bea115d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172895 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Add baytrail power sequencingRandall Spangler2013-10-111-0/+1
| | | | | | | | | | | | | | | | | This is an initial version of power sequencing for the rambi rev.1 boards. It has a workaround for a rev.1 board problem; this requires turning on PP5000 early. BUG=chrome-os-partner:22895 BRANCH=none TEST=AP should power on to S0 (PLTRST# deasserts) automatically when EC boots Then 'apshutdown' should drag it back to G3. Then 'powerbtn' should take it back to S0. Change-Id: Id9bc6fe9b55fce3eb46ce1265891724ec7a4ae20 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172675 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* rambi: Keyboard output column 2 must be invertedRandall Spangler2013-10-111-0/+8
| | | | | | | | | | | | | The Silego chip used on Rambi inverts column 2. So the EC should pull the signal low when NOT scanning column 2, and release it at all other times. BUG=chrome-os-partner:23198 BRANCH=none TEST=not yet; need to probe on scope Change-Id: If6a784493533f11ae54d18f27591697e69aa2282 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172674 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* lm4: Modified clock gating to allow easy expansion to low power.Alec Berg2013-10-101-0/+1
| | | | | | | | | | | | | | | | | | | | | Created a new function to enable or disable clocks to various peripherals. This new function makes it easy to specify if you want the clock enabled in run mode, sleep mode, and/or deep sleep mode. Added infrastructure to specify which GPIOs should interrupt the EC from deep sleep. BUG=none BRANCH=none TEST=Passes all unit tests. Ran on a peppy and verified that the clock gate control registers in run mode (LM4_RCGC regs) were the same before and after this change. Change-Id: Ia5009ac8c837f61dca52fe86ebdeede2e1a7fe4d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172454 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Move board-specific LED state machines to board dirsRandall Spangler2013-10-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | The LED state machine ends up being very board-specific, as does the specific configuration of LEDs and whether they're PWM'd or just GPIOs. dparker has some clever ideas for how to move more of the functionality to common/led_common.c (used at present only by peppy); that will be done as a follow-on to this CL. There's a unit test for the spring LED implementation. To keep that compiling, just use a symlink to the spring-specific implementation. No code changes; just moving around files. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all boards; pass unit tests Change-Id: I5973e701a29a72575db9a161dc146855ab21cca6 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/171771 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Cleanup use of config.h macrosBill Richardson2013-10-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | include/config.h should have the canonical list of all CONFIG_* macros used everywhere else. This fixes some that weren't included, and some that had been changed in one place but not in others. BUG=chrome-os-partner:18343 BRANCH=none TEST=manual Build everything. It should still work. cd src/plaform/ec make runtests for i in bds bolt daisy discovery falco kirby link mccroskey peppy pit puppy rambi samus slippy snow spring; do make BOARD=$i || touch died.$i; done There shouldn't be any died.* files. Change-Id: I0a1ec2d57668509c514dc5a521e547836a3e9894 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/171690 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Clean up G781 temperature sensor power detectionRandall Spangler2013-10-011-0/+7
| | | | | | | | | | | | | | | | | | This was previously done in a board-specific function across 4 boards. Except that the board-specific function was identical in all cases (that is, not really board-specific). Put it back in the common implementation to get rid of duplicated code, and use CONFIG_TEMP_SENSOR_POWER_GPIO to indicate which GPIO rail controls the sensor power. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all boards; pass unit tests Change-Id: I29de40001d5d4dc873e5ba8f3abb328c6271f235 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/171140 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Support backlight control via lid onlyRandall Spangler2013-09-271-4/+11
| | | | | | | | | | | | | | | | | | | | | The old backlight_x86 code did (backlight enable) = (lid is open) && (GPIO request from AP) Newer systems will AND those signals in hardware. Support those systems by separating CONFIG_BACKLIGHT_LID and CONFIG_BACKLIGHT_REQ_GPIO, and add tests for the case where the enable signal is dependent only on the lid position. BUG=chrome-os-partner:22960 BRANCH=none TEST=pass unit tests Change-Id: I1909426e49f00a8acd5047fd88c801cba1dacd76 Reviewed-on: https://chromium-review.googlesource.com/170925 Tested-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove unused fan channelsRandall Spangler2013-09-251-0/+3
| | | | | | | | | | | | | | | | | | With the PWM interface refactoring, only the CPU fan uses the fan.h interface. All other PWM channels (keyboard backlight, etc.) use the pwm.h interface. Remove the unused constants, and rename FAN_CH_CPU to CONFIG_FAN_CH_CPU so it fits with the other fan config options. No functional changes; just renaming things. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all targets; pass unit tests Change-Id: I391fbeaf54afcc29a11c2799a4520b7ad8784796 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170534 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Make support for dedicated recovery GPIO signal optionalRandall Spangler2013-09-251-0/+3
| | | | | | | | | | | | | | | | | | switch.c currently assumes that all boards have GPIO_RECOVERY_L. This is not true for Rambi, and also isn't true for ARM boards (which should also eventually use the common switch implementation). Add a new CONFIG_SWITCH_DEDICATED_RECOVERY option to control whether to compile this support. BUG=chrome-os-partner:22893 BRANCH=none TEST=compile all boards; pass unit tests Change-Id: If6f34d1afd580c9d79a8edcdda18833068e70f66 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170489 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: move board-specific battery files to board dirsRandall Spangler2013-09-191-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | The battery files contain board-specific constants and a few small methods like battery-detect and battery-cut. Most of these aren't reused across platforms. The battery files have also been cleaned up so those board-specific constants basically all that's left in them. Where a file is used by a single board only, move it to board/(boardname)/battery.c. Batteries used by more than one board (e.g. battery_link.c used by both link and bolt) are still in common/battery_*.c, since that's cleaner than duplicating the file in each board's directory. No code changes, just moving files. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all boards and pass unit tests Change-Id: I946c8eb874672c77f9b77105e5b900f98fa48d0f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/169893 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: Use DMA for UART receiveRandall Spangler2013-09-161-7/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STM32 has a single-byte mailbox for UART I/O. When the core clock runs at 16Mhz we can service interrupts fast enough to handle 115200 baud input, but when we drop to 1MHz we drop characters. Using DMA to receive input solves this problem. The STM32 DMA engine can only generate interrupts when the transfer is half-done / all-done, so we need to poll the DMA receive-head-pointer to see if individual characters have been received. Do this in the tick task (every 250ms). When a character is received, poll more quickly for a bit (5 times before the next tick) so the input console is more responsive to typing. BUG=chrome-os-partner:20485 BRANCH=none TEST=Console is responsive to debug commands. For example, help -> prints help apshutdown -> shuts down AP arrow keys -> move cursor and scroll through command history Ctrl+Q, help, wait a second, Ctrl+S -> help output printed after Ctrl+S Then in chip/stm32/config_chip.h, comment out #define CONFIG_UART_RX_DMA and rebuild/reflash the EC. When the AP is up, the console works normally but after 'apshutdown', the EC drops to 1MHz core clock, and the arrow keys don't work. (This step confirms that adding DMA support did not change the behavior of systems where CONFIG_UART_RX_DMA is not defined.) Change-Id: I199448354824bd747c7b290ea7fd5ccf354c11bb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/169406 Reviewed-by: Simon Glass <sjg@chromium.org>
* Add hook statisticsVic Yang2013-09-141-0/+5
| | | | | | | | | | | | | | | | | | If CONFIG_HOOK_DEBUG is defined, the maximum run time of each hook is recorded. Also, record the delayed amount of time of HOOK_TICK and HOOK_SECOND firing. The statistics are available through console command 'hookstats'. Also fix a bug that CC_HOOK is used but not defined when CONFIG_HOOK_DEBUG is defined. BUG=chrome-os-partner:21801 TEST=Build with HOOK_DEBUG and check 'hookstats' BRANCH=None Change-Id: I3acba3abdd487cf20d9a532429f766cdddea2e93 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/169274
* stm32: Support DMA-based UART outputRandall Spangler2013-09-111-0/+3
| | | | | | | | | | | | | | | This reduces the number of UART interrupts by a factor of 12, and reduces the overall interrupt rate on STM32 by a factor of 2. BUG=chrome-os-partner:20485 BRANCH=none (not required for pit branch) TEST=Boot pit. Ctrl+Q pauses debug output; Ctrl+S resumes it. 'crash divzero' still prints a full crash dump. And util/makeall.sh passes builds all platforms and passes tests. Change-Id: I86993e14b436150298dcb2c6d29086cc3c9db418 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168814
* Handle multiple independent sources and types of CPU throttlingBill Richardson2013-09-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on the system, the AP can be throttled in at least two different ways - politely, where it's just asked to slow down a bit, and forcefully using a hardware signal (like PROCHOT). In addition, the request for throttling can come from multiple tasks. This CL provides a single interface, specifying both the type of throttling desired and the source of the throttling request. For each type, any source can can start throttling, but all sources must agree before it stops. The changes are protected by a mutex, so that requests from multiple tasks don't interfere with each other. BUG=chrome-os-partner:20739,chromium:287985,chromium:287983 BRANCH=ToT TEST=manual Build-time test: cd src/platform/ec make BOARD=falco runtests Run-time test: Lower the temp thresholds, turn the fan off, and watch the throttling turn off and on as things heat up. For example, on the EC console: > temps PECI : 339 K = 66 C ECInternal : 324 K = 51 C G781Internal : 328 K = 55 C G781External : 327 K = 54 C > thermalset 0 341 343 sensor warn high halt fan_off fan_max name 0 341 343 383 333 363 PECI 1 0 0 0 0 0 ECInternal 2 0 0 0 0 0 G781Internal 3 0 0 0 0 0 G781External > > temps PECI : 339 K = 66 C ECInternal : 324 K = 51 C G781Internal : 328 K = 55 C G781External : 327 K = 54 C > > fanduty 0 Setting fan duty cycle to 0% > > apthrottle AP throttling type 0 is off (0x00000000) AP throttling type 1 is off (0x00000000) > [430.152000 thermal WARN] [430.152233 event set 0x00020000] [430.152497 event clear 0x00020000] [430.152714 ACPI query = 18] [430.152444 sci 0x00020000] [430.153051 set AP throttling type 0 to on (0x00000001)] > gpioget CPU_PROCHOT 0 CPU_PROCHOT > [436.153742 thermal HIGH] [436.153979 set AP throttling type 1 to on (0x00000001)] > gpioget CPU_PROCHOT 1* CPU_PROCHOT > [441.155319 thermal no longer high] [441.155587 set AP throttling type 1 to off (0x00000000)] [442.155604 thermal HIGH] [442.155841 set AP throttling type 1 to on (0x00000001)] [446.156623 thermal no longer high] [446.156890 set AP throttling type 1 to off (0x00000000)] temps PECI : 343 K = 70 C ECInternal : 324 K = 51 C G781Internal : 328 K = 55 C G781External : 327 K = 54 C > [447.156827 thermal HIGH] [447.157064 set AP throttling type 1 to on (0x00000001)] apthrottle AP throttling type 0 is on (0x00000001) AP throttling type 1 is on (0x00000001) > gpioget CPU_PROCHOT 1 CPU_PROCHOT > Now turn the fan back on: > fanauto > [456.159306 thermal no longer high] [456.159574 set AP throttling type 1 to off (0x00000000)] > apthrottle AP throttling type 0 is on (0x00000001) AP throttling type 1 is off (0x00000000) > temps PECI : 341 K = 68 C ECInternal : 324 K = 51 C G781Internal : 328 K = 55 C G781External : 327 K = 54 C > [473.163905 thermal no longer warn] [473.164168 event set 0x00040000] [473.164453 event clear 0x00040000] [473.164670 ACPI query = 19] [473.164379 sci 0x00040000] [473.164987 set AP throttling type 0 to off (0x00000000)] temps PECI : 340 K = 67 C ECInternal : 324 K = 51 C G781Internal : 328 K = 55 C G781External : 327 K = 54 C > > apthrottle AP throttling type 0 is off (0x00000000) AP throttling type 1 is off (0x00000000) > Change-Id: I9ee1491a637d7766395c71e57483fbd9177ea554 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168802
* Initalize DMA before UARTRandall Spangler2013-09-101-0/+3
| | | | | | | | | | | | | | This is in preparation for enabling DMA-based UART transfers, to improve UART performance on STM32. BUG=chrome-os-partner:20485 BRANCH=none TEST=Boot pit. Host commands should still be received; this verifies DMA is still operational. Change-Id: Ibc3b2e2cd187547eb61b85e4a086704accd7f2fb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168810
* Extend charge state machine to accommodate KirbyVic Yang2013-09-051-0/+11
| | | | | | | | | | | | | | | | | | | | | | Currently only x86 platform uses charge_state.c, and it's been tailored to fit smart battery and bq247xx charger family. For Kirby, we have different types of battery and charger, and thus need to make some change to accommodate them. This includes: - Abstract out smart battery specific bit mask - Implement missing functions required by GAIA chipset module - Add config flags for charging-enabled GPIO pin - Allow battery that doesn't report desired voltage and current BUG=chrome-os-partner:22055 TEST=Build all boards TEST=Boot Link and check it charges/discharges battery TEST=Test charging/discharging on Kirby along with the next two CLs BRANCH=None Change-Id: I910c030a45b4f775afffec0127cdc31e89b9dd55 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168005
* Add BQ27541 battery driverVic Yang2013-09-051-1/+4
| | | | | | | | | | | | | | | | | | BQ27541 is not a smart battery IC, and thus we cannot use existing smart battery driver. Let's add a driver that implements a smart-battery-like interface. The 'battery' console command is also moved to battery.c so that it can be reused by different battery driver. BUG=chrome-os-partner:22048 TEST=Type 'battery' and check the reported values are sane. TEST=Check 'battery' command works fine on Spring. BRANCH=None Change-Id: I5d1eaeb3f801478f3b9473fd43c1f2a2eda75859 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/66340
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