summaryrefslogtreecommitdiff
path: root/include/config.h
Commit message (Collapse)AuthorAgeFilesLines
* uart: provide polling mode of operationVadim Bendebury2015-08-081-0/+10
| | | | | | | | | | | | | | | | | | | | | Early hardware bringup often is complicated by exceptions happening in the code all over the place. Using interrupt based console output to trace startup progress is inefficient - a lot of text gets buffered and never shows up on the console. The new config option enables the mode where the console output is supposed to be happening in polling mode, the character transmit function not exiting until the entire character is transmitted. BRANCH=none BUG=chrome-os-partner:43791 TEST=with the new config enabled (and the appropriate changes to chip/g/uart.c) was able to debug bringup on the new version. Change-Id: I85fd2f3990ac1d31097d58bd6a7fa658b2b5146e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291852 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32: Deprecate SPI protocol version 2.Aseda Aboagye2015-08-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that v3 support is in the cros_ec kernel driver and depthcharge, deprecate support for the old v2 protocol. At some point in the future, support for the v2 protocol will dropped entirely. Boards that require support for the V2 protocol should enable the following config option. #define CONFIG_SPI_PROTOCOL_V2 BUG=chrome-os-partner:20533 BRANCH=None TEST=make -j buildall tests TEST=Flash jerry, AP & EC boot successful. TEST=`ectool protoinfo` shows only version 3 supported on jerry. TEST=Flashrom still works on jerry. Change-Id: I72d3aee00879314b936cc0b1002c9883550b1f1a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/291411 Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* it8380dev: modify sspi moduleDino Li2015-08-041-3/+0
| | | | | | | | | | | | | | | | | We need to modify SSPI module to fix compile fail due to SPI flash common code changed. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console "spi_flashinfo" OK Change-Id: I83bb645eff1e5874d849056df518eea92340c39e Reviewed-on: https://chromium-review.googlesource.com/290089 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* driver/temp_sensor: Add support for BD99992GWShawn Nematbakhsh2015-08-031-0/+1
| | | | | | | | | | | | | | | Add support for ADC / thermistor reads on the BD99992GW PMIC. BUG=chrome-os-partner:42156 TEST=Manual on Glados with subsequent commit. Boot to S0, run "temps". Verify that temperatures start around 28C and begin to increase after system is powered-on for a long duration. BRANCH=None Change-Id: Ic15f41046130317a0e0c3bce4a923ba624328c0d Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289935 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: don't enable try.src when battery is not present or too lowAlec Berg2015-08-021-0/+3
| | | | | | | | | | | | | | | | | | Don't enable try.src when battery is not present or <1% because try.src will temporarily cut off power to system. BUG=chrome-os-partner:43413 BRANCH=samus TEST=tested on samus using "battfake" ec command. when battery <1%, verified that try.src is disabled and when battery >=1% and the AP is on (dual-role toggling is on), then try.src is enabled. verified boot without battery succeeds on samus and glados. Change-Id: I64816bb7c9669bfeca61687bcd9a48da32e67945 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289854 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: bmi160: Add SPI access supportGwendal Grignou2015-08-011-0/+3
| | | | | | | | | | | | | Add interface to access the sensor using SPI interface. BRANCH=smaug TEST=compile and work on new Ryu board BUG=chrome-os-partner:42304 Change-Id: I987259a7e378de8ada3b3b55b3662e5028ea31b2 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288515 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* common: change interface to SPI flashGwendal Grignou2015-07-301-9/+6
| | | | | | | | | | | | | | | | Allow more than one SPI master. Add CONFIG variables to address the system SPI flash. To have SPI master ports, spi_ports array must be defined. BRANCH=smaug TEST=compile BUG=chrome-os-partner:42304 Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288512 Commit-Queue: David James <davidjames@chromium.org>
* Driver: Add macros to conditionally compile the console commandsVijay Hiremath2015-07-291-0/+6
| | | | | | | | | | | | | | Added macros to conditionally compile the console commands to save the memory. These macros can be enabled/disabled in the board specific files. BUG=none TEST=make buildall -j BRANCH=none Change-Id: I108a072c333762cd24ea973612202c9cc4d40914 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/288950 Reviewed-by: Shawn N <shawnn@chromium.org>
* Cr50: Enable TPM-protocol data over the SPI busVadim Bendebury2015-07-251-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a module which runs on top of the SPS driver and implements the TCG SPI TPM protocol. Basic register read and write functions are implemented as well as rudimentary TPM state machine (claiming/releasing locality). An enhancement is made to the SPS driver to ensure that when the CS is deasserted the transmit FIFO is reset too, on the off chance of the CS going away mid transaction for whatever reason. In this implementation the slave is guaranteed to stall the master for a few bytes in both receive and transmit transactions, which is further aggravated by the fact that RX FIFO threshold is set to 8 (this is the minimum number of bytes the master has to send to wake up the slave). This could be fine tuned later, for instance made a parameter of the receive callback registration function. BRANCH=none BUG=chrome-os-partner:43025 TEST=trunksd initialization (with minor changes to accommodate new VID/DID and some status bits, to be published) succeeds with the cr50 connected to the USB/SPI cable. Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/285252
* cr50: Use distinct configuration option for SPI Slave supportVadim Bendebury2015-07-251-3/+11
| | | | | | | | | | | | | | | | | | | | SPI slave and master interfaces require very different code to support, they should have separate configuration options. Host command code printouts should use their own console channel. Using SPS to designate SPI Slave interface is not universally acceptable, a bug has been opened to discuss the alternatives and clean up the code. BRANCH=none BUG=chromium:512613 TEST=make buildall -j Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/286469 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* lid_switch: allow to specify several lid GPIOsVincent Palatin2015-07-231-0/+9
| | | | | | | | | | | | | | | | | | | | | | Add a X-macro CONFIG_LID_SWITCH_GPIO_LIST to be able to optionally specify more than one GPIO to check to find out whether the lid is open. By default, use GPIO_LID_OPEN as before. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:42110 TEST=on Smaug EVT2, define CONFIG_LID_SWITCH_GPIO_LIST as LID_GPIO(GPIO_LID_OPEN) LID_GPIO(GPIO_BASE_PRES_L) and play with magnets and the genuine lid, check we get the right "lid open" / "lid close" messages on the console. Change-Id: I9e7c67bb39f36f254d31d5861d535d69db754faa Reviewed-on: https://chromium-review.googlesource.com/287852 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* cleanup: Clarify usage of CONFIG_CHARGER_INPUT_CURRENTShawn Nematbakhsh2015-07-221-1/+3
| | | | | | | | | | | | | | Add additional comments on the usage of CONFIG_CHARGER_INPUT_CURRENT for type-C. BUG=chrome-os-partner:42933 TEST=Passes pre-submit check BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I00458c16fa4671f26fb00fe3ca1265ebc22a74c8 Reviewed-on: https://chromium-review.googlesource.com/287377 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* common: Untie math_util from motion sense.Gwendal Grignou2015-07-221-2/+3
| | | | | | | | | | | | | | | math library can be set independentely. It is implied when motion sensor drivers are compiled in. BRANCH=smaug TEST=Build strago board specific tests, host test and ran ryu image. BUG=chromium:512329 Change-Id: I743ea7b44e4a3783602c11f3928cb3fa4b105ec4 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/287371 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Driver: OPT3001: Add TI OPT3001 light sensor driverVijay Hiremath2015-07-211-0/+1
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=Added OPT3001 config to test the sensor in Kunimitsu. Able to read the als data from "als" console command. Varied the light intensity and the als reading are changing. Driver fits into the existing ALS framework. Change-Id: Idb2e6f9f50b6d0d6c8f64c11336efd3f2c76d498 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/286782 Reviewed-by: Shawn N <shawnn@chromium.org>
* Skylake: Add G3 sleep mode supportVijay Hiremath2015-07-211-0/+3
| | | | | | | | | | | | | BUG=none TEST=Enabled the config and tested on Kunimitsu. Enter "shutdown -h now" form the Kernel console. Device goes to Sleep mode in G3 and charger LED turns off. BRANCH=none Change-Id: I962018dcfac2998ee0a11784adeceb09931b930d Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/286781 Reviewed-by: Shawn N <shawnn@chromium.org>
* mec1322: hibernate: Fix wake-on-AC for USB-CShawn Nematbakhsh2015-07-201-0/+6
| | | | | | | | | | | | | | | | | Fix hibernate so that plugging a USB-C charger properly wakes the system. In addition, change the default hibernate behavior to restart after wake. BUG=chrome-os-partner:42104 TEST=Run 'hibernate' on Glados. Verify that wakes occur when power button is pressed, lid switch is toggled, or when a charger is attached to either USB-C port. BRANCH=None Change-Id: I54b8d58e20c35f25883238df24e7f23bb743abaa Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/286660 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* build-infr: Add support for shared RO library.Aseda Aboagye2015-07-171-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces the build infrastructure changes needed for creating a shared RO library. (libsharedobjs). The end goal is for the library to contain various objects that can be shared with both the RO and RW EC images. Now, there are 3 make goals: ro, rw, and libsharedobjs. In order for changes that are only specific to a single image (ie: RW only) to be applied correctly, the object files are now built separately for the RO, RW, shared objects library targets. NOTE: Certain EC targets are incompatible with this model due to the fact that only one image is present within flash at a time. BRANCH=none BUG=None TEST=make -j buildall tests TEST=make -j BOARD=cr50 xrefs TEST=make BOARD=samus dis TEST=Built samus EC image and compared that the final EC image was identical to the upstream version (except for the git SHAs & version strings). CQ-DEPEND=CL:285934 Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/274079 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* cyan: fix issues with write protectionAndrey Petrov2015-07-161-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Fixes cyan/board.h to use correct SPI part * Adds new flash protection regions in spi_flash_reg.c * Sets SRP register in flash_physical_protect_at_boot() * Fixes a bug in COMPARE_BIT macro * Makes spi_flash_set_status() fail only when both HW pin is asserted AND SRP(s) are set * Makes sure set_flash_set_status() completes before returning BUG=chrome-os-partner:40908 BRANCH=master TEST=on Cyan: With WP pin de-asserted: flashrom -p ec --wp-enable flashrom -p ec --wp-status, make sure it is enabled flashrom -p ec --wp-disable flashrom -p ec --status, make sure it is disabled flashrom -p ec --wp-enable Assert WP pin (either with screwdriver or dut-control) flashrom -p ec --wp-disable make sure it failed Change-Id: I338cc906b73e723fdbb37f7c2fd0c4da358b6c8e Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://chromium-review.googlesource.com/276671 Reviewed-by: Shawn N <shawnn@chromium.org> Tested-by: Divya Jyothi <divya.jyothi@intel.com> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
* mec1322: Allow multiple hibernate wake sourcesShawn Nematbakhsh2015-07-161-4/+0
| | | | | | | | | | | | | | | | | Allow multiple GPIOs to wake the EC from hibernate by requiring boards to define hibernate_wake_pins and hibernate_wake_pins_used. In addition, clean up the GPIO-skipping hibernate code, and skip setting PCH_RTCRST as an input due to a bug on certain boards. BUG=chrome-os-partner:42104 TEST=Manual on Glados. Run 'hibernate' from EC console, verify that EC wakes with power button press or with "dut-control lid_open:no". BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I13a6e062393cab8ed7129eda253585951f771109 Reviewed-on: https://chromium-review.googlesource.com/285924 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Braswell: Add support for PMICKyoung Kim2015-07-151-0/+3
| | | | | | | | | | | | | | | | Added support for PMIC in Braswell power sequencing code to support the PMIC enabled Braswell devices. BUG=none TEST=Tested S3, S5, G3 & PG3 on BCRD2. BRANCH=none Change-Id: I247ef9506d0e8065c761bfb00b9141ec8ff5ada8 Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/283579 Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: remove board_discharge_on_ac() unless custom func neededAlec Berg2015-07-141-0/+3
| | | | | | | | | | | | | | | | | | Remove duplicate board_discharge_on_ac() functions and create CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM for boards that have a unique implementation of board_discharge_on_ac(). BUG=chrome-os-partner:42294 BRANCH=none TEST=make -j buildall. load on samus and test 'ectool chargecontrol discharge' forces discharging on AC, and 'ectool chargecontrol normal' resumes normal charging. Change-Id: I2b7c04b9278d07748d6d41798ceab1a7e90684e4 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/284911 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Braswell: Added SOC G3 / Pseudo G3 supportKevin K Wong2015-07-141-0/+6
| | | | | | | | | | | | | | | | BUG=none TEST=Tested on DVT 1.1, verified V3p3A is off in Pseudo G3 BRANCH=none Change-Id: Id73b42d9f2e49239e82fad7931bbcc63e36a2c0b Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/283602 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Commit-Queue: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* driver: bmi160: Add FIFO and interrupt supportGwendal Grignou2015-07-101-0/+5
| | | | | | | | | | | | | | | | | | | Add FIFO support, where bmi160 hardware FIFO is copied in local fifo. Add rudimentary support for single/double tap and lift detection. BUG=chrome-os-partner:39900 BRANCH=smaug TEST=Check on F411 that FIFO data is retrieved and correct. Check on Smaug as well, with proper kernel the collect the FIFO: - check that increasing sampling_frequency we are collecting the FIFO less often - check no frames are lost. - check tap/lift interrupts are working - if latency is less than 100ms, check we are collecting much faster. Change-Id: Ic2317c27fad0ef31dacd6e18cd5f71ccd2cec807 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/274227
* Cr50: Implement host commands over SPI busBill Richardson2015-07-081-0/+5
| | | | | | | | | | | | | | | | | This adds a module that attaches to the SPS driver to process host commands delivered over the SPI slave interface. BUG=chrome-os-partner:40969 BRANCH=none TEST=make buildall This feature is not yet enabled, so there's nothing new to test. That will come next. Change-Id: If57a6fce698a7eb050e2a68b7f4d18d8b0e2956f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/284010 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: Add Try.SRC functionality to the pd_protocol state machineScott2015-07-081-0/+3
| | | | | | | | | | | | | | | | | 1. Added new config option CONFIG_USB_PD_TRY_SRC 2. Added pd_try_source_enable global flag with console command 3. Added bit to pd.flags to indicate Try.SRC states are active BUG=chrome-os-partner:39724 TEST=Manual samus to samus with the Try.SRC enabled on both and just one samus. Tested Samus to Honeybuns and Samus to Zinger connections. BRANCH=TOT Change-Id: Ifa5d5d82e443f376e546aaf852ff24d92ef04d72 Signed-off-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/282052 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* it8380dev: add flash module and fix system jumpDino Li2015-07-081-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add flash control module for emulation board. 2. Fix system jump for Andes core. 3. Change the physical size of the flash on the chip to 256KB. note: 1. Only IT839x series supports flash write protect by registers. 2. Static DMA method of flash code only for IT839x series and IT838x Dx. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command flashwp and flashinfo 1-a. flashwp enable 1-b. WP asserted and reboot 1-c. flashinfo RO protected now 1-d. WP deasserted and reboot 1-e. No protected 1-f. flashwp disable 1-g. WP asserted and reboot 1-h. No protected 2. console sysjump and sysinfo 2-a. sysjump rw 2-b. jumping to image RW 2-c. sysinfo, Copy : RW, Jumped : yes 2-d. sysjump ro 2-e. jumping to image RO 2-f. sysinfo, Copy : RO, Jumped : yes 3. RO/RW firmware image test 3-a. sysjump rw 3-b. use console command "eflash" to erase RO region, erase OK and system still work. 3-c. reflash firmware 3-d. sysjump rw, sysjump ro 3-e. use console command "eflash" to erase RW region, erase OK and system still work. Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8 Reviewed-on: https://chromium-review.googlesource.com/271390 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* Cr50: Simplify the API for the SPS driverBill Richardson2015-07-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | The SPS (SPI Slave) driver handles incoming traffic from the SPI master. This abstracts the basic hardware functions into a clean API so that the response to the SPI bytes can be put into separate files. BUG=chrome-os-partner:40969 BRANCH=none TEST=make buildall If CONFIG_SPI is not defined, incoming SPI traffic is completely ignored. Even when it's enabled, nothing is reacting to the traffic so incoming SPI bytes return 0xFF bytes to the master (SPI traffic is always bidirectional). Change-Id: I9bbcebc9c5223b942362200fe43a11ac57dfff40 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/283581 Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* bq2598x: ryu: take into account hardware input current optimizerVincent Palatin2015-07-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Take profit of the hardware input current ramping/back-off integrated in the BQ2589x charger by setting the current limits higher for BC1.2 USB modes and letting the hardware adjust to the actual charger limitation depending on the VBUS voltage droop. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:42045 TEST=Connect a Nexus 9 DCP charger to Smaug and see the input current adjusted to 1650mA without brown-out, read back the value properly from the AP: $ ectool usbpdpower Port 0: SNK Charger DCP 4958mV / 1650mA, max 5000mV / 1650mA / 8250mW Change-Id: I348e5ee4980a5652f72f279ab4e3a7126583b093 Reviewed-on: https://chromium-review.googlesource.com/282584 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* usb_mux: Add support for Parade PS8740 chipShawn Nematbakhsh2015-06-301-0/+3
| | | | | | | | | | | | | | | Initial support for Parade PS8740 Type-C redriving switch. BUG=chrome-os-partner:41696 TEST=Manual on Glados in subsequent commit. Verify set() and get() functions set and return consistent values. Verify that USB SS device functions when muxes are set to dock or USB. BRANCH=None Change-Id: Iedbe53cc76f30ecd969c2ca99a7377ed3b193729 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/282280 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* usb_mux: Add driver interface for USB-C muxesShawn Nematbakhsh2015-06-301-2/+2
| | | | | | | | | | | | | | | | | | | | In preparation for adding support for additional USB-C mux chips, add a new high-level USB-C mux interface usb_mux.c. usb_mux functions are now called from pd code instead of board-level functions. usb_mux calls down into a mux chip-specific driver (currently pi3usb30532) or board-specific drivers which toggle GPIOs (for legacy boards). BUG=chrome-os-partner:41696 TEST=Manual on Glados in subsequent commit. Verify set() and get() functions set and return consistent values. Verify that USB SS device functions when muxes are set to dock or USB. Also, verify that DP dongle and USB SS device are functional on both PD ports on samus_pd. BRANCH=None Change-Id: Ib6477f489310f3be1430585ea09fea26f57e3752 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/281435 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* it8380dev: add i2c control moduleDino Li2015-06-301-6/+12
| | | | | | | | | | | | | | | | | | | | Add i2c control module for emulation board. To rename CONFIG_ to CONFIG_IT83XX_ for IT83XX series configuration. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command "i2cscan" found devices correctly. 2. console command "i2cxfer". 2-a. port2 + battery, i2cxfer r, r16, and rlen OK. 2-b. port1 + slave evb, i2cxfer r, r16, rlen, w, and w16 OK. Change-Id: I67165f7dcdef538ba6dd03b47f1621a73cc68379 Reviewed-on: https://chromium-review.googlesource.com/263678 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* config: Add missing config options to config.hAseda Aboagye2015-06-251-0/+192
| | | | | | | | | | | | | | | | | | | There were many CONFIG_* options that were not defined in include/config.h. This commit fixes that by adding those config options that were missing with a brief description of each. BUG=chromium:496893 BRANCH=none TEST=Verified that every mention of CONFIG_* is in include/config.h. TEST=make -j buildall tests Change-Id: Ie60756a8dd48d12b3e9b775639f409455dc5656f Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/281785 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* power: ryu: ignore lid open eventsVincent Palatin2015-06-251-0/+3
| | | | | | | | | | | | | | | | | | Do not start the AP on lid open events, in order to avoid spurious startup due to magnet magic. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:41601 TEST=Play with 2 Ryu EVT2 stacked one on top of the other. Change-Id: I530d54f61d0674caddf20d1b17268c971f639f2f Reviewed-on: https://chromium-review.googlesource.com/281667 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* bq2589x: ryu: enable IR compensationVincent Palatin2015-06-241-0/+6
| | | | | | | | | | | | | | | | | | | | | | Set the resistance compensation for the charger IC according to the EE team measurements : - Resistance compensation = 60 mOhm - Voltage clamping = 160 mV - Thermal regulation = 120C Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:38603 TEST=dump the BQ25892 registers by using the "bq25" command and see that REG08 contains 0x77. Change-Id: I90e9ea4569d77fd90ed0290ec78e66810d744648 Reviewed-on: https://chromium-review.googlesource.com/281660 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
* pd: allow pdcmd task to check TCPC alert status w/o sending HCAlec Berg2015-06-231-6/+9
| | | | | | | | | | | | | | | | | | | | | | Modify PDCMD task to allow for TCPCs that do not support host commands. CONFIG_HOSTCMD_PD is a new config option to be used by TCPCs that implement our host command protocol such as the PD MCU on glados and oak. Otherwise, the PDCMD task will not send host commands and will be used simply to check TCPC interrupt status. BUG=none BRANCH=none TEST=test on glados and samus and make sure we can send host commands from the EC to the PD and that we can negotiate a PD contract. Change-Id: I618badb5db3f9e490ae4eedfdb2a0c54513496ff Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/278215 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* oak: fixing hardware tests build errors for oakBen Lok2015-06-151-0/+2
| | | | | | | | | | | | | | To avoid hardware tests build errors of oak BRANCH=None BUG=None TEST=make -j BOARD=oak tests Change-Id: Ia1874c2d271508414e32e89a05763c144d9e3b84 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/277625 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Rong Chang <rongchang@chromium.org>
* pd: ryu: set data role to UFP with debug accessoryVincent Palatin2015-06-131-0/+3
| | | | | | | | | | | | | | | | | | When a USB-PD debug accessory is plugged, set the default data role to UFP (USB device) on Ryu. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=none TEST=On Ryu, plug a SuzyQ and connect with ADB using a A-A cable. Change-Id: Ifa62b097532880ab5cadb7f2ab7774eec752f1e6 Reviewed-on: https://chromium-review.googlesource.com/277276 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
* core: Assert if task_get_current() cannot return a valid task IDShawn Nematbakhsh2015-06-121-0/+6
| | | | | | | | | | | | | | | | | | | If task_get_current() is called early during initialization when we have not yet done a context switch, our current_task pointer is invalid. Add an assert to detect this case and put it behind CONFIG_DEBUG_BRINGUP, a new config that's intended to enable possibly-costly pre-production debugging. BUG=chrome-os-partner:40677 TEST=Manual on glados. Define CONFIG_DEBUG_BRINGUP, then call i2c_write from board_init and verify the new assert fails. Remove the i2c_write and verify the new assert passes. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6014ccf739dcc4c8f4f960be2b89f01e423b65b5 Reviewed-on: https://chromium-review.googlesource.com/273541 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* usb: pi3usb9281: Allow flexible chip configurationsShawn Nematbakhsh2015-06-121-2/+2
| | | | | | | | | | | | | | | | | | Previously we supported using a single pi3usb9281 chip, or using two chips on the same i2c bus behind a mux. Now that we need to support a third configuration of multiple chips on different busses, it makes sense to be able to configure the configuration freely at the board level. BUG=chrome-os-partner:40920 TEST=Manual on samus_pd. Plug USB charger, verify detection is correct on both charge ports. BRANCH=None Change-Id: I120dcb1c3ceb6f013b92407effcd8cb66e7ffcce Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/276511 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Stream: Remove in_stream/out_stream interfaceAnton Staaf2015-06-111-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The in_stream and out_stream interfaces were a first attempt at providing an abstraction for multiple stream like devices (usart, USB, I2C/LPC host interfaces...). But, by baking the queue into the device it proved to be hard to use and required additional resources (task or deferred hook) to handle passing data from one stream to another. Since then the queue policy and producer/consumer interfaces have replaced the stream interfaces. This CL removes the old stream interfaces and updates the only users (deleting the test echo code from the discovery-stm32f072 board and updating the mcdp28x0 driver to use the queue interfaces). Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ic0d2abf81eafc4fb2e61172540151f2d0ba45caf Reviewed-on: https://chromium-review.googlesource.com/276163 Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* charger: Move USB charger / BC1.2 task to common codeShawn Nematbakhsh2015-06-101-3/+3
| | | | | | | | | | | | | | | | Move the task responsible for detection of USB chargers to common code to reduce code duplication. BUG=chrome-os-partner:40920 TEST=Manual on samus_pd. Plug USB charger, verify detection is correct on both charge ports. BRANCH=None Change-Id: I362f8b5b51741509e459c66928131f1f6d2a3b1d Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/276210 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Remove obsolete board-specific codeRandall Spangler2015-06-101-24/+0
| | | | | | | | | | | | | | | | | Now that we've removed boards from ToT, also delete board-specific code used only by the removed boards. There are still more things to remove (unused charging chips, LED drivers, COMx support). More CLs coming. BUG=chromium:493866 BRANCH=none TEST=make buildall -j Change-Id: Ie6bdeaf96e61cadd77e3f6336c73b9b54ff4eabb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/276524 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* glados: limit max input current to 1.5A to avoid i2c errorsstabilize-7155.BAlec Berg2015-06-091-1/+6
| | | | | | | | | | | | | | | | | | | | | Add workaround to limit the max input current to 1.5A due to i2c communication problems at higher currents. Note that this max should be removed when possible. This introduces a new CONFIG option to define the maximum input current limit for a board, as opposed to the already existing default input current limit. BUG=none BRANCH=none TEST=load on glados, charge with zinger, make sure input current is set to 1.5A and no recurring i2c errors talking to battery and charger. Change-Id: Ib7070772e1bf5475e98a2dc946ae75bf08047b70 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/276169 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* pd: use pdcmd task to handle tcpc interruptAlec Berg2015-06-051-0/+6
| | | | | | | | | | | | | | | | | | | | Use the PDCMD task to handle PD MCU interrupts, and use it to trigger the tcpc_alert(). Note this fixes bug on Glados and Oak that could cause watchdog reset because tcpc_alert() which uses i2c to talk to tcpc was called from hooks task and can delay tickling watchdog. BUG=chrome-os-partner:40920 BRANCH=none TEST=load on glados and plug zinger into both ports many times. make sure we get a stable contract and no watchdog reset. Change-Id: I37625fae2ca0057d2ee8fa1eea6974f2d26d1b91 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/275296 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* i2c: Retry i2c operation if fails on nack'd(EC_ERROR_BUSY).li feng2015-06-041-1/+3
| | | | | | | | | | | | | | | Retry count is defined by CONFIG_I2C_NACK_RETRY_COUNT. BUG=chrome-os-partner:37494 TEST=Tested on Cyan, observed retry happens on nack'd i2c. BRANCH=None Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I73ed15a52335de6c5a5b647660bfe431a8238716 Reviewed-on: https://chromium-review.googlesource.com/274689 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com> Tested-by: Divya Jyothi <divya.jyothi@intel.com>
* Cr50: USB hardware uses 8-bit buffers, not 16-bitBill Richardson2015-05-291-1/+1
| | | | | | | | | | | | | | | Our USB buffers are just arrays of uint8_t in program RAM, so let's treat them that way. The DMA descriptors are in normal RAM, too. BUG=chrome-os-partner:40693 BRANCH=none TEST=make buildall Change-Id: Ibafe1a557a328bbf8cf37ce113675fcd35bad376 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/273918 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: move non-phy layer config out of usb_pd_config.hAlec Berg2015-05-271-0/+3
| | | | | | | | | | | | | | | | | | | | | Move parts of usb_pd_config.h that are not part of the phy layer out of usb_pd_config.h and into board.h. This cleans up the division between the TCPC and TCPM as only the TCPC needs to use usb_pd_config.h. Also cleans up the use of the CC detection voltage thresholds by creating standard macros to use based on Rp strength for the board. BUG=none BRANCH=none TEST=make -j buildall Change-Id: I946cceb38bea8233095b8a4b287102bb8a3a296d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270337 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mcdp28x0: Add info console command.Todd Broch2015-05-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Would be useful to expose more of the GProbe commands to developers who have access to boards console (hoho, honeybuns). This CL adds a console command and seeds it the 'mcdp info' command. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:35939 TEST=manual, with CONFIG_CMD_MCDP defined in board/hoho/board.h - Enter info console command multiple times and see correct return value. mcdp info family:000e chipid:0001 irom:1.0.0 fw:0.0.0 Change-Id: Iaf2c088d5da1af7b2dab11abcfb6e32e289066ea Reviewed-on: https://chromium-review.googlesource.com/272692 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* pd: add config options for including TCPM and TCPC separatelyAlec Berg2015-05-221-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | Add config options for various parts of USB PD stack: CONFIG_USB_POWER_DELIVERY: The use of this option has changed slightly. It now represents whether or not to include the USB PD protocol and policy layers of the software stack. CONFIG_USB_PD_TCPC: Compile in type-C port controller module which performs the phy layer of the PD stack. CONFIG_USB_PD_TCPM_STUB and CONFIG_USB_PD_TCPM_TCPCI: If CONFIG_USB_POWER_DELIVERY is defined, then one TCPM needs to be defined to declare which port management module to use to drive the TCPC. BUG=none BRANCH=none TEST=make -j buildall Change-Id: I41aa65a478e36925745cd37a6707f242c0dfbf91 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270171 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add option to enable GCC LTOVincent Palatin2015-05-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | Add CONFIG_LTO to use GCC Link-Time Optimizations to try to reduce the flash footprint of the firmware. Add additional protection to some functions/data to avoid removal by the linker when their usage is not obvious. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall (with and without LTO enable on all boards) Change-Id: I586b8c1eda4592b416c85383b65153c1d5ab0059 Reviewed-on: https://chromium-review.googlesource.com/271291 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
View Lorry Controller Status