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* pd: Enable USB PD SOP' and SOP'' CommunicationSam Hurst2019-01-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, the PD stack ignores messages received from SOP' and SOP'' and this prevents the stack from communicating with VCONN Power Devices and Cable Plugs in general. I propose encoding the message address (SOP*) in the message header. The message header is encoded as a 16-bit value but the TCPC drivers use a 32-bit type for the header. The SOP* address will be stored in bits 31 to 28 of the message header and the PD stack can check those bits to determine the address of the message. BUG=b:122109575 BRANCH=none TEST=manual Change-Id: I2b34c16cae186202c9cf0bc5f940e05151e88cbf Signed-off-by: Sam Hurst <shurst@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1390951 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* mt_scp: Support inter-process interrupt/communication (IPI).Yilun Lin2018-12-291-0/+15
| | | | | | | | | | | | | | | | | | This CL enables the IPI/IPC functions in mt_scp on MTK SOC. TEST=Run ec.RW.bin on kukui, and see EC version string in AP console: remoteproc remoteproc0: powering up scp remoteproc remoteproc0: Booting fw image scp.img, size 29800 mtk-scp 10500000.scp: scp is ready. kukui_scp_v2.0.519+164255084 BRANCH=None BUG=b:117917141, b:120172001, b:120953723 Change-Id: I2a43aee13141535bf71f839cf9e6cc0460b65844 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1351924 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* ISH: IPC: implement generic IPC layerHyungwoo Yang2018-12-271-0/+7
| | | | | | | | | | | | | | | | Introduce new IPC API supporting MNG and HECI protocols. Currently it supports communication with host(x64) BUG=b:79676054 BRANCH=none TEST=Tested on Atlas board. Change-Id: Iea6d1f96c89228b425861d045618d58f9d146f08 Reviewed-on: https://chromium-review.googlesource.com/1279363 Commit-Ready: Hyungwoo Yang <hyungwoo.yang@intel.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* audio_codec: add audio codec featureCheng-Yi Chiang2018-12-201-0/+3
| | | | | | | | | | | | | | | | | | | | This CL adds support for the audio codec feature required to support dmic and I2S operation. BRANCH=none BUG=b:116766596 TEST=On cheza verifed recording works using the following kernel commands and the loading the audio file into audacity. amixer -c 0 cset iface=MIXER,name='MultiMedia1 Mixer SEC_MI2S_TX' on amixer -c0 cset numid=27 30,30 arecord -D hw:0,0 -f dat /tmp/rec.wav -d 5 Change-Id: I2b3ba097aaf6a7854551db2033914d00ac3ec275 Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1192702 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* rammus: reconfig the PS8751 i2c port according to the board versionZhuohao Lee2018-12-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | On Shyvana, we found that if we put the Parade PS8751 and Analogix ANX3447 on the same i2c bus, the ANX3447 would be broken because of PS8751 i2c bus error. To avoid this kind of problem, we decided to separate the TCPC i2c bus starting from board version >= 2. The new assignment are ANX3447:i2c_0_0, PS8751:i2c_0_1. This patch also adds a new config CONFIG_USB_PD_TCPC_RUNTIME_CONFIG for enabling runtime switching the TCPC setting. BUG=b:118063849 BRANCH=firmware-rammus-11275 TEST=verified on DUT with board_version <= 1 verified on reworked DUT with board_version >= 2 Change-Id: I0bdc930c1a5e691239f5f5c256d380d0111eed91 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1381600 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* oz554: Move oz554 driver code to common directoryDaisuke Nojiri2018-12-131-0/+1
| | | | | | | | | | | | | | | | This patch moves oz554 LED driver code from Karma. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Ia2808563b9c113e5ea3376f9327dff2578e20906 Reviewed-on: https://chromium-review.googlesource.com/1366015 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* sensor: Adjust max_frequency based on EC performanceGwendal Grignou2018-12-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | Put in max_frequency a value that the sensor AND the EC support. BRANCH=none BUG=b:118205424,b:118851581,chromium:615059 TEST=Compile. Check all max sensors frequencies have been altered with: for i in $(grep -rh max_frequency board | cut -d '=' -f 2 | sort | \ uniq | grep FREQ | sed 's/FREQ.*//') ; do echo -n $i ; git show | grep -q $i || break; echo check done Check on nocturne accel max frequency is still correct. Change-Id: I848396d9f150a2e94d430a8feeafc1087a6bf2c3 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1352063 Commit-Ready: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Jesse Schettler <jschettler@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* motion_lid: Use CONFIG_TABLET_MODEFurquan Shaikh2018-11-291-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | This change updates motion_lid driver to use CONFIG_TABLET_MODE to decide if device requires reporting of tablet mode. This basically makes the config options CONFIG_LID_ANGLE_INVALID_CHECK and CONFIG_LID_ANGLE_TABLET_MODE obsolete. Now that EC will always report tablet mode aligned with Chrome (at 180 degree), any device that supports tablet mode and uses motion lid driver will require this by default and should not require boards to individually select any special config options. Thus, it also gets rid of unused CONFIG_LID_ANGLE_TABLET_MODE and CONFIG_LID_ANGLE_INVALID_CHECK. BUG=b:120050761 BRANCH=octopus TEST=make -j buildall Change-Id: Ib73af66ca1c17d4033cf54f0b4b86bf41793f3a3 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350470 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* tablet_mode: Introduce hall sensor specific handlingFurquan Shaikh2018-11-291-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change performs the following renaming: 1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR Indicates if a device has hall sensor 2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L Provides the interrupt line from hall sensor to EC. 3. tablet_mode_isr -> hall_sensor_isr Interrupt routine that gets control on hall sensor interrupt. 4. tablet_mode_init -> hall_sensor_init Init routine for initializing hall sensor interrupt. 5. tablet_switch_disable -> hall_sensor_disable Disable hall sensor interrupt and tablet mode sub-system. This is done to separate hall sensor interrupt from tablet mode handling. It is another step towards aligning tablet mode detection on EC with Chrome. Hall sensor interrupt occurs when the lid is in 360-degree flipped mode. If tablet mode is not already triggered by lid motion driver, then hall_sensor_isr will set tablet mode and take necessary actions to disable input peripherals. CQ-DEPEND=CL:1351518 BUG=b:120050761 BRANCH=octopus TEST=make -j buildall Change-Id: I5841f6875d538a624cb888bc048f252397ab457c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350469 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* led_pwm: Add CONFIG_LED_PWM_CHARGE_STATE_ONLYEdward Hill2018-11-211-4/+14
| | | | | | | | | | | | | | | Add an option for devices that want to show only the charging state, but on all LEDs. BUG=b:119746227 BRANCH=grunt TEST=Liara LED is on when charging from either side. Change-Id: I819eaf27d3700748e47886855765c2da6f3d9eb8 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1344795 Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Battery: Use host full capacity to compute display percentageDaisuke Nojiri2018-11-161-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | The full capacity known by the host may slightly differ from the full capacity known by the EC because we notify the host of the new capacity only if the difference is larger than 5 mAh. This patch makes the EC use the host's full capacity instead of the local full capacity to compute the display percentage. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify display percentages printed by EC and power_supply_info move up synchronously on charge and the LED and the taskbar icon turn to full at the same time. TEST=buildall Change-Id: Ie695a9937a22fc7a769b82448f4600d4491935b3 Reviewed-on: https://chromium-review.googlesource.com/1330101 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* USB-PD: Supply power up to 3A + 1.5ADaisuke Nojiri2018-11-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, USB PD ports supply 3A only if there is no other active supplier. We enforce this rule even if the port is actively supplying power. That is, we drop the max current of an active port to 1.5A if a sink device is plugged to another port. This change makes USB PD ports supply 3A if the other ports are not supplying 3A. (P0, P1) and '*' indicates a sink device is plugged. Unplug both: (3A, 3A) Plug P0: (*3A, 1.5A) Plug P1: (*3A, *1.5A) Unplug P0: (1.5A, *3A) Unplug P1: (3A, 3A) Plug P1: (1.5A, *3A) Plug P0: (*1.5A, *3A) Unplug P0: (1.5A, *3A) Unplug P1: (3A, 3A) Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:115291657 BRANCH=none TEST=Performed as shown above and verify current of active port is not affected by the other port. Change-Id: I08fb04da7e0177d5e71f823fb1e47e6945ae12fc Reviewed-on: https://chromium-review.googlesource.com/1322069 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Raymond Chou <raymond_chou@compal.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* chipset: Add a host command to issue AP resetWai-Hong Tam2018-11-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | The host command is enabled by defining CONFIG_HOSTCMD_AP_RESET. It calls the chipset_reset() function, similar to the console command "apreset". BRANCH=none BUG=b:119261783 TEST=Manually tested as follow: Enabled CONFIG_HOSTCMD_AP_RESET on Cheza and flashed EC image. Copied the compiled ectool to Cheza. Ran "ectool apreset". Checked EC console: [6698.093141 chipset_reset(4)] [6698.093753 power off 5] ... the power state changing S0 -> S5 -> S0 Change-Id: I09f26f0c7ccd22905979e8b8675185505ad739eb Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1327841 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* motion_lid: Add support for setting DPTF profile based on lid angleFurquan Shaikh2018-11-151-0/+7
| | | | | | | | | | | | | | | | | | | | | | | This change adds support in motion_lid driver to set DPTF profile number based on the lid angle, only when: 1. CONFIG_DPTF_MULTI_PROFILE is selected by board 2. If board does not have a hall sensor to indicate completely flipped mode. This is done by adding another new config option CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR which will have to be selected by boards to indicate to motion_lid driver to set DPTF profile numbers. BUG=b:117844490 CQ-DEPEND=CL:1295851 BRANCH=None TEST=make -j buildall Change-Id: If695429240e0645e3d19eeb9073bd00bac580705 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1295852 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* dptf: Add support for DDPNFurquan Shaikh2018-11-151-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds Device DPTF Profile Number(DDPN) to EC_ACPI_MEM_DEVICE_ORIENTATION field to indicate to host which DPTF profile should be loaded depending upon the device mode. This is done to de-couple DPTF table loading from tablet mode flag to allow different drivers within EC to set the profile number depending upon their design. In order to maintain backward compatibility, this change treats 0 as reserved to indicate to host that it should fall back to using tablet mode switch to decide which DPTF table to load. Additionally, it provides helper function to allow drivers to set the profile number that will be returned on host query for EC_ACPI_MEM_DEVICE_ORIENTATION. It also adds a new config option CONFIG_DPTF_MULTI_PROFILE that should be selected by the boards that support multiple DPTF profiles on the host side. CQ-DEPEND=CL:1295852 BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Idfa0cfea48b9df346533342647258474fb63e86c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1295851 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* Battery: Apply full factor to full capacityDaisuke Nojiri2018-11-141-4/+1
| | | | | | | | | | | | | | | | | | | | This change introduces CONFIG_BATT_HOST_FULL_FACTOR. If it's 100, meaning no compensation, we multiply full capacity by CONFIG_BATT_FULL_FACTOR. This makes the rest of the system see consistent charge percentage behavior. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify display percentages printed by EC and power_supply_info move up synchronously on charge and turns to full at the same time. Change-Id: Ifb27c802b0cf04195ac5b426c13f9476189feb75 Reviewed-on: https://chromium-review.googlesource.com/1313468 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Battery: Get display charge percentageDaisuke Nojiri2018-11-081-0/+1
| | | | | | | | | | | | | | | | | | | | | This patch converts the actual battery charge to the display percentage using the same conversion used by Powerd. EC can use this number to control LEDs synchronously to the value on the display. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify charge LED changes to white (full) on Sona synchronously to the display percentage. TEST=Verify charge LED changes to blinking white (low) on Sona within 30 seconds synchronously to the display percentage. Change-Id: I2041cb768dee27b8dba94a32db0eb62dfa14c73b Reviewed-on: https://chromium-review.googlesource.com/1309033 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Battery: Compensate remaining charge to match full capacityDaisuke Nojiri2018-11-081-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If remaining charge is more than x% of the full capacity, the remaining charge is raised to the full capacity before it's reported to the rest of the system. Some batteries don't update full capacity timely or don't update it at all. On such systems, compensation is required to guarantee the remaining charge will be equal to the full capacity eventually. On some systems, Rohm charger generates audio noise when the battery is fully charged and AC is plugged. A workaround is to do charge- discharge cycles between 93 and 100%. On such systems, compensation was also applied to mask this cycle from users. This used to be done in ACPI, thus, all software components except EC was able to see the compensated charge. This patch is moving the logic to EC. With this and the following changes, EC can see what the rest of the system sees, thus, can control LEDs synchronously (to the display percentage). Another rationale of this move is EC can perform more granular and precise compensation than ACPI since it has more knowledge about the battery and the charger. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> CQ-DEPEND=CL:1320195 BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify charge LED changes to white (full) on Sona synchronously to the display percentage. TEST=Verify charge LED changes to blinking white (low) on Sona within 30 seconds synchronously to the display percentage. Change-Id: I4e3f70efa39e62c91cb8894b603c551cd23511aa Reviewed-on: https://chromium-review.googlesource.com/1312204 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* config: add flag for ITE EC programming over CCDVadim Bendebury2018-10-311-0/+2
| | | | | | | | | | | | | | This flag will allow to enable inclusion of the relevant source files in common directories. BRANCH=none BUG=b:75976718 TEST=none Change-Id: I037f811d0b8fd7327534f02f759eead3fd8f3de0 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1305115 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* dptf: Get rid of CONFIG_DPTF_DEVICE_ORIENTATIONFurquan Shaikh2018-10-301-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DPTF_DEVICE_ORIENTATION was added to indicate mode change to the host to allow it to read the tablet mode flag from shared EC memory and select the right DPTF table to load (if supported). However, this config seems unnecessary because of the following reasons: 1. Host sets SCI mask to indicate to the EC which events it wants to process. Thus, even if the EC sets mode change flag, it will not be notified to the host unless it supports mode change event. 2. Additionally, if host supports mode change event, but does not support multiple DPTF tables, then EC ACPI code takes care of ensuring that there is a thermal event handler present to reload tables. 3. CONFIG_DPTF_DEVICE_ORIENTATION was defined for almost all new x86 boards. BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Ic4097ae047e2d559673a321da4df86514f902993 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1292359 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Keyboard: Add keypad supportDaisuke Nojiri2018-10-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | This patch adds keypad support. Keypad layout is: page_up page_dwn home end delete / * - 7 8 9 + 4 5 6 1 2 3 enter 0 . Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:117126568 BRANCH=none TEST=buildall Change-Id: Ic53eda12f7348ff09494aa8d2c2f45080e17bae7 Reviewed-on: https://chromium-review.googlesource.com/1285293 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* driver/mag_lis2mdl: Add LIS2MDL magnetometer moduleKarthikeyan Ramasubramanian2018-10-191-0/+1
| | | | | | | | | | | | | | | Add support for LIS2MDL magnetometer module in cascade mode to LSM6DSM accelerometer module. BRANCH=none BUG=b:115587004 TEST=Collect magnetometer readings through ectool motionsense Change-Id: I06d11777543f14a557ebe6524f7ede15440f1f1e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1257504 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* driver/sensorhub_lsm6dsm: Add sensor hub support in LSM6DSM moduleKarthikeyan Ramasubramanian2018-10-191-0/+1
| | | | | | | | | | | | | | | Add support for sensor hub in LSM6DSM accelerometer module so that external sensors module like magnetometer can be supported. BRANCH=none BUG=b:115587004 TEST=Collect magnetometer readings using ectool motionsense Change-Id: Id0fd4eea56b7106a89d55925ae488af6b0300119 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1257503 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* max17055: Support alert function.Yilun Lin2018-10-121-0/+6
| | | | | | | | | | | | | | | | | | MAX17055 support 4 kinds of alert: voltage, current, state-of-charge, and temperatore. This CL enables this functionality. datasheet: https://datasheets.maximintegrated.com/en/ds/MAX17055.pdf TEST=manually test on Kukui. BUG=b:111378620 BRANCH=None Change-Id: I94126fdc541f9456c8f48f42383bc6e2188257e2 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1276006 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* tcpc: Simplify ANX74XX device selectionJonathan Brandmeyer2018-10-041-0/+7
| | | | | | | | | | | BUG=none BRANCH=none TEST=buildall Change-Id: I8eb4a9027518aa1c7af18e850984a595bd2bbe23 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1258570 Reviewed-by: Jett Rink <jettrink@chromium.org>
* bc12: rename bq24392 driver to max14637Scott Collyer2018-10-021-1/+1
| | | | | | | | | | | | | | | | | | | | The MAX14637 BC 1.2 USB charger detection chip is functionally similar to the bq24392 and can use the same driver. Rather than have 2 copies of the same driver, or a generic named driver than can be used for both chips, rename the existing bq24392 driver to max14637 as that's the BC 1.2 chip that our current designs are using. BUG=b:113267982 BRANCH=none TEST=make -j buildall Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1250031 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* led: Board-defined tables for LED statesBen Chen2018-09-271-0/+18
| | | | | | | | | | | | | | | | | Add common code to support GPIO-controlled LEDs for common battery/power states through a board-defined lookup table. BUG=b:113611642 BRANCH=none TEST=Correct charge states shown on Aleena LED Change-Id: Id3ab88965e67d170bdc875112475565ab2dca542 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1233093 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* stm32h7/nocturne_fp: Enable RDP level 1, tie it to flash protection statusNicolas Boichat2018-09-221-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prevent flash readout, using RDP field in option byte. When RDP is defined, it makes no sense to be able to unlock RO, as that'd allow flashing arbitrary RO that could read back the rest of the flash, so we just tie EC_FLASH_PROTECT_RO_AT_BOOT and RDP protection. This also means we can't unlock the flash after it has been finalized (without removing WP and using BOOT0/stm32mon to mass erase the chip). Also, in flash_mp_mcu, call stm32mon with -U, to unlock flash for read-back first (which disables RDP and triggers a mass erase if RDP was enabled). Finally, load spidev before putting releasing reset, which makes reflashing more reliable. BRANCH=nocturne BUG=b:111330723 TEST=cp flash_mp_mcu read_mp_mcu, replace stm32mon line with: "stm32mon -u -p -s ${SPIDEV} -r rb.bin" dut-control fw_wp_state:force_off => Check that read_mp_mcu works dut-control fw_wp_state:force_on ectool --name=cros_fp flashprotect enable ectool --name=cros_fp reboot_ec => RDP is now on dut-control fw_wp_state:force_off => Check that read_mp_mcu does not work anymore TEST=Add -U to stm32mon line above in read_mp_mcu, check that readback only gets blank data. TEST=In EC console, check that RDP bits are indeed not 0xaa: Before: rw 0x5200201c => 0x07d6aaf0 After: rw 0x5200201c => 0x07d600f0 TEST=flash_mp_mcu still works (does a flash erase that removes RDP protection) Change-Id: Ifbe37ecafbf23f48d4a3cc17933130b7b104b728 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1222094 Commit-Ready: Nicolas Norvez <norvez@chromium.org> Tested-by: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* aes-gcm: Adapt AES-GCM to build for ECNicolas Boichat2018-09-211-0/+3
| | | | | | | | | | | | | | | | | | | | | Update header, C code, trim unnecessary bits. Also add a test with vectors taken from BoringSSL tests. BRANCH=none BUG=b:111160949 TEST=make run-aes -j TEST=make BOARD=nocturne_fp test-aes -j flash_fp_mcu aes.bin runtest => pass (C implementation speed: 909555 us for 1000 iterations) (ASM implementation speed: 596690 us for 1000 iterations) Change-Id: Ief54a8441d26ba44de4c3ac81e203cab7472269f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1141446 Commit-Ready: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* aes: Adapt AES code to build for ECNicolas Boichat2018-09-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update header, C code, and tweak the assembly for ARMv7-M. Rename aes_now_* functions to AES_* to avoid the need for a separate wrapper. Also add a test with FIPS-197 test vectors, and speed test. BRANCH=none BUG=b:111160949 TEST=make run-aes -j TEST=make BOARD=nocturne_fp test-aes -j flash_fp_mcu aes.bin runtest => pass (C implementation speed: 11977 us for 1000 iterations) (ASM implementation speed: 5815 us for 1000 iterations) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Change-Id: I2048aae73decccb893bc1724b2617b0b902dd992 Reviewed-on: https://chromium-review.googlesource.com/1120340 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Adam Langley <agl@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* flash: Add CONFIG_FLASH_READOUT_PROTECTION config optionNicolas Boichat2018-09-141-0/+5
| | | | | | | | | | | | | | Instead of tying together CONFIG_WP_ALWAYS and RDP protection, separate the options. BRANCH=nocturne BUG=b:111330723 TEST=make buildall -j Change-Id: I905b573a900ef4dd0431666c525c951582143e09 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1222093 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* temp_sensor: Add (basic) support for TI TMP468 Temperature SensorMoritz Fischer2018-09-131-0/+1
| | | | | | | | | | | | | | | Add (basic) support for TI TMP468 a 8 Remote + 1 Local channel temperature sensor. BUG=none BRANCH=master TEST=Hook up EVM to I2C port of a STM32F072, read temperatures Change-Id: I6d6644825af04391841847c060f8ffaeff620094 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: https://chromium-review.googlesource.com/1213554 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* base_detect: Expose console command to force state.RaviChandra Sadineni2018-09-131-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In an effort to test wake sources on any given platform, this CL exposes console command to set the base state. This console command can then be invoked by autottests from the uart interface. We have two implementations for managing base status. One is interrupt driven while the other is a polling via a task. Boards current implementations then are: interrupts: lux, soraka, cheza polling task: nocturne, zoombini For forcing base connect and disconnect, interrupts: Disable interrupts and set forced base state. polling task: Stop periodic task and set forced base state. On reset, interrupts: Schedule deferred task immediately and enable interrupts. polling task: Clear forced base state and begin rescheduling periodic task. Signed-off-by: RaviChandra Sadineni <ravisadineni@google.com> BRANCH=poppy,nocturne BUG=chromium:820668, b:37223093 TEST=Tested on lux, soraka and nocturne basestate a : attaches the lid, reflected in ui. basestate d : detaches the lid, reflected in ui. basestate r : resets to the correct state. Wakes the device up on lux and nocturne and soraka. Change-Id: Iab698e103a50b8d22bf216a6f816998cb158e38a Reviewed-on: https://chromium-review.googlesource.com/1184172 Commit-Ready: Ravi Chandra Sadineni <ravisadineni@chromium.org> Tested-by: Ravi Chandra Sadineni <ravisadineni@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* ppc: Add support for nx20p3481Scott Collyer2018-09-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL is an incremental change to the nx20p348x driver to add support for the nx20p3481 ppc. Sink/source modes are controlled via the switch control register instead of gpio signals. Another difference is that the values of mode in register 0x1 are slightly different between the 3481 and 3483. The 3481 needs to use the switch status register to verify whether it's in sink or source mode. This register is now checked for both the 3483 and 3481. A delay is required for the switch status register to reflect the control setting just applied. In addition, the nx20p3481 supports Fast Role Swap (FRS). For FRS, only the detection is supported, and it's assumed that it's caused by the removal of an external charger, not an actual FRS event. BUG=b:111281797 BRANCH=none TEST=Verified on DragonEgg that port acts correctly as a sink. Have not been able to verify source operation. Change-Id: I2fb4200a5d9c3ce460e9b913a5b09441e458bb7e Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1178995 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* keyboard: Ignore refresh button at bootDaisuke Nojiri2018-09-071-3/+0
| | | | | | | | | | | | | | | | | | | | | | | Any buttons except esc, left-shift, and down-arrow are considered as 'other key' and can cancel recovery mode entry if it's pressed at boot. On some chromebooks (e.g. Grunt, Nami), the refresh key is not scanned early enough (i.e. before the power button is released). Thus, the refresh key unintentionally cancels recovery mode entry. This change makes the EC ignore the refresh key at boot. This is already done for Grunt using CONFIG_KEYBOARD_IGNORE_REFRESH_BOOT_KEY. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:114134666 BRANCH=none TEST=Put Akali in recovery mode without holding power button long. Change-Id: I57d7cb8fb320a4960125cd96d4d3ae84687a74df Reviewed-on: https://chromium-review.googlesource.com/1208229 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* tcpc: Add driver for TI TUSB422 tcpcScott Collyer2018-09-071-0/+1
| | | | | | | | | | | | | | | | | | | Initial driver for TUSB422 TCPC which is a tcpci compliant TCPC. This TCPC does not inlude a Type C mux and uses the tcpci driver for all of the methods. BUG=b:111281797 BRANCH=none TEST=Verified operation as sink on DragonEgg. Have not verified source operation, or low power/auto-toggle modes as those config options can't be enabled on ITE at this point. Change-Id: I783a5e2c4a13bc0b8fa4da4b134588382542024c Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1178994 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* host: Add dcrypto definitions that can be used by fuzzing targets.Allen Webb2018-09-071-0/+9
| | | | | | | | | | | | | | | | These definitions provide the necessary dcrypto functionality for fuzzing pinweaver. They can be built out as needed to support further fuzzing. BRANCH=none BUG=chromium:876582 TEST=make -j buildfuzztests && ./build/host/cr50_fuzz/cr50_fuzz.exe (with the cr50_fuzz CL) Change-Id: I36ce874efab5dbc59825d126f6079b7b6d0da9ef Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1180573 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ss-mux: update semantics for TCPC/MUX only used as MUXJett Rink2018-09-051-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | This converts the compile time option of CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better support draggon egg designs and reduce CONFIG complexity in general. Introduce new mux_read/write to read from tcpc_config_t or mux driver depending on new flag setting. Audited all mux drivers for any use of tcpc_read/write and updated to mux_read/write. BRANCH=none BUG=b:110937880 TEST=On Bip with CL stack: Verified by connecting DP monitor at boot; Verified plug / unplug of DP cable works; Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200062 Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* cr50: Add commands to get/set serial number bits.Louis Collard2018-09-051-0/+6
| | | | | | | | | | | | | | | | | | | | | Allocates 16 bytes of INFO1 space, in the 'board' section, and after the current Board ID data, to store the serial number data for use by zero-touch enrollment. Adds a console command to read / set this data. Adds TPM vendor commands to set initial sn data, and update it during RMA. CQ-DEPEND=CL:*657450 BUG=b:111195266 TEST=tested locally on soraka BRANCH=none Change-Id: I752aefad9654742b7719156202f29d635d2306df Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1127574 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* ppc: Add driver for Silergy SYV682x PPCScott Collyer2018-09-041-0/+1
| | | | | | | | | | | | | | | | | | | Initial version of driver for Silergy SYV682x PPC. This version of the driver does not support the Alert line from the SYV682x. Alert will need to be support for FRS and to detect OVP or OC cases that cause the power path to be disabled. BUG=b:111281797 BRANCH=none TEST=Tested on DragonEgg and verified that can attach as both sink or source port. Change-Id: Ia0450db666b50f90d6e074024bd9b89ea7d50ed6 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1159828 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Add CONFIG_GPIO_INIT_POWER_ON_DELAY_MSEdward Hill2018-09-041-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | On power on, H1 releases the EC from reset but then quickly asserts and releases the reset a second time (so that the EC comes out of reset the second time after the SPI buffers have been configured by H1). Add a delay so the EC can wait for this second reset before configuring GPIO outputs, to avoid extra output toggles. Unfortunate the timer is not set up by the time gpio_pre_init() is called, so we add a new __hw_early_init_hwtimer() function to set it up so that mdelay() worked. Without that, mdelay() hangs. BUG=b:72132384 BRANCH=none TEST=GPIO_OUT_HIGH has a single rising edge after power on (before it would rise-fall-rise) Check that mdelay(10) delays for about 10ms (actually perhaps a little more using a scope line on KB_BL_EN Change-Id: Iadc96fceb190e43ac0758f291f22e03aef81c379 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/879353 Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* usb_update: add extra command "UPDATE_EXTRA_CMD_CONSOLE_READ_*"Wei-Han Chen2018-09-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to corressponding host commands, we can read uart console buffer by following ways: A. Read from the beginning of buffer to the end of buffer: # 1. set snapshot before reading UPDATE_EXTRA_CMD_CONSOLE_READ_INIT while (true) { # 2. read 64 bytes back UPDATE_EXTRA_CMD_CONSOLE_READ_NEXT CONSOLE_READ_NEXT # 3. if (2) returns an empty string, break, otherwise, continue. } B. Mimic `dmesg -w` (keep reading new messages) while (true) { # 1. set snapshot before reading UPDATE_EXTRA_CMD_CONSOLE_READ_INIT while (true) { # 2. read 64 bytes back UPDATE_EXTRA_CMD_CONSOLE_READ_NEXT CONSOLE_READ_RECENT # 3. if (2) returns an empty string, break, otherwise, continue. } } Add argument `-l` to usb_updater2, which will perform (B). Note that the update interface will be occupied while `usb_updater2 -l` is still running, so you can't use other updater command at the same time. BRANCH=none BUG=b:112877237 TEST=test on whiskers Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I8d2010f84602ca6b84034a0cabe42ae7441614e0 Reviewed-on: https://chromium-review.googlesource.com/1177293 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* docs: Document low-battery compatibility config.Jonathan Brandmeyer2018-08-311-8/+33
| | | | | | | | | | | | | HOWTO set up an EC board such that plugging it in and turning it on Just Works. BUG=none BRANCH=none TEST=load docs in a markdown viewer for formatting. Change-Id: Ib1b31fe0a3c26ac7aad95d362f89afc25f57bf99 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1180403
* ccd_config: add flag restricting ccd openMary Ruthven2018-08-251-0/+2
| | | | | | | | | | | | | | | | | On prePVT images we wan't to allow ccd open from the console without dev mode enabled. This change adds a config option limiting ccd open. BUG=b:112861587 BRANCH=cr50 TEST=ccd open is still disabled from the console unless the password is set. Change-Id: I2adbf9b0e900a693ab513a6bf6650b320b7320d4 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1188927 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cr50: only enable rbox wakeup during sleepMary Ruthven2018-08-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | Enable rbox wakeups before entering any form of sleep. Disable them immediately on resume. Without rbox wakeups enabled during normal operation, we don't need to worry about clearing them after every rbox interrupt. In TOT we missed clearing the power button rbox wakeup. This was causing cr50 to wake up immediately after entering regular sleep. It caused a ton of pmu interrupts and prevented cr50 from staying asleep. With this change cr50 enters enters sleep and deep sleep normally. It only resumes when there's a real wakeup. BUG=none BRANCH=cr50 TEST=verify power button can still wake cr50 from sleep and deep sleep. Run firmware_Cr50DeviceState with TOT Change-Id: I56bf81c19a6e32750dc9d21be7f27188635dd662 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1180572 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Move fuzzing tests into a fuzz subfolder.Allen Webb2018-08-221-2/+4
| | | | | | | | | | | | | BRANCH=none CQ-DEPEND=CL:*664115 BUG=chromium:876582 TEST=make -j buildall && make -j buildfuzztests Change-Id: Iade5e5138f495e6b3b99ec16f1a467861ade5537 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1180179 Reviewed-by: Mattias Nissler <mnissler@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* common: add API to expose detachable "base" stateDmitry Torokhov2018-08-221-0/+6
| | | | | | | | | | | | | | | | | | On some detachables, when base is attached, we know right away that the device should transition from tablet to clamshell mode. However on other detachables we need additional information (i.e. base position) before we decide whether to transition in/out of tablet mode. For such detachables let's allow them to signal a new "base attached" switch event, so that the rest of the stack is not confused. BUG=b:73133611 BRANCH=nocturne TEST=Build and boot Change-Id: I9be3450cba52bf9f0bad8333402f68b0c7903090 Signed-off-by: Dmitry Torokhov <dtor@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1176801 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* i2c: Don't try to unwedge unpowered busses.Aseda Aboagye2018-08-221-0/+9
| | | | | | | | | | | | | | | | | | | | | | | If an i2c bus is known to be unpowered, we should not spend time trying to unwedge it. It's futile, so stop trying. This commit adds a config option, CONFIG_I2C_BUS_MAY_BE_UNPOWERED which can be defined by a board if a bus may be unpowered during runtime. BUG=b:111683988 BRANCH=nocturne TEST=Verify that unwedge attempts are skipped if the bus is deemed unpowered. Change-Id: Ice12b3957121be476ef0173a86f239f183010b47 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1182877 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* keyboard: Add CONFIG_KEYBOARD_SCANCODE_CALLBACK for board-specific hooks.Hung-Te Lin2018-08-171-0/+5
| | | | | | | | | | | | | | | | | | | | | Many devices may want board-specific keyboard hooks, for example allowing easter egg (to replace the key_special today), or to provide dynamic translation. Both can be done by having a callback whenever the key state is changed (after scancode is found). The new CONFIG_KEYBOARD_SCANCODE_CALLBACK allows boards to define their own hook keyboard_scancode_callback so the keystrokes can be either changed or monitored. BUG=b:72200093 TEST=make buildall -j BRANCH=eve Change-Id: I02e3bf5c217b2f30b942d96ecb2c493ce200638f Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1168281 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
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