summaryrefslogtreecommitdiff
path: root/include/hwtimer.h
Commit message (Collapse)AuthorAgeFilesLines
* common: provide config option for 64-bit hwtimerJack Rosenthal2019-06-241-3/+34
| | | | | | | | | | | | | | | | | | | This adds a config option, CONFIG_HWTIMER_64BIT, which when enabled expects the chip implementation to define __hw_clock_source_read64 and __hw_clock_source_set64. This allows for support of native 64-bit hardware clock when available on hardware instead of a rollover interrupt style. BUG=chromium:976804 BRANCH=none TEST=made implementation of 64-bit hardware timer for ISH (child CL), and working great Change-Id: Idb2c3bb8f804e6c83a33901c953ddd5f1ae89784 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1668055 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hwtimer: Tidy up and clarify some hw_clock commentsSimon Glass2018-09-041-3/+20
| | | | | | | | | | | | | From what I can tell the counter has to tick over at the rate of 1MHz. Update the comments to make that clear. BUG=chromium:876737 BRANCH=none TEST= make buildall -j50 Change-Id: Ib04731c10a68c544973b810cf70ce9ffba556b89 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185230
* pit: Clean up timer init codeRandall Spangler2013-06-261-2/+3
| | | | | | | | | | | | Power LED PWM now uses the same functions as the hardware timer. BUG=chrome-os-partner:20414 BRANCH=none TEST=Suspend system. Power button LED pulses smoothly still. Change-Id: Ib5ca6655d815462baaf68600ad14c4c0c680a6af Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/59838
* pit: Fix watchdog help for STM32LRandall Spangler2013-06-241-0/+7
| | | | | | | | | | | | | | | | | Clean up timer initialization code to be more general, so that we can use timer 9 for the LSB on STM32L. Then use timer 4 for the watchdog helper. BUG=chrome-os-partner:18781 BRANCH=none TEST=From EC console: timerinfo -> current time still counts up properly waitms 2000 -> prints watchdog info before rebooting Change-Id: Ib0ba496b0eadb93756dcd1841857546910baf2a9 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/59612 Reviewed-by: Simon Glass <sjg@chromium.org>
* Move STM32 timer regs struct to registers.hRandall Spangler2013-04-171-30/+1
| | | | | | | | | | | | | | | | | | | | | | | This is a struct representation of the STM32 timer registers, so belongs in registers.h instead of the platform-independent hwtimer.h. Note that there are other problems with the use of this struct. It should be volatile, and if it's a win vs. the macros we should replace ALL macro'd timer register accesses with the struct instead of just those in hwtimer.c (that is, we shouldn't do things both ways). I'll address those in a subsequent CL after testing which way generates the most compact code. No functional changes, just moving the struct definition. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms Change-Id: If29d008fb38b9cc847b69eda1ee7c05e67f6e5e7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48415 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* add a function to fast forward system timerVincent Palatin2012-08-061-0/+3
| | | | | | | | | | | | | | | | | | | When we wake up from a deep sleep mode, the system timer clock might have been stopped. We need to be able to set using another time source (e.g. the RTC). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=make BOARD=snow && make BOARD=link on Snow, on a software implementing STOP mode, check the system time is still accurate by comparing it to the wall clock. Change-Id: Ieddbb423d052c7aceb398470866b25b25a74c0a0 Reviewed-on: https://gerrit.chromium.org/gerrit/29314 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: Use a timer as the watchdog warningSimon Glass2012-07-021-0/+44
| | | | | | | | | | | | | | | | | | | | The WWDG is not ideal for this purpose, since if we fail to handle its interrupt withint 60ms or so, we get a reset. This can be a problem when we are reporting a panic, since the uart output takes a long time. Change to using timer 9, which is free, and make it print a watchdog warning after one second. BUG=chrome-os-partner:10146 TEST=manual: build and boot on snow; waitms 1200 and see that a watchdog timeout is reported correctly. See that the panic message is displayed in full without a reset happening before the end. Change-Id: Ifc3671098e1f3a7ef409b8d1fb919d22eaa90358 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26172
* Maintain timer value across sysjumps and clean up init debug outputRandall Spangler2012-05-111-2/+3
| | | | | | | | | | | This helps us keep track of how long vboot is taking on the EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9651 TEST=reboot system and look at debug log. time shouldn't start over after it jumps to image A. Change-Id: Iad86e90d42dabf1c67b2c2be80dda1151cf9a288
* Add hooks module so modules can be notified of system-level events.Randall Spangler2012-04-191-6/+3
| | | | | | | | | | | | This will be used for sleep/wake/sysjump/etc. For now it's just wired up to clock frequency changing. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=manual: use nopll command, should still work Change-Id: Iedcea5830bc18eacfd955c29b8f793aba8905dd8
* Support dynamically changing the system clockRandall Spangler2012-04-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | Add nopll command to turn off the PLL, reducing the system clock to 16Mhz. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8798 TEST=manual boot system press power button to boot x86 temps // should print all temperatures timerinfo timerinfo timerinfo // convince yourself this is counting up at about 1MHz nopll // this drops the system clock to 16MHz temps // should still print all temperatures timerinfo timerinfo timerinfo // should still be counting up at about 1MHz Change-Id: Ie29ceb17af348148bffadf63d60c1b731f4c3f6d
* Split the timer code between OS code and hardware dependant code.Vincent Palatin2012-01-251-0/+43
Preparatory work to introduce a second SoC : 2/5 The hwtimer.* files implement the driver for the SoC timer block. The timer.* files provides the OS level clock/timer functions. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on BDS, check 'waitms' and 'gettime' on the EC console. Change-Id: Icbc58d9be59ee268e2d5a94f8b20de0cabcdc91d
View Lorry Controller Status