summaryrefslogtreecommitdiff
path: root/include/module_id.h
Commit message (Collapse)AuthorAgeFilesLines
* COIL: Rename MODULE_SPI_MASTER to MODULE_SPI_CONTROLLERCaveh Jalali2021-06-031-1/+1
| | | | | | | | | | | | | | | | This renames the MODULE_SPI_MASTER to MODULE_SPI_CONTROLLER. BRANCH=none BUG=b:181607131 TEST=make buildall passes; "compare_build.sh -b all" shows no difference Change-Id: I4d33f57fd82c5b57f111c12387113dc82cebe60b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932466 Reviewed-by: Craig Hesling <hesling@chromium.org> Reviewed-by: Harry Cutts <hcutts@chromium.org> Commit-Queue: Craig Hesling <hesling@chromium.org>
* it83xx/dac: add DAC moduletim2020-02-211-0/+1
| | | | | | | | | | | | | | | | | | The DAC module has four channels. We can set output voltage when DAC channel is enabled by this driver. BUG=b:149094279 BRANCH=none TEST=The console command #dac set as follows: read: dac [ch] write: dac [ch] [voltage] [ch]:2-5, [voltage]:0(disable)-3300 Change-Id: I8e815cb5bc749467581d5f771fd6f9e0995fca3b Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2046685 Reviewed-by: Diana Z <dzigterman@chromium.org>
* npcx: Add driver support for PS/2 interfaceCHLin2020-01-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | Morphius connects the trackpoint device to EC via the PS/2 interface. To support it, we implemented the chip level PS/2 driver in this CL. The PS/2 driver can be used on all series of NPCX EC chips (NPCX5/7). BUG=b:145575366 BRANCH=none TEST=No error for "make buildall" TEST=Apply this and related CLs, connect npcx5/npcx7 EVBs to standard PS/2 keyboards and PS/2 device emulator with different channels. Verify that the PS/2 write/read transaction can keep working for several hours without issue. Change-Id: I5bae313db2d697999c2da5cf33478be2da754b8c Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1982302 Tested-by: CH Lin <chlin56@nuvoton.com> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: CH Lin <chlin56@nuvoton.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* servo_micro: Add enable_ite_dfu and get_ite_chipid console commands.Matthew Blecker2018-08-091-0/+1
| | | | | | | | | | | | | | | | | | | enable_ite_dfu: Enable direct firmware update (DFU) over I2C mode on ITE IT8320 EC chip by sending special non-I2C waveforms over the I2C bus wires. get_ite_chipid: Verify that DFU mode is enabled by querying the EC over I2C for its CHIPID1 and CHIPID2 registers. It will only respond over I2C when in DFU mode. BRANCH=none BUG=b:79684405 TEST=get_ite_chipid succeeds after enable_ite_dfu Change-Id: Ief2c12ebd902285ea3d285767deb8d35c0017592 Signed-off-by: Matthew Blecker <matthewb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1152565 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* stm32h7: enable the fast PLL on-demandVincent Palatin2018-03-051-10/+11
| | | | | | | | | | | | | | | | | | | | | | | Add a new module ID 'MODULE_FAST_CPU'. When it is enabled with clock_enable_module(MODULE_FAST_CPU, 1), switch the system clocking to the fast 400-Mhz PLL. For now, I consider that a single task/user is calling clock_enable_module(MODULE_FAST_CPU, x), so we don't need to count users (in a complicated atomic fashion). It's good enough for the current use-case and we can add the complexity later if we have a real need. BRANCH=none BUG=b:67081508 TEST=on ZerbleBarn, with follow-up CL setting clock_enable_module(MODULE_FAST_CPU,x) around the computation block, see that computations are fast and the clock goes back to HSI after. Change-Id: I2aef3ad673ddbffd6fc64c591c54297e94896fa6 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/945688 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* npcx7: WoV: Add support for Wake-on-Voice (WoV) moduleCHLin2018-02-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds the driver support for the WoV module which inludes the following files: - wov.c - wov_chip.h - apm.c - apm_chip.h It also supports the console commad "wov" which can test different configuration and audio quality by entering different parameters. The detail description of WoV console command is listed below: ------------------------------------------------------------------------ [Note]: Before changing any of settings, please make sure the operation mode is on the "OFF" state. (ie. run the command wov cfgmod off first) . > wov init Initialize WoV interface, including pin mux and interrupt registration etc. > wov mute <enable / disable > mute enable / disable. > wov cfgsrc <mono | stereo | left | right> set audio source, ex: wov cfgsrc left, means audio source from left MIC. > wov cfgbis <16|18|20|24> set audio resolution, ex: wov cfgbit 16 means audio resolution are 16bits. > wov cfgsfs <8000|12000|16000|24000|32000|48000> set audio sampling frequency rate, ex: wov cfgsfs 48000 means audio sampling rate are 48Khz. > wov cfgbck <32fs|48fs|64fs|128fs|256fs> set I2S bit clock rate, ex: wov cfgsfs 48000 and wov cfgbck 32fs means audio sampling rate are 1536Khz (32*48000). > wov cfgfmt <i2s|right|left|pcma|pcmb|tdm> set I2S but format, ex: wov cfgfmt right means audio I2S format are Right-Justify. > wov cfgmod <off|vad|ram|i2s|rami2s> set audio operation mode ,ex: wov cfgmod i2s means audio output via I2S bus. > wov cfgtdm <0~496 0~496 0~3> set TDM time slot, the first values is left channel delay counter, the second is right channel, and the 3rd is startup counting condition. (chosen LRCK raising or falling edge) . [Note: this command is just working on cfgmod equal to tdm] > wov cfgget retrieve above settings. > wov vadsens (currently not support, reserve for next version) > wov gain (0~31) set audio data gain value, ex: wov gain 10 means setting audio digital gain are 10dB. > wov cfgdck <1.0 | 2.4 | 3.0 > set digital MIC PDM clock rate. ex: wov cfgdck 2.4 means PDM clock are 2.4Mhz. ----------------------------------------------------------------------- This CL also adds the chip ID (0x24) for npcx7m7w. So the console command "version" can show the chip is npcx7m7w. BRANCH=none BUG=none TEST=No build errors for make buildall. TEST="BOARD=npcx7_evb make"; Flash the image on EVB; Test WoV function with console commands described above. Change-Id: Ief2b3e89edbd3e6d2a9d82d317a93c9f0b7a20cd Signed-off-by: Dror Goldstein <dror.goldstein@nuvoton.com> Signed-off-by: Simon Liang <CMLiang@nuvoton.com> Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/897314 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* ec_chip_mchp: Add MCHP TFDP trace debug filesScott Worley2017-12-281-0/+1
| | | | | | | | | | Add Microchip MEC17xx family trace fifo debug (TFDP) files. TFDP is a MCHP specific two pin, output only software message port. Added TFDP module ID. Change-Id: Ibe2399a8c3618b207a89552450d80b7901e85f23 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
* stm32f446e-eval: add support for stm32f446Nick Sanders2016-08-171-0/+1
| | | | | | | | | | | | | | | | | | This adds basic support for the stm32f446. This consists of: * New DMA model for stm32f4 * New clock domain support. * MCO oscillator gpio export support. * Flash support for irregular blocks. BUG=chromium:608039 TEST=boots w/ correct clock, stm32f0 also boots. BRANCH=None Change-Id: I1c5cf6ddca09009c9dac60da8a3d0c5ceedfcf4d Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/363992 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cr50: add basic rbox supportMary Ruthven2016-04-291-6/+7
| | | | | | | | | | | | | | | | | This change modifies the behavior of RBOX by blocking the key0 and key1 output, when the power button is pressed. It also adds support for printing debug statements when various RBOX interrupts are triggered. BUG=none BRANCH=none TEST=On cr50 test board verify key0 and key1 out are not asserted unless the power button is pressed. Change-Id: I67a3c1b8009279015bdc87bcf0995cffa9ab6f03 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/341470 Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: Detect debug cable and switch the PHYMary Ruthven2016-04-131-6/+7
| | | | | | | | | | | | | | | | | This adds support for RD Detection on cr50. It can be used to detect a debug device and signal the controller to switch from the AP PHY to the to CCD PHY. When RDCC1 and 2 no longer detect the debug device, then the controller switches back to using the USB to AP PHY. BUG=chrome-os-partner:50700 BRANCH=none TEST=change the value on RDCC1 and RDCC1 and check that the usb controller connects to the right PHY. Change-Id: Ice01a45a31fe1932945f89df2e3b851f4d287a17 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/338454 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* pwm: Add common initialization for PWM pinsShawn Nematbakhsh2015-12-041-9/+7
| | | | | | | | | | | | | | | | | | | Rather than having various PWM module groups initialized from various HOOK_INIT functions, group them all into a single module and initialize them all from a common function in pwm.c. BUG=chromium:563708 TEST=Manual on samus / samus_pd (with CONFIG_ADC enabled). Verify that samus fan + KB backlight control is functional and samus_pd correctly sets PWM output. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I9f9b09bfa544cd9bc6b7a867e77757dff0505941 Reviewed-on: https://chromium-review.googlesource.com/314882 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* stm32: Enable 3rd SPI interfaceGwendal Grignou2015-07-301-6/+7
| | | | | | | | | | | | | | | | Remove assumption of only one SPI master going to the SPI flash. SPI3 can be used as second SPI master. Define a new module type, SPI_FLASH, that can be turned on/off when flash is not in used without impacting other SPI masters. BRANCH=smaug BUG=chrome-os-partner:42304 TEST=Test on Ryu board. Change-Id: Ie72471cea6f0a357ffee055a610d032580a794e7 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288514
* improve enum readabilityVadim Bendebury2015-04-301-8/+8
| | | | | | | | | | | | | | A purely cosmetic change making it easier to convert numbers into enums when analyzing debug printouts. BRANCH=none BUG=none TEST='make buildall -j' still succeeds. Change-Id: I078a1d253fe928a1390cbed9baf7786a239fa01d Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268402 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* discovery-stm32f072: Enable SPI over USB tunnelAnton Staaf2014-10-231-0/+1
| | | | | | | | | | | | | | | | | Enable master control of SPI2 over USB for testing flashrom's ability to write to a SPI flash chip attached to the stm32. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j; write image using flashrom Change-Id: I7d320acd28a03e91fcd7f7d697be40f69ea7bbdc Reviewed-on: https://chromium-review.googlesource.com/218741 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* stm32-USART: Add generic stream based usart driverAnton Staaf2014-09-231-0/+1
| | | | | | | | | | | | | | | | | | | This driver can be used to access multiple usarts using an abstract stream interface. The stream interface can also be used in drivers for the host interface and USB console interface, providing a consistent API across all character stream style IO. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Icf567f0b0fa4eb0e9ad4cdb0be8edc31c937a7de Reviewed-on: https://chromium-review.googlesource.com/209671 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* module: add constant MODULE_USB_DEBUG for closed-case debuggingDominic Chen2014-08-141-0/+1
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I0fdc166f1b2664da84c7e375b0670db32887807e Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212371 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: add USB driverVincent Palatin2014-06-181-0/+1
| | | | | | | | | | | | | | | | | | Enough USB support to be able to enumerate the device and use bulk or interrupt endpoints. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:28295 TEST=with the following USB console CL, connect a Fruitpie through USB and use its console over USB. Change-Id: I37b7f3b6a754cb82ab5f940ea20122d2e16b3b5b Reviewed-on: https://chromium-review.googlesource.com/193983 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* FruitPie board configurationVincent Palatin2014-04-121-0/+1
| | | | | | | | | | | | | | | | | Add all the pins configuration to use the real FruitPie board and the USB Power Delivery configuration. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make BOARD=fruitpie Change-Id: I8c20118400cb6a2e26b541a9ee2da5b706299fcf Reviewed-on: https://chromium-review.googlesource.com/189862 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* Remove bolt, daisy, kirby, puppy, slippy boardsRandall Spangler2013-11-211-1/+0
| | | | | | | | | | | | | | | | | | These boards are unloved and unsupported. They'll never grow up to be laptops, and hardware is increasingly hard to come by. Comparable functionality is available in the other, more-loved boards. Removing these boards speeds up util/make_all.sh by 40%. (If you're not running that before every upload, you should be...) BUG=chrome-os-partner:24062 BRANCH=none TEST=build all remaining platforms and pass unit tests Change-Id: I4d8a49e4d52d7393471f1b1cbef059c8db4a4f77 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/177373
* cleanup: Consolidate module IDs into a single shared enumRandall Spangler2013-10-251-0/+52
This is tidier than every board defining its own module_id enum, and encourages standard naming of modules. A subsequent CL will do more cleanup (standardizing on MODULE_LED instead of MODULE_POWER_LED and MODULE_LED_KIRBY), but it's easier to do that as a separate CL than part of this one. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms; pass unit tests Change-Id: If0fcef284fb3aa2fa145bc9ff3d1f3f2d25a2e47 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174382 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
View Lorry Controller Status