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* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-2/+2
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Zephyr: add more compliant implementation for irq_(un)lockYuval Peress2020-11-081-9/+23
| | | | | | | | | | | | | | | | | | This change replaces the stubbed irq_(un)lock static functions defined in task.h with new functions that behave more like the Zephyr implementation of irq_(un)lock functions. This should make the migration from interrupt_(dis|en)able to Zephyr more seamless. BRANCH=none BUG=b:172060699 TEST=Added unit tests, make runtests -j, and built for various boards: eve, volteer, arcada_ish, atlas, hatch, kohaku, nocturne, samus, and scarlet Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ia7ad2b8d7d411a11699353bf5d3cc36a261fad14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2511720
* zephyr: cleanup unused _ZEPHYR_WARN_UNIMPLEMENTED macroJack Rosenthal2020-11-071-11/+0
| | | | | | | | | | | | | | Tasks are implemented now, so this can go away. BUG=b:171741620 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I0ce8d680d80eb2ac1bfa3f9ca31143f7f8924af4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2523386 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: add task shimJett Rink2020-11-051-10/+0
| | | | | | | | | | | | | | | | Provide shim/translation layer for converting platform/ec tasks into zephyr threads. Provide implementation API for platform/ec task_ API BRANCH=none BUG=b:171741620 TEST=unit test provided TEST=clean_build.sh ~/chromiumos/src/platform/ec/zephyr/tests/tasks && ../build/zephyr/zephyr.elf Change-Id: Ia2a1f808ec56a89c2a08df9de318edb1b6e9f869 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518665 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: punt implementing some task functionsJack Rosenthal2020-11-031-0/+21
| | | | | | | | | | | | | | | | This makes it so that we have to ifdef out less tasks code when shimming, adding runtime warnings about the code we are skipping. BUG=b:171741620 BRANCH=none TEST=compile power sequencing code, observe warnings Change-Id: I5e6686d00c04654afe458eef2690d8f6c5bd6639 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2503787 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Zephyr: add support for irq_(un)lockYuval Peress2020-10-301-0/+17
| | | | | | | | | | | | | | This change is added when building non-zephyr builds and adds macros to mock out zephyr's irq_lock and irq_unlock and route those calls to interrupt_disable and iterrupt_enable. BRANCH=none BUG=b:171302975 TEST=none Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I79fcbdc48963fb800781a1a0b77ac261621480a2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508415
* Zephyr: add support for shimming the mutex structYuval Peress2020-10-301-2/+14
| | | | | | | | | | | | | | | | | This changes creates a common mutex_t which can be used in both platform/ec and zephyr code. It also adds an empty #define for k_mutex_init(mutex) such that the zephyr function can be used without affecting platform/ec. BRANCH=none BUG=b:171896666 TEST=Built platform/ec for boards: volteer & eve Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I6a711252732697ab120515d916bf388fdcd9544f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508414 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* zephyr: add strtoi shim functionJett Rink2020-10-121-1/+3
| | | | | | | | | | | | | | | | | | | | When I compile volteer, I only need one stdlib style function and it is something we made ourselves. There is a long verion in Zephyr and long and int are the same size for 32-bit MCUs so we just need to forward the implementation. Also remove compilation of our existing platform/ec util file since Zephyr already provides these basic stdlib like functions. BRANCH=none BUG=b:169935794 TEST=Run Zephyr image on Volteer using this function. TEST=Build and run posix-ec target as well Change-Id: Idb4ea4d5e0a6ad3da8ddc5781e16aeb6e666d85f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444371 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* it83xx: read_clear_int_mask() read and clear interrupt bit.Dino Li2020-09-241-4/+4
| | | | | | | | | | | | | | | | | | This change pulled the operation of interrupt disable into read_clear_int_mask(). Because riscv core supports instruction csrrc to atomic read and clear bit in CSR register. With this change, we won't need to separate operations of reading and clearing interrupt bit on riscv core. BUG=none BRANCH=none TEST=read_clear_int_mask() is able to disable interrupt and return saved interrupt bit on both nds32 and riscv cores. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I871aab747b950b7948cdeb7911fcf8c09d55df5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2419739 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tests: reset the PD task before every test caseJett Rink2020-07-101-1/+5
| | | | | | | | | | | | | | | | | In order to isolate each test and make each test run from a clean state, reuse the TASK_RESET_DONE event to signal to the test code that we should just jump back to the beginning of the PD task BRANCH=none BUG=none TEST=see that tests are reset in child CLs Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I3c0408ab0dbc3ad3a26f17aadbda1577ffc7d32f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290650 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* core/riscv-rv32i: add in_soft_interrupt_context()Tzung-Bi Shih2020-06-031-0/+5
| | | | | | | | | | | | | | BRANCH=none BUG=b:146213943 BUG=b:156218912 TEST=1. make BOARD=asurada 2. flash_ec --board=asurada --image build/asurada/ec.bin 3. (EC console)> version Change-Id: If8df1fb768ea9c83f025d8bd17010481389d7aa1 Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2217596 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* npcx: Add driver support for PS/2 interfaceCHLin2020-01-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | Morphius connects the trackpoint device to EC via the PS/2 interface. To support it, we implemented the chip level PS/2 driver in this CL. The PS/2 driver can be used on all series of NPCX EC chips (NPCX5/7). BUG=b:145575366 BRANCH=none TEST=No error for "make buildall" TEST=Apply this and related CLs, connect npcx5/npcx7 EVBs to standard PS/2 keyboards and PS/2 device emulator with different channels. Verify that the PS/2 write/read transaction can keep working for several hours without issue. Change-Id: I5bae313db2d697999c2da5cf33478be2da754b8c Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1982302 Tested-by: CH Lin <chlin56@nuvoton.com> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: CH Lin <chlin56@nuvoton.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
* task: Add task_enable_task() and task_disable_task()Yilun Lin2019-08-221-0/+12
| | | | | | | | | | | | | | | Provide API to disable/enable tasks. All the tasks are marked enabled after hook_task starts. We need a way to control the tasks when it shouldn't run in some states. BUG=b:136240895 TEST=Disable the tasks and see it won't be scheudled when task_wake(). BRANCH=None Change-Id: I2662f3619b22ed28387fe3c783001ba2a745620c Signed-off-by: Yilun Lin <yllin@google.com> Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753562
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* minute-ia: move IRQ definitions to common filesJack Rosenthal2019-06-111-0/+17
| | | | | | | | | | | | | | | | | | | | By moving the __irq_data extern declaration into link_defs.h, the struct can be used in more than just interrupts.c. In addition, this provides a common struct definiton for IRQ definitions consisting of an IRQ number, the assigned routine, and a handler function, which is a fairly common way to store IRQ definitions. BUG=none BRANCH=none TEST=arcada ISH functions as normal Change-Id: Idbb5780ae965faeade74cfe319364f61dd933d9e Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1649375 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* tasks: convert TASK_EVENT_CUSTOM macro to bitJett Rink2019-04-241-2/+2
| | | | | | | | | | | | | | | | | | | | | We should ensure that all custom task definition are non-zero and fit with the globally defined events. Add compile time check and change semantics to specify bit number (instead of making all callers use the BIT macro). This also fixes an error with TASK_EVENT_PHY_TX_DONE for ITE being 0. The bug that made that happen hasn't landed on any firmware branches that use it though. BRANCH=none BUG=none TEST=builds Cq-Depend:chrome-internal:1178968,chrome-internal:1178952 Change-Id: I5e1d1312382d200280c548e9128e53f4eddd3e61 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1570607 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* USB PD: Re-discover port partner when a contract was in placeDiana Z2019-04-181-1/+4
| | | | | | | | | | | | | | | | | | | | | | When the pd_task starts up with an explicit contract previously in place, re-check the partner's identity. This will happen automatically when we EC reset into RO since pd_chipset_startup sets the flag, but for a RO->RW jump the flag needs to be set again. Additionally, exit DP modes before sysjumping, in order to not confuse the port partner with a second enter mode when it had previously been in that mode. BUG=b:125552060 BRANCH=octopus TEST=on unlocked octopus board, plugged in powered HDMI dongle from hibernate state and confirmed display worked after RO->RW jump. Also turned off software sync and confirmed console "sysjump" worked. Change-Id: Idcde6f04deeb8f409a9b4d0a4b3fc924bdb644c7 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1506434 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ish: wait for heci bus instead of errorJett Rink2019-04-101-1/+4
| | | | | | | | | | | | | | | | | | | | Callers of send_heci don't need to all implement retry logic for a unavailable bus. Ensure the send call blocks until the bus is ready. This is not a complete fix for b:129937881 since I still saw issue with this change. This change is still worthwhile. BRANCH=none BUG=b:129937881 TEST=Bus failure between ISH and AP is greatly improved with this change. Change-Id: Ia493b28146b30813fd737da341e7277e130ad619 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1554844 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-261-8/+8
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: Include compile_time_macros.h when neededGwendal Grignou2019-03-261-0/+1
| | | | | | | | | | | | | Include compile_time_macros.h to files that will use BIT macro. BUG=None BRANCH=None TEST=unit tests. Change-Id: I9d44f4b588620f6770f8d522d422f5dd0d237903 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1525156 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ec: Add a task_reset function.Louis Collard2019-01-261-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | This adds a generic task_reset function that can reset any task that declares it supports being reset. Tasks that support reset must call task_reset_cleanup() on startup, and be prepared to perform any cleanup / re-initialisation necessary. The task can control when it can be reset using task_enable_resets() and task_disable_resets(). A task can request another task be reset at any point; if the reset cannot happen immediately, it will be queued and will happen at the earliest point allowed by the task to be reset. Task resets can be blocking or non-blocking, as specified by the requestor. BUG=b:73771117 BRANCH=none TEST=manual testing on local device Change-Id: I972184381b005c342374fa16c4dce2ac83e89854 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230394 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* tcpm: wait for TCPC to init upon first tcpc accessJett Rink2018-07-251-1/+3
| | | | | | | | | | | | | | | | | | | | | | | Most TCPCs need to re-initialize after coming out of low power mode. TCPCs can NACK before they are fully reinitialized. Now upon any failed TCPC access where we think the device is in low power mode, we wait until we finish performing a tcpc_init and retry the request. BRANCH=none BUG=b:79529011 TEST=run 'ectool usbpdmuxinfo' and while PS8751 is in low power mode. See that is responds with good data now (where as it always returned an error before since it was nacking the i2c calls while it was waking up) Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I50b3835484dabafecc3130588019fcbcf6ccf37e Reviewed-on: https://chromium-review.googlesource.com/1143710 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* npcx: i2c: Add support for npcx7 series ecMulin Chao2017-05-041-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL added support for 8 i2c controllers and 11 i2c ports in npcx7 series ec. we also added i2c-npcx5/7.c and moved the functions related to chip family to them. (Such as i2c_port_to_controller(), i2c_select_port() and so on.) Note the layout and bit position of i2c registers which are accessed in these functions are irregular between npcx5 and npcx7. We think abstracting them from i2c.c is easier to maintain. In this CL, we also modified the checking rule for I2C_PORT_COUNT in task.h in order to prevent compiler error. So far, the ECs besides stm32 only use TASK_EVENT_I2C_IDLE to wait for i2c hardware completes its job. Put (I2C_PORT_COUNT > TASK_EVENT_MAX_I2C) checking rule for all ECs seems not suitable. It also includes 1. Remove useless NPCX_I2C_PUBIT macro function. 2. Remove useless NPCX_PWDWN_CTL_COUNT in registers.h. 3. Add CGC_OFFSET_I2C2 and CGC_I2C_MASK2 to power down the other 4 i2c controllers of npcx7 ec. BRANCH=none BUG=none TEST=No build errors for all boards using npcx5 series. Build poppy board and upload FW to platform. No issues found. All 8 i2c controllers and 10 ports (npcx796f supports PSL.) passed i2c stress tests on npcx796f evb. Change-Id: I2b5076d21bcd0f8d17fd811cad2ff7bd200b112a Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/487541 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32f446e-eval: add support for stm32f446Nick Sanders2016-08-171-3/+16
| | | | | | | | | | | | | | | | | | This adds basic support for the stm32f446. This consists of: * New DMA model for stm32f4 * New clock domain support. * MCO oscillator gpio export support. * Flash support for irregular blocks. BUG=chromium:608039 TEST=boots w/ correct clock, stm32f0 also boots. BRANCH=None Change-Id: I1c5cf6ddca09009c9dac60da8a3d0c5ceedfcf4d Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/363992 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Don't declare functions inline that aren't always defined as suchPatrick Georgi2016-02-021-1/+1
| | | | | | | | | | | | | | | | | | gcc 5.2 bails out on an inline declaration that isn't followed up with a definition in the same compilation unit. BRANCH=none BUG=chrome-os-partner:49517 TEST=compile tested with coreboot's toolchain. samus, oak and others that failed now build. Change-Id: Ic9c28fc12c80e24ea0dbf85f35846fd6a0b56a2d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/324970 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* nds32: use INT_MASK instead of GIEDino Li2015-08-201-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | When there is an interrupt event, N8 CPU will save PSW register to IPSW register and clear GIE then jump to interrupt service routine. N8 will restore PSW from IPSW after "iret" instruction (the above are purely hardware mechanism). Nested interrupt will occur if we set GIE again in interrupt context. symptom: power button pressed while LID open -> exception or unknown reset. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. Manually pressed power button x200. 2. Console "eflash" erase and write eflash OK. Change-Id: Ic04a23d473ebc6417dffea814a27583cb8d63a1f Reviewed-on: https://chromium-review.googlesource.com/289437 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* hooks: Move HOOK_INIT to after task switching.Aseda Aboagye2015-07-131-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | This commit changes the way in which tasks are started. Instead of having all tasks marked as ready to run upon initialization, only the hooks task is marked as ready to run. HOOK_INITs are now run at the beginning of the hooks task. After the HOOK_INITs, the hooks task calls back to enable the rest of the tasks, reschedules, and proceeds as usual. This also allows the removal of checks for task_start_called(). BUG=chrome-os-partner:27226 BRANCH=None TEST=Built and flash EC image for samus and verified that EC boot was successful as well as AP boot. Additionally, verified that charging, keyboard, tap-for-battery were all still functional. TEST=make -j buildall tests Change-Id: Iea53670222c803c2985e9c86c96974386888a4fe Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/283657 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* cortex-m0: Add deferred schedulerAlexandru M Stan2015-02-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If 2 interrupts happen at the same time, there is a chance that the nested interrupt will not call svc_handler when it needs to. In extreme cases this could lead to tasks not getting woken up when they're supposed to and watchdog resetting. The reason stuff worked was because there were enough other interrupts around to eventually call the scheduler and switch to the ready task. This change modifies the interrupt calls to not call the scheduler directly (because in nested interrupt situation this causes problems), but defer the call to scheduling until after the irq finishes by triggering a low priority interrupt which will for sure call svc_host at the end. The PendSV irq was used for this purpose. BUG=chrome-os-partner:36193 TEST=No more SPI errors caused by scheduler problems TEST=usleeps now are more accurate, they're guaranteed to not take forever now BRANCH=veyron Change-Id: I42acde6b3eb7be2540a0de9a8562dee2ea2be7ab Signed-off-by: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/248902 Tested-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* samus: pd: fix potential junk at end of tx transmissionstabilize-6670.BAlec Berg2015-01-091-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix potential junk at end of PD TX transmit by adding to the DMA transmit complete interrupt a blocking wait for SPI to finish and then immediately disable SPI clock. This means we block in an interrupt function for approximately 45us at the end of every transmit. But, this is the highest priority thing going on anyway. Note, there is still a potential for junk if both ports are transmitting at the same time and finish very close to the same time. BUG=chrome-os-partner:34600 BRANCH=samus TEST=load onto samus and test communications with zinger. tested specifically with an old zinger CL, https://chromium-review.googlesource.com/#/c/226118/11, which watchdogs when samus has junk at end of transmit. Tested without this CL and verified we could never successfully flash zinger over PD due to this watchdog and verified on scope presence of junk. Then tested with this change and was able to successfully flash zinger using ectool on both ports in both polarities. Change-Id: If0cd9ab0551d36a7d7dc10232b6476dd56735972 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/239244 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32f: Add DMA interrupt handlers for channel 1 to 3Vic Yang2014-10-211-1/+2
| | | | | | | | | | | | | | | | | | We already have interrupt handlers for channel 4 to 7. We need channel 3 for the new Ryu boards. Add the handlers for channel 1 to 3. Also, instead of copy-pasting interrupt handlers, define a macro and declare interrupt handlers with it. BRANCH=None BUG=chrome-os-partner:32660 TEST=make buildall TEST=Check PD communication on the new Ryu board (with other CLs to enable the new boards.) Change-Id: I51d6bd16739f31a7efbeb4ec19bb91a1546fe21d Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/224175 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* IRQ list support for enabling specific IRQs without common runtimeVic Yang2014-06-191-1/+7
| | | | | | | | | | | | | | | | | | | This adds back DECLARE_IRQ() support when building without common runtime. With this, we can enable only a subset of IRQs and avoid linking in other unused IRQ handlers. Note that after this change, all boards without common runtime need to have a ec.irqlist file. BUG=None TEST=Build Keyborg and check it still works. TEST=make buildall BRANCH=None Change-Id: If68062a803b9a78f383027a1625cf99eb3370d3f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/203264 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Keep IRQ_HANDLER macro when building without common runtimestabilize-5944.Bstabilize-5943.BVic Yang2014-06-101-0/+1
| | | | | | | | | | | | | | | | | | | | Without common runtime, we need to use IRQ_HANDLER to define IRQ handlers. Previously IRQ_HANDLER is only implemented in irq_handler.h which is not included by task.h when building without common runtime. This causes problem when we want to use code that includes task.h and uses IRQ. By adding IRQ_HANDLER to task.h, we don't need to include irq_handler.h in any case, and thus avoid that problem. BUG=None TEST=make buildall TEST=include task.h instead of irq_handler.h. Check Keyborg still builds. BRANCH=None Change-Id: I1213506132025fc656630565f58686b9e7de940c Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/203084 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cortex-m: store FPU regs on context switchAlec Berg2014-04-181-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added storing of FPU regs on context switches when CONFIG_FPU is defined. On context switches, EXC_RETURN[4] is checked in order to tell which tasks have used floating point and which have not. The FPU regs are only stored on task stacks for tasks that use the floating point. Tasks that use floating point will therefore require roughly an additional 128 bytes of stack space, and context switches will take about 32 clock cycles longer for each task involved in the switch that uses FP. For tasks that don't use floating point, the stack usage actually decreases by 64 bytes because previously we were reserving stack space for FPU regs S0-S15 on every context switch for every task, even though we weren't doing anything with them. If a task only uses the FPU for a brief window, it can call task_clear_fp_used() in order to clear the FP used bit so that context switches using that task will not backup FP regs anymore. BUG=chrome-os-partner:27971 BRANCH=none TEST=Tested on glimmer and peppy. Added the following code, which uses the FPU in both the hooks task and the console task. Note, I tested this for a handful of registers, notably registers in the group s0-s15 which are backed up by lazy stacking, and registers in the group s16-s31 which are backed up manually. float dummy = 2.0f; static void hook_fpu(void) { union { float f; int i; } tmp; /* do a dummy FP calculation to set CONTROL.FPCA high. */ dummy = 2.3f*7.8f; /* read and print FP reg. */ asm volatile("vmov %0, s29" : "=r"(tmp.f)); ccprintf("Hook float 0x%08x\n", tmp.i); /* write FP reg. */ tmp.i = 0x1234; asm volatile("vmov s29, %0" : : "r"(tmp.f)); } DECLARE_HOOK(HOOK_SECOND, hook_fpu, HOOK_PRIO_DEFAULT); static int command_fpu_test(int argc, char **argv) { union { float f; int i; } tmp; /* do a dummy FP calculation to set CONTROL.FPCA high. */ dummy = 2.7f*7.8f; /* read and print FP reg. */ asm volatile("vmov %0, s29" : "=r"(tmp.f)); ccprintf("Console float 0x%08x\n", tmp.i); if (argc == 2) { char *e; tmp.i = strtoi(argv[1], &e, 0); if (*e) return EC_ERROR_PARAM1; /* write FP reg. */ asm volatile("vmov s29, %0" : : "r"(tmp.f)); } else { task_clear_fp_used(); } return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(fputest, command_fpu_test, "", "", NULL); When you call fputest 5 from EC console before this CL, then on the next HOOK_SECOND, the value of register s29 is 5, instead of 0x1234 because register s29 is not saved on context switches: Hook float 0x00001234 > fputest 5 Console float 0x00001234 Hook float 0x00000005 When this CL is in use, the register holds the correct value for each task: Hook float 0x00001234 > fputest 5 Console float 0x00001234 Hook float 0x00001234 > fputest Console float 0x00000005 Hook float 0x00001234 Change-Id: Ifb1b5cbf1c6fc9193f165f8d69c96443b35bf981 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/194949 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* lm4: Use a special task event for ADC conversionsChromeOS Developer2014-03-261-1/+3
| | | | | | | | | | | | | | | | | This prevents other task events from continuing the ADC conversion prematurely; potentially leading to a panic if the conversion interrupt occurs after the ADC has been powered down. BUG=chrome-os-partner:26919 BRANCH=rambi TEST=Perform ADC conversions while running a deferred function calling itself on a 10mSec delay. Verify no panics after ~6 hours. Change-Id: Ic3894849c154b3f058e812b2da816e7cffb12cbf Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/191302 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cortex-m: Add task_wait_event_mask() helper functionChromeOS Developer2014-03-261-1/+20
| | | | | | | | | | | | | BUG=chrome-os-partner:27180 BRANCH=rambi TEST=Tested indirectly via subsequent patches to use this call in the adc and i2c handlers for the lm4. Change-Id: I53501fdf47d606ea6c7705facb66e945e25d9745 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/191300 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* make the common runtime optionalVincent Palatin2014-03-221-0/+4
| | | | | | | | | | | | | | | | | | | | | In order to achieve really tiny firmwares, make our runtime (tasks, hooks, muxed timers, GPIO abstraction ...) optional. Add 2 new build options for it : CONFIG_COMMON_RUNTIME and CONFIG_COMMON_GPIO which are enabled by default, and ensure all the source files are built according to the right configuration variable. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall build a minimal board with no runtime. Change-Id: Icb621cbe0a75b3a320cb53c3267d6e578cd3c32f Reviewed-on: https://chromium-review.googlesource.com/189403 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* force the compiler to use a valid register allocation for irq handlersVincent Palatin2014-03-111-26/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we are calling the re-scheduling routine at the end of an irq handling routine, we need to ensure that the high registers are not currently saved on the system stack. On Cortex-M3/M4, the compiler is normally doing tail-call optimization there and behaving properly, but this fixes the fact that insanely large interrupt handling routines where sometimes not compile and not running properly (aka issue 24515). This also prepares for one more core-specific DECLARE_IRQ routine on Cortex-M0. Note: now on, the IRQ handling routines should no longer be "static". Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:24515 TEST=make -j buildall revert the workaround for 24515, see the issue happening only without this CL. Change-Id: Ic419369231925568df05815fd079ed191a5446db Reviewed-on: https://chromium-review.googlesource.com/189153 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* emulator: Move trace dump to a separate moduleVic (Chun-Ju) Yang2014-01-221-0/+5
| | | | | | | | | | | | | | | The implementation of trace dump has little to do with task scheduling, so we should move it to a separate module for cleaner code. This requires exposing some emulator-specific task info, as defined in host_task.h. BUG=chrome-os-partner:19235 TEST=Pass all tests BRANCH=None Change-Id: Iba9bc0794a4e1dd4ddb92b98345162b398fa6a8d Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/183238
* ite: Port OS layer to Andestar v3m architectureVincent Palatin2013-12-101-0/+9
| | | | | | | | | | | | | | | | | This will be used to support ITE IT8380 chip which contains an Andes N801 core. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:23574 TEST=make BOARD=it8380dev Change-Id: I91f9380c51c7712aa6a6418223a11551ab0091ce Reviewed-on: https://chromium-review.googlesource.com/175480 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Standardize concatenation macrosRandall Spangler2013-07-241-5/+4
| | | | | | | | | | | | | | | | | | To create a token by concatenating already-defined macros and new text, it's necessary to use multiple levels of macro. We'd already done that in several places in the code such as STM32_CAT; this now standardizes it into a single place. BUG=chrome-os-partner:18343 BRANCH=none TEST=Build all platforms; examine ec.RO.map to see that irq_*_handler and prio_* symbols evaluated the same as before. (Other macro evaluations would simply fail to compile if they were incorrect, since the concatenated tokens wouldn't fully expand.) Change-Id: Ic9bf11d27881a84507fe7b6096dab6217c6c6dc7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63231 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* link: Fix overflow in hibernate time calculationRandall Spangler2012-11-011-0/+3
| | | | | | | | | | | | | | | | | | The time out value passed to task_wait_event() is signed 32-bit and thus waiting for 24 hours will cause overflow. Limit max wait time. BUG=chrome-os-partner:15797 BRANCH=link TEST=Disconnect AC, shut down system, and close lid. From ec console, do 'hibdelay 8000' and then wait 2.5 hours. EC should have hibernated. (8000 is more than twice the max time for task_wait_event()) Change-Id: I5fa505554182e8bad6399c12a382ff71bb123d8f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/37095 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Clean up core routines - cpu, task, watchdogRandall Spangler2012-10-291-58/+113
| | | | | | | | | | | | No functional changes. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system Change-Id: I55cf9c60e92177fd441614a8f9fce2d3acca3d0e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36706
* Prevent I2C interrupts from consuming pending task eventsBill Richardson2012-09-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This manifested as the lightbar task missing transitions between CPU states. The underlying cause was that when a task talks over the I2C bus, the I2C communication was using the task scheduler to wait for an interrupt to signal completed I2C traffic without blocking the other threads, but while doing so it was not preserving pending events. This CL seems to fix it. BUG=chrome-os-partner:12431 BRANCH=all TEST=manual The original bug is tricky to reproduce without adding some delay to the I2C task code, but you can do it. Boot the CPU, then from the EC console repeatedly alternate these two commands: lightbar seq s0 lightbar seq s3 You should see the lightbar pattern turn off and on, but occasionally you'll type the command and the EC won't change the pattern. With this change applied, it should *always* work. Change-Id: Ie6819a4a36162a8760455c71c41ab8a468656af1 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/33805 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Track current task directly instead of computing from stack pointerRandall Spangler2012-09-091-8/+1
| | | | | | | | | | | | | | | This is a precursor to supporting task-specific task sizes. I've benchmarked this vs. the current stack pointer method; no measurable performance difference. BUG=chrome-os-partner:13814 TEST=boot EC; taskinfo; if it boots and doesn't print garbage, it worked BRANCH=all Change-Id: Ia326c3ab499ac03cce78dbacaa52f735601a171e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32603 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usleep() chains to udelay() if called before task_start()Randall Spangler2012-05-291-6/+10
| | | | | | | | | | | ...so I can use usleep() for eeprom delays in the CL coming next... Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:10200 TEST=if it boots, it worked Change-Id: I564578f24452a4ac39abe79ff28cfff4b665ad2f
* Watchdog fixesRandall Spangler2012-04-251-0/+9
| | | | | | | | | | | | | | | | | | 1) When frequency changes, reload the watchdog timer right away, or it may expire before the next reload. (Only matters when re-enabling the PLL.) 2) Split out the timer/task debug output used by the watchdog into their own routines, instead of assuming it's safe to call the command handlers. Also make the flushes in those print routines safe to call from interrupt level. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=waitms 1500; should print task dump again Change-Id: I07e0ed24a526ae499566dab0bbeb0f5755cd5be6
* Implement task profilingRandall Spangler2012-04-241-1/+13
| | | | | | | | | | | | | | Also tracks the distribution of IRQs, so we can see what's triggering interrupts. Task profiling is optional, enabled via CONFIG_TASK_PROFILING. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7464 TEST=taskinfo Change-Id: I266f2b49bff9648cda446210d5a302b460fec244
* Re-enable watchdog in watchdog_reload()Randall Spangler2012-04-121-0/+9
| | | | | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8971 TEST=manual waitms 1500 (see watchdog trace) waitms 1500 (should see watchdog trace again) waitms 3000 (should see trace, then system should reboot) Change-Id: Ieb5009d7a7bc9e1ed795e58efb0cb44a1eeb2706
* Change task messages to eventsRandall Spangler2012-04-061-47/+49
| | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7461 TEST=manual make BOARD={bds,link,daisy} make tests flash link system and make sure it boots Change-Id: I1241a1895c083e387e38ddab01ac346ca4474eb9
* Support warm reboot from one EC image to another.Randall Spangler2012-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | This is necessary at init-time for verified boot to jump from RO to one of the RW images. It's also used by factory EC update to update one image and then jump to the updated image to finish the update. In this case, the x86 does NOT reboot. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8449 TEST=manual 1) power on x86 and log in 2) sysjump a --> system is in a; x86 has not rebooted 3) sysjump ro --> system is back in RO; x86 has not rebooted 4) reboot -> system is in RO; x86 HAS rebooted Change-Id: I9dbadcf9775e146a0718abfd4ee0758b65350a87
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