| Commit message (Collapse) | Author | Age | Files | Lines |
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Define DEBUG_PRINT_FLAG_AND_EVENT_NAMES to print flag names when
set and cleared, and event names when handled by tc_event_check().
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: If7c294213af47b8277b01b9898583ceb2559e7f9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284259
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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After CL:2208221, the check for the PD_CMD task no longer trigger,
so we end up not calling suspend on our TCPC ports.
We want to continue to suspend, which will apply CC open in
TCPMv2 for a cooperative shutdown
Also, correct override keyword usage for board_get_usb_pd_port_count
since I had to touch those definitions to make IS_ENABLE work
BRANCH=none
BUG=b:160243292
TEST=See that software sync reboot, applies CC open (and browns out system)
Change-Id: I00bf08c7d347441d77834e2c5122a09ca2316280
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276318
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Adds EC_CODEC_I2S_RX_RESET to reset I2S RX because it is not sure that
the I2S RX is always disabled when the kernel booting. For example, it
will keep enabled if the kernel crashes while cros_ec_codec is used.
BRANCH=none
BUG=b:158316196
TEST=Able to reset I2S RX from the kernel.
Change-Id: I461e5a3c73a4066a9ceb097fc5320aef98d81db4
Signed-off-by: Yu-Hsuan Hsu <yuhsuan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284503
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Tested-by: Yu-Hsuan Hsu <yuhsuan@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Commit sha 57b95363c05bdab7b7e57d553a9514128393247d
Reverting a CL that was a temporary fix while a real
solution was found. This will now be implemented with
the following CLs
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282691
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282699
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I76b92388f5ee5bae4bdb945a82f18eb3df3ab1fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284728
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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With TCPCI being changed to allow TCPM to control
the DBG_ACC enable instead of the TCPC, it is
probably a good idea to actually toggle the bit
for any TCPC that uses this signal for internal
logic.
BUG=b:160253746
BRANCH=none
TEST=verify DBG and nonDBG attaches
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ifb91afa0127689e0ca371e64495d80f30bf93c26
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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BRANCH=none
BUG=none
TEST=builds
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: I2beaa8b74b313d225b9166f324d2b44cb0aa59ce
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276317
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Child run functions execute before parent fun functions, not after. Make
additional minor corrections and clarifications.
BUG=none
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ic1b345e42269c9086f77bb6d9fe54d3f91b1002e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277210
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:156749387
BRANCH=None
TEST=make buildall -j
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I8ecffd3084de472ec3d145c3ff69df1ca2d89a56
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278562
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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The driver function to set FRS enable only exists if
CONFIG_USB_PD_FRS_PPC is enabled, so we must also make its callers
conditional in the same way. For consistency, also revise the TCPC
FRS code paths to be conditional.
BUG=b:146393213
BRANCH=None
TEST=make buildall
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I3fb14c711dd2abdf6ef77d469b2103f37daac182
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276125
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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De-duplicate strings in PPC drivers. Saves 312 bytes on Volteer.
Average flash increase of 211 bytes.
BUG=b:158572770
BRANCH=none
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I5ca5c935f974b04216ce4d90e6f6d6b9103e8b75
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278586
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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The TCPC on zork appears to enable Vbus sourcing some
of the time when we come out of auto-toggle. It looks
like about a 60ms delay before it is enabled. We then
go to AttachWait.SRC and since the exit condition to
get to Attached.SRC is a debounced/valid Attached.SRC
CC and Safe0V, it has to be disabled manually in order
to move to Attached.SRC
BUG=b:160227699,b:160253746
BRANCH=none
TEST=dut-control servo_v4_role:snk should attach
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I1dfc5d2536aaa4d7a5ffc7bbb52c647b15764196
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276463
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
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The old declaration with void is incompatible with the use of
tcpci_tcpc_fast_role_swap_enable in the one driver that currently
implements that function, causing build failure when
CONFIG_USB_PC_FRS_TCPC is enabled and using the nct38xx TCPC driver.
Because the underlying function may fail, walk up the stack and make all
users capable of failure as well (however the top level user currently
ignores the result).
BUG=b:146393213
BRANCH=None
TEST=make buildall
Change-Id: Ib8cabf4a435731ed804a3cc4696dfea97eef3c98
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276124
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Create a separate module for representing Thunderbolt mode which decides
whether and how we can enter into Thunderbolt alternate mode.
Modify the Device Policy Manger (usb_pd_dpm.c) to first check if the
port partner and cable is a Thunderbolt Compatible. If not, continue the
rest of the PD flow undisturbed.
BUG=b:148528713
BRANCH=none
TEST=1. Attach Thunderbolt dock, DUT should enter Thunderbolt mode
2. Attach Type-C dock, DUT should enter DP mode
3. Attach DP dongle, DUT should enter DP mode
Change-Id: I369eb6337144676996c9d94a412eec060eacd273
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2250488
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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BUG=b:151802370
TEST=with CL:2189624, verify bc12 detection works correctly
BRANCH=master
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I0fee8e7309178be4d933ed5c246ea107ca5931bf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2117871
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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this adds a config option for the ps8815 to override the TCPCI Device
ID field based on the chip hardware revision reported in vendor
defined registers. early ps8815 A1 firmware still reports the same
Device ID value as the A0 chip which makes the two chips
indistinguishable using standard methods. so, we check a vendor
defined register to distinguish the two parts and "patch" the Device
ID. newer ps8815 firmware will correct this, so after we have flushed
out early firmware, we can disable this override feature.
BRANCH=none
BUG=b:158857815,b:159289062
TEST=reflashed FW on ps8815 A0 and A1
Change-Id: I2db3150740c15a77836dea0e9db72e5d99fdc050
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2254992
Tested-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Some faft_pd tests need to query which state the pe state
machine is in.
BRANCH=none
BUG=b:159682253
TEST=make -j buildall
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I1782761328212f45bd690fd7285f016cf9285538
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2264484
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1. Separated the common functions needed to check for port/cable's
Thunderbolt mode compatibility back into TCPMv1.
2. Refactored the common Thunderbolt mode functions using pd_cable
structure for mode information by adding
a. Generic function that returns the Discover Mode response of
specified SVID.
b. Thunderbolt specific functiion that returns Discover Mode
response of Intel SVID.
3. Removed the redundant pd_cable structure from DRP state machine
policy engine.
BUG=b:158294748
b:150611251
BRANCH=None
TEST=1. Able to enter into Thunderbolt mode on TCPMv1
Change-Id: I30c8f1a007228408e08520502db00601ca3a2521
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2249020
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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This commit creates a reporting function for the PRL to let the PE know
when messages have been discarded.
States will have to handle message discard internally since the response
depends on the portion of the AMS sequence they're in. For some states
which begin AMSes, a new shared parent has been added which runs the
sender response timer and checks discard for the child.
More states (and discard mid-AMS) are expected to be added in future
CLs.
The new parent state saves an average of 124 bytes of flash space.
BRANCH=None
BUG=b:158248741,b:157228506
TEST=on waddledoo, Dell dock no longer soft resets during power role
swap
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I61b3e96e1d14634dcd5edda4e133968ace769b21
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241577
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Previously, the Discovery Identity SOP' response for TCPMv1/2 was being
stored in pd_discovery and in pd_cable. This commit removes the storage
of Discover Identity SOP' response from the pd_cable structure.
BUG=b:158294748
b:159504972
BRANCH=None
TEST=1. Able to get the cable characteristics
2. Able to enter into Thunderbolt mode on TCPMv1
3. Able to enter into USB4 mode on TCPMv1
Change-Id: I1e5112f9aa158c41abb6226a3819f1612ed906bd
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2247211
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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The original get_chip_info() returns a point of point to the chip_info.
This way helps to cache the chip_info to a static variable and the
function just returns the pointer to the static variable.
This static variable has a race condition on the PS8805 chip. The PS8805
chip returns a different PID when the firmware is corrupted, i.e. 0x8803
instead of 0x8805. The !live case fixes the PID, by modifying the static
variable directly. When another task calls the same function for the
live case, the static variable is modified and has a race condition.
This change fixes the issue by changing the get_chip_info() parameter to
a point of the chip_info. The caller has to allocate a buffer in the
stack and pass the address to the function. For the !live case, the
function copies the cache value from the static variable to the buffer.
So the static variable doesn't have a race condition.
BRANCH=None
BUG=b:159588335
TEST=Used ectool to check the PD chip PID 0x8805 (was 0x8803).
localhost ~ # ectool pdchipinfo 1
vendor_id: 0x1da0
product_id: 0x8805
device_id: 0x1
fw_version: 0x0
min_req_fw_version: 0x0
Change-Id: Ic24615af77ea58016d286480572d2a282c4fa09a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2264477
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Add support for sending Alert OVC and OVP messages
BRANCH=none
BUG=b:117854867
TEST=make -j buildall
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: Ia436c8869880897ea9af0c2c2b0d6e9288831a8f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229285
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Need to verify auto toggle connections and non auto
toggle connections still work. I will verify on
trembyle
BUG=b:159736927
BRANCH=none
TEST=check basic functionality
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I378ddf520026591d8129986078875ce46f1e0ad8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2264472
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
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Refactor the DP alt mode handling to use a state machine
to process the commands, ACKs and NAKs.
Also add states to handle detecting a NAK on a DP mode enter command,
and attempt to exit the mode and then retry.
When a partner enters alt mode (e.g a monitor with DP alt mode), and
the EC is reset or goes into recovery mode, the new negotiation will
fail because the command to enter alt mode when the partner is already
in that mode will fail with a NAK.
BUG=b:159073520
TEST=Tested on duffy with a type-C monitor.
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I0b4506b17987ba71e51f019910db84b32a6da2c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256620
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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Connecting a non-PD charger the DUT performs a TRY
switch to become SRC. During this TRY path the
AutoDischargeDisconnect had been enabled and the
fact the non-PD charger will never allow Vbus to
drop to Safe0V causes the fault.
AutoDischargeDisconnect should only be enabled
when there is a known stable attach and when
this stops being the case the feature should
return back to disabled.
Verified on Trembyle NCT3807 platform
BUG=b:158751942
BRANCH=none
TEST=verify try does not fault on 5V charger
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I9ab507a1bbc5b84948620b6174f946f07befde90
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2250092
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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BRANCH=none
BUG=b:159571683
TEST=make BOARD=krane -j tests
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: I77212f0ff3215270c0e466f2220d64e267c18efb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256632
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BRANCH=none
BUG=b:159571683
TEST=make BOARD=krane -j tests
Change-Id: I0484bbb5b6dcb0703aace88be59248968a662bb5
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256631
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This CL allows to reset PD contract in power-on reset.
It applies to situation of EC's VBAT won't go low when
system's power isn't presented.
BUG=b:154670981
BRANCH=none
TEST=PD contract gets cleared when power-on reset
even VBAT keeps high
Change-Id: I2c8d185725542bb77fadfe6cb0497e0aace8aee2
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208343
Reviewed-by: Jett Rink <jettrink@chromium.org>
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PD3.0 6.2.1.1.5 Specification Revision clearly states that negotiated
Specification Revision level should be used until Detach, Hard Reset
or Error Recovery happens.
Current implementation of soft reset performs full reinitialization of
PRL state machines, flags, counters including negotiated Specification
Revision level. As a result when sending PD_CTRL_SOFT_RESET DUT was
waiting for SinkTxOk, but it was never observed because ServoV4 was
running PD2.0 stack.
This issue was fixed by separating parts of SM_INIT state which
shouldn't be reset during soft reset.
BUG=b:158996004
BRANCH=none
TEST=Flash nocturne with firmware which contains fix.
Make sure ServoV4 runs PD2.0 revision.
Run firmware_PDResetSoft test, make sure that hard reset doesn't occur.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I852817a63772dbc8baab74ff6b0c425228b2f49b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2246020
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch add config: CONFIG_POWER_SUGNAL_RUNTIME_CONFIG
to allow board modified power signal gpio if needed.
BUG=b:150278507, b:152841287
BRANCH=none
TEST=make buildall
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I5c885f9cb3400f3354a18b6d497340dfe3ad993b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256624
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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The CR50 will reset the EC on some platforms after power-on.
Add a reset flag to detect this and treat the second
restart as a power-on restart rather than reset.
Subsume the CONFIG_GPIO_INIT_POWER_ON_DELAY_MS config
to make it clear what the behaviour will be.
BUG=b:151329011
TEST=Confirm on dalboz, puff & variants that second reset is
treated correctly.
BRANCH=none
Change-Id: Ib66de920403f08099b87d1eff797270606b44f8f
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2255830
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
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Now that the old usb_prl unit test is under usb_prl_old, add a new
unit test for usb_prl with mocks for the various subsystems that it
will use.
BUG=b:158608129
BRANCH=None
TEST=`TEST_LIST_HOST="usb_prl_old usb_prl" make runhosttests`
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: Ie1bf9a4494cd933473caa4ceb594eddd97c277c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2252662
Tested-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
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Currently, CrOS EC chooses only one of the two powre-saving states
when the system is left idle. One is to hibernate and the other is
to cut off the battery. And these are determined at compile time.
If the system hibernates, EC will not have a chance to cut off the
battery before the state of charge reaches critical low. If the
system is in cutoff, it requires an AC adapter to wake up. So, neither
behavior is ideal.
This patch introduces the smart discharge system. Given the number
of hours to zero capacity as a target, it tries to choose the better
state for idling.
For example, if the state of charge is high, it will hibernate the
system because the target can be met before the battery completely
drains. If the state of charge is low, it will keep the EC up so
that it can cutoff the battery.
Tests are done on Bloog as follows:
Verify EC selects not to hibernate when the remaining capacity is
below the stay-up threshold.
The ectool smartdischarge command is tested as follows:
localhost ~ # ectool smartdischarge
Hours to zero capacity: 0 h
Stay-up threshold: 0 mAh
Cutoff threshold: 0 mAh
Hibernate discharge rate: 0 uA
Cutoff discharge rate: 0 uA
localhost ~ # ectool smartdischarge 2160
Hours to zero capacity: 2160 h
Stay-up threshold: 0 mAh
Cutoff threshold: 0 mAh
Hibernate discharge rate: 0 uA
Cutoff discharge rate: 0 uA
localhost ~ # ectool smartdischarge 2160 200 1500
EC result 3 (INVALID_PARAM)
localhost ~ # ectool smartdischarge 2160 1500 200
Hours to zero capacity: 2160 h
Stay-up threshold: 3240 mAh
Cutoff threshold: 432 mAh
Hibernate discharge rate: 1500 uA
Cutoff discharge rate: 200 uA
localhost ~ # ectool smartdischarge 2160 1500 0
EC result 3 (INVALID_PARAM)
localhost ~ # ectool smartdischarge 0
Hours to zero capacity: 0 h
Stay-up threshold: 0 mAh
Cutoff threshold: 0 mAh
Hibernate discharge rate: 1500 uA
Cutoff discharge rate: 200 uA
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:152431365, b:157602162
BRANCH=none
TEST=See above
Change-Id: I1470b13203f3653ae0e495cd5ec8ed05f3c5102f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2216392
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
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Some PPCs have integrated CC line detection to trigger FRS faster, but
this needs to be enabled from the USBC policy engine only after the sink
capabilities have been exchanged.
BUG=b:148144711
TEST=make buildall
BRANCH=none
Change-Id: Iaa64f64845c5ffdd32fa66a3eb6f6251abb7c157
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056493
Reviewed-by: Keith Short <keithshort@chromium.org>
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The commit adds support for the Parade Tech PS8705 TCPC/SuperSpeed
mux. It is similar to other Parade TCPCs in its family.
BUG=b:158760026
BRANCH=None
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I23288757f2baf56742958357b5ee6bac5cffa02f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2243314
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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Add support for magnetometers in online calibration.
BRANCH=None
BUG=b:138303797,chromium:1023858
TEST=Added new unit test
Change-Id: I3a6dafb2f5fab9b11ac8bd3b53ae4976002d18cd
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2095519
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This patch moves is_manual_recovery from common/vboot to
common/system.c to make it available as a common API.
There is no functionality change.
BUG=none
BRANCH=none
TEST=EFS2 detects manual recovery.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I3e6acd979feb78ff69b78780f1095fee855b4945
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242663
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch fixes the EC_REBOOT_HIBERNATE_CLEAR_AP_OFF command to
match the change made by CL:2213730.
There is no functionality change.
BUG=b:37536389
BRANCH=none
TEST=Verify ectool hibernate-clear-ap-off works.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I70ec3a38b0ceaca8a79c6e2c6df127fb145496e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242662
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add a flag to override checking the vSafe0V bit directly if this
capability is not functional on a TCPC revision 2.0 device.
BUG=b:158520242
BRANCH=none
TEST=make buildall
TEST=Volteer, confirm that SNK devices can be detected with TCPMv2
stack.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia6f3a28970f240fb022cbef9d286761266224f6f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2244017
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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This change adds a helper function extpower_handle_update() that
performs all the necessary actions that need to be done on external
power state change:
1. Call hook_notify with AC_CHANGE
2. Update memmap_batt_flags to update EC_BATT_FLAG_AC_PRESENT
3. Set host event for EC_HOST_EVENT_AC_CONNECTED or
EC_HOST_EVENT_AC_DISCONNECTED.
Step#2 above is important because it ensures that the memory map flag
is correctly updated when host reads it. Before this change, it was
observed that EC_BATT_FLAG_AC_PRESENT is updated only when
static/dynamic battery information gets updated. This could result in
host reading the wrong AC state if battery information did not update
before host acts on the host event bit getting set for AC
connect/disconnect.
BUG=b:157752693
BRANCH=None
TEST=Verified on trembyle that EC ASL routines read the correct state
of AC present flag on receiving host event.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I077de1135320654f571e5cf87ced6f08cbf23876
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242353
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Auto-Submit: Furquan Shaikh <furquan@chromium.org>
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Add a transmit type parameter to functions involved in mode entry; also
add such a parameter to various functions calling those functions. For
DisplayPort-specific definitions or calls, specify SOP; we do not
currently support DisplayPort mode for cable plugs. For TCPMv1-specific
code, specify SOP. TCPMv1 generally assumes that the discovery/mode
structures are 1-dimensional, as they were previously, and changing that
is outside the scope of this CL.
BUG=b:155890173
TEST=Enter DP mode on Volteer with TCPMv2
TEST=Enter DP mode on Volteer with TCPMv1
TEST=Enter TBT mode on Volteer with TCPMV1
BRANCH=none
Change-Id: I8afc75b3f3be8939c4645058ac4a31f24c88fb9e
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229279
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Adding update_cc mechanism to keep correct Rp set
BUG=b:158291622
BRANCH=none
TEST=check Rp value over attach, hard reset and pr-swap
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I369c71e637cbb6a8fc37b434194ce39cc9bf5417
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2232830
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
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- Drop start and end ams function in favor of a flag based approach
- Don't clear RX queue on TX reset. We are supposed to drop any pending
TX messages (not RX messages). This should also help us to process
partner messages if we get a collision
- Drop prl_tx_phy_layer_reset_run and call next state directly in entry
- Dropping retry_counter reset to 0 since that happens in entry method
- Dropping flags reset to 0 because it is most likely dropping more
flags than we want.
BRANCH=none
BUG=b:158248741,b:157228506,b:157661566
TEST=DUT accepts soft resets
Change-Id: Ice8721a6c81452584f8d4ec474cb4f4a487b713b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2233794
Tested-by: Diana Z <dzigterman@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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We have had issue with the TX_COMPLETE flag remaining from previous TX
transactions. This can incorrectly make the subsequent TX transaction
code think that its TX send has completed. It is safer to always clear
the TX flag before starting a new TX transition.
BRANCH=none
BUG=b:158248741
TEST=Verify that TX_SUCCESS does not linger from previous transactions
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: I5fd7d849bdf97582d5b03b8d833de24b550d8c07
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239034
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Enable charge current and maximum system voltage slew rate control
on ISL9238C by default for better charger stability.
Since the control is only available on ISL9238C, not on A/B, and
there's no way to distinguish C and A/B in software side, introduce
a new config CONFIG_CHARGER_ISL9238C for 9238C users.
BUG=b:155366741
TEST=1) on asurada, verify the register configured correctly
2) verify the waveform looks better
BRANCH=kukui
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I577db3eebcad0ed3793f4b7d525e4246515f8503
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2231725
Tested-by: Hsu Alvis <alvishsu@google.com>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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The HPD GPIO active level and naming may vary across boards.
This CL abstract the layer for board customization by adding
config CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM.
BRANCH=master
BUG=b:154565980, b:150341271
TEST=ensure HPD works on asurada.
Change-Id: I237c10722f13e5f31144e142f63e2694a23fe899
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2167128
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Create separate modules representing DisplayPort (which decides whether
and how we can set up the DP alt mode) and the Device Policy Manager
(which decides whether we should). The end goal is to have essentially
all code with DP-specific decisions or information in the DP module and
all code with DPM-specific decisions or information in the DPM module.
This will allow the PE to map as directly as practical to its behaviors
defined in the PD spec.
Essentially detach PE_DO_PORT_DISCOVERY from the rest of the PE state
machine in preparation for deleting it.
This change paves the way for
1) Allowing the AP to drive mode entry and
2) Allowing new alt modes to be supported via largely self-contained
modules.
BUG=b:155890173
TEST=Attach DP dongle; observe discovery and DP setup via Twinkie
BRANCH=none
Change-Id: Ie63a2e62d1ac6178722477dc53244898a04ef92f
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2203842
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Instead of using CABLE_FLAGS_SOP_PRIME_ENABLE and
CABLE_FLAGS_SOP_PRIME_PRIME_ENABLE cable flags, add the type of message
to be transmitted directly in the message header.
BUG=b:148528713
BRANCH=none
TEST=1. make buildall -j
2. Able to enter DP mode with Type-C dock and Type-C to DP
connector.
3. Able to enter Thunderbolt-Compatible mode with thunderbolt dock
with both Active and Passive cables.
4. Able to Enter USB4 mode with USB4 device with thunderbolt Gen2
cable.
Change-Id: Ib0cac818200e7ab8f73cace85ffee65203019709
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2159592
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Several legacy boards are consistently running out of flash space. Add
CONFIG_USB_PD_TCPMV1_DEBUG option which can be disabled on a board to
save about 900 bytes of flash space in the RO and RW images.
BUG=none
BRANCH=none
TEST=make buildall
TEST=Verify Volteer board runs with CONFIG_USB_PD_TCPMV1_DEBUG disabled
and the PD debug level set to 1. Also run the "pd <port> state" command
and verify no side effects.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I29bb70b7d347d8c6d5797c01ed892329d90aa671
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236629
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
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Currently, when the system shuts down in RO, EC resets with AP_OFF
flag. This was for allowing the EC to jump to RW and get ready for
the next normal boot after a system shuts down from the recovery
mode (chromium:1045209).
This behavior causes the reboot from the recovery mode to be stopped
(b:154778457).
This patch makes RO jump to RW instead of resetting with AP_IDLE
flag. After sysjump, the AP can continue to sequence up or down.
BUG=b:154778457, chromium:1045209, b:156694627, b:157077589
BRANCH=none
TEST=test_that suite:faft_bios passes.
TEST=Press power button in recovery screen on Zork, Puff, Volteer.
System stays in S5 after sysjump.
TEST=firmware_CorruptBothFwSigAB passes on Zork, Puff, Volteer.
TEST=Hibernate EC on Zork, Puff, Volteer. Press power button once.
System boots.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: If08f3bb7f89c2407e4c5207ade820085f65ea9ac
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213359
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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A new hook HOOK_CHIPSET_SHUTDOWN_COMPLETE is introduced, which are
called from the chipset task, while the system has already shut down
and all the suspend rails are already off.
It will be used for executing pending EC reboot at the chipset shutdown.
The EC reboot should be executed when the chipset is completely off.
BRANCH=None
BUG=b:156981868
TEST=Built all boards.
Change-Id: I12f26957e46a1bb34ef079f127b0bddd133cd4e7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2228395
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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