| Commit message (Collapse) | Author | Age | Files | Lines |
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sc7180 depends on board specific functions:
- board_set_switchcap_power
- board_is_switchcap_enabled
- board_is_switchcap_power_good
The declaration for these functions were copied between many board.h
files. Move the declaration to the new sc7180.h file so it can be
commonly sourced.
BUG=b:183054226
BRANCH=none
TEST=make buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Icecb6220bfecdbee665dacb0834ab5752b06815b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2774363
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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This CL adds a new RCH error type used for the case when there was a
sender response timeout waiting for the next chunk of a chunked
message to be received. This particular error should not result in the
PE triggering a soft reset. This new error type allows the PE function
to do nothing for this error case. All other RCH error states remain
the same.
This change is required to pass the TD.PD.SRC3.E32 compliance test
where the tester purposely stops sending after the 4th chunk and
expects to be able to resend that message without an protocol error
being reported.
BUG=b:181333342,b:179443762
BRANCH=None
TEST=Verified that quiche can now pass TD.PD.SRC3.E32
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I0142ca8d23cd23ef7b347d5c07155cdb17f44b88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2734158
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Move the SC7180 power signals list from Trogdor baseboard directory to
common code under sc7180.{c,h}. This allows us to include this code
more directly for Zephyr builds, without needing to pull anything out
of the Trogdor baseboard directory.
BUG=b:183054226
BRANCH=none
TEST=make buildall && zmake testall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I3657e7a1c1ee8b9593574e6f65d07eda1f7ec61c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2774360
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Add a new hook called HOOK_CHIPSET_HARD_OFF which is called upon entry
to the G3 power state.
BRANCH=None
BUG=b:166787955,b:167996216,chromium:1045209
TEST=make -j buildall, runs on waddledee with no linking errors
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If260207910d882d17aeb766c9e99a7a6099006c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415171
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch allows a charger chip to reset to firmware update mode
(a.k.a. download mode). Actual firmware update will be added
in a separate patch.
Currently, a reset event causes the state machine to unconditionally
transition to normal mode. This patch makes the state machine check
'mode' field in the context to decide whether it transitions to
normal mode or not.
This patch also makes ctn730 driver explicitly return
PCHG_EVENT_*_ERROR while PCHG_EVENT_NONE was returned previously.
BUG=b:173235954
BRANCH=trogdor
TEST=Stylus connect, disconnect, charge events are triggered as
expected.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I10dbd25d0b3d5284952e57d4ade2949e9594c8d1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2770503
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Currently, dropped events are counted for all ports combined. This
patch makes them counted for each port separately.
BUG=b:173235954
BRANCH=trogdor
TEST=Verify 'pchg 0' prints dropped event count.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I09380927613defe34bef0fece022fc9d47ebb8a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2770502
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This patch makes a compiler check array sizes used to stringify
PCHG states and events.
BUG=b:173235954
BRANCH=trogdor
TEST=make
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I13dc399dc973d8a661492236668c22b323e7c1c4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2765423
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This patch adds crc32_hash and crc32_ctx_hash, which compute CRC32
of data in arbitrary length using an internal context and an external
context, respectively.
BUG=None
BRANCH=None
TEST=make run-crc
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I08729528fba6b1350bbb8387c048025f72496b2d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757097
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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It was observed that in byra, when the "apshutdown" console command is
executed, the power state of EC is messed up. This was caused by the
SLP_Sx virtual wire is not updated due to the ungraceful global reset.
This CL adds a config option to let npcx EC reset SLP_Sx VW when
eSPI_RST is asserted.
Note: don't enable this config if the platform implements deep Sx entry
(e.g. KBL) for the reason per Intel eSPI spec. (scenario 3 in Table 7):
These pins retain state (0 or 1) until PCH/SoC exits Deep-Sx and PMC
sends a VW message to the EC with the new states for these pins.
BRANCH=none
BUG=b:179977907
TEST=pass "make buildall"
TEST=With the config defined, see the SLP_S4 virtual wire reset when
eSPI_RST is asserted.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I413b3d211537295b32c49b6e4a1797e48a26ec5f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2766428
Tested-by: CH Lin <chlin56@nuvoton.com>
Tested-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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By spec we are only allowed to enter BIST mode when VBUS is at
vSafe5V. This CL adds a check in pe_bist_tx_entry to make sure that
BIST test mode is only entered if VBUS is at the correct level.
We compared to the expected nominal VBUS level and not the actual
measured level as not all boards will have accurate enough VBUS
measurements.
BUG=b:180957710
BRANCH=None
TEST=Verfied that quiche can pass the TDA.2.2.7 compliance test.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Icc2e5ff6c32374c89490e5bea79af2c4517ea295
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738397
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The TC_FLAGS_DISC_IDENT_IN_PROGRESS TypeC State
Machine flag is unused, so it has been removed.
BUG=b:165934405
BRANCH=none
TEST=make runtests
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I888c53a90a68e0d3690f47ca54e6e765601e7c3c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2765156
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add support for Charge Through Vconn Powered Devices
BUG=b:165934405
BRANCH=none
TEST=make runtests
1) Verified that Apple VPD audio device worked.
2) With charger plugged into Chocodile_Vpdmcu,
verified that a Voxel could be charged.
3) FAILED: Plugging Chocodile_Vpdmcu into Voxel
first and then plugging in charger to
Chocodile_Vpdmcu, Chocodile is detected
as a Debug Accessory (CC1 = Rd and CC2 = Rd)
and VCONN is never applied.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I977b316dc531aa33bb6a236523c8ddbbb23014d0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748429
Reviewed-by: Diana Z <dzigterman@chromium.org>
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A hub may send a Fast Role Swap signal when Vbus is less than vSafe5V,
so allow a 5ms debounce after Vbus loss for the signal to come in before
we declare the connection detached.
BRANCH=None
BUG=b:180453483
TEST=on voxel, confirm FRS behaves normally
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If56106660c0a2bf82e28b91129bc9dd367ebc8fe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718838
Tested-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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When exiting out of USB4 mode, reset the USB4 state machine and
set the retimer and the mux to disconnect state followed by
USB mode.
BUG=b:181286325
BRANCH=None
TEST=Able to re-enter into USB4 mode on warm reboot
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Icdc520aa221a9276466fafb885a6d86e893b7284
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2727628
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
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Fix a bug from CL:2747559, virtual battery returns an error
for SB_AVERAGE_CURRENT. virtual battery handler should call
battery_get_avg_current(), not battery_get_avg_voltage().
BRANCH=none
BUG=b:170921599
TEST=read current_avg knob in kukui
Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
Change-Id: I90c26a8e1d4fa6faccc0166b9f7b63fca9baef51
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2751320
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Add the capablility to explicity set a CTVPDs VDO
current.
BUG=b:165934405
BRANCH=none
TEST=make runtests
Verified that returned VDO from chocodile_vpdmcu was correct.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I2292024986fa89b228b56678d61d1aef2866c817
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748427
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Sam Hurst <shurst@google.com>
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A device that supports Vconn Powered functionality must
reflect this by setting bit0 of its VPD VDO to 1 or
0 if said functionality isn't supported.
BUG=b:165934405
BRANCH=none
TEST=make runtests
Verified that returned VDO from chocodile_vpdmcu was correct.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I2f7b6a66c09221f1d5c12831cd2e4b56510aecdd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748426
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds a TCPCI method to disable BIST mode for the case where
the TCPC does not handle the duration automatically. This is required
for the ucpd driver as once type-2 BIST mode is started, the ucpd
peripheral needs to be reset to stop.
This CL also reduces the timer value from 60 msec to 55 msec to ensure
that there is enough time for BIST to be stopped and still be in spec.
BUG=b:182436876
BRANCH=None
TEST=verifed on Quiche that when type-2 BIST is started then it stops
when the timer in PE expires. This fixes TDA.2.1.1.1: BMC-PHY-TX-EYE
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I59ee7ac0dead09ac3a1b5783cfa3fe9db238eb7e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2660803
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Currently, our SinkWaitCap timer is about 20 ms below the maximum.
Lower an additional 25 ms to ensure we're hard resetting consistently in
time during testing. This should still offer relatively generous time
for the partner to begin sending source capabilities.
BRANCH=None
BUG=b:173027500
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I308ad2c5590aeeed8179ed482cf03a784a852840
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728946
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Some of the charger ICs can provide measurements for the charge
voltage and the charge current. This information is needed by the
OCPC module. Previously, the charge_get_current() and
charge_get_voltage() functions were modified to provide this
information. However, those functions are intended to provide the set
voltage and current targets for the charger IC.
This commit adds a new set of APIs, charge_get_actual_current() and
charge_get_actual_voltage() which provides the actual charge current
and voltage if the charger IC is able to provide that information.
BUG=b:182018616
BRANCH=dedede
TEST=Build and flash madoo, verify that `charger` EC console command
shows the set current and voltage targets instead of the measured
values. Check that the `chgstate` command shows the measured values
for use with the OCPC module.
TEST=Verify that charging from the sub board works.
TEST=Verify that resistances are still calculated and seem reasonable.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I82565d18908d9ea0f54934787897937488e280e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2750866
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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This CL adds chip_save_reset_flags() & chip_read_reset_flags(). Also,
fulfill the system_reset()
BUG=b:176523207
BRANCH=None.
TEST=check 'reboot wait-ext' will wait 10s
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Idb9c2e90e8ad5e8a989f33ac904c3b778b8f48e4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2731179
Reviewed-by: Keith Short <keithshort@chromium.org>
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For AP mode entry, request to enter Thunderbolt cable mode
entry prior to entering USB4 mode if -
1. Thunderbolt Mode SOP' VDO active/passive bit (B25) is
TBT_CABLE_ACTIVE or
2. It's an active cable with VDM version < 2.0 or
VDO version < 1.3
BUG=b:181286325
BRANCH=None
TEST=Able to enter USB4 mode with LRD cable
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Ie223fa3d95c2357a0e50aeea93444e6f7639cc3f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2724653
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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If a condition is reached outside the PD task which requires USB Type-C
Error Recovery, it can now use pd_set_error_recovery() to request that
the PD task execute this. Note that this will return before the error
recovery has completed, which is in contrast to the suspend port
behavior.
BRANCH=None
BUG=b:180453483
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I487e0da3ef65c201ff406500f0c95244b460afcb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718836
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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When neither CONFIG_SHA256_HW_ACCELERATE nor CONFIG_SHA256_UNROLLED
are enabled, calculating the hash can trip the watchdog.
Add watchdog reloads at a rate of 1/2 the watchdog period when both
these options are disabled.
BUG=b:182208446
BRANCH=none
TEST=zmake testall
TEST=Boot zephyr-ec on Volteer, powerdown AP and observe watchdog
timeouts are fixed
Signed-off-by: Keith Short <keithshort@chromium.org>
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I6170b457c91f3247adf9ad47cd7e93b128a1d13b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2744356
Reviewed-by: Yuval Peress <peress@chromium.org>
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Currently, PCHG assumes PCHG chips are reset only on POR and ignores
reset events. This can cause the state machine to be in an unexpected
state when a reset happens asynchronously.
This patch allows PCHG to handle chip reset events. It also makes the
task explicitly reset PCHG chips at start-up so that everything will
start in known & clean states.
BUG=b:181745891,b:181036152,b:173235954
BRANCH=trogdor
TEST=Verify PCHG behaves expectedly across cold reset, warm reset,
suspend & resume. Repeat the test with and without stylus.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ia3dd1fe7ebc8dd6f4ee8149a4c25918922143fc3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2741282
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS to adjustment
delay time of thermal sensor first read.
Add 500 ms delay of thermal sensor first read in metaknight.
BUG=b:181202521
BRANCH=dedede
TEST=DUT do [ec reset|boot from G3] 20 time pass
Signed-off-by: yu-an.chen@quanta.corp-partner.google.com
Change-Id: I12f5411c8ac3866d7a52807c4eface9e6bdfd5a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738505
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Add fan support to Zephyr. The fan is controlled with PWM and the fan
speed is measured with the tachometer. Fan properties are defied in the
dts file. The struct fan_t fans[] array and enum fan_channel are
generated automatically according to named-fans node in the device tree.
The implementation is based on the npxc driver, but it is
platform-independent. It assumes that there are PWM channel to control
the fan and the tachometer sensor to measure RPM (in RPM mode). If it is
not the case in the future, the shim may be split per chip.
Enable fan related console commands - fanduty, fanset, faninfo, fanauto
and host commands - EC_CMD_PWM_GET_FAN_TARGET_RPM,
EC_CMD_PWM_SET_FAN_TARGET_RPM, EC_CMD_PWM_SET_FAN_DUTY,
EC_CMD_THERMAL_AUTO_FAN_CTRL.
BUG=b:174851463
BRANCH=none
TEST=build Zephyr
TEST=Run "fanset"/"fanduty" commands and check with "faninfo" if the fan
follows the command. Then run "fanauto" and verify that the fan controls
the temperature correctly.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I52255848e271fb5b204cd1eb8a797e2fbc81130d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2729375
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This patch make tcs3400_translate_to_xyz() to overridable,
let board could custom their own equation.
BUG=b:176671564
BRANCH=None
TEST=make BOARD=dooly
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Ia475e03b995223575f9e3ff106bc12a406062c9b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738582
Tested-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
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Setting charger switching frequency to 724kHz.
BUG=b:180779740
BRANCH=volteer
TEST=manual
1. Check charger register 0x3C
2. Check waveform
Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: I97512742dfc778c22615f8385fbe1fecf5ff2d7b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719786
Reviewed-by: Keith Short <keithshort@chromium.org>
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In some projects, we modify the cbi eeprom write protection
via the hardware design. So, the gpio pin GPIO_WP is
decoupled from the cbi eeprom write protection status. With
this change, we can update the cbi eeprom data on the fly
for the dogfood device during the development.
In order to bypass the cbi eeprom write protection check,
we add a CONFIG_BYPASS_CBI_EEPROM_WP_CHECK to skip the
gpio value.
Since this modification is only for the developing device,
we add the CONFIG_SYSTEM_UNLOCKED check to avoid someone
mis-use this config.
BUG=b:169034911
BRANCH=volteer
TEST=`ectool cbi set` is working in drobit/copano
Change-Id: I3f35159883f75965b1009c45c25ac2cd1c6e7c0d
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719724
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This adds support for the BQ25720 charger using the BQ25710 driver. The
only significant difference between the two chips is that the VBUS
voltage register encoding has changed. The scale changed from 64mV to
96mV and there is no DC offset.
BRANCH=none
BUG=b:180980490
TEST=buildall passes
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Change-Id: I9ab6e066a4dec93a0ede0c22ff21b240a5021cbf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2717805
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Currently SOP' enabling is done as part of the TCPCI driver when vconn
is set - however if we aren't using VCONN from the TCPC, we need to
enable SOP' separately. So, instead of enabling it in the TCPCI driver,
enable it in the general TCPM set VCONN function.
BUG=b:181692098,b:181691263,b:173459141
TEST=Make sure cable discovery works
TEST=make buildall
BRANCH=None
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: Iecc06760f2b8af588c427b9565c6aa31ee719edf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2733574
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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PD_T_PS_SOURCE_OFF is 750 to 920 ms, currently it is set to the maximum
value. But, we need to detect the state and take the exit action within
this maximum time, which leaves no room for overhead if this is set to
the maximum value.
Instead, set to the midpoint value of 835ms.
BUG=b:181055620
TEST=TD.PD.FRSISNK3.E5 on Voxel
BRANCH=None
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: I4b2b75332774ca0fb8e0913053739da6d58d428a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2730631
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The SYV682 shouldn't have VCONN supplied to its host side CC pins, but
on Octopus these pins aren't used and the TCPC must provide VCONN.
Since this is a non-standard configuration, make an exception for these
Octopus boards by defining a new SYV682 flag to indicate that it does
not pass through CC.
BUG=b:180973460
TEST=make buildall
BRANCH=None
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: I043b6025abbeeaaf9e261d2721da3aed5483e177
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2721234
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
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BUG=none
BRANCH=none
TEST=normal USB-C operation
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I9c5bc90cc68ba424ad7632c10ba513103288b414
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2729620
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Use outstanding PD Timer expiration times to adjust to
faster state machine ticks.
BUG=b:178029034
BRANCH=none
TEST=make runtests
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Iee7f75baf29e70f5fd7ef31de5c53d5824b52871
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2707908
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add "pd X timer" command to pd_console
BUG=b:178029034
BRANCH=none
TEST=ec console: pd timer
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I108108adf4cbbdec0c233831830182b8835a7ba3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2707806
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add in the basic framework. There are optimizations
for using less timers but want to get the basics
working before I invest more time in this.
BUG=b:178029034
BRANCH=none
TEST=make-runtests
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Icf93e3074b02cc3e0f7ee62e026b0d8ba10c7709
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2707804
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
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This CL adds a new DPM function to generate a request to the PE to
send a SVDM Attention message via the DPM. This change deprecates
pd_send_hpd from TCPMv2, which existed for the same
purpose. pd_send_hpd is now part of the hpd->DP Attention converter.
This path replaces the need to use pd_send_vdm which can't be reliably
used with its current design.
BUG=b:175660576,b:180465870
BRANCH=None
TEST=Verified on quiche that can enter ALT-DP mode as a UFP-D and that
display is extended properly via display port or hdmi connector.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I9f8817cb8d40f32b878abdc09db605097a32548b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2691969
Tested-by: Keith Short <keithshort@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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When the AP resets, reset the SOP and SOP' discovery events so it knows
there is completed discovery information to consume. Additionally,
remove the requirement that events only be set from the port's PD task.
Since this is just an atomic or of events and the setting of a host
event, it should be safe to do from other tasks.
BRANCH=None
BUG=b:179505381
TEST=on galtic, verify events are reset after reboot with:
- Apple 3-in-1 (SOP identity, no SOP')
- TBT dock (both SOP and SOP' identity)
- Active cable tied to another chromebook (SOP' identity, no SOP)
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib2c49854fd4269c65e771565210fe88222c6e848
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2708785
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Adds functions that will allow us to temporarily take over the uart
from the shell. Note that for platform/ec code without Zephyr, these
functions are stubs so they are safe to call from common code, though
we'll most likely need other logic (such as turning off the console
task). This isn't done in these functions because the Zephyr shell
behaves differently from the task and in the example of efs2 needs to
be turned off earlier than the platform/ec console task.
BRANCH=none
BUG=b:164421798
TEST=zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I75fc8fe2ca9214f216561ded97818880dda247d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2723495
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
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Currently we always source VCONN from the TCPC, and also the PPC if
present. However the SYV682 can't handle 5V on its host-side CC pins, so
we shouldn't source VCONN in that case.
For those TCPCs which will trigger OVP if VCONN isn't enabled, this will
not happen with the SYV682, since it isolates VCONN from the TCPC CC
signals.
BUG=b:180973460
TEST=On delbin, make sure the host-side CC pins are <3.3V when sourcing
VCONN
BRANCH=None
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: I8929a44fc23f93c44559229f1b0d024fd7fbc7db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2721086
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This commit adds an overridable function for pulsing the
EC_ENTERING_RW signal. This function should only be overridden in
very rare circumstances!
The default implementation is unchanged. EC_ENTERING_RW is pulsed for
1ms.
BUG=b:180965428,b:181051734,b:181085178
BRANCH=dedede
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ie04bc0b0d20473be1b3d5f46fa1a986ab6e59953
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719103
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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This adds a new overridable function to check if a USB PD port exists on
a system. This is preferred over using board_get_usb_pd_port_count() or
CONFIG_USB_PD_PORT_MAX_COUNT because it handles sparse port numbering.
The "missing" port no longer needs to be the highest numbered port and
call sites no longer need to implement the special checks for this case.
BRANCH=none
BUG=b:173575131
TEST=buildall passes
Change-Id: I3f74eddd99c6901b42ce05bab6f2bdd545127d1a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2700313
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Rename ioexpander i2c address to match current conventions and update
any calling locations.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iddad457f73d0dd0167496b794c00e274f8985615
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2697855
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Add TI TCA64xxA (TCA6416A, TCA6424A) series driver that conforms to
ioexpander_drv interface.
Driver supports 16- and 24-bits versions and is configured by
flags field in ioex_config (TCA64XXA_FLAG_VER_TCA6416A,
TCA64XXA_FLAG_VER_TCA6424A).
BUG=b:168385201
BRANCH=main
TEST=Add 'CONFIG_IO_EXPANDER_TCA64XXA' to any board.h
Execute make to any board,
ioexpander/tca64xxa.c should be visible in compiled files list
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Change-Id: I5ca27df3802d900c9967684403f29c33abd96f18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2700296
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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In some cases it's needed to read many pins on the same IOEX port.
To improve performance and remove redundant calls, it will be easier
to read levels on whole IOEX port. To enable this functionality,
CONFIG_IO_EXPANDER_SUPPORT_GET_PORT must be defined and driver
must support it.
BUG=b:168385201
BRANCH=main
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Change-Id: I472385a4ef4f5db23ce92d017194f8c737b7607e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2700295
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add basic support for ANX7451. Datasheets available in bug.
Support for tuning can be added later if needed.
BUG=b:179065240
BRANCH=None
TEST=Build
Change-Id: Ifafdec4412b73b0fd3f7de2131a8617bbfde6426
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699667
Reviewed-by: Diana Z <dzigterman@chromium.org>
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In npcx7 series, the Timer and Watchdog module (TWD) generates the
clocks and interrupts used for timing periodic functions in the system.
It also provides watchdog reset signal generation in response to a
failure detection. This CL enables the watchdog functionality in zephyr
system.
BUG=b:176523207, b:177604307
BRANCH=None.
TEST=add stall function to check the system can reset by the watchdog
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Iee0312dd6132ce76e622178b3a666aa415bc735a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2659135
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
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This defined in Zephyr's sys/util.h so we should not define it again
when building for Zephyr. Add an #ifdef to fix this.
BUG=b:180409973
BRANCH=none
TEST=build and see there is no duplicate warning for CLAMP()
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I51cf1661b247adb423356f28a516967a80d1e064
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2705445
Reviewed-by: Keith Short <keithshort@chromium.org>
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