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* usbc: correctly handle Get_Source_Cap as a sinkPeter Marheine2020-08-061-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | USB Power Delivery Specification Revision 3.0, version 2.0 section 6.3.7 states that a dual-role port shall respond to Get_Source_Cap with its source capabilities, but this was incorrectly handled by responding with a request for source capabilities. Per section 8.3.3.18.10, implement the PE_DR_SNK_Give_Source_Cap state to handle this correctly. To support the new test, some helper functions for the fake PE are added and the test code's copy of the PE state enum is updated to be in sync with the real one. BUG=b:161400825,b:161331630 TEST=New host test for this state, and verified on Dalboz that requesting a PRS via the EC console (`pd 1 swap power`) now sends source capabilities when the partner requests them. BRANCH=None Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I87c27d406e0a3f57cf2c25fa583bee51155b6b12 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336233 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tcpmc2: fix TD.PD.LL3.E2 Retransmission testJett Rink2020-08-064-11/+21
| | | | | | | | | | | | | | | | | | | | | | | We are retrying in both the TCPC hardware (4 total) and in the Protocol layer (3 total) when we do not get a GoodCRC back from the port partner. We are only suppose to retry up to nRetryCount times which is 2. This means we should be sending 3 total replies. Also correct a misinterpretation of the spec around SOP' and SOP" retries. We were not retrying those packets, but we should be retry them as the SOP. The SOP' device will not retry, but we (as the SOP) should retry packet that we are sending to them. The TCPM is not fast enough to meet the timing for tRetry (195 usec), so we need to perform the retries in the TCPC hardware layer. BRANCH=none BUG=b:150617035 TEST=Verify passing compliance test with GRL-C2 on Trembyle Change-Id: I55c4ab2f5ce8f64acf21af943862d96d9088622d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2248960
* OCPC: Add ocpc_init()Aseda Aboagye2020-08-051-0/+15
| | | | | | | | | | | | | | | | | | | | This commit adds a ocpc_init() function which will also chain off to a board specific init function as well. Currently, the init function sets up the initial resistances. The board specific init functions may set up charger specific parameters. BUG=b:147440290 BRANCH=None TEST=Enable on waddledee, build and flash and verify charging still works. Verify that initial resistances are seeded. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ia25aff9d2032746f42cbf0f7b6c5707d20362203 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336173 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* OCPC: Add flag for ISYS measurementAseda Aboagye2020-08-051-0/+5
| | | | | | | | | | | | | | | | | | | | This commit adds a charger flags member variable to the OCPC data structure. This allows boards to define certain features that the chargers that they are using have or don't have. To start, the attribute of no Isys measurement is added. BUG=b:155224387 BRANCH=None TEST=With other CLs, build and flash waddledee, verify that DUT can calculate combined resistance. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I6b8f0a9501e0d79747e42f3444397d7516f01b2f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335892 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* ec: change usage of dummySam Hurst2020-08-058-28/+28
| | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the term "dummy" with inclusive alternatives. BUG=b:162781382 BRANCH=None TEST=make -j buildall `grep -ir dummy *` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* battery: Update the default powerd's full factor valueWai-Hong Tam2020-08-051-2/+3
| | | | | | | | | | | | | | | | Use the same default value as powerd, i.e. 97% instead of 94%. The value comes from: src/platform2/power_manager/default_prefs/power_supply_full_factor BRANCH=None BUG=b:162604872 TEST=Checked EC showing the same Display percentage as the UI. Change-Id: Ia8547915251ea80bc663b5f15435060acacf9021 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335887 Reviewed-by: Jett Rink <jettrink@chromium.org>
* battery: Calculate the display charge percentageWai-Hong Tam2020-08-051-2/+1
| | | | | | | | | | | | | | | It doesn't require the powerd's full factory to be 100%. Also refine the comment on the powerd's equation to make it more understandable. BRANCH=None BUG=b:162604872 TEST=With the follower CL which updates the powerd's full factor value, checked EC showing the same Display percentage as the UI. Change-Id: I50ae7c38c423722188d892f91f4fc93d4d5f84e1 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335886 Reviewed-by: Jett Rink <jettrink@chromium.org>
* test: Add PD TX and RX to usb_tcpmv2_tcpciEdward Hill2020-08-051-0/+8
| | | | | | | | | | | | | BUG=b:162369240 BRANCH=none TEST=make -j run-usb_tcpmv2_tcpci Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I61a9f99a10c3432135a91699ac04ff65690388e7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335455 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* vif: Update VIF generator to Revision 1.40, Version 1.0 of the specSam Hurst2020-08-051-13/+46
| | | | | | | | | | | | | | | | | | | | | | | | Update the Vendor Information File generator so that it complies with Revision 1.40, Version 1.0 of the spec. The VIF files are generated when the board is built. So, make -j BOARD=<board> will create build/<board>/<board>_vif.txt A VIF can be generated manually after the board is built with build/<board>/util/genvif -b <board name> -o <out directory> BUG=b:131087690 BRANCH=none TEST=manual Generate VIF for Atlas and checked fields. Signed-off-by: Sam Hurst <shurst@chromium.org> Change-Id: Iaa1eaf1f01f9d36ad3afd2818ebe81359b8531f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1577739 Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Sam Hurst <shurst@google.com>
* power/intel_x86: Generalize the sleep failure detection, not bound to S0ixWai-Hong Tam2020-08-041-2/+2
| | | | | | | | | | | | | | | | | | | This change prepares to separate the sleep failure detection out of intel_x86, such that other chipset power sequence can reuse the code. It only touches the naming. No logic changes. * Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION * Modify the function and variable names, to avoid S0ix * Modify the comment to more neutral BRANCH=None BUG=b:162083524 TEST=make buildall -j Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* hooks: Introduce chipset resume init and suspend complete hooksWai-Hong Tam2020-07-303-0/+32
| | | | | | | | | | | | | | | | | | | | | These hooks are only enabled through a new CONFIG. The resume init hook will be used to initialize the SPI driver, which goes to sleep on suspend. Require to initialize it first such that it can receive a host resume event, that notifies the normal resume hook. The suspend complete hook is paired with the resume init hook, which reverts the initialization of the SPI driver. BRANCH=None BUG=b:148149387 TEST=make buildall -j TEST=Build successfully on both default off and defining this CONFIG. Change-Id: I615e2bf92c75f83a7b0ab3eded61a1ef241dbdcf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321875
* power/intel_x86: Add a config check for S0ixWai-Hong Tam2020-07-291-0/+4
| | | | | | | | | | | | | | | | | | The S0ix requires the CONFIG_POWER_TRACK_HOST_SLEEP_STATE enabled; otherwise, a compilation error happens. Add a config check for it and simplify some #ifdef clauses. BRANCH=None BUG=b:162083524 TEST=make buildall -j TEST=Removing the CONFIG_POWER_TRACK_HOST_SLEEP_STATE on hatch caused a fail. Change-Id: Ic685d1ca5d05d705fcf6bb43717fc05f6526274e Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321871 Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* TCPMv2: Use named constants for extended messagesAbe Levkoy2020-07-291-1/+3
| | | | | | | | | | | | | | These correspond to MaxExtendedMsgLen and MaxExtendedMsgChunkLen (PD 3.0, rev 2.0, ss 6.13). BUG=b:160374787 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I3640df18724c3c04e9f644ca59a6542563d723f0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2316135 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Optionally build extended message supportAbe Levkoy2020-07-293-44/+64
| | | | | | | | | | | | | | | | | | If CONFIG_USB_PD_EXTENDED_MESSAGES is defined, support sending and receiving extended messages. If it is not, remove the chunking state machines from the PRL and modify the PE to respond with Not Supported as appropriate. BUG=b:160374787,b:158572770 TEST=Attach various devices; observe PD traffic TEST=make run-usb_prl_noextended; make run-usb_pe_drp_noextended BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I862020155927b5613d599274708e60678c49c43c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304263 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec: change usage of whitelist/blacklistPaul Fagerburg2020-07-284-24/+24
| | | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the terms "whitelist", "blacklist", and similar with inclusive alternatives. BUG=b:162262297 BRANCH=None TEST=`grep -Eirl "(white|black)[ _\-]*list" .` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: Ie5210b98e1096c22d0e9284c101a42820bd3d79d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321549 Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* AOZ1380: initialize srcing/snking flags to reflect hardwareDenis Brockus2020-07-281-0/+22
| | | | | | | | | | | | | | | | | | | The AOZ1380 always started off with not sinking and not sourcing. In a batteryless or dead battery condition this is not true. So making sure we start with an accurate state. BUG=b:162016100 BRANCH=none TEST=trembyle cold boot with only AC power Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ic542e52b3b8d715b7526e7e393ae4f4c40c721ac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321132 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* Make wait_for_ready available for allDaisuke Nojiri2020-07-281-0/+9
| | | | | | | | | | | | | | | | | | | wait_for_ready is a generic function which loops until bits in a register are set. This patch move it to util.c to make it available for all. There are more places where the function is applicable but this CL keeps the scope under chip/stm32/clock-stm32. There is no functionality change. BUG=none BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I796599344c1d86ab7144d1d6b434ec54cf1cc55d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317887 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* TCPM: Move dfp_discover_modes into usb_pd_policy.cAbe Levkoy2020-07-251-9/+0
| | | | | | | | | | | | | It is now only used by TCPMv1. BUG=b:152417597 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ifcb7023afabea16486d90336994c6cd93a96d69b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317903 Reviewed-by: Diana Z <dzigterman@chromium.org>
* servo: Adds USB SPI protocol V2 commands and responsesBrian J. Nemec2020-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the USB SPI protocol V2, this protocol supports larger SPI transfers that are delivered in multiple USB packets. This enables us to perform 2 optimizations on the USB SPI transfer speed for large USB packets: * USB packets can be grouped together reducing the total number of packets exchanged. The host can write multiple data sections sequentially without the device responding with a packet for each one. Going the other direction, the host can continue to poll the device for data until the transmission is complete. * Only a single SPI transaction is required, this eliminates overhead in setting up and getting data from SPI transactions. Benchmark results show a typical 35% improvement in performance on Servo Micro platforms with these changes on operations which involve large SPI transfers reading or writing from the flash. Signed-off-by: Brian Nemec <bnemec@chromium.org> Blocked on upstream changes to flashrom: Depends-On:https://review.coreboot.org/c/flashrom/+/41533 BUG=b:139058552 BRANCH=servo TEST=Tested with Servo Micro with the reading, erase, write, and verify operations with updated copies of flashrom. Change-Id: I04b6cf8449e32cc1b75d3501939958887eb57f5b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2224765 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org> Tested-by: Brian Nemec <bnemec@chromium.org>
* zork: Restore AP mux setting after rebootEdward Hill2020-07-241-0/+8
| | | | | | | | | | | | | BUG=b:158960403 BRANCH=none TEST=USB3 works after AP reboot Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ia6ec65ad38933106e183747e78827d564be5aefd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314033 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* keyboard_8042: Send aux data to host from interrupt context.Edward Hill2020-07-241-2/+2
| | | | | | | | | | | | | | | Add a queue for aux (PS2) RX data so that i8042_send_to_host() is not called from interrupt context. i8042_send_to_host() locks to_host_mutex which must not be done in interrupt context. BUG=b:160975910 BRANCH=none TEST=PS2 still works Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ic4403d571592037173e64286aa013720f85acc9a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2306289 Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* ec_commands: Add host commands for regulator control.Pi-Hsun Shih2020-07-233-0/+145
| | | | | | | | | | | | BUG=b:149274957 TEST=build BRANCH=none Change-Id: I9c7b5dec7e2f66ab64750b48acd914a1c86dfd3d Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2247431 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* driver/tcpm: add support for PS8755Devin Lu2020-07-231-0/+1
| | | | | | | | | | | | | | | | | The patch adds support for the Parade Tech PS8755 TCPC/SuperSpeed mux. It is similar chip group as PS8705/PS8805/PS8815. BUG=b:159042756, b:159082424 BRANCH=none TEST=make buildall -j. make BOARD=jinlon with this new CONFIG. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I38fa02704cc352da0e27eae8cd8bbce89a807975 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2279339 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* chip/it8320, it81202: Implement fast role swap functionRuibin Chang2020-07-231-0/+7
| | | | | | | | | | | | | | | | | | Implement fast role swap function from initial SNK to new SRC for chip it8320 and it81202. BUG=none BRANCH=none TEST=1.When we detect FRS cc low signal, we can output properly GPIO signal. 2.FRS false-positives test: PD traffic(ex.power nego, data and power swap, soft and hard reset) on the CC line after FRS is enabled. Change-Id: I3a7bc6a684e57fb19e50c41305751b2fca1ffe2d Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1786462 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ec: change usage of "sane" per inclusive languagePaul Fagerburg2020-07-224-6/+6
| | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the terms "sane", "sanity check", and similar with inclusive/non-stigmatizing alternatives. BUG=b:161832469 BRANCH=None TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows results only in third-party code or documentation. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169 Reviewed-by: Jett Rink <jettrink@chromium.org>
* charge_state_v2: add function to check batt current is stableEric Yilun Lin2020-07-221-0/+9
| | | | | | | | | | | | | | | This function would be useful to know if the battery current is in a stable state. BUG=b:160448099 TEST=make buildall BRANCH=kukui Change-Id: I97a25a41b94dd40e2b324052841ec4bec95ee716 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309523 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* OCPC: Calculate system & battery resistanceAseda Aboagye2020-07-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to optimize charging from the auxiliary charger, we need to calculate the system resistance as well as the battery resistance. This allows some charger ICs to compensate for the losses from their output node to the battery. In order to perform this calculation, we must do it when the AP is off (or in suspend) which provides the condition that nearly all of the charge current is entering the battery and isn't being largely consumed by the rest of the system. The combined Rsys+Rbatt calculation is relatively straightforward as it's the delta between the VSYS output and the battery voltage divided by the current entering the battery. In order to separate out the two terms, we can look at the delta between the VSYS output and the VSYS node that's connected to the BFET as well as look at the egress current from the auxiliary charger and the current entering the battery. This commit adds this system resistance measurements and enables it for the RAA489000. The resistances are updated in S5/G3 when charging from the auxiliary charger every ~2.4s. BUG=b:148980020 BRANCH=None TEST=Build and flash waddledoo, verify that charging continues to work in all power states and battery can become full. TEST=Verify that charge current is still close to the target without excessively exceeding it. TEST=Verify charging in constant load via `stressapptest`. TEST=Verify charging in bursty workload via `stressapptest` with pauses for power spikes while monitoring charge current with a current probe. TEST=Verify charging works out of battery cutoff from the auxiliary charger. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I1faa3a0b2b3d8f4fd44d72cd1f546226268df0c6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290058 Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* battery: Expose battery_manufacture_date() as APIWai-Hong Tam2020-07-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | The newer kernels request this data. Add the battery_manufacture_date() as a new API. Checked the TRMs of the following batteries. They don't have any way to query the manufacture date, so return EC_ERROR_UNIMPLEMENTED. * bq27541 * bq27621_g1 * max17055 * mm8013 BRANCH=None BUG=b:160784792 TEST=Hacked to print the manufacture date, on both battery present and not. Change-Id: I1deefb64f6cc594828d6c10c42fa7107dadd7559 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300689 Commit-Queue: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* TCPMv2: add unit tests for packet discard logicPaul Fagerburg2020-07-203-1/+26
| | | | | | | | | | | | | | Add unit tests for the packet discard logic for packets while going into SinkTxNG. BUG=b:160622527, b:161174072 BRANCH=None TEST=`TEST_LIST_HOST=usb_prl make runhosttests` Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: Ied7689d2fe40da93069e58b53ea32e053ab887b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300690 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Add thunderbolt entry flow for active cableli feng2020-07-181-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Order of Enter Mode: SOP', SOP''(if supported), SOP Order of Exit Mode: SOP, SOP''(if supported), SOP' Entry flow start from TBT_START, state changes to TBT_ACTIVE if succeed; changes to TBT_INACTIVE if fail. Handling of NAK If any enter mode SOP* is NAK'ed, exit modes of all SOP* and retry enter. If any enter mode in retry is NAK'ed again, will exit modes of all SOP*, TBT entry failed. Special case: Exit in TBT_ACTIVE: start from TBT_ACTIVE, exit all modes of SOP*, then chagne state to TBT_INACTIVE. BUG=b:148528713 BRANCH=none TEST=1. Attach Thunderbolt dock and active cable, DUT enter Thunderbolt mode 2. Attach Thunderbolt dock and passive cable, DUT enter Thunderbolt mode Signed-off-by: li feng <li1.feng@intel.com> Change-Id: Iaaa63f70c4abc9c269cdbb2a504214f924155901 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277487 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* battery: Fix obtaining battery manufacture dateWai-Hong Tam2020-07-171-1/+1
| | | | | | | | | | | | | | | * Fix the typo: should be SB_MANUFACTURE_DATE (manufacture without r) * Fix the register, i.e. SB_MANUFACTURE_DATE, not SB_SPECIFICATION_INFO * Fix the format parsing. The LSB of year is bit-9, not bit-8. BRANCH=None BUG=b:160784792 TEST=With the later CL, checked the manufacture date. Change-Id: I5b5f2bfefec4bbe700bb1ec0d9d6048123f4ad16 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300688 Reviewed-by: Douglas Anderson <dianders@chromium.org>
* TCPMv2: Add common function for DPM entry and exit modeAyushee2020-07-171-12/+2
| | | | | | | | | | | | | | | | Added a common entry point into DPM for entering or exiting modes. BUG=b:155890173 BRANCH=None TEST=Tested on volteer, able to enter and exit 1. DisplayPort mode with type-C dock 2. Thunderbolt mode with a Thunderbolt dock Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I3bb996d96d0fff543ad7a2e1dc8e09d0b17d0171 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299840 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add common exit mode for all the alternate modesAyushee2020-07-174-18/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | When chipset is transitioning to a new state or on sysjump, the SOC re-negotiates to enter an alternate mode on booting up. This commit: 1. Adds a common DPM function to check for all the active alternate modes one at a time, construct the VDM and send the DPM request to exit the mode. 2. Marks thunderbolt mode as inactive in DFP's thunderbolt mode exit function. BUG=b:152235216 BRANCH=None TEST=Tested on volteer: 1. On connecting a DP dongle, able to enter into DP alternate mode on reboot 2. On connecting a Thunderbolt dock, able to enter into Thunderbolt mode on reboot Change-Id: I7da6a4b08cab9abb3446c0dafdc7c9e9378ef00e Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2270877 Tested-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add USB4 mode support for passive cableAyushee2020-07-173-0/+80
| | | | | | | | | | | | | | | | | | | To support USB4 mode on TCPMV2 this commit: 1. Checks if the port, port partner and cable is USB4 capable and if so enters into USB4 mode 2. Adds a new state PE_ENTER_USB to the PE state machine which sends the data message to enter into USB4 mode and on receiving an ACK from the port partner, sets the mux to USB4. BUG=b:156749387 BRANCH=None TEST=Tested on Volteer, able to enter into USB4 mode Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I3dac12a204a724037681037f98eaf797d4e02f20 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277827 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* USB PD: Move board FRS configuration out of TCPCIEric Herrmann2020-07-171-0/+9
| | | | | | | | | | | | | | | | | Board FRS configuration is more board-specific than TCPC-specific. Move the board FRS configuration from TCPCI to usb_common. Implementing the board-level frs configuration is optional for each project. BUG=b:148144711 TEST=Can build volteer image with CONFIG_USB_PD_TCPC set BRANCH=none Change-Id: I43d13ec0b23f71273807f58db35e7dd333089efa Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290838 Reviewed-by: Keith Short <keithshort@chromium.org>
* tcpmv2: Add usb_tcpmv2_tcpci testEdward Hill2020-07-151-0/+14
| | | | | | | | | | | | | | | | | | | | Add a new test that runs a full set of TCPMv2 layers and state machines, talking to a simulated TCPC via I2C. Initial test cases: 1) Plug in a non-PD power supply -> we connect as sink. 2) AP S5 > S3 > S0 -> auto-toggle + low power. BUG=b:161167893 BRANCH=none TEST=make -j run-usb_tcpmv2_tcpci Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: If8b8eb2cca722ed01cbe1d6000fb3e4f4b70149c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283911 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv1, TCPMv2: add pd event for receiving hard resetRuibin Chang2020-07-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When we receive hard reset message, we call pd_execute_hard_reset() and set task to hard reset state, but the waked up pd_task() may have chance setting to other state. So I add a pd event for receiving hard reset, then waked up pd_task() set the state to hard reset. TCPMv1: When we are in SNK_HRAD_RESET_RECOVER state, we enable rx. At this time If port partner sends source capability, HW auto responds GoodCRC, but in SNK_HRAD_RESET_RECOVER state the handle_data_request() can't process source capability then break the case. So partner sender response timeout and tx hard reset. So I move the enable_rx() to SNK_DISCOVERY state that we are able to handle source capability. BRANCH=None BUG=b:159394180 TEST=On board reef_it8320, and it81202_pdevb: 1.TCPMv1: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. 2.TCPMv2: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. Change-Id: Ia4944883f4ee0420183cb4d1ec62743c49386ea3 Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1389992 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* tcpmv1: Debounce low power mode exitKeith Short2020-07-141-2/+3
| | | | | | | | | | | | | | | | | | Adds a 25ms delay when exiting low power mode. Some TCPCs are slow to update the CC_STATUS register when exiting low power mode when a non-PD charger is connected. BUG=b:155364505 BRANCH=none TEST=make buildall TEST=connect 15W non-PD charger to Volteer C1 port running TCPMv1. Verify charging starts. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ia9579029caa0db0886bcc1a49e8b194173b8ca7e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2267681 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* i2c: For updates, skip write if value unchangedEdward Hill2020-07-131-0/+8
| | | | | | | | | | | | | | | | In i2c_update8/16 and i2c_field_update8/16, if the new value is the same as the old value, then skip the unnecessary i2c_write8/16 of the new value, if CONFIG_I2C_UPDATE_IF_CHANGED is defined for the board. BUG=none BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ib4ec3a50c1f7b5bf5e088196489c0ff55e88d006 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283850 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* OCPC: Use enum chg_id valuesDiana Z2020-07-111-3/+0
| | | | | | | | | | | | | | Remove redundancy between the OCPC header and "enum chg_id" BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4058e2395ec1cbd50ce197775eb07d3bcfad95f3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277834 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Charger: Add dynamic charger chip countDiana Z2020-07-111-1/+2
| | | | | | | | | | | | | | | | Different DB options may cause different numbers of charger chips to be present on the system. Remove constant count for charger chips, and instead always call into the overridable function to query the count. BRANCH=None BUG=b:155963446 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I0e65b8af351ecabe6f7b823e0e56f1932cc280a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277833 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tcpmv2: perform partner reset on startup, remove BBRAMJett Rink2020-07-103-6/+6
| | | | | | | | | | | | | | | | | | | | | | | - Reset the port partner by applying CC Open on both CC lines - Reuse the existing error recovery state to apply CC values - Extend error recovery timer to 240 msec to account for us being able to source Vconn - Since we always reset on startup, we don't need to store previous contracts in BBRAM. BRANCH=none BUG=b:159495742,b:158802939 TEST=see that we apply CC Open upon reset TEST=see that we do not get a fault on Trembyle went setting CC open TEST=apple 3-1 dongle with display port and power on Puff will come back with power and display after a `reboot` EC command (which will trigger the ErrorRecovery brownout path) Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: Iaac09d62e4a31557492cebb354d3a34371c1e9bb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2271002 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tests: reset the PD task before every test caseJett Rink2020-07-101-1/+5
| | | | | | | | | | | | | | | | | In order to isolate each test and make each test run from a clean state, reuse the TASK_RESET_DONE event to signal to the test code that we should just jump back to the beginning of the PD task BRANCH=none BUG=none TEST=see that tests are reset in child CLs Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I3c0408ab0dbc3ad3a26f17aadbda1577ffc7d32f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290650 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* bmi260: Add support for using compressed configKeith Short2020-07-101-0/+10
| | | | | | | | | | | | | | | | | | | | Add a new config option CONFIG_ACCELGYRO_BMI160_COMPRESSED_CONFIG for boards that need to save space. This is intended to be a temporary option until the BMI260 config file can be read from the AP at runtime. This option saves 916 bytes in RW flash space on Volteer. BUG=b:160330682 BRANCH=none TEST=make buildall TEST=boot Volteer, run "ectool motionsense" to verify sensor data is valid. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I294e5e0c3f919527b51e6f7361e74c7bf4afc543 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289216 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* tcpmv2: Debug prints for flags and eventsEdward Hill2020-07-101-4/+0
| | | | | | | | | | | | | | | Define DEBUG_PRINT_FLAG_AND_EVENT_NAMES to print flag names when set and cleared, and event names when handled by tc_event_check(). BUG=none BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: If7c294213af47b8277b01b9898583ceb2559e7f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284259 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* usbc: ensure we are suspending USB-C ports on shutdownJett Rink2020-07-092-10/+14
| | | | | | | | | | | | | | | | | | | | | | After CL:2208221, the check for the PD_CMD task no longer trigger, so we end up not calling suspend on our TCPC ports. We want to continue to suspend, which will apply CC open in TCPMv2 for a cooperative shutdown Also, correct override keyword usage for board_get_usb_pd_port_count since I had to touch those definitions to make IS_ENABLE work BRANCH=none BUG=b:160243292 TEST=See that software sync reboot, applies CC open (and browns out system) Change-Id: I00bf08c7d347441d77834e2c5122a09ca2316280 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276318 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* audio_codec: add the command to reset I2S RXYu-Hsuan Hsu2020-07-081-0/+1
| | | | | | | | | | | | | | | | | | Adds EC_CODEC_I2S_RX_RESET to reset I2S RX because it is not sure that the I2S RX is always disabled when the kernel booting. For example, it will keep enabled if the kernel crashes while cros_ec_codec is used. BRANCH=none BUG=b:158316196 TEST=Able to reset I2S RX from the kernel. Change-Id: I461e5a3c73a4066a9ceb097fc5320aef98d81db4 Signed-off-by: Yu-Hsuan Hsu <yuhsuan@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284503 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org> Tested-by: Yu-Hsuan Hsu <yuhsuan@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* Revert "TCPMv2: make sure Vbus is not sourced in AttachWait.SRC"Denis Brockus2020-07-081-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Commit sha 57b95363c05bdab7b7e57d553a9514128393247d Reverting a CL that was a temporary fix while a real solution was found. This will now be implemented with the following CLs https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282691 https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282699 https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697 BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I76b92388f5ee5bae4bdb945a82f18eb3df3ab1fd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284728 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* TCPMv2: manual control to DBG_ACC in TCPCDenis Brockus2020-07-081-0/+8
| | | | | | | | | | | | | | | | | | | | With TCPCI being changed to allow TCPM to control the DBG_ACC enable instead of the TCPC, it is probably a good idea to actually toggle the bit for any TCPC that uses this signal for internal logic. BUG=b:160253746 BRANCH=none TEST=verify DBG and nonDBG attaches Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ifb91afa0127689e0ca371e64495d80f30bf93c26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* tcpmv2: remove tc_restart indirection layerJett Rink2020-07-071-8/+0
| | | | | | | | | | | | BRANCH=none BUG=none TEST=builds Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I2beaa8b74b313d225b9166f324d2b44cb0aa59ce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276317 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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