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* system: Add print_system_rtc().Aseda Aboagye2016-09-231-0/+13
| | | | | | | | | | | | | | | | | This commit adds a function that allows the real-time clock to be printed on the EC console. This could be helpful in trying to correlate events between the EC's log and the kernel's. BUG=chrome-os-partner:57731 BRANCH=gru TEST=make -j buildall Change-Id: I5e20692a173bddea3dc5c20cc0f2061cc170ce7d Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/388856 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* i2c: Add i2ctest console commandVijay Hiremath2016-09-233-0/+49
| | | | | | | | | | | | | | | | | | Added i2ctest console command to test the reliability of the I2C. By reading/writing to the known registers this tests provides the number of successful read and writes. BUG=chrome-os-partner:57487 TEST=Enabled the i2ctest config on Reef and tested the i2c read/writes. BRANCH=none Change-Id: I9e27ff96f2b85422933bc590d112a083990e2dfb Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/290427 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* flash: Add command to get SPI flash chip infoRandall Spangler2016-09-233-6/+41
| | | | | | | | | | | | | | | | | | | Previously, there was no way to identify which flash chip was used by the EC, for ECs using an external SPI flash. Now, 'ectool flashinfo' will print more information about the SPI flash chip in these cases. BUG=chrome-os-partner:56765 BRANCH=any EC with MEC1322 or NPCX still going through factory TEST=define CONFIG_HOSTCMD_FLASH_SPI_INFO, then 'ectool flashspiinfo' on samus indicates no SPI flash info, and prints additional info on chell and kevin. Without the config defined, all platforms report no spi flash info. CQ-DEPEND=CL:386368 Change-Id: I3c162f7ad12ed4b30ab951c03f24476683382114 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/385702 Reviewed-by: Shawn N <shawnn@chromium.org>
* Cr50: Add gpio input for platform reset (plt_rst_l)Scott2016-09-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | For TPM operation with Intel chipset APs, the signal PLT_RST_L needs to trigger a TPM reset. For current Reef boards, this signal is connected to DIOA13. The next version will have it on DIOM3. This CL adds support for platform reset connected on DIOA13 and uses a new board property so that it doesn't affect Kevin/Gru. BRANCH=none BUG=chrome-os-partner:55115 TEST=manual Used H1 dev board configured as Reef. Created high to low transisition on to verify that platform reset was detected. Tested on Kevin to ensure that resets were not occurring. Change-Id: I58f02b7ffa644a9197f4303ae6e640df181040bd Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/380336 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: notify chipset hooks when the AP state changesMary Ruthven2016-09-221-7/+1
| | | | | | | | | | | | | | | | | | | | | Cr50 monitors UART1 RX to sense the state of the AP. This signal can be used to tell if it is in S0. If the signal is pulled up then the AP is on. If it is not pulled up then the AP is not in S0. This change notifies HOOK_CHIPSET_SUSPEND when UART1 RX is not pulled up, and then notifies HOOK_CHIPSET_RESUME when the signal is high again. The AP usb can be disabled during suspend, so this change changes the hook that triggers disabling the AP usb to be attached to HOOK_CHIPSET_SUSPEND instead of HOOK_CHIPSET_RESUME. BUG=chrome-os-partner:55747 BRANCH=none TEST=buildall Change-Id: I47fb38a4bbcd72424ec2535d61e87f820cf1bcd7 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383978 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* BD9995X: Rename common code of BD99955 and BD99956 as BD9995XVijay Hiremath2016-09-211-5/+6
| | | | | | | | | | | | | | | | | | Except the CHIP_ID and charger name code is common between BD99955 and BD99956. Hence renamed the code to BD9995X so that valid output is printed from console commands. BUG=chrome-os-partner:57519 BRANCH=none TEST=Manually tested on Reef. 'charger' console command prints charger name as 'bd99956' Change-Id: I3c995757941bcc5a6a8026dd807d76a7a47c9911 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/387119 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* charger v2: Don't set charger current limit if capability is unknownShawn Nematbakhsh2016-09-211-1/+1
| | | | | | | | | | | | | | | | | | If charge_manager has not decided on a current limit, don't set a minimum current limit, since we may brown-out in the no / low-battery case. BUG=chrome-os-partner:56139 BRANCH=None TEST=Manual on kevin, attach cut-off battery, attach OEM charger, verify system doesn't brown-out due to OC. Change-Id: Id53eb32c4a8ac9c6d9a0d3f1d700f089a50fcb0f Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/386793 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* reef: Print tcpc firmware versionDivya Sasidharan2016-09-211-0/+3
| | | | | | | | | | | | | | BUG=chrome-os-partner:56866 BRANCH=master TEST=prints firmware version at boot up;make buildall -j Change-Id: Idb067186924e6706ccfc69a64f2febd61f396074 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/380317 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cr50: remove unused detect_off interruptMary Ruthven2016-09-211-2/+1
| | | | | | | | | | | | | | | | The interrupts to detect when the falling edge on the UART signals are currently disabled and never reenabled. Power off is detected by polling and not through interrupts. This change removes all of those falling edge interrupts. BUG=none BRANCH=none TEST=cr50 can detect when the EC, AP, and Servo are off or on Change-Id: I0fd8a0d970f3235b26af6b90dd395ea7c75e0c17 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/385192 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* flash: Call lock function prior to mapped external readShawn Nematbakhsh2016-09-161-0/+10
| | | | | | | | | | | | | | | | | | | | | | | Mapped read access to external flash may conflict with direct access through SPI commands, so call a chip-level function to lock access prior to doing such reads. BUG=chrome-os-partner:55781 BRANCH=Gru TEST=Verify 'ver' still works fine on kevin, and vboot hashing completes successfully. Change-Id: I009d6d5ee61c83260fb49ad4ee137fa3f4cd625a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/385165 Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> (cherry picked from commit a7f3e3fa376731709f4823a0c1d464b4d1deae14) Reviewed-on: https://chromium-review.googlesource.com/386446 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* tcpc: Enable vbus discharge using PD discharge registersKevin K Wong2016-09-132-0/+14
| | | | | | | | | | | | | | | BUG=chrome-os-partner:56040 BRANCH=none TEST=Manually tested on Reef. Used scope to monitor VBUS & it dropped to 0.8V within 650ms. Change-Id: Icaea1dc11a7342a5cc1493d6d3c2ec3408d6d37b Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/367482 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* charger: bd99955: Enable VBUS discharge when appropriateShawn Nematbakhsh2016-09-132-2/+17
| | | | | | | | | | | | | | | | | | | Use a custom VBUS threshold of 3.9V for enable / disable of our VBUS discharge circuit. BUG=chrome-os-partner:55584 BRANCH=None TEST=Plug Apple charge-thru accessory into kevin, plug zinger into accessory, verify charging occurs at PD-negotiated current / voltage. Change-Id: I25f6f68cfe55e8bae2071cda39618b2bfadcb355 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/379475 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charge_manager: Pass uncapped / max current to current limit callbackShawn Nematbakhsh2016-09-132-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | charge_manager may request a charge current limit less than the capability of the supply in certain cases (eg. during PD voltage transition, to make an effort to comply with reduced load spec). Depending on the battery / system state, setting a reduced charge current limit may result in brownout. Pass the uncapped / max negotiated current to board_set_charge_limit() so that boards may use it instead of the requested limit in such circumstances. BUG=chrome-os-partner:56139 BRANCH=gru TEST=Manual on kevin with subsequent commit, boot system with zinger + low-charge battery, verify devices powers up to OS without brownout. Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383732 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: add support ambient light sensor AL3010stabilize-8798.BRocky Hsiao2016-09-131-0/+1
| | | | | | | | | | | | | | | | | AL3010 is Dyna-Image ambient light sensor. Here is add basic driver and functions. BUG=chrome-os-partner:52915 BRANCH=elm TEST=Flash on base board "glados" with ASUS al3010_init is return success. al3010_read_lux is return the lux success. Change-Id: Ie3b97d0889b150c43d19bc84d84f04c13e415c31 Signed-off-by: Rocky Hsiao <rocky.hsiao@dyna-image.com> Reviewed-on: https://chromium-review.googlesource.com/356874 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Thomas Lin <thomas.lin@dyna-image.com>
* cr50: correct a todo bug numberMary Ruthven2016-09-111-1/+1
| | | | | | | | | | | BUG=none BRANCH=none TEST=none Change-Id: I32bf88757b57b60f80e504dd5adb21cb824834ec Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383962 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: remove the pullup on sys_rst on kevinMary Ruthven2016-09-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | There is leakage on SYS_RST_ODL from the internal pullup cr50 has on DIOM0. This change removes the internal pullup on reef. On Kevin there is a bug preventing the EC from being able to pull sys_rst_l up high enoug for cr50 to detect that it is pulled high. This change adds an internal pullup back when cr50 detects that it is on a kevin or gru. BUG=chrome-os-partner:56945 BUG=chrome-os-partner:53544 BRANCH=none TEST=On gru and kevin remove servo verify when apreset is run on the EC it resets cr50 and the AP. Run pinmux and check that there is a pullup on diom0 on kevin but not on gru. Change-Id: Ica4f557745967b93e0bd9c8462916b1f735756ac Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/381322 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Add check to prevent duplicate PIN assignmentsBill Richardson2016-09-091-0/+15
| | | | | | | | | | | | | | | | | | | All PIN() assignments in board/$BOARD/gpio.inc must be unique, since otherwise you're just creating duplicate names and table entries for the same core interrupt and may not be initializing things the way you think. BUG=none BRANCH=none TEST=make buildall; test on Cr50 hardware Also verified that the image size is exactly the same before an after this CL. Change-Id: Ifb1805a010905f67fc5c0d246b6252af73715409 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383773 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* bd99955: Add support for power save mode.Aseda Aboagye2016-09-091-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BD99956 charger has a power save mode that it can enter once VBUS or VCC is removed. This commit adds an optional config option that can be used to select the power save mode: CONFIG_BD99955_POWER_SAVE_MODE By default, no power save mode will be enabled. However, a board can device what level of power savings they wish to use. The levels are the following: BD99955_PWR_SAVE_LOW /* BGATE ON w/ PROCHOT# monitored only system * voltage. */ BD99955_PWR_SAVE_MED /* BGATE ON w/ PROCHOT# monitored only system * voltage every 1ms. */ BD99955_PWR_SAVE_HIGH /* BGATE ON w/o PROCHOT# monitoring. */ BD99955_PWR_SAVE_MAX /* BGATE OFF */ BUG=chrome-os-partner:55631 BRANCH=kevin TEST=make -j buildall Change-Id: Ibab7ad30d5f1ae9917b46b40d6f2800ef19e52dd Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/382877 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* motion: make fiforead optionalGwendal Grignou2016-09-091-0/+1
| | | | | | | | | | | | | This command is rarely used, make it optional when sensor fifo is enabled. BUG=none BRANCH=kevin TEST=compile Change-Id: I2b8351924697953d8df08a0724b5968948603222 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/382676 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* motion: remove accel_int_xxx, dead codeGwendal Grignou2016-09-091-16/+0
| | | | | | | | | | | | | Remove code to set interrupt threshold, unused and broken. BUG=chromium:426659 BRANCH=kevin TEST=compile Change-Id: I11362d3f7131bfe9849be26edeaeb768463c0c7f Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/382675 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* mkbp: Send event when in tablet modeGwendal Grignou2016-09-091-0/+5
| | | | | | | | | | | | | | When tablet mode is detected, send an event to the AP. BUG=chromium:606718 BRANCH=none TEST=Check with evtest that events are sent when the tablet goes in tablet mode and back to device mode. Change-Id: I49f2404b5ecf87e71fa5aef4c8ce9c9beda26a15 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/380414 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* motion: Add tablet mode flag.Gwendal Grignou2016-09-091-0/+1
| | | | | | | | | | | | | | | | | User of sensor data can use tablet mode to rotate the sensor datums along the X axis. This is useful on Kevin where we gather base data. When the base is behind the lid, the datums needs to be rotated by 180 to be in the lid referential. BUG=b:27849483 BRANCH=none TEST=check the sensors changes when kevin is in tablet mode. Change-Id: I60147600f534df0770a44b5158ef8afe87d9dd9d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/380413 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: motion_lid: Add tablet mode detection using lid angle.Gwendal Grignou2016-09-092-0/+11
| | | | | | | | | | | | | | | | | | | | | | Using the lid angle, detect if we are in tablet mode or not. We are in tablet mode when the lid angle is large enough: tablet_mode: 1 | +-----<----+---------- | \/ /\ | | | 0 |------------------------>----+ +------------------+----------+----------+ lid angle 0 240 300 360 BRANCH=kevin BUG=chrome-os-partner:55702,b:27849483 TEST=Check on Kevin event are sent on tablet mode transition. Change-Id: Id9935ce4dd717e2c20fa6c9520defb504a1760d9 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383073 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* motion_lid: prevent angle 0 <-> 360 transition.Gwendal Grignou2016-09-091-0/+6
| | | | | | | | | | | | | | When lid is closed, the lid angle can move to 358, 360, 0, 359 ... Prevent transition 0 from/to 360 by keeping the last calculated value. BRANCH=kevin BUG=chrome-os-partner:55702 TEST=Check transition does not happen anymore. Change-Id: Ifa8415470f425c893e2c3662c84c8fd0156e0524 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/373040 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Remove unused defineGwendal Grignou2016-09-091-6/+0
| | | | | | | | | | | BUG=none BRANCH=none TEST=compile Change-Id: I5eaa69817b16312c32ce546ce20b0a716cc71ba1 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383072 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* g: usb update: clear fallback counter after update finishesVadim Bendebury2016-09-091-0/+8
| | | | | | | | | | | | | | | | | | | | | | There is no point in waiting for a reset to clear the fallback counter, it can be cleared as soon as USB update is finished. BRANCH=none BUG=chrome-os-partner:56864 TEST=on a kevin-tpm2 device: set the reset counter to 7 by running > rw 0x40000128 1 > rw 0x4000012c 7 on the cr50 console. Then try uploading a new RW image over Suzy-Q and verify that it is running after reset. Then verify that cr50 can still be updated Change-Id: I098a87c48b2fe864143715b1e90d4bb2409b9eae Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383077 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* spi_flash: Add GD25LQ40 write-protect supportDavid Hendricks2016-09-091-0/+3
| | | | | | | | | | | | | | | This adds support for the GD25LQ40 NOR flash chip which is identical to W25Q40 for the purposes of write-protection support for the ranges that we care about. BUG=chrome-os-partner:57015 BRANCH=none TEST=needs testing Change-Id: I09ad02e04fab4c539b9558180d73bf6c31da6aed Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/382641 Reviewed-by: Shawn N <shawnn@chromium.org>
* common: Add TABLET_MODE hook.Gwendal Grignou2016-09-073-0/+10
| | | | | | | | | | | | | Add a hook to act when the a device is going in tablet mode and back. BUG=chromium:606718 BRANCH=kevin TEST=Test with evtest that an event is sent to the AP. Change-Id: Ic9c3b158f1178504af41abff18b28de8e07fc7a7 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/380412 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Cr50: Preliminary I2CS TPM2.0 driverScott2016-09-052-0/+5
| | | | | | | | | | | | | | | | | | This CL includes changes in Cr50 required to support TPM via the I2CS interface. BRANCH=none BUG=chrome-os-partner:40397 TEST=manual Limited testing so far. Verified that the I2CS interface is initialized properly and that register reads occur when initiated on the AP console via command i2cget -y 8 0x50 0x1 w Change-Id: I16ac17c7c82d420a384908e4b5a9867a3b24bc9e Reviewed-on: https://chromium-review.googlesource.com/356241 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* config: Make memory command optionalGwendal Grignou2016-09-021-0/+1
| | | | | | | | | | | | | | To save space of working image, make the console memory commands optional. BRANCH=veyron BUG=b:27849483 TEST=Compile, save 320 bytes. Change-Id: Ia538b30b4c06955c44b29eb22ed1a09fad83bd9e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/379115 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Cr50: NvMem: Allow for partitions to not be contiguousScott2016-09-022-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | TPM2.0 needs more NvMem space and currently the whole block is contiguous in memory with 2 partitions. This CL removes the requirement that the partitions are in contiguous which allows for 1 partition to placed at top of RW_A and the other at RW_B. This CL does not change the size of each partition as that will be done in a subsequent CL. BRANCH=none BUG=chrome-os-partner:56798 TEST=manual Tested with the unit test 'make runtests TEST_LIST_HOST=nvmem' and verified that all tests pass. Tested on Kevin, erased the existing NvMem area and verified that TPM was still manufactured and executed the command: trunks_client --own Erased parition 0 and 1 in the new locations and repeated the tests. Change-Id: I295441f94dccdf5a152c32603c2638ffac23f471 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/378675 Commit-Ready: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Tested-by: Andrey Pronin <apronin@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: mark updated image as good once a usb request is receivedMary Ruthven2016-09-021-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is now a call to reset the retry counter before the hard reset after an update. Cr50 will use the updated image for the next 5 boots, but on the 6th it sees the retry counter is greater than 5 and then jumps back to the old image. Cr50 needs to call system_process_retry_counter to reset the counter and corrupt the old image header to prevent falling back to the old image. Normally the reset counter would be processed after it receives a TPM command. Reef does not have Cr50 TPM support. Until Cr50 has TPM support for Reef, Cr50 should have a different point to know when the update is good. This change adds a board property to mark the process the reset counter once the Cr50 USB controller receives a set address request from the host. On Reef the controller defaults to the AP PHY when suzyq is not connected, so it should have a connection to the AP or through suzyq after boot. The board property is only added to Reef. Behavior on Kevin and Gru is unchanged. BUG=chrome-os-partner:56864 BRANCH=none TEST=update reef. Wait until Cr50 prints 'SETAD' then run 'rw 0x4000012c' and verify it is reset to 0. Change-Id: If517202f25a694cd70550e3be047ea502e7c5383 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/380354
* button: Add console command to simulate button pressVijay Hiremath2016-09-021-0/+1
| | | | | | | | | | | | | | | BUG=chrome-os-partner:56878 BRANCH=none TEST=Using console command 'button' verified that volume button icon slides on reef. Change-Id: I8051194fd91f989f8887cebce6ea2af1b8c9f731 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/380315 Commit-Ready: Bill Richardson <wfrichar@chromium.org> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* pwm: Increse PWM duty resolution to 16bitsSam Hurst2016-09-021-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current PWM interface allows for a pwm duty setting ranging from 0 to 100, resulting in a very coarse adjustment. To alleviate the problem, the interface now allows for a pwm duty setting in the range of 0 to 65535. BUG=chromium:615109 BRANCH=None TEST=Manual on chell. `ectool pwmsetduty 1 65535` - Verify LCD backlight goes to 100% `ectool pwmgetduty 1` - Prints 65535 `ectool pwmsetduty 1 0` - Verify LCD backlight goes to 0% `ectool pwmgetduty 1` - Prints 0 terminal pwmduty tests: >pwmduty PWM channels: 0: 100% 1: 62% 2: 100% 3: 80% > pwmduty 1 50 Setting channel 1 to 50% 1: 50% > pwmduty 1 0 Setting channel 1 to 0% 1: disabled > pwmduty 1 100 Setting channel 1 to 100% 1: 100% > pwmduty 1 raw 0 Setting channel 1 to raw 0% 1: disabled > pwmduty 1 raw 65535 Setting channel 1 to raw 65535% 1: 65535 > pwmduty PWM channels: 0: 100% 1: 100% 2: 100% 3: 80% > pwmduty 1 raw 30000 Setting channel 1 to raw 30000% 1: 30000 > pwmduty PWM channels: 0: 100% 1: 46% 2: 100% 3: 80% Change-Id: I299b77585f3988e72d9ac918bdde7dc5fa3df6de Reviewed-on: https://chromium-review.googlesource.com/374481 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* extpower: Allow board to override signal debounce timeDavid Hendricks2016-09-021-0/+3
| | | | | | | | | | | | | | | | This is for boards on which AC_PRESENT can be expected to fluctuate over a much longer period than the code was originally designed for. Specifically, USB-PD systems may require several hundred milliseconds for the state machine to settle before making decisions based on AC_PRESENT status, for example, changing LED state. BUG=chrome-os-partner:56471 BRANCH=none TEST=Tested on Reef with follow-up patch Change-Id: I370048cb79d1593a14077563ec8db8e8282afb16 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/378755
* test: Properly exclude CONFIG_POWER_TRACK_HOST_SLEEP_STATEShawn Nematbakhsh2016-09-021-0/+1
| | | | | | | | | | | | | | | | | | CONFIG_POWER_TRACK_HOST_SLEEP_STATE has a dependency on CONFIG_POWER_COMMON, so remove it from test builds that don't have a chipset task, rather than heavy-handedly removing it from all test builds. BUG=chrome-os-partner:56197 BRANCH=None TEST=`make BOARD=gru tests` Change-Id: I86e20b4dccbb01ee285054a47093d6f60abc2166 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/378119 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* sweetberry: add dwc usb supportNick Sanders2016-09-012-0/+20
| | | | | | | | | | | | | | | stm32f446 uses a synopsys designware USB block rather than the typical ST one. This change adds driver support for the new block, including usb console support. BUG=chromium:608039 TEST=usb console works BRANCH=None Change-Id: I0e143758ae0b5285f1c94ea2ec5aee159e22e00c Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/365448 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: manage total source current availableVincent Palatin2016-09-013-9/+32
| | | | | | | | | | | | | | | | | | | Add a policy to handle the case where the device can source the `CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT` over one of its type-C port if there is no sink connected on the other ones. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:56110 TEST=manual: on Kevin, plug and unplug various devices on the 2 ports, while measuring the type-C pull-up with Twinkie. Change-Id: Id5961f04d0a1b1073f5ab340068efd9079918209 Reviewed-on: https://chromium-review.googlesource.com/373818 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* cr50: unlock consoleMary Ruthven2016-09-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | UART0 RX only needs to be disabled on reef. This change uses a system property instead of a #define to disable UART0 RX that way it can just be done on Reef not Gru or the dev board. BUG=chrome-os-partner:55510 BRANCH=none TEST=manual rw 0x4060000c shows a value of 1 for reef and 3 for gru gru kevin and reef still boot. Connect DIOA13 to DIOA1 on the dev board and verify the console can be used. Change-Id: I5ee3559c2b35f959c0d67f233d1dfa40743b4064 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/378336 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Revert "ectool: Add ectool command to do AP force shutdown"Vijay Hiremath2016-09-011-2/+1
| | | | | | | | | | | | | | | | There are no actual use cases of this command hence reverting it. This reverts commit 2324ed47aa3b6da72a9c022a21b46a8ea9eb896c. BUG=chrome-os-partner:56681 BRANCH=none TEST=make buildall -j Change-Id: Ibfa6c99d591e7601299236d8ad56451ef5ab20f2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/377852 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Add console support for restricted commandsBill Richardson2016-08-311-15/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for CONFIG_RESTRICTED_CONSOLE_COMMANDS. If the appropriate options are configured, restricted commands can be prevented from running. Nothing in this CL actually uses that, but it works if you turn it on. BUG=chrome-os-partner:55322 BRANCH=none TEST=make buildall, test on Cr50 hardware I also tested it manually. If you add this to board.h: #define CONFIG_CONSOLE_COMMAND_FLAGS #define CONFIG_RESTRICTED_CONSOLE_COMMANDS #define CONFIG_CONSOLE_COMMAND_FLAGS_DEFAULT CMD_FLAG_RESTRICTED and this to board.c: static int restricted_state; int console_is_restricted(void) { return restricted_state; } static int command_lock(int argc, char **argv) { int enabled; if (argc > 1) { if (!parse_bool(argv[1], &enabled)) return EC_ERROR_PARAM1; restricted_state = enabled; } ccprintf("The restricted console lock is %s\n", restricted_state ? "enabled" : "disabled"); return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND_FLAGS(lock, command_lock, "[<BOOLEAN>]", "Get/Set the restricted console lock", 0); /* no restrictions */ then you can use the "lock" command to enable and disable every other console command except for it and "help". Change-Id: Ic9517f9ea7a9867f15e5d14b302246070163d558 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/376186 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add configs to add flags to console commandsBill Richardson2016-08-312-12/+48
| | | | | | | | | | | | | | | | | | If we add a .flags field to the console commands data structure, we can use it to distinguish some commands from others, for example to mark some commands as safe and others as dangerous. This just adds the undefined CONFIG_ options. They aren't used anywhere, so there's no behavioral difference yet. BUG=chrome-os-partner:55322 BRANCH=none TEST=make buildall Change-Id: I17fdf177dcb4324c77565bd95344da1405ea15ed Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/376185 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ectool: Add ectool command to do AP force shutdownVijay Hiremath2016-08-301-1/+2
| | | | | | | | | | | | | | | | | Added support to do force AP shutdown from kernel console using the ectools. BUG=chrome-os-partner:56681 BRANCH=none TEST=make buildall -j; Manually tested on reef. "ectool reboot_ec apshutdown" puts system in G3. Change-Id: I509678a67a6a54da67de99efb00e1f08a1ed1fea Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/376863 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: select dynamically Rp valueVincent Palatin2016-08-252-11/+19
| | | | | | | | | | | | | | | | | | | | | Add API to switch the Rp pull-up value on CC dynamically at runtime. This is a preparatory work for boards having a more complex maximum source current policy (eg 2 ports sharing a common pool of power). For fusb302, update the voltage thresholds for open/Rd/Ra as they depend on the Rp (was missing from the previous change). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:56110 TEST=make buildall Change-Id: Id3c24a31a16217075a398ec21ef58ee07187a882 Reviewed-on: https://chromium-review.googlesource.com/373501 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: connect to AP phy on reef when not in ccdMary Ruthven2016-08-252-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cr50 needs to connect to the AP phy when not in ccd so cr50 can be updated and used as a gnubby. This change uses the strapping options to detect when it is on reef and modifies the ccd behavior to initialize usb on the AP phy when ccd is disabled. On gru the cr50 behavior is unchanged. In RDD this change removes the checks that the current_map is the correct one based on the detected debug state. rdd_init calls rdd_interrupt to set up the usb and ccd state correctly. Having that check prevents that initial rdd_interrupt from calling rdd_detached. Before rdd_detached just disabled usb and we knew during init it would already be disabled. Now we want to make sure it is called if a debug accessory is not attached to initialize usb on the AP PHY. BUG=chrome-os-partner:56098 BRANCH=none TEST=manual verify ccd still works on gru disconnect suzyq and reset reef. run lsusb on the AP and verify it shows cr50 as a device. connect suzyq and check that the AP no longer sees cr50. disconnect suzyq and verify the AP sees it again Change-Id: I3c1ccc54895835bce12302f3ea43fc2e751b4c97 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/372920 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* tcpm: workaround TCPC takes longer time to update CC statusVincent Palatin2016-08-251-0/+3
| | | | | | | | | | | | | | | | | | | | when TCPC takes a longer time to update its CC status upon connection, a legacy C-to-A charger or certain Type-C charger that presents 5V VBUS by default, TCPM could be mistaken the charger as a debug accessory. BUG=chrome-os-partner:55980 BRANCH=none TEST=Manually tested on Reef. PD, Type-C, BC1.2, non-BC1.2, DP, HDMI are working on both C-ports. Change-Id: Ic3b0ecd3d14109239d8c0ff0064476595b7f93a0 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/367950 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* power: rk3399: Debounce PGOOD_AP signalShawn Nematbakhsh2016-08-251-1/+13
| | | | | | | | | | | | | | | | | PGOOD_AP may go low for a period < 100ms during regulator output voltage transitions, so ignore such pulses. BRANCH=None BUG=chrome-os-partner:54814 TEST=On kevin, verify suspend / resume succeeds for 10 cycles. Change-Id: I5b6240a570472e1ea74de6e5f2341472ea7afe6b Reviewed-on: https://chromium-review.googlesource.com/374524 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Shunqian Zheng <zhengsq@rock-chips.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Remove unused CONFIG_CONSOLE_RESTRICTED_INPUT optionBill Richardson2016-08-242-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Nothing has used this config option since Spring and Skate, back in early 2014. There's nothing in ToT that uses it at all. I want to add something similar for other purposes, and having two similar-sounding options will just cause confusion. NOTE: Although the comments in include/system.h said that the two functions system_get_console_force_enabled() system_set_console_force_enabled() were only useful when CONFIG_CONSOLE_RESTRICTED_INPUT is defined, they were being used in chip/stm32/system.c. But since the bkpdata registers are only accessible to the EC, there was no way to initialize or modify the one relevant bit that those functions cared about, so they almost certainly had no effect. BUG=chrome-os-partner:55322 BRANCH=none TEST=make buildall Change-Id: Id41541193d4559f5c507bdd0268b049166af4497 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374525
* Modified flash API batch write logic to respect row boundaries.Johnnie Chan2016-08-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | * Added MACRO for specifying row size of flash device. * Set chip/g specific values for flash row size. The flash API for g/chip will segment large write operations into a maximum of 32 word blocks for batch writes to flash memory. Prior to the change in this commit, the segmentation will adhere to avoiding crossing page boundaries (2048B) but will not respect row boundaries (256B). The flash controller will reject any write op that crosses a row boundary and set a row boundary violation code on its error register. BRANCH=none BUG=b:30819377 TEST=make BOARD=haven_dev Change-Id: I489122ec0f0db6374dd373a1385c3012bdface20 Reviewed-on: https://chromium-review.googlesource.com/371003 Commit-Ready: Bill Richardson <wfrichar@chromium.org> Commit-Ready: Johnnie Chan <johnniec@google.com> Tested-by: Johnnie Chan <johnniec@google.com> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* barometer: Add barometer driver for BMP280 in ECDivya Sasidharan2016-08-242-0/+5
| | | | | | | | | | | | | | | | | | | | BMP280 driver API is designed to work with motion sensor task. The sensor sampling parameters are configured optimally for handheld device in accordance with BMP280 spec recommendation. BUG=None BRANCH=master TEST=Tested on amenia; with appropriate .odr in board file test command "accelread 4" returns raw pressure value in Pa; accelinfo on 4000 shows Pa value. Change-Id: I3f4c0c33a77dd317aa1425624d3cc7f4ec6b45a1 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351660 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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