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* Reland "u2f: Append hmac of auth time secret to versioned KH"stabilize-quickfix-13421.74.B-cr50_stabstabilize-quickfix-13421.100.B-cr50_stabstabilize-13421.99.B-cr50_stabstabilize-13421.96.B-cr50_stabstabilize-13421.89.B-cr50_stabstabilize-13421.80.B-cr50_stabstabilize-13421.73.B-cr50_stabstabilize-13421.53.B-cr50_stabstabilize-13421.42.B-cr50_stabstabilize-13421.103.B-cr50_stabstabilize-13421.102.B-cr50_stabrelease-R86-13421.B-cr50_stabfirmware-zork-13421.B-cr50_stabYicheng Li2020-08-182-5/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of d2627d12bb21308f49a72cadaf47a0a86730a960 with one modification: The versioned key handle header (the old "key handle" concept) is now used in the derivation of authorization_hmac. This is to tie the key handle to the authorization secret. Original change's description: > u2f: Append hmac of auth time secret to versioned KH > > When generating versioned KHs, u2fd should send a public derivative > (sha256) of the user's auth time secret to cr50. Cr50 derives an > hmac of it and appends this authorization_hmac to the KH. > > When signing versioned KHs, u2fd may supply the unhashed auth time > secret. Cr50 will check the authorization_hmac if no power button press. > If the reconstructed hmac matches authorization_hmac, power button press > is waived. > > Currently for v1, we will just prepare the authorization_hmac but not > enforce it. This is because fingerprint and PIN are unable to unlock > the same secret. > > While we waive power button press for v1, we can enforce > authorization_hmac whenever auth-time secrets is ready. > > BUG=b:144861739 > TEST=- Use a known 32-byte "auth-time secret" > - Compute the sha256 of the auth-time secret (this is public) > - u2f_generate with the computed "authTimeSecretHash" > - Add code to u2f_sign command handler such that cr50 computes > the sha256 of the supplied auth-time secret at u2f_sign time > and require power button press if the hmac doesn't match. > - u2f_sign with the true auth-time secret -> observe in logging > that hmac matches, and no power button press required. > - u2f_sign with a wrong auth-time secret -> observe in logging > that hmac doesn't match, and power button press is required > for signing. > > Cq-Depend: chromium:2321731 > Change-Id: Ib9ae913667f8178ac7a4790f861d7dada972c4a0 > Signed-off-by: Yicheng Li <yichengli@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317047 > Reviewed-by: Andrey Pronin <apronin@chromium.org> > Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> BUG=b:144861739 TEST=See original CL's TEST above Cq-Depend: chromium:2327865 Change-Id: Ia1b0b4a585ec604398cfa730354ae1a91e7bc00b Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355177 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* Revert "u2f: Append hmac of auth time secret to versioned KH"Archie Pusaka2020-07-302-27/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit d2627d12bb21308f49a72cadaf47a0a86730a960. Reason for revert: Causing crbug.com/1111182 Original change's description: > u2f: Append hmac of auth time secret to versioned KH > > When generating versioned KHs, u2fd should send a public derivative > (sha256) of the user's auth time secret to cr50. Cr50 derives an > hmac of it and appends this authorization_hmac to the KH. > > When signing versioned KHs, u2fd may supply the unhashed auth time > secret. Cr50 will check the authorization_hmac if no power button press. > If the reconstructed hmac matches authorization_hmac, power button press > is waived. > > Currently for v1, we will just prepare the authorization_hmac but not > enforce it. This is because fingerprint and PIN are unable to unlock > the same secret. > > While we waive power button press for v1, we can enforce > authorization_hmac whenever auth-time secrets is ready. > > BUG=b:144861739 > TEST=- Use a known 32-byte "auth-time secret" > - Compute the sha256 of the auth-time secret (this is public) > - u2f_generate with the computed "authTimeSecretHash" > - Add code to u2f_sign command handler such that cr50 computes > the sha256 of the supplied auth-time secret at u2f_sign time > and require power button press if the hmac doesn't match. > - u2f_sign with the true auth-time secret -> observe in logging > that hmac matches, and no power button press required. > - u2f_sign with a wrong auth-time secret -> observe in logging > that hmac doesn't match, and power button press is required > for signing. > > Cq-Depend: chromium:2321731 > Change-Id: Ib9ae913667f8178ac7a4790f861d7dada972c4a0 > Signed-off-by: Yicheng Li <yichengli@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317047 > Reviewed-by: Andrey Pronin <apronin@chromium.org> > Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Bug: b:144861739 Cq-Depend: chromium:2327779 Exempt-From-Owner-Approval: Causing crbug.com/1111182 Change-Id: I8c8a594d148b92556b20a2753aa1007cf2c1676b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2327358 Tested-by: Archie Pusaka <apusaka@chromium.org> Reviewed-by: Yicheng Li <yichengli@chromium.org> Reviewed-by: Archie Pusaka <apusaka@chromium.org> Commit-Queue: Archie Pusaka <apusaka@chromium.org>
* u2f: Append hmac of auth time secret to versioned KHYicheng Li2020-07-292-4/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When generating versioned KHs, u2fd should send a public derivative (sha256) of the user's auth time secret to cr50. Cr50 derives an hmac of it and appends this authorization_hmac to the KH. When signing versioned KHs, u2fd may supply the unhashed auth time secret. Cr50 will check the authorization_hmac if no power button press. If the reconstructed hmac matches authorization_hmac, power button press is waived. Currently for v1, we will just prepare the authorization_hmac but not enforce it. This is because fingerprint and PIN are unable to unlock the same secret. While we waive power button press for v1, we can enforce authorization_hmac whenever auth-time secrets is ready. BUG=b:144861739 TEST=- Use a known 32-byte "auth-time secret" - Compute the sha256 of the auth-time secret (this is public) - u2f_generate with the computed "authTimeSecretHash" - Add code to u2f_sign command handler such that cr50 computes the sha256 of the supplied auth-time secret at u2f_sign time and require power button press if the hmac doesn't match. - u2f_sign with the true auth-time secret -> observe in logging that hmac matches, and no power button press required. - u2f_sign with a wrong auth-time secret -> observe in logging that hmac doesn't match, and power button press is required for signing. Cq-Depend: chromium:2321731 Change-Id: Ib9ae913667f8178ac7a4790f861d7dada972c4a0 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317047 Reviewed-by: Andrey Pronin <apronin@chromium.org> Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* u2f: Add support for versioned key handlesYicheng Li2020-07-032-12/+55
| | | | | | | | | | | | | | | | | | | | | | | | Support generating and signing versioned key handles in addition to non-versioned ones. BUG=b:144861739 TEST=used webauthntool to verify that KH generated by old cr50 firmware can be signed with this firmware TEST=used webauthntool to verify that non-versioned KH generated by this firmware can be signed by old cr50 firmware (This and the first TEST proves that non-versioned path is the same as old firmware.) TEST=used webauthntool to verify that non-versioned KH generated by this firmware can be signed by this firmware TEST=used webauthntool to verify that versioned KH generated by this firmware can be signed by this firmware TEST=test_that --board=nami <IP> firmware_Cr50U2fCommands Cq-Depend: chromium:2280394 Change-Id: Idf413a1a3e6c35a3e7e651faaa91fe2894b805db Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202949 Reviewed-by: Louis Collard <louiscollard@chromium.org>
* fips: introduce FIPS & policy power-up known-answer testsVadim Sukhomlinov2020-07-023-0/+8
| | | | | | | | | | | | | | | | | | | | | Add invocation of power-up known-answer tests (KATs) on power-on and after failures, while avoiding power-up tests on wake from sleep. Added console & vendor commands to report FIPS status, run tests, simulate errors. BUG=b:138577539 TEST=manual; check console fips on, fips test, fips sha, fips trng will add tpmtest for vendor command Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Change-Id: I58790d0637fda683c4b6187ba091edf08757f8ee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2262055 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* common.h: consolidate stdbool.h and stddef.hVadim Sukhomlinov2020-06-253-3/+2
| | | | | | | | | | | | | | | | | | | Many source files over time started to respect 'bool' and 'size_t' types for better code readability. However, these types are defined in stdbool.h and stddef.h headers, so each time they were used there was a need to include them. util.h included both, and one option was to use it, but it conflicts with TPM2 library on definition MAX/MIN BUG=none TEST=make buildall -j Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Change-Id: Ia0aca578e901c60aeafee5278471c228194d36bf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2258540 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* NVMEM: selective erase of TPM objectsVadim Bendebury2020-06-251-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds another NVMEM API, which allows to erase stored TPM objects selectively. The list of indices of the objects to be erases is supplied in a zero terminated array. The existing nvmem_erase_tpm_data() has been modified to erase only selected objects, if the list of objects is supplied by the caller. BUG=b:138578447 TEST=Using tpm_manager_client created a bogus NVMEM object, modified Cr50 code to provide a CLI command which would invoke the new NVMEM API function to delete the new object. Invoked 'dump_nvmem' command before and after deleting the bogus object. Observed the NVMEM contents compacted and the bogus object deleted. Rebooted the device, observed proper Chrome OS start up maintaining the existing user account. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I3e299c8004141fa01ff20c290131b6526575c42e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2253324 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Andrey Pronin <apronin@chromium.org>
* fips_rand: FIPS-compliant way to generate randomsVadim Sukhomlinov2020-06-241-0/+3
| | | | | | | | | | | | | | | | | | Add proper TRNG health tests and CR50-wide DRBG with reseeding BUG=b:138578157 TEST=tpmtest.py -t1 fails after cr50 reboot. rand_perf in console (kick-off FIPS TRNG test) and then tpmtest.py -t1 and tpmtest.py -t2 should succeed. Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Change-Id: I94c2dbd7a00dedcf1a0f318539a3c73c0c8076ef Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2251381 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* console: add service functions to enable/disable console outputVadim Sukhomlinov2020-06-161-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | FIPS 140-2 certification requires that security related output from module should be disabled until completion of known-answer tests. However, it's tricky to justify what output is security related, as most of output data can be used to track current execution stage which may be helpful for attacker. So, its safer to disable any output for a short time once internal testing is done. Provide console_disable_output() and console_enable_output() functions which are supposed to be used by board initialization code driving FIPS mode initialization. BUG=b:138577539 TEST=manual; make buildall -j Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Change-Id: I42902acef7a5e99142ce2b6517ae511f63206e93 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2247103 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* flash_log: add error code for FIPS known-answer and continuous testsVadim Sukhomlinov2020-06-161-4/+7
| | | | | | | | | | | | | | | | Add FE_LOG_FIPS_FAILURE event type BUG=b:138577539 TEST=manual Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Change-Id: I11be32598ddbbb327175a656c21abcb8388246d0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2247106 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* ap_ro: add handling of the corrupted hashVadim Bendebury2020-06-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch closes the AP RO verification loop on the Cr50 side. If the check is triggered, the valid AP hash is found, and the RO contents is found to not match the hash, the Cr50 will - assert the EC reset; - set a flag to prevent the code from deasserting EC reset; - start a periodic hook to reassert EC reset in case the user hits power+refresh. This will prevent the Chrome OS device from booting. A new CLI command is being added to display the verification state. In developer images the new command would allow to clear the failure state, when running prod images the only way out of the failure state would be the powercycle. BUG=b:153764696 TEST=verified that erasing or programming AP RO hash when board ID is set is impossible. Verified proper shutdown in case AP RO has is present and the AP RO space is corrupted and recovery using the new cli command when running a dev image. Verified that 'ecrst off' properly reports the override. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I1029114126a9a79f80385af7bc8d5467738e04ca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2218676 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Introduce TPM_BOARD_CFG registerNamyoon Woo2020-06-011-1/+2
| | | | | | | | | | | | | | | | | | This patch adds the TPM vendor-defined register, TPM_BOARD_CFG, which indicates the board configuration status. This register is attributed as one-time-programmable and the value is maintained across deep sleeps. Cr50 allows a write on this register right after a cr50 reset until it receives a TPM2_PCR_Extend command. BUG=b:148691139 TEST=none Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: I89ae5a53c15990ef78812aec5da81a59f04d7d98 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202838 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* apply INT_AP_L extension on I2CS interfaceNamyoon Woo2020-05-291-0/+7
| | | | | | | | | | | | | | | | This patch applies INT_AP_L extension on I2CS. It uses GPIO_MONITOR_I2CS_SDA to detect a transaction start during INT_AP_L assertion and to deassert INT_AP_L. BUG=b:148691139 TEST=None Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Iedd59b488dfdfaaf71dd71eda6437f1a9402d3c4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2150517 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* ap_ro_integrity_check: move error codes enum into the .h fileVadim Bendebury2020-05-291-0/+15
| | | | | | | | | | | | | | This is a no-op change which will make it easier to have gsctool report sensible errors in case attempts to erase AP RO hash space fail. BUG=b:153764696 TEST='make buildall -j' succeeds Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Iad396a52439ac7e4377f1dc983f00e976fabd8ad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2207791 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* ap RO verification: enable loggingVadim Bendebury2020-05-292-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When AP RO verification is attempted, a lot of thing could go wrong, and the operator would usually have very little insight into what's happening unless there is a terminal connected to the Cr50 console. This patch adds a new log event for registering the AP RO verification progress. The event payload is a single byte value, logging the following events: 0 - refresh key press is detected 1 - power button has been released before AP RO check was triggered 2 - trigger sequence timeout (refresh button not pressed in time) 3 - AP RO check triggered 4 - could not run the check, hash space not programmed 5 - could not run the check, hash space corrupted 6 - AP RO verification failed 7 - AP RO verification succeeded BUG=b:153764696 TEST=verified logging during various AP RO verification attempts: $ gsctool -a -L Log time zone is PST Dec 31 69 16:00:01 : 00 May 06 20 21:20:49 : 09 01 May 06 20 21:21:53 : 09 00 May 06 20 21:21:54 : 09 00 May 06 20 21:21:55 : 09 03 May 06 20 21:21:56 : 09 07 May 06 20 21:23:03 : 09 00 May 06 20 21:23:04 : 09 00 May 06 20 21:23:05 : 09 02 May 07 20 11:21:52 : 09 00 May 07 20 11:21:53 : 09 00 May 07 20 11:21:54 : 09 01 May 08 20 11:57:21 : 09 00 May 08 20 11:57:22 : 09 00 May 08 20 11:57:23 : 09 03 May 08 20 11:57:24 : 09 04 May 08 20 12:07:15 : 09 00 May 08 20 12:07:16 : 09 00 May 08 20 12:07:17 : 09 03 May 08 20 12:07:19 : 09 07 May 08 20 12:09:20 : 09 00 May 08 20 12:09:21 : 09 00 May 08 20 12:09:22 : 09 03 May 08 20 12:09:23 : 09 06 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I739f9dbb2e7b8fc87601d61e1f87eb49d85bdf14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191283 Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* Add AP RO integrity check implementation.Vadim Bendebury2020-05-222-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds code which accepts the vendor command communicating the list of the AP firmware sections to verify and the expected cumulative sha256 sum value of the sections. The vendor command payload is checked for sanity: each range offset is not expected to exceed 32M bytes (the largest possible SPI flash size) and each size is not expected to exceed 4M bytes. If any inconsistencies are found in the payload, or the flash integrity space is already programmed, an error is returned to the AP. It the command validity check succeeds, the payload of the vendor command is prepended by a header including the number of the flash regions to check and a 4 byte checksum of the stored information. This combined information is stored in the dedicated H1 flash space, specifically the RO_B region, at offset of 0x3000, 2K bytes page below the region used for the flash log. The valid RO range in upgrade_fw.c:set_valid_sections() is modified to prevent erasing of the AP RO hash value during Cr50 RO updates. The new file also introduces a function used to verify the AP flash when requested. The returned value indicates one of three conditions: - valid verification information not found - AP flash integrity verification failed - AP flash integrity verification succeeded A new console command allows to examine the contents of the space where the list of ranges and the sum are stored. CR50_DEV builds also allow to erase the page. BUG=b:153764696 TEST=with the rest of the patches applied verified successful execution of the AP RO verification sequence. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I1894ef897a86e9d60b9f5bcff3a680f632239e1b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171398 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* crypto_api: use const voidVadim Bendebury2020-05-141-2/+2
| | | | | | | | | | | | | | | | | | | This is a minor API clean up, it is not entirely clear why const void pointers were not used originally, but using this type for input data (and void pointer for output) makes interfacing with the library much easier. Also modified cases where the first parameter of DCRYPTO_SHA1_hash() was typecasted unnecessarily. BUG=none TEST=make buildall succeeds, Cr50 image supports booting a Chrome OS device just fine. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ic8a670aa7b26598ea323182845c184b7f1d715a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2163568 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* ec: Convert comments to C-styleLouis Collard2020-04-151-48/+52
| | | | | | | | | | | | BUG=b:123686979 TEST=make buildall -j Change-Id: I1fc49f44c6f1be3bcacb26662862cb68899be299 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2102092 Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Leo Lai <cylai@google.com>
* ec: Remove typedefs from u2f.hLouis Collard2020-04-151-15/+15
| | | | | | | | | | | | | | BUG=b:123686979 TEST=make buildall -j Cq-Depend: chromium:2051792 Signed-off-by: Louis Collard <louiscollard@chromium.org> Change-Id: I9558ebcf5a83ae8a422a43b776147bececea70ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2102091 Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Leo Lai <cylai@google.com>
* ec: Run clang-format on u2f.hLouis Collard2020-04-151-53/+53
| | | | | | | | | | | | BUG=b:123686979 TEST=make buildall -j Signed-off-by: Louis Collard <louiscollard@chromium.org> Change-Id: I646483719d5b97bf9622bbdd2f78ec3dce995d4a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2102089 Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Leo Lai <cylai@google.com>
* VENDOR_CC_WP: allow to enable write protection (WP)Vadim Bendebury2020-04-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | The gsctool utility allows to examine the device WP status, but does not allow to set it. It would be useful to provide the user with a means of enabling WP at any time. This patch extends the existing vendor command VENDOR_CC_WP implementation to allow an optional one byte parameter. If the parameter is present, the Cr50 will unconditionally invoke set_wp_state(1) when processing the command. BUG=b:153881773 TEST=with the corresponding gsctool.c changes coming up in the next patch verified that attempts to enable WP when running the unmodified Cr50 image fail with error message "Early Cr50 versions do not support setting WP", and that the updated Cr50 image allows to enable WP using 'gsctool -a -w enable' Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I75c200bbb9085e9f74c227ef80f782defdaaa29e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2149519 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Implement sequence for detecting trigger for AP RO verificationVadim Bendebury2020-04-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When supported, the AP RO verification would be triggered by the operator pressing and keeping pressed the power button and then pressing and releasing a few times the refresh key. As proposed in this patch, to trigger the verification the operator must complete the sequence within 3 seconds by pressing the refresh key three times. The sequences is controlled by periodic polling. Enabling refresh key press interrupts was investigated, the issue is that the key generates plenty of interrupts due to dribbling, to the tune of a hundred each time it is pressed. It is much cheaper to just poll every 20 ms. The CONFIG_AP_RO_VERIFICATION config flag controls enabling of this feature. BUG=b:141191727 TEST=enabled the new feature and verified proper operation by both detecting the trigger and abandoning the sequence due to released power button or not enough times pressed refresh key. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I55376a87009d6f8020358ad11db1e47d0b8393ed Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2144944 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Prepare for transitioning to packet mode consoleVadim Bendebury2020-03-312-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A very few changes are needed to support the packet mode: - provide functions to report how much room is left in USB/UART transmit buffers; - compile out cprintf/cprints/cputs just in case to be able to catch cases where util_precompile.py fails to convert them for whatever reason; - do not add CR to every LF, this messes up packet transmissions, and the terminal is doing the right thing anyways - there is a problem with the USB channel in packet mode: the device reboots as soon as an attempt to send something to the host is undertaken. The problem can be rectified by disabling the deferred function path in the Cr50 console USB channel. A bug was open to track it down, but in packet mode using deferred function in this path is less critical, as the amount of sent data always is at least as much as the packet header size BUG=b:149964350, b:152116489 TEST=with the rest of the patches applied packet mode console works fine. When packet mode is disabled the conventional mode console works fine. Change-Id: Ib010cede36adc87cf80f49e5d76ec9e274d9e608 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2114238 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* cmsg.c, console packet mode driverVadim Bendebury2020-03-311-2/+33
| | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a console driver for packet mode. The driver processes information prepared by util_precomplie.py when processing printf invocations in the source code. Each invocation is replaced by a cmsgX function, where X is the number of format arguments. cmsgX functions prepare an array of parameters of size X and invoke a common function, passing it the array and an integer value, consisting of up to 8 4 bit fields, describing the parameters. Since both console drivers need to be able to filter logical console channels, the channel_mask variable is made global. BUG=b:149964350 TEST=with the rest of patches applied and packet mode enabled, verified proper operation of both Cr50 consoles (USB and UART). Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I1f6ef5ea50bffbe14d3e3850fff0191c54f37033 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2113931 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* make: add preprocessor stageVadim Bendebury2020-03-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | For the upcoming introduction of transitioning Cr50 console communications to packet mode, there is a need to be able to replace all print function invocations in the code with calls to packet sending function. This replacement is easiest to make in C preprocessor outputs, as there all macros are replaced with actual function invocations. This patch adds a configuration option CONFIG_EXTRACT_PRINTF_STRINGS, when enabled, building of the image object files starts happening in three steps instead of one, instead of .c => .o transition, the steps are .c => .E => .Ep => .o, where .E is the C preprocessor output, and .Ep is result of post processing by ./util/util_precompile.py. BUG=b:149964350 TEST=image layout does not change if CONFIG_EXTRACT_PRINTF_STRINGS is not defined. With the rest of the patches applied defining the above config option allows to build a Cr50 image supporting packet console communications mode. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I20b8ba7c5d13cb54ac6adbdbce856d92023ce997 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2113122 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Modify ec_comm command to corrupt NVMEM copy of kernel secdataNamyoon Woo2020-03-312-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'ec_comm corrupt' used to corrupt a copy of EC-RW hash in ec_efs.c for test purpose. This patch makes it corrupt the copy stored in the TPM NVMEM cache first, and then read it into the cache in ec_efs.c. 'corrupt' option is available for regular image as well onl if CCD is opened. 'reload' option is obsolete. BUG=b:150650877 TEST=checked the behavior in the sequence below: 0. program regular image cr50> ec_comm corrupt CCD is not opened Access Denied Usage: ec_comm [corrupt] 1. open ccd. 2. Checked the original hash code. cr50> ec_comm ... ec_hash_sec_data : /* original hash code, Hm. */ 3. Corrupt the hash code. cr50> ec_comm corrupt ... ec_hash_sec_data : /* corrupted hash code, Hc. */ 4. Reboot EC. ec> reboot ap-off 5. Check the boot mode is NO_BOOT mode. chroot$ gsctool --getbootmode ... Boot mode = 0x01: NO_BOOT 6. Turn on AP by tapping the power button. Check AP rewrites the secdata, and Cr50 reloads it. cr50> ec_comm ... ec_hash_sec_data : /* original hash code, Hm. */ Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Id34239911da204e1eacd285fa601a9b5db03c4ee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2119130 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org> Tested-by: Namyoon Woo <namyoon@chromium.org>
* g: add CONFIG_USB_CONSOLE_DEFAULT_DISABLEDMarius Schilder2020-03-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | To avoid some sort of race in private-cr52 endpoint initialization, which results in a reboot loop. Calling usb_console_enable() in HOOK_LAST instead appears stable, at cost of missing some early console output. While at it, reduce some SRAM usage and improve legibility by moving to bool from int. Strictly opt-in; behavior unchanged for existing code. BUG=chromium:1063240 BRANCH=cr50 TEST=make buildall; cr52 build w/ usb_console now enumerates w/o resets. Signed-off-by: mschilder@google.com Change-Id: I352edb4c045df401cb99573da5765b88deb45d0d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2111450 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Commit-Queue: Marius Schilder <mschilder@chromium.org> Tested-by: Marius Schilder <mschilder@chromium.org> Auto-Submit: Marius Schilder <mschilder@chromium.org>
* remove CONFIG_USB_HID_KEYBOARD and CONFIG_USB_UPDATENamyoon Woo2020-03-131-15/+0
| | | | | | | | | | | | | | | | | | | | | | This path removes CONFIG_USB_HID_KEYBOARD support and CONFIG_USB_UPDATE support because they are not used in any cr5X board configuration. Ths patch also removes some subsidiary configs as upload hook script guides. > CONFIG_USB_PAIRING > CONFIG_TOUCHPAD_VIRTUAL_OFF > CONFIG_USB_CONSOLE_READ BUG=none BRANCH=cr50 TEST=make buildall Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Iafa553fdf58772744b1d9a5c7f5460f42264f468 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2103045 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* change the init proiorities of ec_efs_init() and ec_comm_init()release-R82-12974.B-cr50_stabNamyoon Woo2020-03-121-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reprioritizes ec_comm_init() and ec_efs_init() so that they won't be executed prior to board_init(), which executes nvmem_init(). BUG=b:151187315 BRANCH=cr50 TEST=let cr50 reboot a few times, and checked the console message and the ec_comm command output that Kernel secdata was reloaded without error. Swapped cr50 image from normal to dev, vice versa, and repeated the rebooting. [Reset cause: hard] [0.003799 Inits done] strap pin readings: a1:2 a9:3 a6:0 a12:0 [0.005893 Valid strap: 0xe properties: 0xa00041] [0.007991 init_jittery_clock_locking_optional: run level high, ... [0.045539 init took 29953] [0.051185 tpm_rst_asserted] [0.052074 EC-COMM: Initializtion] Console is enabled; type HELP for help. ... > ec_comm ... response : 0xec00 ec_hash : LOADED secdata_error_code : 0x00000000 > Change-Id: Ia695896986374ac9d23ac111fe0086ec6a13923e Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2093102 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* add corrupt and reload options to 'ec_comm' console cmdNamyoon Woo2020-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | Two new options for 'ec_comm' are for test usage only. - ec_comm corrupt: it corrupts the ECRW hash in ec_comm module. Hash corruption will cause EC-FW verification failure. It can be useful to check how AP firmware performs software sync on this failure. - ec_comm reload: it forces Cr50 to reload ECRW hash from tpm nvmem. This is to restore the EC EFS2 status in Cr50 from corrupted status. BUG=b:150650877 BRANCH=cr50 TEST=manually ran 'ec_comm corrupt' or 'ec_comm reload' with dev image. Checked cr50 normal image refuses those command lines. Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: Ib4aa9532132e1ee786e623bd658a68987e4681dc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094781 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* introducing an unittest of EC-EFSNamyoon Woo2020-03-112-0/+10
| | | | | | | | | | | | | | | This patch adds a test case for EC-EFS functions. BUG=b:150650877 BRANCH=cr50 TEST=make run-ec_comm make runhosttests make buildall -j Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: I90cdc3aa73cf8946da4cf094de5ca0adfaaa0a7c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2096338 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* move ec_comm implementation to common directoryNamyoon Woo2020-03-102-0/+50
| | | | | | | | | | | | | | | This patch moves ec_comm.c and ec_efs.c from board/cr50 to common/, so that they can be shared with other board configuration (like host). This is to build unittest for those files. BUG=none BRANCH=cr50 TEST=make buildall -j Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: I67ac313054ebe4604848a176f0a42e3483957e74 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094076 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: add TPM vendor-specific commands to support EC-EFS2Namyoon Woo2020-02-221-0/+4
| | | | | | | | | | | | | | | | | | | Based on the design in go/ec-efs2, this patch adds two TPM vendor-specific commands: - VENDOR_CC_GET_BOOT_MODE - VENDOR_CC_RESET_EC BUG=b:141578322 BRANCH=cr50 TEST=tested with EC-EFS supporting EC/AP firmware. With CR50 dev image, tested with gsctool on Octopus and Helios by sending each of new vendor commands. Checked flash_ec working on Scarlet in bitbang mode. Change-Id: Ia8f38a7b9cc45b172a1a1ef7e216034e520b79c7 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956409 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* read EC Firmware hash from kernel secdata during board initNamyoon Woo2020-02-223-1/+22
| | | | | | | | | | | | | | Cr50 reads EC Firmware hash from kernel secdata. This data shall be used for EC-EFS (Early Firmware Selection) procedure. BUG=chromium:1020578, b:148489182 BRANCH=cr50 TEST=none Change-Id: Id8942b5b49dd5b0412d198a12ee0bf87fd59d47f Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956159 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* restructure EC-EFS moduleNamyoon Woo2020-02-201-9/+11
| | | | | | | | | | | | | | | - add ec_efs, which tracks the system boot mode. - add ec_comm.h header file for EC-EFS related functions. - revised vboot.h header file. BUG=b:141143112 BRANCH=cr50 TEST=none Change-Id: Iec1bf466b832bac5ad6be8a52304c1d699a38fb2 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2055363 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* make DIOB3 interruptible and wakable for EC-EFS2Namyoon Woo2020-02-081-0/+1
| | | | | | | | | | | | | | | | | | | | | If the board supports EC-CR50 communication, Cr50 enables both rising/falling-edge triggered interrupt on DIOB3 pin and makes it wakable as well.Cr50 connects GPIO_AP_FLASH_SELECT to DIOB4. If the board does not support EC-CR50 communication, Cr50 connects GPIO_AP_FLASH_SELECT to DIOB3. If EC puts high on DIOB3 to activate EC-CR50 communication, CR50 enables UART_EC RX and TX. BUG=chromium:1035706 BRANCH=cr50 TEST=none Change-Id: I1221a1a19219274622ab710568ce7c66ab2f1da7 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1989581 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: add gpio_set_wakepin() to configure wake pinsMary Ruthven2020-02-071-2/+18
| | | | | | | | | | | | | | | | | | | | | | | Cr50 needs a cleaner way to enable and disable wakepins. This change adds gpio_set_wakepin() to enable the wake pin or disable. The gpio_set_flags() or gpio_set_flags_by_mask() remain unaffecting wake-pin configuration. This patch increases the flash usage by 16 bytes. BUG=b:35587259 BRANCH=cr50 TEST=verify pinmux has the same output before and after the change on octopus. Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/533674 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org> Change-Id: I0387c673aedc046ce9cf6b5f0d683c40f3079281 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2044355
* change members of enum ec_efs_boot_modestabilize-12881.B-cr50_stabNamyoon Woo2020-01-311-4/+4
| | | | | | | | | | | | | | | | | | | Bit assignment in this enum has been changed. * BIT(1) : NO_BOOT flag -> RECOVERY flag * BIT(0) : RECOVERY flag -> NO_BOOT flag For this change, two members of enum ec_efs_boot_mode are swapped. - EC_EFS_BOOT_MODE_NO_BOOT = 0x01, // used to be 0x02 - EC_EFS_BOOT_MODE_RECOVERY = 0x02, // used to be 0x01 BUG=b:141578322 BRANCH=cr50 TEST=make buildall -j Change-Id: I88c4ef02cabd7fc3840467f7ff07444865969b31 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2029200 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* vboot: add macros, enums, and struct for EC-EFS2Namyoon Woo2020-01-181-0/+65
| | | | | | | | | | | | | This CL defines new macros, an enum and a data structure for EC-EFS2 implementation. BUG=b:141143112 BRANCH=cr50 TEST=make buildall -j Change-Id: I0b5d634f8e040638b4c4ffef5c8519959c509577 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956158
* extend INT_AP_L pulseNamyoon Woo2020-01-161-0/+7
| | | | | | | | | | | | | | | | | This patch extends INT_AP_L pulses to be at least 6.5 micro seconds. It is a tentative solution to to meet Intel TGL/JSL requirement on interrupt duration. BUG=b:130515803 BRANCH=cr50 TEST=checked INT_AP_L pulse length ranges extended to 6.5 ~ 11 usec with logic analyzer on Hatch. Checked dmesg and coreboot log has no TPM errors. Change-Id: Iea8d0a779fff7cbda0c8647f3c1de719c3c3d7e0 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002958 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* usb_mux: cleanup the usb_mux_get() functionVijay Hiremath2019-11-261-4/+2
| | | | | | | | | | | | | | Simplified the usb_mux_get() function and made the MUX info prints same as in ectool. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Iefb16e1dbd323afbe248b06fe9c53abc63be9a67 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1931284 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec: use symbolic names instead of magic numbersPaul Fagerburg2019-11-261-2/+20
| | | | | | | | | | | | | | | | | | | PD_DP_PIN_CAPS used a lot of magic numbers, which made it difficult to work out what it's doing. Added a comment about using the "receptacle type" field to deterimine whether the UFP_D or DFP_D pin assignments should be used, and replaced magic numbers with #define'd constants. BUG=None BRANCH=None TEST=`make -j buildall && ./util/flash_ec --board=kohaku` (or whatever board you're testing with), then verify that a USB-C dock with HDMI or DisplayPort still works. Change-Id: I1b5cf6d6cf7d0e1698bd7c727226f10f804ed5e9 Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1935088 Reviewed-by: Jett Rink <jettrink@chromium.org>
* host_command: clear any leftover dataJett Rink2019-11-261-1/+6
| | | | | | | | | | | | | | | We want to ensure that the entire buffer we may be sending back to the host from the EC does not contain any data from previous host command responses. Clear the data in common code so all chips do not have to implement this functionality. BRANCH=none BUG=b:144878983,chromium:1026994 TEST=new unit test shows cleared data Change-Id: I93ad4d36923ba1bf171f740e94830640d3fde3b0 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930931
* usbc: make BB virtual mux retimer compatible with non-virtualDenis Brockus2019-11-254-58/+13
| | | | | | | | | | | | | | | | Changed the driver interface for BB virtual mux retimer to stop using global functions and use the usb_retimers array instead. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I56befaca1720eb2f4e0599a983629b4df45dc76b Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928121 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* Reland "smart_battery: add smbus error checking support"Ting Shen2019-11-253-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of daccb3adea9394116d7ab2c807e4a360cb5a93a1 Original change's description: > smart_battery: add smbus error checking support > > Jacuzzi/Kodama has a unstable software controlled i2c bus, its data > transmission may be interrupted by other higher priority tasks and > causes device timeout. > > If timeout happens when ec is reading data, it has no knowledge about > what's happening on slave, and keep receiving bad data (0xFF's) until > end. The standard i2c/smbus error handling mechanism can not handle this > case, so we need the error checking feature from smbus 1.1 to ensure our > received data is correct. > > This CL adds the error checking (PEC) functions to i2c and smart battery > module. > > BUG=b:138415463 > TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST, > no failure after 100k read/writes. > test code at CL:1865054 > BRANCH=master > > Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3 > Signed-off-by: Ting Shen <phoenixshen@google.com> > Reviewed-on: http://crrev.com/c/1827138 > Reviewed-by: Denis Brockus <dbrockus@chromium.org> > Tested-by: Ting Shen <phoenixshen@chromium.org> > Commit-Queue: Ting Shen <phoenixshen@chromium.org> BUG=b:138415463 TEST=in addition to the TESTs above, verified this CL boots on hatch(npcx chips), and reef_it8320(it83xx chips). BRANCH=master Change-Id: I67975eee677cfd6e383742d48103662372cac061 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913940 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: PD: Separately track each SOP and SOP' and SOP''Sam Hurst2019-11-241-2/+5
| | | | | | | | | | | | | | | | | | Tracked PD header spec. version for each port partner type. BUG=chromium:1023025 BRANCH=none TEST=make -j buildall Manual Testing: Connected PD2.0 source charger and made sure we talked PD2.0 Connected PD3.0 source charger and made sure we talked PD3.0 Connected apple 2019 PD2.0 dock with charger and made sure we downgraded from PD3.0 to PD2.0 Change-Id: I3b49d9630acf6c19101ac71334445890c78c4077 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1907430 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: ServoV4 is not recognized appropriatelySam Hurst2019-11-221-0/+7
| | | | | | | | | | | | | | | | | | Configure the port as a SNK with PD in DebugAccessory.SNK state BUG=chromium:1020752 BRANCH=none TEST=make -j buildall Manual Test: 1: Connect Servo v4 with NeckTek charger pluged in DUT power port The DUT negotiates to 20V, and starts charging. Change-Id: Id44d566024b5016965f996435d11befdc1c53e98 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906993 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* battery : Define CONFIG_BATTERY_DEAD_UNTIL_VALUEYongBeum Ha2019-11-221-0/+7
| | | | | | | | | | | | | | | | It takes 850ms~950ms to get valid RSOC after battery wake-up. Sometimes battery FG returns garbage data(1%) as RSOC and 0 value of desired current / voltage. Add CONFIG_BATTERY_DEAD_UNTIL_VALUE to continue charging. BUG=b:138413964 BRANCH=None TEST=build & flash, check battery charging with dead battery Change-Id: I0cbe30aa973499b0c27faf9b6da03a0344ad1065 Signed-off-by: YongBeum Ha <ybha@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918985 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Trogdor: Initial board commitWai-Hong Tam2019-11-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is an initial commit for Trogdor. Use Cheza as a baseline. Make the change according to the schematic, e.g. * Reflect the GPIO change * Reflect the TCPC/PPC part change * Update the USB topology, e.g. no device mode support * Remove the detachable related code * Add keyboard support * Support keyboard backlight * Update the battery characteristic * Add initial support of muxing DP path * Support a single USB-A port * Change sensors from lid to base * Minor code style improvement BRANCH=None BUG=b:143616352 TEST=BOARD=trogdor make Change-Id: Ia9bb0adfcb8d347e6335fd3ae1e565b0f9d1a025 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847204 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* doc: document USB_PID strategyJett Rink2019-11-221-1/+8
| | | | | | | | | | | | | | | | We want to have a single USB VID/PID per platform. If we need further granularity within a platform, then we can use the HW version field within the AMA VDO. BRANCH=none BUG=none TEST=none Change-Id: Ia32f8c2b41efc04e570c8f6d92b3e1307948863a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1910451 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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