summaryrefslogtreecommitdiff
path: root/include
Commit message (Collapse)AuthorAgeFilesLines
* zephyr: Add initial USB-C supportSimon Glass2020-12-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This includes a variety of things to get volteer to build with some amount of USB-C support. It seems to charge the battery and prevent booting when the battery is too low. Much work remains. In particular: - check the Kconfig help and add missing help - possibly add a TCPM Kconfig option for grouping - BCI1.2 event handler - TCPMv2 event generator BUG=b:175434113, b:176171475 BRANCH=none TEST=build and run on volteer: 20-12-11 17:43:12.344 uart:~$ tcpci_dump 0 20-12-11 17:44:45.493 VENDOR_ID (0x00) = 0x0451 20-12-11 17:44:45.493 PRODUCT_ID (0x02) = 0x0422 20-12-11 17:44:45.493 BCD_DEV (0x04) = 0x0100 20-12-11 17:44:45.504 TC_REV (0x06) = 0x0011 20-12-11 17:44:45.504 PD_REV (0x08) = 0x2011 20-12-11 17:44:45.504 PD_INT_REV (0x0a) = 0x1010 20-12-11 17:44:45.515 ALERT (0x10) = 0x000f 20-12-11 17:44:45.515 ALERT_MASK (0x12) = 0x007f 20-12-11 17:44:45.526 POWER_STATUS_MASK (0x14) = 0x04 20-12-11 17:44:45.526 FAULT_STATUS_MASK (0x15) = 0x7f 20-12-11 17:44:45.526 EXT_STATUS_MASK (0x16) = 0x00 20-12-11 17:44:45.536 ALERT_EXTENDED_MASK (0x17) = 0x00 20-12-11 17:44:45.536 CONFIG_STD_OUTPUT (0x18) = 0x60 20-12-11 17:44:45.536 TCPC_CTRL (0x19) = 0x11 20-12-11 17:44:45.547 ROLE_CTRL (0x1a) = 0x1a 20-12-11 17:44:45.547 FAULT_CTRL (0x1b) = 0x06 20-12-11 17:44:45.558 POWER_CTRL (0x1c) = 0x70 20-12-11 17:44:45.558 CC_STATUS (0x1d) = 0x13 20-12-11 17:44:45.558 POWER_STATUS (0x1e) = 0x8c 20-12-11 17:44:45.569 FAULT_STATUS (0x1f) = 0x00 20-12-11 17:44:45.569 EXT_STATUS (0x20) = 0x00 20-12-11 17:44:45.580 ALERT_EXT (0x21) = 0x00 20-12-11 17:44:45.580 DEV_CAP_1 (0x24) = 0x1e98 20-12-11 17:44:45.580 DEV_CAP_2 (0x26) = 0x00c5 20-12-11 17:44:45.592 STD_INPUT_CAP (0x28) = 0x00 20-12-11 17:44:45.592 STD_OUTPUT_CAP (0x29) = 0x00 20-12-11 17:44:45.592 CONFIG_EXT_1 (0x2a) = 0x00 20-12-11 17:44:45.602 MSG_HDR_INFO (0x2e) = 0x02 20-12-11 17:44:45.602 RX_DETECT (0x2f) = 0x00 20-12-11 17:44:45.613 RX_BYTE_CNT (0x30) = 0x00 20-12-11 17:44:45.613 RX_BUF_FRAME_TYPE (0x31) = 0x00 20-12-11 17:44:45.613 TRANSMIT (0x50) = 0x00 20-12-11 17:44:45.624 VBUS_VOLTAGE (0x70) = 0x0000 20-12-11 17:44:45.624 VBUS_SINK_DISCONNECT_THRESH (0x72) = 0x0000 20-12-11 17:44:45.633 VBUS_STOP_DISCHARGE_THRESH (0x74) = 0x0000 20-12-11 17:44:45.633 VBUS_VOLTAGE_ALARM_HI_CFG (0x76) = 0x0000 20-12-11 17:44:45.633 VBUS_VOLTAGE_ALARM_LO_CFG (0x78) = 0x0000 20-12-11 17:44:49.544 uart:~$ ppc_dump 0 20-12-11 17:45:09.838 FUNC_SET1 [50h] = 0x0b 20-12-11 17:45:09.838 FUNC_SET2 [51h] = 0x18 20-12-11 17:45:09.838 FUNC_SET3 [52h] = 0x6a 20-12-11 17:45:09.838 FUNC_SET4 [53h] = 0xfe 20-12-11 17:45:09.838 FUNC_SET5 [54h] = 0x37 20-12-11 17:45:09.838 FUNC_SET6 [55h] = 0xc1 20-12-11 17:45:09.847 FUNC_SET7 [56h] = 0x70 20-12-11 17:45:09.847 FUNC_SET8 [57h] = 0xbd 20-12-11 17:45:09.847 FUNC_SET9 [58h] = 0x34 20-12-11 17:45:09.847 FUNC_SET10 [59h] = 0x70 20-12-11 17:45:09.847 FUNC_SET11 [5ah] = 0x24 20-12-11 17:45:09.858 FUNC_SET12 [5bh] = 0x70 20-12-11 17:45:09.858 INT_STATUS_REG1 [2fh] = 0x00 20-12-11 17:45:09.858 INT_STATUS_REG2 [30h] = 0x80 20-12-11 17:45:09.858 INT_STATUS_REG3 [31h] = 0x09 20-12-11 17:45:09.858 INT_STATUS_REG4 [32h] = 0x08 20-12-11 17:45:09.862 INT_TRIP_RISE_REG1 [20h] = 0x80 20-12-11 17:45:09.862 INT_TRIP_RISE_REG2 [21h] = 0x00 20-12-11 17:45:09.874 INT_TRIP_RISE_REG3 [22h] = 0x05 20-12-11 17:45:09.874 INT_TRIP_FALL_REG1 [23h] = 0x80 20-12-11 17:45:09.874 INT_TRIP_FALL_REG2 [24h] = 0x00 20-12-11 17:45:09.879 INT_TRIP_FALL_REG3 [25h] = 0x05 20-12-11 17:45:09.879 INT_MASK_RISE_REG1 [26h] = 0xef 20-12-11 17:45:09.879 INT_MASK_RISE_REG2 [27h] = 0xe1 20-12-11 17:45:09.892 INT_MASK_RISE_REG3 [28h] = 0xff 20-12-11 17:45:09.892 INT_MASK_FALL_REG1 [29h] = 0xff 20-12-11 17:45:09.892 INT_MASK_FALL_REG2 [2ah] = 0xef 20-12-11 17:45:09.892 INT_MASK_FALL_REG3 [2bh] = 0x8f ... 20-12-11 18:21:17.576 battery 20-12-11 18:21:17.933 Status: 0x0080 INIT 20-12-11 18:21:17.933 Param flags:00000003 20-12-11 18:21:17.933 Temp: 0x0b64 = %.1d K (%.1d C) 20-12-11 18:21:17.933 V: 0x2aa8 = 10920 mV 20-12-11 18:21:17.933 V-desired: 0x3390 = 13200 mV 20-12-11 18:21:17.944 I: 0x00bd = 189 mA(CHG) 20-12-11 18:21:17.944 I-desired: 0x0a19 = 2585 mA 20-12-11 18:21:17.944 Charging: Allowed 20-12-11 18:21:17.944 Charge: 3 % 20-12-11 18:21:17.948 Manuf: LG 20-12-11 18:21:17.948 Device: AC17A8 20-12-11 18:21:17.953 Chem: LIO 20-12-11 18:21:17.960 Serial: 0xb754 20-12-11 18:21:17.960 V-design: 0x2d1e = 11550 mV 20-12-11 18:21:17.965 Mode: 0x6001 20-12-11 18:21:17.965 Abs charge:3 % 20-12-11 18:21:17.974 Remaining: 139 mAh 20-12-11 18:21:17.974 Cap-full: 5093 mAh (4991 mAh with 98 % compensation) 20-12-11 18:21:17.983 Display: 0.0 % 20-12-11 18:21:17.983 Design: 5360 mAh 20-12-11 18:21:17.993 Time-full: 26h:21 20-12-11 18:21:17.993 Empty: 0h:0 Cq-Depend: chromium:2585918 Change-Id: I0d852169c9cbbc70603944b70f4708111abd5b42 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587225 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Update source-out configsDiana Z2020-12-242-0/+30
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: DPM sourcing policy - 3.0 A PD sinksDiana Z2020-12-241-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | Move the sourcing policy from the charge_manager to the DPM for TCPMv2. The first step of this policy will be to allocate 3.0 A only if a peripheral reports requiring more than 1.5 A in their Sink Capabilities vSafe5V operational current. For this commit, leave in some charge_manager APIs for linking which will be re-named or removed later. BRANCH=None BUG=b:141690755,b:168862110 TEST=on drawcia verify: - non-PD sink only offered 1.5 A Rp - PD sink requiring 1.5 A or less Rp isn't offered 3.0 A - PD sink requiring 3.0 A is offered a new 3.0 A Source Capability after sink capability probing. Port continues to receive 3.0 A over both hard and soft resets. - When 2 3.0 A sinks are plugged in, only the first is offered 3.0 A. After the first is unplugged, the second receives a 3.0 A source capability message Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iec48312df1125086db2919c1503c7ba31fe12bcc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597429 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: Avoid duplicate definition of GENMASK, etc.Simon Glass2020-12-243-1/+14
| | | | | | | | | | | | | | These two macros are defined by Zephyr after this header is included. Avoid this with an #ifdef. BUG=b:175434113 BRANCH=none TEST=build zephyr for volteer Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Iaa802de3e49bbdbb68bf9044be28a93bd095c7de Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2600227 Reviewed-by: Keith Short <keithshort@chromium.org>
* tcpm: Move tcpm.h into an include directorySimon Glass2020-12-226-5/+547
| | | | | | | | | | | | | | | | | | This header file is used from quite a few files, relying on the EC build system to find includes in the driver/tcpm directory. For Zephyr we don't want to add that as an include. It makes more sense for header files to be in an include directory, so move it and fix up the users. BUG=b:175434113 BRANCH=none TEST=build Zephyr and ECOS on volteer Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I5851914b1a7d3fdc1ba911c0fbe9046afbaf6f5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597985 Reviewed-by: Keith Short <keithshort@chromium.org>
* stm32g4: ucpd: Add pd msg log and console debug commandsScott Collyer2020-12-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds code to the ucpd driver which can used for additional debug information about both usbc and usb-pd information. The message log contains up to 64 entries which is sufficient to establish a connection and enter alt-dp mode. BUG=b:167601672 BRANCH=None TEST=Connect quiche on host port and validate debug commands: > ucpd info cc1 = Rp cc2 = Rp Rp = Rp_3.0 cc1_v = 1 cc2_v = 2 rx_en = 1 pol = 1 Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I2f50a6284336f21e833ecdff72746ff04c191b52 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2531183 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* zephyr: Add support for typeof()Simon Glass2020-12-221-0/+9
| | | | | | | | | | | | | | | | This is not available with gcc when -std is used, as it is in Zephyr builds. Define typeof() so that the EC codebase case build, e.g. with the GEN_NOT_SUPPORTED() macro. BUG=b:175434113 BRANCH=none TEST=build zephyr for volteer emerge-volteer -q chromeos-ec Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ic923abeec6409857895c6b20f3c47d2d662ca1ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597984 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: support TBT Alt mode as UFPli feng2020-12-212-2/+113
| | | | | | | | | | | | | | | | | | | Implemented SVDM responders for TBT Alt mode BUG=b:148528713,b:157163664,b:162986785 BRANCH=none TEST=1. Build ec with CL:2382634; OS CPFE 13447, CB CPFE 13535 2. Boot up Volteer, run "pd trysrc 0" on EC console; 3. Then connect port 1 to TGL Windows RVP TBT port; 4. Thunderbolt connection is established. Volteer port 1 as UFP, Windows RVP TBT port as DFP. From host console, thunderbolt0 is listed as network interface in ifconfig. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: If4c80418677f541e9c1c7c8c84446357000aaecb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2370045 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aashay Shringarpure <aashay@google.com>
* TCPMv2: Remove test/usb_tcpmv2_tcpci.cEdward Hill2020-12-181-8/+0
| | | | | | | | | | | | | | Remove test/usb_tcpmv2_tcpci.c to avoid duplication with test/usb_tcpmv2_compliance.c BUG=none BRANCH=none TEST=make run-usb_tcpmv2_compliance Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ie62d0f7e2cc30c3086e03103a43dede5515006b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597598 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* battery_fuel_gauge: Make the default battery type customizableWai-Hong Tam2020-12-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the default battery type is a constant. There is a need that a board can support both 2S and 3S batteries, according to its SKU ID. For example, a SKU which uses 2S battery will use a 2-to-1 switching capacitor to regulate the output voltage. A SKU which uses 3S battery will use a 3-to-1 switching capacitor. If the battery is not attached, the default battery is selected to configure the charger. A wrong battery configuration may be selected. For example, the charger may output a 2S voltage but the switching capacitor uses the 3-to-1 ratio. This change enables the board to customize the default battery type. It helps fixing the above issue. BRANCH=Trogdor BUG=b:175625362 TEST=Build the Lazor image and use it on the board with 3S battery but the battery is not attached. Signed-off-by: Wai-Hong Tam <waihong@google.com> Change-Id: I76bf50c7226c4ec9f633d4b7f6025dc9ab464b49 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597801 Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: Define an empty adc.h for nowSimon Glass2020-12-181-0/+7
| | | | | | | | | | | | | | While we wait for an ADC shim, define this enum so that the code at least compiles. BUG=b:175881324 BRANCH=none TEST=build zephyr for volteer Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I688e313afd78a0953c3e03da6a8039ae3112afdd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2595219 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* TCPMv2 test: Check all transmitsEdward Hill2020-12-171-0/+2
| | | | | | | | | | | | | | | | | Be explicit about checking all transmitted messages to avoid getting out of sync. Fix retries check in TD.PD.LL.E3, retries are handled by TCPC. BUG=b:175144677 BRANCH=none TEST=make run-usb_tcpmv2_compliance Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I017244c669e0c50e49b8974a7462007625c354ee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597597 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* gpio: Fix documentationCraig Hesling2020-12-171-8/+7
| | | | | | | | | | | BRANCH=none BUG=none TEST=none Change-Id: Ibd6581dbc0a8219cfb55848c7b00d564191148ff Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2072447 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Unit Test TD.PD.LL.E3 Soft Reset UsageDenis Brockus2020-12-171-0/+12
| | | | | | | | | | | | | | BUG=b:175144677 BRANCH=none TEST=make run-usb_tcpmv2_compliance Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I629e2811b2cba5aa9821d8c855e039a6cfaa32ce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2595816 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* TBT: Enter Thunderbolt mode if the cable response timesoutAyushee Shah2020-12-161-9/+1
| | | | | | | | | | | | | | | | | | | | If the passive superspeed cable doesn't support Intel SVID, then the Thunderbolt cable speed should be set to Passive Gen 2 cable. Ref: USB Type-C Cable and Connector Specification, Fig F-1. This commit, checks if the cable is superspeed before returning the thunderbolt cable speed and sets the overridable maximum speed supported by the board to TBT_SS_TBT_GEN3. BUG=b:172364575 BRANCH=None TEST=Tested on Voxel, able to enter Thunderbolt mode if the cable fails to respond to Discover SVID SOP' Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: Ib5137670c08cbe17166f5a90241ddbcb77e059f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582988 Reviewed-by: Keith Short <keithshort@chromium.org>
* common: separate VirtAddr and PhysAddr usageTzung-Bi Shih2020-12-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "VirtAddr" and "PhysAddr" are inconsistent for all ELF segments. Taking the following figure as an example: - 0x00000000 in the 1st segment is virtual address in SCP. - 0x50000000 in the 4th segment is physical address in AP. $ /opt/coreboot-sdk/bin/riscv64-elf-readelf -l build/asurada_scp/ec.obj Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x00000000 0x00000000 0x08198 0x08198 R E 0x1000 LOAD 0x009198 0x00008198 0x00057fff 0x00001 0x00001 RW 0x1000 LOAD 0x000db0 0x000ffdb0 0x000ffdb0 0x00000 0x00250 RW 0x1000 LOAD 0x00a000 0x50000000 0x50000000 0x00180 0x00180 R E 0x1000 Let "VirtAddr" for EC (SCP) view address; "PhysAddr" for AP view address. After the patch, the ELF's program header should be as the following. $ /opt/coreboot-sdk/bin/riscv64-elf-readelf -l build/asurada_scp/ec.obj Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x00000000 0x10500000 0x08198 0x08198 R E 0x1000 LOAD 0x009198 0x00008198 0x10557fff 0x00001 0x00001 RW 0x1000 LOAD 0x000db0 0x000ffdb0 0x105ffdb0 0x00000 0x00250 RW 0x1000 LOAD 0x00a000 0x10000000 0x50000000 0x00180 0x00180 R E 0x1000 BRANCH=none BUG=b:173753688 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: I921d1e14b2ca1eb553ae4f7cd3dd83ac01749043 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2553996 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* virtual mux: Wait for mux config ACK from the kernelDivya Sasidharan2020-12-153-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL: 1. Add a new config CONFIG_USB_MUX_AP_ACK_REQUEST to enable request for ACK from AP 1. Adds a new feature flag to inform the AP that an ACK is needed for boards supporting Burnside bridge retimer. 2. Adds a new host command for the EC to wait for mux config ACK for entering and exiting the safe mode. 3. Adds 12.5msec delay after configuring retimer and SoC as recommended. BUG=b:166300460,b:161327513 BRANCH=none TEST=Verify Type-C dock is functional with multiple hotplugs and flipped orientation. Verify USB3.0 is detected and not downgraded. Verify no regression with TBT3 and USB4 dock. Cq-Depend: chromium:2530517 Change-Id: I5b8224648f0fc36b30e24ca3e7254d708c676149 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366127 Commit-Queue: YH Lin <yueherngl@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* tcpci: Base retry count on active PD revAbe Levkoy2020-12-152-0/+10
| | | | | | | | | | | | | | | Retry twice when operating at PD 3.0 and thrice when operating at PD 2.0. Provide a TCPM-agnostic interface to get the number of retries. BUG=b:173025773,b:173025737 TEST=Pass TD.PD.LL.E3 Soft Reset Usage and TD.PD.LL.E4 Hard Reset Usage BRANCH=firmware-volteer-13521.B-master Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I422447718f1bfc9a9d4f8ffc5b284723a5332833 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2578201 Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* mock: Clean up TCPMv2 mocksAbe Levkoy2020-12-152-23/+3
| | | | | | | | | | | | | | | | | | | | | | Place mock functions in the mock libraries corresponding to the layers of the real implementations. Broadly, move towards one layer of the TCPM stack as a UUT, with mocks for the other layers as needed. There should be a one-to-one correspondence between real modules and mock modules. usb_pd_mock.c does not correspond to any real implementation module or TCPM stack layer, so remove it and move its contents to the layers corresponding to their real implementations. Also clean up some redundant or misplaced mocks inside tests. BUG=b:153071799,b:173791979 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ic44df8675de2b9f1f8c7669cd97dcdc296bf107f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2578200 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-2/+2
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* EC: Removing an unused i2cm_init function signatureDossym Nurmukhanov2020-12-121-6/+0
| | | | | | | | | | | BUG=none TEST=built several boards BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: I4e9b52fb5c7ef6dab4db30f98cece9b5635f699c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587805 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Clean up controller/peripheral language in headersDossym Nurmukhanov2020-12-123-84/+91
| | | | | | | | | | | BUG=none TEST=verify builds are still working BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: I8925a7ffd3ab4e47dfed213438f601d673188259 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2588008 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Standardize i2c peripheral languageDossym Nurmukhanov2020-12-121-9/+9
| | | | | | | | | | | BUG=none TEST=validate volteer build (i2c_peripheral.c is not used by any boards) BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: Ib2d78dc3fc9f4f189f84409cf43ab96788c429be Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587227 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename i2c_peripheral filesDossym Nurmukhanov2020-12-121-0/+0
| | | | | | | | | | | | BUG=none TEST=build and run on volteer BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: I11a75e4954e918b2d4ff575dee14dec621a619b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587226 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename EC-EC comm config to be inclusiveDossym Nurmukhanov2020-12-121-5/+5
| | | | | | | | | | | | | Use server/client nomenclature instead BUG=none TEST=build and run on volteer BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: I2cf4a82291134378ed21bbc068361f1be25e8176 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587574 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* COIL: Use inclusive language for EC-EC communication codeDossym Nurmukhanov2020-12-122-24/+24
| | | | | | | | | | | | | Replace with server/client nomenclature BUG=none TEST=build and run on volteer BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: I23fe7de9228a9611b49eef1362bf15159b25aab7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2586038 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* COIL: Rename ec_ec_comm* files to inclusive languageDossym Nurmukhanov2020-12-123-1/+1
| | | | | | | | | | | | | Rename the files to server/client instead BUG=none TEST=Rebuild and run on volteer BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: Ibcbdcddfab1b878ff48fc4cb76307efe6de4fac0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2586037 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* usbc: Remove pd_ts_dts_plugged() check from PD_DRP_FORCE_SINKEdward Hill2020-12-111-8/+0
| | | | | | | | | | | | | | | | | | | | PD_DRP_FORCE_SINK had an exception (since crrev.com/c/277275), allowing role to remain source on S5 entry if DTS (debug accessory) is connected. Remove this exception. rddkeepalive on cr50 (set when servod starts) ensures CCD mode stays enabled across power and role changes. BUG=b:173457150 BRANCH=none TEST=servo_v4_role:snk, AP S0/S5/G3, EC reboot/hibernate -> CCD keeps working Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Iccdfb504c6269ee2ba072e9818920e3e10a56739 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2542578 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* cortex-m mpu: support configuring regions with difficult alignmentPeter Marheine2020-12-111-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing configuration code assumes that provided addresses are at least as aligned as the requested size, which is not true on NPCX797WC (and likely others) where RAM regions are only 64k-aligned but have larger sizes (like 256k). Use a new greedy approach to configuring the MPU which handles these situations corrently: for any given request take the largest possible chunk from the bottom of the memory region (subject to size and address alignment). Maximize the space by aggressively using MPU subregions- this means that in many well-aligned situations this algorithm selects a larger region than the requested size and enables one subregion, but in more difficult situations it is capable of enabling subregions with more exotic positions. BUG=b:169276765 BRANCH=zork TEST=With a test harness to print out computed configurations, manually verified the correctness of a variety taken from real chip configurations (request first, MPU region(s) indented): 0x20000000 size 0x1000 # stm32f03x 0x20000000 size 0x8000 srd fe 0x20000000 size 0x2000 # stm32f03x 0x20000000 size 0x10000 srd fe 0x20000000 size 0x2800 # stm32l100 0x20000000 size 0x4000 srd e0 0x20000000 size 0x4000 # stm32f412 0x20000000 size 0x20000 srd fe 0x80000 size 0xc000 # it8320 0x80000 size 0x20000 srd f8 0xff200000 size 0xa0000 # ish5p4 0xff200000 size 0x100000 srd e0 0x200b0000 size 0x20000 # npcx797wb 0x20080000 size 0x80000 srd e7 0x10070000 size 0x40000 # npcx797wb 0x10000000 size 0x80000 srd 7f 0x10080000 size 0x80000 srd f8 0x200c0000 size 0x10000 # npcx796f 0x20080000 size 0x80000 srd ef 0x10090000 size 0x30000 # npcx796f 0x10080000 size 0x80000 srd f1 0x10090000 size 0x20 0x10090000 size 0x100 srd fe Further verified MPU configuration with the new algorithm succeeds on Dalboz, and test/mpu.c passes on Dragonclaw. Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I71d8e2b37c7e20fc7a39166b90eea0b7f7ebcf43 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434601 Reviewed-by: Edward Hill <ecgh@chromium.org>
* ec_commands: add struct ec_response_activity_dataChing-Kang Yen2020-12-111-7/+11
| | | | | | | | | | | | | | Add struct ec_response_activity_data to handle activity data in include/ec_commands.h. BRANCH=None BUG=b:169374265 TEST=make buildall Signed-off-by: Ching-Kang Yen <chingkang@chromium.org> Change-Id: I5f40d45d656ae91acc6e9364261c548f302383ae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2581708 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* PCHG: Send device event to hostDaisuke Nojiri2020-12-101-0/+1
| | | | | | | | | | | | | | | | | This patch makes PCHG send EC_HOST_EVENT_DEVICE on every state machine cycle. The host is expected to retrieve the device event mask through EC_CMD_DEVICE_EVENT and updates port status if the mask has EC_DEVICE_EVENT_WLC. BUG=b:173235954 BRANCH=Trogdor TEST=Enabled and disabled EC_DEVICE_EVENT_WLC via deviceevent command and verified the sysfs node is updated. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I9dece6bc35599db3d6ae30452fd8e97bbaeab9af Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2579722 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* PCHG: Add host commandDaisuke Nojiri2020-12-102-13/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a host command to get the peripheral charge port count and status. $ ectool pchg 1 $ ectool pchg 0 State: CHARGING (4) Battery: 50% Flags: 0x0 $ ectool pchg 0 foo Invalid parameter count Usage1: pchg Usage2: pchg <port> Usage1 prints the number of ports. Usage2 prints the status of a port. $ ectool pchg 100 Bad port index BUG=b:173235954 BRANCH=Trogdor TEST=Done on CoachZ. See the description above. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I33f261e48b16d5933b6f3ca9f3c12fec476edda3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555628 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* charger: Add driver method for linear chargingAseda Aboagye2020-12-101-0/+15
| | | | | | | | | | | | | | | | | | This commit adds a driver method for enabling linear charging. Some charger ICs have the ability to manipulate the BFET in the linear region. This commit just adds that method and an API for use by the rest of the system. BUG=b:174683659 BRANCH=dedede TEST=`make -j buildall` Change-Id: I1660c0598a402b1f3f82300052b7cd72b8154a31 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2570937 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* charger: Add `charger_is_icl_reached()`Aseda Aboagye2020-12-101-0/+13
| | | | | | | | | | | | | | | | | | Some charger ICs have the capability to report whether they have reached the set input current limit. This commit simply exposes an API for use by the rest of the system to determine if the input current limit is reached. BUG=b:174167890 BRANCH=dedede TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ic0e00a54c53c985104cf400f0ce36b7a090ca5f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568563 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* common:online_calibration: Spoof sensor dataYuval Peress2020-12-081-0/+13
| | | | | | | | | | | | | | | | | This change allows the `accelspoof` ec command to also override the calibration data (bypassing the calibration module). This config flag should be used when testing layers above the EC (kernel and up)'s handling of the calibration values. BRANCH=none BUG=none TEST=Built on eve and added unit tests. TEST=make run-online_calibration_spoof -j Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I4735b9613c152af5559661a91565b05635d6495e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2494986
* charger: replace charger_get_input_current usesEric Yilun Lin2020-12-081-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Replace them with charger_get_input_current_limit which is aligned to the old usage, no funcional changes. Keep OCPC charger_get_input_current uses as was, since it is its intended use. Also, implement - isl923x_get_input_current, raa48900_get_input_current - sm5803_get_input_current_limit BUG=b:171853295 TEST=1. grep "\<charger_get_input_current\>"; only ocpc uses the function. 2. make buildall 3. test with CL:2569086 on waddledee(sm5803), waddledoo(raa489000), hayato(isl923x), pompom(isl923x), and ensure the output of `curr 0|1` equalts to the report of power meter. BRANCH=none Change-Id: I71aca33cbc88dda9b0238cb71b1609665a9c9a7f Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2569085 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* charger: add charger_get_input_current_limitEric Yilun Lin2020-12-081-1/+16
| | | | | | | | | | | | | | A pre-processing CL for the later CL which migrate API from charger_get_input_current. BUG=b:171853295 TEST=make buildall BRANCH=none Change-Id: Ia15ce47ac5d068b7125c58115e368f9dfa87958c Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2569084 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* charger: rename charger_set_input_currentEric Yilun Lin2020-12-081-3/+14
| | | | | | | | | | | | | | | charger_set_input_current was actually sets the input current limit, so renames it to charger_set_input_current_limit. BUG=b:171853295 TEST=make buildall TEST=not output from `grep -r "\<charger_set_input_current\>"` BRANCH=none Change-Id: Icf4e99f287a7d4fc2d9560e8502e46cc07bfc085 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2569083 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* config.h: Make body detection setting use separate default valueChing-Kang Yen2020-12-071-6/+16
| | | | | | | | | | | | | | | | | | | Formerly, if a board want to customize the body detection settings, it need to fill all the settings. This CL makes it just have to fill the exact settings that we want to customize. BRANCH=None BUG=b:123434029 TEST=buildall Signed-off-by: Ching-Kang Yen <chingkang@chromium.org> Change-Id: I7554e8f21a446f8d93b2558402690e265e82b58e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2569087 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Ching-Kang Yen <chingkang@chromium.org> Commit-Queue: Ching-Kang Yen <chingkang@chromium.org> Tested-by: Ching-Kang Yen <chingkang@chromium.org>
* max14637: add a config to define delay in ms from power off to onMarco Chen2020-12-071-0/+2
| | | | | | | | | | | | | | | BUG=b:173166535 BRANCH=octopus TEST=Change delay to 100; build and flash casta; verify whether BC12 can detect CDP/DCP/SDP correctly. TEST=`make -j buildall` Signed-off-by: Marco Chen <marcochen@chromium.org> Change-Id: I08cd881a2413e540eaaab3789f98e28f39514ad5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567197 Reviewed-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* zephyr: fix build for keyboard shimYuval Peress2020-12-051-3/+3
| | | | | | | | | | | | | | | | | | | | | See platform/ec/common/build.mk for reference. The use of keyboard_scan.c should only be allowed when HAS_TASK_KEYSCAN is defined. As such, we should always set HAS_TASK_KEYSCAN to 1 if CONFIG_PLATFORM_EC_KEYBOARD is defined. Further, CROS_EC_TASK_LIST was defined per project and it doesn't need to be, we can instead define it once for all boards depending on which tasks are set to 1 in shimmed_tasks.h Note that shimmed_tasks.h can still be used in tests. BRANCH=none BUG=none TEST=zmake testall Cq-Depend: chromium:2566421 Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Id0ed49dd49e3c4eb2ac23184cf943c91dcd261eb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567560
* COIL: Rename SLEEP_MASK_I2C_CONTROLLERDiana Z2020-12-041-1/+1
| | | | | | | | | | | | | Rename SLEEP_MASK_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib49a5c6b07a203dc659ed65909292e5f1009d33f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2558907 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* power: move headers to include/powerJack Rosenthal2020-12-037-0/+519
| | | | | | | | | | | | | | This makes the headers visible to the Zephyr build. BUG=b:173798264 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I3b6d27c1234b3924ee8902a86eec5fdb2ccd9998 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2571897 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* shuboz: Implement LED functionJacky Wang2020-12-031-0/+3
| | | | | | | | | | | | | | Update LED behavior by Marketing spec. BUG=b:173341052 BRANCH=none TEST=make BOARD=shuboz Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I0e4346d6d83204a20836b3fc94a951309e97b06f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2561908 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* tcpm/it8xxx2: add cc parameter tuning functionRuibin Chang2020-12-021-0/+7
| | | | | | | | | | | | | | | | | | | | | Add function for board hayato to tune cc pre-driving parameters, so that we can improve eye diagram. BUG=b:171279731 BRANCH=none TEST=on hayato, console check registers 0x3773 = 0x1, 0x3774 = 0x2, 0x3873 = 0x1, 0x3874 = 0x2, values are same as setting. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I8829f1fb4672bc98287e9526458f71026e19ca16 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537528 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* test: Improve test_send_caps_error in usb_pe_drpEdward Hill2020-12-012-31/+12
| | | | | | | | | | | | | Better mock tx and rx messages, add sop type. BUG=b:161835483 b:173791979 BRANCH=none TEST=make run-usb_pe_drp Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: If1f91b6385d6841d662a8a6262af6382645da92e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2553343 Reviewed-by: Diana Z <dzigterman@chromium.org>
* COIL: Rename CONFIG_USB_PD_I2C_ADDR_FLAGSDiana Z2020-11-301-2/+2
| | | | | | | | | | | | | Rename CONFIG_USB_PD_I2C_ADDR_FLAGS and change related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia17a1ca26a5c2a16a698e55eac7e8f75b5e87aa0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2558902 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* usb_hid_keyboard: implement vivaldi top row featureTing Shen2020-11-272-1/+12
| | | | | | | | | | | | | | | | | | This CL implements a feature report defined in [1] that describes the keyboard's top row layout. [1] http://doc/1NTxSGv3WA2Vn4dlPLOcvKBvPytWOF0UAcIYQaFctTug BUG=b:171156337 TEST=Verify feature report content using test code in CL:2530156. BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I28a93f1b926d58602eb66d1b090e89384cb09f77 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2522641 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* ec_commands: Add GENMASK macrosTom Hughes2020-11-251-0/+8
| | | | | | | | | | | | | | GENMASK is used in ec_commands.h, but is not defined if not compiling in kernel or Chrome OS EC environments. BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I439b0d77c47f3921f7bf2afd04c62cc72d668ea6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2558857 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: AP resume should consider Src->Snk swapDenis Brockus2020-11-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | TCPMv1 used PD_FLAGS_CHECK_PR_ROLE and pd_check_pr_role() to accomplish this. This was missing from TCPMv2. In the TCPMv2 implementation, policy pd_can_source_from_device was added to put the logic in one place to detect if the PDO for a partner device can and should be the source Using this policy the AP resume code will check to see if an already attached partner that we are sinking from should be sinking from us instead. BUG=b:169299049 BRANCH=zork TEST=verify DRP phone will swap back to SNK on AP resume Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I8e584446445c8ee2e1c91973a58a04405cdf9e1b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555865 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
View Lorry Controller Status