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* COIL: Rename CONFIG_HOSTCMD_I2C_ADDR_FLAGSDiana Z2020-10-311-2/+2
| | | | | | | | | | | | | Rename for CONFIG_HOSTCMD_I2C_ADDR_FLAGS and surrounding comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I49dc12753957da7baa1bb387e212d75c75e81d86 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2511093 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TCPMv2: Add allow_list for partners that didn't set UP but should haveDenis Brockus2020-10-301-3/+6
| | | | | | | | | | | | | | | | | | Added three additional monitors and renamed the defines to tell what the PID is. BUG=b:171013724 BRANCH=zork TEST=connect new devices and make sure they source us Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Iaf18d6aaad40ff5ac8d8bb57bc2568a9256712bb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2509974 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* Zephyr: refactor i2c components to avoid name collisions with zephyrYuval Peress2020-10-301-1/+4
| | | | | | | | | | | | | | | | | This change prepares the i2c module for shimming (in the next CL) by avoiding name conflicts with zephyr's. It also does some minor formatting changes using clang-format. BRANCH=none BUG=b:171302975 TEST=build platform/ec boards volteer and eve Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I5f53384eb5819d39acc68669c0c40ff211815f63 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2509976 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Zephyr: add support for irq_(un)lockYuval Peress2020-10-301-0/+17
| | | | | | | | | | | | | | This change is added when building non-zephyr builds and adds macros to mock out zephyr's irq_lock and irq_unlock and route those calls to interrupt_disable and iterrupt_enable. BRANCH=none BUG=b:171302975 TEST=none Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I79fcbdc48963fb800781a1a0b77ac261621480a2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508415
* include/config.h: Replace CONFIG_FP_SENSOR with CONFIG_FINGERPRINT_MCUTom Hughes2020-10-302-11/+2
| | | | | | | | | | | | | | | | CONFIG_FP_SENSOR was only enabled for RW, but we need a way to know whether the board is a fingerprint MCU when in RO as well. "FINGERPRINT_MCU" is a bit more generic than FP_SENSOR. We still only build the matching-related code for RW. BRANCH=none BUG=b:171370392 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I808faa7a16522791cfb4eb9cc2e163d9eb994804 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508860 Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
* morphius: Wait 500ms before allowing DP event to cause resume.Edward Hill2020-10-301-1/+1
| | | | | | | | | | | | | | | | | Turning off the MST hub in S3 (via IOEX_HDMI_DATA_EN_DB) causes a VDM:Attention that immediately wakes us back up from S3. Wait 500ms after S3 entry before setting EC_MKBP_EVENT_DP_ALT_MODE_ENTERED in pd_notify_dp_alt_mode_entry(). BUG=b:167949458 BRANCH=zork TEST=powerd_dbus_suspend with display connected to MST hub DB Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I0d90d0a5130403b9aca1057725509814cac0d545 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2506424 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* Zephyr: add support for shimming the mutex structYuval Peress2020-10-301-2/+14
| | | | | | | | | | | | | | | | | This changes creates a common mutex_t which can be used in both platform/ec and zephyr code. It also adds an empty #define for k_mutex_init(mutex) such that the zephyr function can be used without affecting platform/ec. BRANCH=none BUG=b:171896666 TEST=Built platform/ec for boards: volteer & eve Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I6a711252732697ab120515d916bf388fdcd9544f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508414 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* adlprvp: add Alderlake RVP supportPoornima Tom2020-10-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | | Following features are enabled and verified. 1. Power sequencing 2. Host communication 3. USB TYPE-C - TCPC over PD AIC 4. H1 Close Case Debug 5. LED 6. Keyboard BRANCH=None BUG=b:169551130 TEST=Build, flash and boot the Alderlake RVP platform to OS make BOARD=adlrvpp_ite -j; sudo util/flash_ec --board=adlrvpp_ite --image=<path> Signed-off-by: Poornima Tom <poornima.tom@intel.com> Change-Id: I9d85e0cb93bc94f042f902b73ebd96a354d0f365 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435177 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* COIL: Re-name to TCPCI_I2C_PERIPHERALDiana Z2020-10-281-4/+7
| | | | | | | | | | | | | Boards which don't use a TCPM will define TCPCI_I2C_PERIPHERAL. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If93e533e059888e8ad5166b29c37bc2243f46947 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2481940 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tests: fix include for Zephyr ztestPaul Fagerburg2020-10-281-1/+1
| | | | | | | | | | | | | | | | | A test written for the Zephyr Ztest API needs to include ztest.h, not just ztest_assert.h BUG=b:168032590 BRANCH=None TEST=build base32 unit test for Zephyr Ztest target Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: Ib4558e724614d9684294e6f2b670942d1f0c82d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2504471 Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Auto-Submit: Paul Fagerburg <pfagerburg@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-271-4/+4
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* IO-expander: Add driver support for PCA9675Name2020-10-261-0/+3
| | | | | | | | | | | | | BRANCH=None BUG=b:169551130 TEST=make buildall -j Change-Id: If565996850c5c75f3d425e2dc7f705b624ad4cc4 Signed-off-by: pandeyan <anshuman.pandey@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435172 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: Poornima Tom <poornima.tom@intel.com>
* features: Define AP-driven mode entryAbe Levkoy2020-10-261-0/+5
| | | | | | | | | | | | | | Add EC_FEATURE_TYPEC_REQURE_AP_MODE_ENTRY. BUG=b:168030639 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I413abdfb123b3b7119fa1862b018557de81c2cbd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2411181 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* test: Allow EC unit test to use Ztest APIPaul Fagerburg2020-10-231-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | Provide a translation layer in test_utils.h for the Zephyr zassert macros to map onto EC's TEST_ASSERT macros. With a little bit of duplicated-but-not-quite-duplicated code (test_main vs. run_test) and some extra macros for the return type of the test cases, the tests can build for either the EC framework (by default) or the Zephyr Ztest framework (#ifdef CONFIG_ZEPHYR). Update the unit test documentation to explain why (and a brief "how") developers should use the Ztest API for new unit tests. BUG=b:168032590 BRANCH=none TEST=`TEST_LIST_HOST=base32 make runhosttests` Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: I26e60788c1468e44fed565dd31162759c7587ea6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2492527 Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* Add shim for system.c (implementing jump data functions)Yuval Peress2020-10-222-1/+15
| | | | | | | | | | | | | | | This change adds the system.h/system.c shim layer to import jump data passing between images. BRANCH=none BUG=b:167392037 TEST=Added tests in zephyr-chrome/tests/ Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I8c6ae2cf579be063c5b3f7219c440aadad3eefa1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2491430 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Add typeccontrol enter-mode subcommandAbe Levkoy2020-10-224-0/+30
| | | | | | | | | | | | | | | | | | Define and implement TYPEC_CONTROL_COMMAND_ENTER_MODE. Allow DPM state to be accessed asynchronously by host commands. Add support for this command to ectool. BUG=b:168030639 TEST=Attach DP dongle; discovers but does not enter TEST=ectool typeccontrol 1 2 0; enters DP TEST=Attach TBT dock and TBT active cable; discovers but does not enter TEST=ectool typeccontrol 1 2 1; enters TBT BRANCH=none Change-Id: I218c4b9a92004ef1efe9a27b2a920031961b33f3 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2454538 Reviewed-by: Diana Z <dzigterman@chromium.org>
* various: Fix spellingAbe Levkoy2020-10-222-3/+3
| | | | | | | | | | | | | weather -> whether BUG=none TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I600571f289f01bdc474f8dd02787ad0afab19134 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2490723 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Create charge allow_list and add devicesDenis Brockus2020-10-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The charge allow_list is for partner devices that do not advertise Unconstrained Power in their SRC_Caps but we should still charge from them if they are the SRC. The allow_list should be constrained to partners that perform dual role and do not present Unconstrained Power in their SRC_Caps. It is preferred for the partner to send this correctly but for products that are already out in the wild, it may be a really bad user experience for this to fail. BUG=b:170644500,b:170848849,b:170970249 BRANCH=zork TEST=connect E24d monitor and verify it charges DUT Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ib4f2c62af3bb2c1ed066ea4353ec26cd536a4c26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2490729 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* zephyr: add initial gpio shimJett Rink2020-10-211-15/+50
| | | | | | | | | | | | | | | | | Add the gpioget and gpioset commands to zephyr build. This requires a minimum set of platform/ec gpio_ API functions. Add the minimum set of gpio_ functions. More can be added later depending on future uses BRANCH=none BUG=b:169935802 TEST=verify gpioget and gpioset console command work on volteer TEST=verify that posix-ec compiles without any named_gpios in DT Change-Id: Ie6f0b4505aa17c50c01b71fc4ea5b59393f39fce Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488141 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* TCPMv2: Correct Enter Mode TBT payloadAyushee2020-10-211-15/+27
| | | | | | | | | | | | | | | | | | | | | | | According to Type-C ENGINEERING CHANGE NOTICE (ECN) "USB Type-C ECN Thunderbolt 3 Compatibility Updates for the document fix published by USB-IF, For Enter mode Thunderbolt payload, B25 - Active_Passive bit B24 - Thunderbolt Adapter This CL corrects setting B24 and B25 and sets lrx_comm(23), retimer_type(22), tbt_cable(21) irrespective of the cable speed. BUG=b:148534741 BRANCH=None TEST=Able to enter into Thunderbolt mode with Active and Passie cable Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I7fb29bea972f23ee0f87ee27ddcc1a50ce2d9a69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2481933 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Report TYPEC commands as a featureDiana Z2020-10-211-0/+2
| | | | | | | | | | | | | | | | | | | | To ease the AP's use of the new TYPEC_* host commands, add a feature flag to indicate their presence. Since ToT TCPMv2 always supports these commands, use that configuration as the trigger for it. Note for firmware branch pickers: this commit should only be picked if the branch is also picking the corresponding TYPEC commands (currently as of this CL: STATUS, DISCOVERY, and CONTROL). BRANCH=None BUG=b:167700356 TEST=on waddledoo, confirm Type-c command support shows up in "ectool inventory" Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4ff78c9b6ca297933611d4abf239fb67b1221751 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2473100 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add fields for sink capabilities to TYPEC_STATUSDiana Z2020-10-211-5/+2
| | | | | | | | | | | | | | | | | Round out the final fields of the new TYPEC_STATUS v0 command return with sink capabilities fields. Note that they are not yet being populated, but are being added now to avoid unnecessary return versioning in the coming months when the command is being used. BRANCH=None BUG=b:167700356 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I38a6e96a9ec4974e11b85839abcd4deafcf96b6c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2473099 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Report source capabilities in TYPEC_STATUSDiana Z2020-10-212-13/+83
| | | | | | | | | | | | | | | | Report the source capabilities for a port to the TYPEC_STATUS host command, and add decoding for the interesting fields here to ectool. BRANCH=None BUG=b:167700356 TEST=on waddledoo, confirm source capability decoding from ectool matches that from TotalPhase for servo_v4 and a charger Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib79c36c613c47fc60cfd8736202216ee40fbb42f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2473098 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Report partner PD revisions in TYPEC_STATUSDiana Z2020-10-211-15/+39
| | | | | | | | | | | | | | | | | | Gather and report both SOP and SOP' revisions for port partners. BRANCH=None BUG=b:167700356 TEST=on waddledoo, confirmed SOP and SOP' revisions were reported correctly with: - active cable and non-PD partner - PD 3.0 dock and active cable - PD 2.0 dock and active cable - PD 3.0 and PD 2.0 partners with no e-mark cable Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6448e5b80212b171a44864f90ae5cdfecbcb7244 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2473097 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Avoid VCONN-Source discovery failureAbe Levkoy2020-10-211-0/+1
| | | | | | | | | | | | | | | | | Remove redundant checks for VCONN Source in pe_attempt_port_discovery (which prevent discovery from running). Allow pe_vdm_send_request to attempt to become VCONN Source if necessary. Make the checks in the VDM request child states more complete (not just checking for VCONN Source). BUG=b:170662791 TEST=Attach Tapex Creek board; observed successful discovery BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Id7d3a1b82d1029f69b3e05b845632e7237524bc6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2486303 Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* common: online_calibration: Fix compilation issueGwendal Grignou2020-10-201-1/+2
| | | | | | | | | | | | | | | | | - Fix compilation error: sizeof() of an input array was not calculated properly. - Fix calling convention: use sensor pointer instead of sensor number - Use common formula to calculate sensor number. BUG=none BRANCH=none TEST=compile, unittest, load on eve with online calibration added. Change-Id: I06ff30eb5710cbe8f91c939b2ccc084c20a37847 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2486304 Reviewed-by: Yuval Peress <peress@chromium.org>
* TCPMv2: Add debug detach interfaceDiana Z2020-10-191-0/+8
| | | | | | | | | | | | | | Some TCPCs may require special commands to be run after a debug accessory leaves the Attached.SNK/SRC states. Add an interface to support this, and call it from the TC when needed. BRANCH=None BUG=b:159495742,b:170259606 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I79c7ebc308958c598cfa228598362c97b9b00e86 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2481941
* TCPMv2: Use a common function to check if the battery is capableWai-Hong Tam2020-10-171-2/+11
| | | | | | | | | | | | | | | | | Move the battery checks to a common function, which is used to enable Try.SRC and enable PD comm for CONFIG_SYSTEM_LOCKED. BRANCH=None BUG=b:169453974 TEST=On a board with battery which takes longer time to enable its discharge FET, cut off the battery and booted the board. Checked on startup the Try.SRC was disabled and the PD comm was disabled. When the battery discharge FET became active, PD comm was enabled. Change-Id: I236d5f8a462ece056b4adedd0b6e6ef1e402966c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2461942 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* mp4245: Buck boost converter initial driverScott Collyer2020-10-151-0/+3
| | | | | | | | | | | | | | | | This CL adds support for the MPS mp4245 buck-boost converter which is designed to be used for USB PD Vbus generation. BUG=b:169312229 BRANCH=None TEST=verfied type-c attaches properly on quiche Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Ie6c79a5509c6a85f9d6bcb95d4053f2803ca1ad4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436571 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* TCPMv2: Avoid alt mode files from changing DPM statesAyushee2020-10-144-10/+33
| | | | | | | | | | | | | | | | | | | | | | | | USB4 mode: Added a function to check if the USB4 entry is completed Thunderbolt mode: Added 2 flags TBT_RETRY_DONE, TBT_EXIT_DONE to track the Thunderbolt mode's exit and if retry is needed and a new function to check if if the Thunderbolt mode entry is completed DisplayPort mode: Added a function to check if the DisplayPort entry is completed BUG=b:169169804 BRANCH=None TEST=1. Able to enter alternate mode on hotplug and reboot 2. Able to exit the alternate mode on chipset transition and on DPM's exit mode request. Change-Id: I09662449143ad8d94b30ae102ed5ce79db852687 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2421425 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TBT:Add support for exit mode SOP'/SOP'' on chipset transitionAyushee2020-10-142-18/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When chipset is transitioning to a new state or on sysjump, the EC re-negotiates to enter an alternate mode on booting up. This commit adds support for exiting Thunderbolt mode for SOP' and SOP'' for active cable on chipset transition and also moves all the alternate mode exit rotines to their respective files. It also delays deleting the SVID data until after the EXIT_MODE message has ACKed and avoids pd_dfp_exit_mode() from changing the alternate mode's internal states. This commit also makes sure that the mux is set to safe state before exiting the alternate mode and it is reconfigured according to the port's current data role on receiving ACK/NAK from the cable/port partner. BUG=b:151169925, b:159717794 BRANCH=none TEST=On reboot, able to exit and re-enter into DisplayPort mode, Thunderbolt mode with passive cable and thunderbolt mode with active cable. Change-Id: If1e48e9f31cd678e23fe89bd3494551b5d1a78f1 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415082 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* intelrvp: update usb_pd files to indicate MECC version complianceName2020-10-131-0/+6
| | | | | | | | | | | | | | | | | Add new configuration for MECC-0.9 version and update JSL,TGL RVP boards to use this config option. Support for new version of MECC-1.0 will be required for ADL-RVP. BRANCH=None BUG=b:169551130 TEST=make buildall -j Signed-off-by: pandeyan <anshuman.pandey@intel.com> Change-Id: Ic1118c460a7052ffd0141a45c9153dbdac421d1b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435175 Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: Poornima Tom <poornima.tom@intel.com>
* npcx9: support SHA256 hardware acceleratorCHLin2020-10-132-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | There is the hardware accelerator for SHA computation inside npcx9. This CL wraps the Nuvoton SHA library APIs (which are in the ROM) to Chromium EC's SHA256_* APIs to speed up the SHA256 computation. With the help of the hardware accelerator, the hash computation runs several times faster than the software method (see b:155771688 for more detailed evaluation data.) Also, we can gain ~840 bytes of code size. BRANCH=none BUG=b:165777478 BUG=b:155771688 TEST=pass "make buildall" TEST=flash the same RW image; #define/#undef CONFIG_SHA256_HW_ACCELERATE ; verify the RW hash value is the same in the console message. TEST=with the following test CL, move test patterns in test/sha256.c to board/npcx9_evb/test_sha256.c; pass all test patterns. Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: I45ca609889bd73573d67d15f3e561614201e60f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2455021 Tested-by: CH Lin <chlin56@nuvoton.com> Auto-Submit: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* zephyr: add strtoi shim functionJett Rink2020-10-121-1/+3
| | | | | | | | | | | | | | | | | | | | When I compile volteer, I only need one stdlib style function and it is something we made ourselves. There is a long verion in Zephyr and long and int are the same size for 32-bit MCUs so we just need to forward the implementation. Also remove compilation of our existing platform/ec util file since Zephyr already provides these basic stdlib like functions. BRANCH=none BUG=b:169935794 TEST=Run Zephyr image on Volteer using this function. TEST=Build and run posix-ec target as well Change-Id: Idb4ea4d5e0a6ad3da8ddc5781e16aeb6e666d85f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444371 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* it83xx: enable selecting EC's VCCDino Li2020-10-081-0/+7
| | | | | | | | | | | | | | | | | | | The VCC is the power source of EC's GPM0~6, will connect to 1.8v or 3.3v depended on platform design. This change was made to ensure voltage level setting of GPM0~6 matches the corresponded VCC level. So we can enable internal pull-up no matter VCC is connected to 1.8v or 3.3v BUG=b:168783892 BRANCH=none TEST=- buildall. - The level setting is correct on these boards: asurada, drawcia, and reef_it8320 Change-Id: I4eae368e569987381a0437494262d588436bb011 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397931 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* usbc_ppc: inform the PPC of the power role of the connected deviceEric Yilun Lin2020-10-081-6/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On some of the PPC (e.g. syv682) that support manually force discharge function doesn't automatically turn off discharge FET when VBUS meets vSafe0V. The original flow is disabling discharge on pd_set_power_supply_ready and enabling discharge on pd_power_supply_reset, and since there is no automatic turning off the discharge circuit, the FET will still be on when a SNK device connected. We fix this by informing the PPC on a device is connected or disconnected so that PPC can control the FET by requests. BUG=b:160548079, b:148870148, b:163143427 TEST=make buildall TEST=TCPMv2: on asurada C0/C1(syv682) and volteer C0(sn5s330)/C1(syv682) port, and enable force discharge mode (CL:2423665), plug sink and source device and ensure Vconn and Vbus are off within tVconnOff and tVBusOff respectively. Plug a DRP hub and then plug adapter in it, and it meets tVconnOff and tVbusOff. TEST=TCPMv1: tested the same steps as above on Asurada. BRANCH=NONE Change-Id: I8ed0e18fce2d402ff24fce6bab393cc618dfac09 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434590 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Tested-by: Eric Herrmann <eherrmann@chromium.org>
* SYV682X: Automatically set CONFIG optionsEric Herrmann2020-10-071-0/+6
| | | | | | | | | | | | | | | | Matching the SN5S330, automatically define the config options for the features the SYV682X supports, namely VCONN and CC orientation. It does not support SBU gating as the SN5S330 does. BUG=b:169188754 TEST=Test that VCONN is 5V when plugging in a PD device to Delbin BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I45572dcd19ff39ad68cc5c3e89cf3ed6503ac135 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453908 Tested-by: Nathan Kolluru <nkolluru@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* ec_commands: fix DP PIN assignment flagEric Yilun Lin2020-10-071-7/+7
| | | | | | | | | | | | | | | The DP PIN assignment mask was shifted by 1 bit since CL:2432452. BUG=b:170191143, b:167700356 TEST=ensure asurada DP out BRANCH=none Change-Id: I05806d2f49fa74c2bfc6f5fb27fb9afe5f8225d8 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452131 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-061-2/+2
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Add event clear to TYPEC_CONTROLDiana Z2020-10-051-1/+5
| | | | | | | | | | | | | | | | | When the AP has finished processing events, it can use TYPEC_CONTROL to clear the specific events it has completed. This also fixes an issue with the control command structure byte alignment. BRANCH=None BUG=b:148816435 TEST=on waddledoo, plug in Apple dongle and clear SOP discovery event with "ectool typecontrol" Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I38d522f346bfd500b72109db46f78a9c135ce96e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432457 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Notify on SOP and SOP' discovery completeDiana Z2020-10-051-0/+3
| | | | | | | | | | | | | | | | | | | | | Notify the AP when the task has finished discovery. The AP doesn't need notification if nothing was found, but does need notification by transmit type as long as at least DiscoverIdentity was returned. BRANCH=None BUG=b:148816435 TEST=on waddledoo, verify: - events are 0 with nothing plugged in - events show SOP complete with Apple dongle - events show SOP and SOP' complete with TBT dock - events show SOP complete with Moshi (DiscoverIdentity only) - events show SOP complete with WooHub (Mode discovery will NAK) Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5fcfc1ba2bde40c70400462dcc4efc2b7b60d0ca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432456 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add events to TYPEC_STATUS host commandDiana Z2020-10-051-1/+3
| | | | | | | | | | | | | | Add retrieval of the event bits to the TYPEC_STATUS host command and ectool output. BRANCH=None BUG=b:167700356 TEST=on waddledoo, verify events show up in "ectool typecstatus" Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If9f4f9b56acb6108c5f87f0d2ddf7a7d945f9403 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432455 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add framework for per-port eventsDiana Z2020-10-052-0/+28
| | | | | | | | | | | | | | | The AP would like to retrieve events on a per-port basis, so add new tracking for those events, as well as the capability for non-PD tasks to retrieve and set those events. For the moment, the code just clears events on startup and event flags will be added in subsequent CLs. BRANCH=None BUG=b:148816435 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I9c2644141b4f5277ee54b4bf2c30087b51a87d8e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432454
* TCPMv2: Add PD_EVENT_TYPECDiana Z2020-10-051-4/+6
| | | | | | | | | | | | | | | | | | The kernel uses the EC_CMD_PD_HOST_EVENT_STATUS command after receiving notifications from the EC. TCPMv2 will be moving to track events in a per-port manner with the new EC_CMD_TYPEC_STATUS command, and the new PD_EVENT_TYPEC flag will indicate that the kernel should use this new command to retrieve more specific events. BRANCH=None BUG=b:148816435 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie76fc5abfbf2c433645577a61efdcce7f1dcc0c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432453 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Add TYPEC_STATUS commandDiana Z2020-10-053-52/+114
| | | | | | | | | | | | | | | | | | | | | | | The TYPEC_STATUS command will be deprecating the informational return from the USB_PD_CONTROL host command. It brings over the enablement, role, and connection information from the older command. Cable specifics are excluded as they are redundant with the discovery return. Information about the mux state is also added for convenience. Additionally, this moves enums and defines which are a part of our overall pd_* API to the ec_commands.h file to ensure consumers have the same field values available for interpretation as the EC. BRANCH=None BUG=b:167700356 TEST=on waddledoo, plug in chargers and dongles and ensure outputs from "ectool typecstatus <port>" match "ectool usbpd <port>" and "ectool usbpdmuxinfo" Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic7afc0b282b88fdb34cb9a6feef22ad913bb4aae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432452 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* npcx9: workaround the download_from_flash API of the booterCHLin2020-10-051-0/+6
| | | | | | | | | | | | | | | | | | | | The download_from_flash API in the booter is called to copy the RO/RW image from flash to code RAM when doing the sysjump. There is a bug in the npcx9 A1 chip. We have to workaround it with this CL and remove the bypass when A2 chip is available. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST="sysjump RO/RW" succeeds in the npcx9 EVB. Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: Id2babe9b9dbd36ca8b0450051d22632eb5bd4825 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435165 Tested-by: CH Lin <chlin56@nuvoton.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* npcx: support enhanced PSL functions in npcx9CHLin2020-10-052-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. In npcx7, the PSL (hibernation) wakeup source only can come from physical PSL_IN pins. In npcx9, the LCT (Long Countdown Timer) module is introduced to support wakeup from a configurable timeout. 2. support PSL wakeup from the VCC1_RST pin. This function is disabled by default and enabled (and locked) in the firmware in the npcx9 A1 chip. In the npcx9 A2 chip, this function is enabled (and locked) by booter. 3. Support pulse mode and open drain (if pulse mode is enabled) for PSL_OUT pin. 4. support one PSL general-purpose output pin which is powered by VSBY. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST="hibernate 10", check EC wakes up from hibernate after 10 seconds. make sure the reset cause in the console is "power-on hibernate rtc-alarm" TEST="hibernate"; check EC wakes up from hibernate after pressing VCC1_RST button on the internal test board. Test=configure the PSL_OUT to pulse mode and "hibernate"; cut off VCC1 power; check EC can wake up from hibernate with any input event. Test=configure the level of PSL_GPO before hibernation; check the level is kept after entering hibernation. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: I98ad41da8557222cf3d09fef9524880731cecde1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435164 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* TCPMv2: Add VBUS_REMOVED levelDiana Z2020-10-012-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | For boards which use Vbus ADCs, add a VBUS_REMOVED check level. The level for VBUS_PRESENT should be used in any locations looking for "Vbus is present" on transition, but in order to correctly detect disconnection with a load on Vbus, VBUS_REMOVED (vSinkDisconnect) is required. TODO statements have been added for places where work will be needed to support vSinkDisconnectPD in the future. For boards detecting Vbus through an external chip, the levels will likely be indistinguishable due to the chips setting a lower threshold for disconnect than for connection. Unit test code has also been added to encourage new Vbus levels to be added to the mock, and remind developers to update all locations using the vbus_level enum. BRANCH=None BUG=b:168831161 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I04014ce54ec162dd9c62f545126d921c6d880741 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436580 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: shim in the zephyr shell as the EC consoleJack Rosenthal2020-10-011-2/+6
| | | | | | | | | | | | | | | | | | | | | | | This provides compatible macros for DECLARE_CONSOLE_COMMAND, DECLARE_SAFE_CONSOLE_COMMAND, and DECLARE_CONSOLE_COMMAND_FLAGS. Note: the concept of command flags and command restriction are not enabled currently for Zephyr. We simply define everything for now. These macros use the Zephyr shell subsystem as the backend for commands. In addition, cprints, cprintf, and cputs have been redirected to the shell for CC_CONSOLE channel outputs, and printk for all other outputs. We will look at using Zephyr's logging subsystem instead of printk for the other channels in the future. BUG=b:167590251 BRANCH=none TEST=run "gettime" and "timerinfo" commands with follow-up CLs Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17caedcd0b84a21dd2b135312f683885eaf694af Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427097 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: disable DECLARE_HOOK and DECLARE_DEFERRED macrosJack Rosenthal2020-10-011-4/+8
| | | | | | | | | | | | | | | Going to guard this away, and then we can create more CLs later that actually get hooks working. BUG=b:16899177 BRANCH=none TEST=compile timer.c in follow-up CLs Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id92850982aef360d3f5e774d30603d4fe1c30495 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427095 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
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