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* common/system: refactor some confusing ifdefsJack Rosenthal2019-07-312-7/+2
| | | | | | | | | | | | | | | | | I had a hard time reading this section, so figured I may as well rewrite it to use IS_ENABLED while I was here. Gave CONFIG_{RO,RW}_HEAD_ROOM a default value of zero here, which makes the math work out for boards without it anyway. BUG=none BRANCH=none TEST=buildall Change-Id: I87dc2d73838c350088916b57aa51d5f368c5592f Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1727570 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* cleanup: remove CONFIG_REPLACE_LOADER_WITH_BSS_SLOWJack Rosenthal2019-07-311-6/+0
| | | | | | | | | | | | | | | | | | This option was only used with kunimitsu, which was removed from the EC codebase a long time ago. The EC code won't even compile with this option enabled anymore. Remove it! BUG=chromium:989301 BRANCH=none TEST=buildall Change-Id: I8ede226ec1e7b300ded6bb1769d82e142db1b0aa Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1727569 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: make IS_ENABLED sorta compatible with clangJack Rosenthal2019-07-311-10/+22
| | | | | | | | | | | | | | | | | | | | | Clang does not feature the error(...) attribute on functions, and apparently we use that compiler for the cr50 fuzz tests. Work around clang's limitations by removing the error(...) attribute when compiling with clang, allowing us to use IS_ENABLED in files that get compiled by the cr50 fuzz tests. BUG=chromium:989315 BRANCH=none TEST=make buildall -j TEST=IS_ENABLED works in system.c Change-Id: I15bf7a2d2854db12f8e00009afe39359cb6f5c19 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1726948 Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Raul E Rangel <rrangel@chromium.org>
* util: Move __stdlib_compat to function definitionsCraig Hesling2019-07-302-23/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Putting a visibility-hidden attribute in the header file is ambiguous. The compiler cannot determine which definition should be hidden (our implementation or stdlib). This serves as a slight correction to the work in crrev.com/c/1180401 . In particular, this fixes test/fuzz builds with code coverage enabled: make runtests TEST_COVERAGE=1 -j Before this fix, enabling coverage would trigger build errors, like the following: In file included from common/test_util.c:19: include/util.h:82:1: error: attribute declaration must precede definition [-Werror,-Wignored-attributes] __stdlib_compat int atoi(const char *nptr); ^ include/common.h:267:40: note: expanded from macro '__stdlib_compat' #define __stdlib_compat __attribute__((visibility("hidden"))) ^ /usr/include/stdlib.h:361:8: note: previous definition is here __NTH (atoi (const char *__nptr)) Note that enabling sanitizer on some unit tests is still broken (as it was before this CL). For example, these unit tests fail when compiling with sanitizers: make host-charge_manager_drp_charging TEST_ASAN=1 make host-charge_manager_drp_charging TEST_MSAN=1 BRANCH=none BUG=none TEST=make runtests TEST_COVERAGE=1 -j TEST=make buildall -j Change-Id: I74462c964c0ff9d3ee131450e6826cbbd6c89319 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1724936 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* type-c: USB Type-C State Machine based on Release 1.4 of the spec.Sam Hurst2019-07-309-70/+198
| | | | | | | | | | | | | | | | | | | | | | | | | Implements DRP with Accessory, and Try.SRC as detailed in Release 1.4 of the USB Type-C specification. BUG=b:130895206 BRANCH=none TEST=manual Used Atlas device to verify that it could be charged from PD and none PD charges at 5V/3A. Attached USB dock and verifed access to USB Thumb drive. Performed same tests on Hatch Port 0 on Hatch was used to run this CL, merged with PD functionality, on the PD2.0 Compliance tester. All tests pass except for a few physical layer tests. The test report has been added to the bug. Change-Id: Ic4869e20e5b4c2ba6c827d92e40c70f3140f2518 Signed-off-by: Sam Hurst <shurst@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1574667 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Sam Hurst <shurst@google.com> Commit-Queue: Sam Hurst <shurst@google.com>
* PoC: tablet-mode: Disable tablet mode in recovery bootDaisuke Nojiri2019-07-291-0/+5
| | | | | | | | | | | | | | | | | | | | | | | In recovery boot, keyboard could be unintentionally disabled due to unstable accels, which are not calibrated. This patch disables tablet mode in recovery boot. We get the same effect if motion sensors or a motion sense task are disabled in RO. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:984086,b/137251616 BRANCH=none TEST=buildall Change-Id: Idcf53ad119edbd8ff9362523ec7a72f438ae4401 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1696914 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* fpsensor: Change crypto functions to return error code instead of result codeYicheng Li2019-07-261-3/+3
| | | | | | | | | | | | | | | | | EC_RES_SUCCESS and EC_RES_ERROR are meant to be returned in EC command handler to represent command result, so change crypto functions to return EC_SUCCESS and EC error codes instead. BRANCH=nocturne BUG=none TEST=make -j buildall TEST=tested enrollment, matching, deletion and multifinger on nocturne DUT Change-Id: Ia98fa7469ab4e5dba00ede19dd34c5007d17b054 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715512 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* ec_commands: Add EC_CMD_MKBP_WAKE_MASK.Aseda Aboagye2019-07-251-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds a new host command, EC_CMD_MKBP_WAKE_MASK which allows the host to retrieve and set the MKBP host event wake mask along with the MKBP event wake mask. An accompanying console command, `mkbpwakemask` is present as well to view and adjust the wake masks. In order to use this host command, one of the following EC CONFIG_* options must be enabled in the EC: CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK or CONFIG_MKBP_EVENT_WAKEUP_MASK. BUG=chromium:786721 BRANCH=None TEST=Deploy new version of ectool and EC firmware on nocturne, verify that ectool can view and adjust the wake masks. Verify that masks can be adjusted via the console command as well. Change-Id: I01a389ccd571328220eadd19ded4167dea8c6faa Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1700004 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* i2c: don't scan i2c addresses less than 0x08Jett Rink2019-07-251-0/+10
| | | | | | | | | | | | | | | None of the existing i2c addresses in the EC code base are less than 0x08 and those addresses are reserved by the i2c and SMBus specification. BRANCH=none BUG=b:138156666 TEST=i2c bus scan with a smart battery doesn't "misbehave" any more and other devices can be detected properly. Change-Id: I561b082c4c7e3df7caaa33b6ef6ad467dabbd5a5 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715326 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* driver: Add support for calibration modeGwendal Grignou2019-07-242-4/+16
| | | | | | | | | | | | | | | | | For TCS3400, performing calibration is not just a one-shot event: The RBG sensor stays in calibration mode: returns raw value in R, G, B space. When out of calibration, it returns light information in X, Y and Z space. BUG=b:124512628 BRANCH=hatch,flapjack TEST=unit test Change-Id: I6766907054c8e79a3cbcb629ef91a0967ea0780a Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1702543 Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
* test: Add new test framework toolsYuval Peress2019-07-241-6/+23
| | | | | | | | | | | | | | | | | | | | | | | | | Add new before/after test functions to be used for clean-up and tear-down of tests. Add new asserting functions: - TEST_EQ ensures that two values are equal - TEST_NE ensures that two values are not equal - TEST_BITS_SET ensures that a value contains all bits in mask - TEST_BITS_CLEARED ensures that a value doesn't contain any bits in mask The benefit of these is that unlike TEST_ASSERT they will also print the values when the assersion is wrong. BRANCH=None BUG=b:137758297 TEST=None yet Change-Id: I2f305ef34e541c289f22c6596f53ee5cd977c7a8 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704165 Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* driver: IO expander: nct38xx: add support for NCT38XX series chipsCHLin2019-07-241-0/+3
| | | | | | | | | | | | | | | | | | | Nuvoton TCPC NCT38XX series chips have some pins which can be used as GPIO function. we can treat it as the IO expander chip also. This commit adds the driver to support it. BRANCH=none BUG=none TEST=No error for "make buildall" TEST=Apply this and related CLs, manually test each API, make sure each function works correctly with NCT3807 and NCT3808 at the same time. Change-Id: I2254c2e867445e55d1c261172e4b7175d22f28ef Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1657859 Commit-Queue: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* IO_Expander: introduce the common interface of IO expanderCHLin2019-07-245-0/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement the common code to provide a friendly interface to control the IOs of IO expander. It adopts a similar concept to GPIO. 1. Define the IO expander IO in gpio.inc by the format: IOEX(name, EXPIN(ioex, port, offset), flags) - name: the name of this IO pin - EXPIN(ioex, port, offset) - ioex: the IO expander port (defined in board.c) this IO pin belongs to. - port: the port number in the IO expander chip. - offset: the bit offset in the port above. - flags: the same as the flags of GPIO. 2. The following APIs are supported: 1. ioex_get_flags_by_mask 2. ioex_set_flags_by_mask 3. ioex_get_flags 4. ioex_set_flags 5. ioex_get_level 6. ioex_set_level 7. ioex_init 3. The following console commands are supported: 1. ioexget [IO_EXPANDER_PIN_NAME] 2. ioexset IO_EXPANDER_PIN_NAME 0/1 BRANCH=none BUG=none TEST=No error for "make buildall" TEST=Apply this and related CLs, manually test each API, make sure each function works correctly with IO expander chip (NCT3807/NCT3808.) Change-Id: I79c9813abccc67d5554e2ceb5c119dcf549b7dce Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1657858 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: CH Lin <chlin56@nuvoton.com>
* hatch_fp: Add RDP (read protection) support to STM32F4Tom Hughes2019-07-241-3/+3
| | | | | | | | | | | | | | | | | | | BRANCH=none BUG=b:125419658 TEST=Remove "-U" flag in STM32MON_READ_FLAGS in flash_fp_mcu_common.sh flash_fp_mcu -r foo.bin => success hexdump foo.bin => valid data ectool --name=cros_fp flashprotect enable ectool --name=cros_fp reboot_ec flash_fp_mcu -r foo.bin => fails Add "-U" flag back to STM32MON_READ_FLAGS in flash_fp_mcu_common.sh flash_fp_mcu -r foo.bin => success hexdump foo.bin => all 0xFF Change-Id: Ic3ec18262e653b72baf239caa8db12186a63613c Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1692220 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-2012-99/+83
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ec_commands: Rename 'renew' to 'live' in EC_CMD_USB_PD_CHIP_INFOKarthikeyan Ramasubramanian2019-07-202-3/+8
| | | | | | | | | | | | | | | | | | | | | | Semantics of renew field in EC_CMD_USB_PD_CHIP_INFO is changing as follows: 0 -> Return hard-coded info for Vendor ID/Product ID and cached info for the Firmware Version 1 -> Return the live chip info for Vendor ID/Product ID/Firmware Version Also rename the 'renew' field to 'live' to match the new semantics. BUG=b:128820536,b:119046668 BRANCH=None TEST=make -j buildall; Boot to ChromeOS. Change-Id: Ie3dd022336b0be5c9728bb0ebabef32b7a6b5d57 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1617893 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org> Auto-Submit: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-1912-86/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* tablet-mode: Fix header file guard and API definitionsDaisuke Nojiri2019-07-181-6/+15
| | | | | | | | | | | | | | | | | | This patch adds a usual inclusion guard (#ifdef __CROS_EC_*_H) and fixes API descriptions. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: I96149cfe76cff7ab85be4785252a600b565e4a92 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1696913 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* printf: Fix hexdump and string 0 precisionCraig Hesling2019-07-181-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses a few issues with the current formatter. The major points are as follows: 1. Cannot specify precision 0 (truncate all) for string or hexdump 2. Forced safe precision for malformed strings 3. No padding when using hexdump 4. Bad error EC_ERROR_INVAL in vsnprintf 5. Documentation errors For (1), no piece of code explicitly sets the precision to 0 in order to invoke the default behavior, which is currently no precision limit. You can check using the following grep line: grep -rI '%[\*0-9]\{0,20\}\.0\{1,20\}[a-zA-Z]' However, there are many cases where the precision is used to limit the character output (as it should be). grep -rI '%[\*0-9]\{0,20\}\.[\*0-9]\{1,20\}[a-zA-Z]' There are many more instances that use variable precision without checking if the precision is zero. One of which is the following: crrev.com/4a4e2c71a0f6aaa50e0728922f84a7d54c14380a/test/host_command_fuzz.c#116 https://clusterfuzz.com/testcase-detail/5699023975088128 Our current implementation will insert ERROR and stop processing, if a precision of zero is detected when using the hexdump flag. This results in a badly formatted console line or runtime string, when the intended behavior would be to simply read no bytes. In the aforementioned fuzzer case, outputting ERROR triggers a false positive. Our printf should handle explicit zero precision similar to stdlib's printf, which means truncating all the way to zero positions, if specified. For (2), our current implementation uses strlen to identify the length of the input string, regardless of the set precision. Since this is an embedded platform, we should use strnlen to impose safe limits, when a precision is specified. For (3), our implementation should support padding and adjusting of all formatter types, since that is a primary feature of a printf formatter. The remaining commented code highlights odd behavior that should be fixed at some point, but is not critical. BUG=chromium:974084 TEST=Checked for any format lines that rely on a set precision of 0 grep -rI '%[\*0-9]\{0,20\}\.[\*0-9]\{1,20\}[a-zA-Z]' TEST=make run-printf V=1 BRANCH=none Change-Id: I897c53cce20a701fcbe8fb9572eb878817525cc3 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1659835 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd_policy: Change DP AltMode event from host event to MKBP.Aseda Aboagye2019-07-172-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously, the EC could notify the AP that it had entered into DisplayPort Alternate mode by sending a MODE_CHANGE host event. However, there was no mechanism to disable that functionality if desired without effecting the other MODE_CHANGE events (i.e. - base attach/detach). By changing the DisplayPort Alternate mode entry to an MKBP event, we can have more granularity and only affect this single event. - This commit adds a new MKBP event, EC_MKBP_EVENT_DP_ALT_MODE_ENTERED. - The commit also changes the DP AltMode entry notification from sending a MODE_CHANGE host event to this new MKBP event. BUG=chromium:786721 BRANCH=None TEST=Build and flash nocturne, verify that system still wakes up on DisplayPort Alternate Mode entry. Change-Id: Ia5f294b26701c3c98c9b7f948fc693d26234c835 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685787 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* mkbp_event: Add CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT.Aseda Aboagye2019-07-171-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | MKBP was recently refactored to offer choice in the MKBP notification method. However, if a board is using a GPIO to notify the AP of a MKBP event, and the AP cannot wake from the GPIO, the MKBP event cannot wake the system up from suspend as is. This commit simply adds a new config option, CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT such that MKBP events can wake the system from suspend. Note that the board will have to add MKBP events to the host event sleep mask in coreboot. Typically on ARM devices, EC_INT_L is already a wake pin, but on Intel devices it is not; there's actually a different pin, PCH_WAKE_L which is set via sending a host event and wakes the system. BUG=b:136272898,chromium:786721 BRANCH=None TEST=Enable config option on nocturne, flash nocturne, suspend DUT, verify that MKBP events can wake the AP. Change-Id: If5026bfe3efacbc051f99a180e061c6fd679ce5a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685786 Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* common: add i2c tracing functionalityJack Rosenthal2019-07-171-0/+15
| | | | | | | | | | | | | | | | | | | crbug.com/982442 requests a way for developers to enable tracing of i2c commands when debugging. This adds a new debug feature, the i2ctrace command, which provides that. The command is guarded by CONFIG_I2C_DEBUG. BUG=chromium:982442 BRANCH=none TEST=enabled CONFIG_I2C_DEBUG on arcada_ish, made sure that command functioned as it says on the tin Change-Id: I9c762271237cbf131e5ef7c0f605c89af4f209fd Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699347 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* common: remove CONFIG_SMBUS dead codeDenis Brockus2019-07-172-159/+16
| | | | | | | | | | | | | | | | | CONFIG_SMBUS is not used. Cleaning up the code by removing this. Added a comment to document the removal and why. This will give a way to find the code if we ever needed to bring it back BUG=chromium:982316 BRANCH=none TEST=make buildall Change-Id: I40703a95bc849538e1aee32f6f96beab811285bd Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704279 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Add the functions to read and write EAR.Pai Peng2019-07-171-11/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | EAR (extended address register) is used to access addresses above 16MiB when 3-byte address mode is used. These two functions allow to write to and read from EAR to set up what addresses to access in 3-byte mode. For example, for a 64MiB EEPROM: EAR value Addresses to access 0 0x0000000 - 0x0FFFFFF 1 0x1000000 - 0x1FFFFFF 2 0x2000000 - 0x2FFFFFF 3 0x3000000 - 0x3FFFFFF BUG=b:132252340 BRANCH=none TEST=manual Testing: 1. Writing to EAR returns successfully. 2. Writing different values to EAR, verify that accessing EERPOM in 3-byte mode is to the correct address, e.g., when EAR=2, accessing 0x0FFFFFF is actually to 0x2FFFFFF. Change-Id: I2a8bde7fc4b9069afc80a81042fb47359bffa015 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1688150 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Pai Peng <paipeng@google.com> Commit-Queue: Pai Peng <paipeng@google.com>
* config: Add CONFIG_MKBP_EVENT_WAKEUP_MASKAseda Aboagye2019-07-171-1/+18
| | | | | | | | | | | | | | | | | | | This commit adds a new CONFIG_* option, CONFIG_MKBP_EVENT_WAKEUP_MASK. This allows a board to specify which MKBP events are allowed to wake the system when it is in suspend. BUG=b:136282898,chromium:786721 BRANCH=None TEST=With some other code, flash nocturne, suspend DUT, verify that only the MKBP events in the CONFIG_MKBP_EVENT_WAKEUP_MASK wake the system up. Change-Id: Ib4d04418aacab209d0e26703500df119924090b7 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685785 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Rename CONFIG_CHARGEN to CONFIG_CMD_CHARGENVadim Bendebury2019-07-041-3/+1
| | | | | | | | | | | | | | The updated name is more is better aligned with EC codebase use of CONFIG_ variables. BRANCH=none BUG=none TEST=make buildall -j Change-Id: I52a35e33debb2cab41c009dbb8938614a810baef Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1688134 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* rollback: Add rollback support for chips with varying flash bank sizesTom Hughes2019-07-031-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=b:124996507 TEST=In hatch_fp and nocturne_fp console with CONFIG_RWSIG_JUMP_TIMEOUT increased to large value and console_task stack size increased to 4096: > rollbackinfo rollback minimum version: 0 RW rollback version: 0 rollback 0: 00000000 00000000 0b112233 [00..00] * rollback 1: ffffffff ffffffff ffffffff [ff..ff] > rollbackupdate 1 > rollbackinfo rollback minimum version: 1 RW rollback version: 0 rollback 0: 00000000 00000000 0b112233 [00..00] rollback 1: 00000001 00000001 0b112233 [00..00] * > rollbackaddent 1234 > rollbackinfo rollback minimum version: 1 RW rollback version: 0 rollback 0: 00000002 00000001 0b112233 [e5..8c] * rollback 1: 00000001 00000001 0b112233 [00..00] TEST=test_that --board=nocturne <IP> firmware_Fingerprint.ObeysRollback firmware_Fingerprint.ObeysRollback [ PASSED ] firmware_Fingerprint.ObeysRollback/firmware_Fingerprint [ PASSED ] Change-Id: I90b524138ca1125e2c1b62936b9f6fbe00e957d4 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1681379 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* add chargen command to allow EC and AP to flood the consoleVadim Bendebury2019-07-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | The chargen command sends continuous stream of characters to the console (UART console in case of EC). The stream follows a pattern where the value of each next character is the value of the previous character + 1, while staying in the ASCII range of 0..9A..Za..Z This allows to create tests which validate console output by verifying that no characters in the received sequence were lost. BRANCH=none BUG=b:38448364 TEST=Enabled the command for bobba EC board, and verified that the chargen works on both EC and AP on an Octopus device Change-Id: I9701bb493b0454de4cb4baa4784ab645b33a415f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1554198 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* cleanup: Rename CONFIG_MKBP_WAKEUP_MASK for clarity.Aseda Aboagye2019-07-021-3/+3
| | | | | | | | | | | | | | | | | | | | | | CONFIG_MKBP_WAKEUP_MASK is a bit confusing and is wrongly named. The comment stated that "With this option, we can define the MKBP wakeup events in this mask (as a white list) in board level, those evets allow to interrupt AP during S3.". However, these events are NOT MKBP events at all but are instead host events. This commit tries to clear things up by renaming CONFIG_MKBP_WAKEUP_MASK to CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK to better show that these events are in fact host events. BUG=b:136282898 BRANCH=None TEST=`make -j buildall` Change-Id: I42beadec8217435fd30e679ccf52d784a8ef99a0 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685784 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* USB PD: Refrain from resets if battery is lowDiana Z2019-07-022-1/+17
| | | | | | | | | | | | | | | | | | | | | | This change introduces a new clause to the SNK_DISCOVERY state to prevent reset timers from starting when a battery is reporting below a configured level, which indicates the point at which the battery is capable of withstanding the potential loss of Vbus. Once the battery has charged enough, a timer for soft reset will begin to trigger PD negotiation to start over if it hasn't been able to complete. BUG=b:128935567 BRANCH=octopus TEST=verified hard reset doesn't occur on grabbiter when system is locked and coming back from battery cutoff without enough battery, verified soft followed by hard resets after the battery had charged Change-Id: Ib885d2b55acacad7ef1375572b0e6d243e639bdf Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1565147 Reviewed-by: Jett Rink <jettrink@chromium.org>
* doc: add documentation for usb-c on platform/ecJett Rink2019-07-021-1/+9
| | | | | | | | | | | | | | | Add documentation for common configuration and touch points that need to be considered when implementing the USB-C stack on the platform/ec codebase. BRANCH=none BUG=chromium:974302 TEST=none Change-Id: I24aef187989c14688985d3cba48a6734ee519d23 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1648609 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* hatch/helios/kindred/kohaku: Enable EC-based display backlight controlPhilip Chen2019-07-021-2/+2
| | | | | | | | | | | | | | | | | | | | | This patch allows EC to override display backlight control for hatch family. Also enable CONFIG_BACKLIGHT_LID so that EC can specifically turn off display backlight when the lid is closed. BUG=b:135511415 BRANCH=none TEST=On hatch rev1 board, turn off/on display backlight by 'ectool backlight 0' and 'ectool backlight 1' TEST='emerge-hatch chromeos-ec' Change-Id: I894ef2879fb584ccf84cd643cc4c0cd5fdcb8525 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679047 Reviewed-by: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org>
* uart_buffering: add tx_buffer_full() APIVadim Bendebury2019-06-271-0/+5
| | | | | | | | | | | | | | | | | To aid in system level UART console performance testing a test function needs to know when the UART console buffer is full. This patch provides an API for that. BRANCH=none BUG=b:38448364 TEST=verified proper operation of the chargen CLI command which uses this API. Change-Id: I5fbc6cf4031a5077c91cd4bb85ab6f4dfb18821e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679710 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* rma: extract getting RMA Dev ID into a separate methodAndrey Pronin2019-06-271-1/+11
| | | | | | | | | | | | | | | | This CL extracts get_rma_device_id() that can be used by rma_auth and other cr50 components. BRANCH=none BUG=b:136091350 TEST=Verify that RSU Device ID reported through vNVRAM that uses this new method mathes the same ID calculated from device ID in G2FA certificate. See CL:1677238 for the exact method. Change-Id: I08f58dbd8f838f1e595601ec4532792acda62428 Signed-off-by: Andrey Pronin <apronin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1677237 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cleanup: Fix common spelling typos in commentsTom Hughes2019-06-272-5/+5
| | | | | | | | | | | | | | | | | | | | | | Used 'git grep' to fix the following misspelled words across the codebase: * woud * setion * cleand * independantly * dedup BRANCH=none BUG=none TEST=make buildall -j Change-Id: I95905c56221034cf3f9d286755d7e0c07f8c58b6 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1678246 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Sean Abraham <seanabraham@chromium.org>
* driver: add an option to emulate irq event in TCS3400Ting Shen2019-06-251-0/+8
| | | | | | | | | | | | | | | | | Krane does not reserve an interrupt pin for ALS, so we need another way to trigger the irq handler. Add a new config option CONFIG_ALS_TCS3400_EMULATED_IRQ_EVENT to support this use case. BUG=b:129419982 BRANCH=None TEST=verify that `accelread 3` outputs reasonable data on krane. Change-Id: I960df249d29c0ac21810057e25f14d4bac3e14f5 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1621449 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* config.h: Add missing CONFIG_WIRELESS_CHARGER_P9221_R7Yilun Lin2019-06-251-0/+3
| | | | | | | | | | | | | | TEST=none BUG=b:126162615 BRANCH=none Change-Id: I602a45df8b178eef4ddfe3ae0b642640a6313c72 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1673953 Commit-Queue: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Auto-Submit: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: provide config option for 64-bit hwtimerJack Rosenthal2019-06-242-3/+44
| | | | | | | | | | | | | | | | | | | This adds a config option, CONFIG_HWTIMER_64BIT, which when enabled expects the chip implementation to define __hw_clock_source_read64 and __hw_clock_source_set64. This allows for support of native 64-bit hardware clock when available on hardware instead of a rollover interrupt style. BUG=chromium:976804 BRANCH=none TEST=made implementation of 64-bit hardware timer for ISH (child CL), and working great Change-Id: Idb2c3bb8f804e6c83a33901c953ddd5f1ae89784 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1668055 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* fpsensor: Add unit tests for fp_set_sensor_modeTom Hughes2019-06-241-1/+2
| | | | | | | | | | | BRANCH=nocturne BUG=b:124773209 TEST=make buildall -j Change-Id: I8337c708005c51435ce8a5ab5d536cccc604f850 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1670347 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* fpsensor: Refactor fp_command_modeTom Hughes2019-06-241-0/+9
| | | | | | | | | | | | | | | | | | | | This refactoring allows us to call fp_command_mode from the debug console commands and ensure that we're testing the same underlying code path that the host commands use. BRANCH=nocturne BUG=b:124773209 TEST="fpenroll" in hatch FP console "fpmatch" in hatch FP console "fpclear" in hatch FP console TEST=On nocturne: flash_fp_mcu ec.bin Enroll fingerprint via UI, lock/unlock, Remove fingerprint via UI Change-Id: I5e1e314c7f1d67dc663795cafe751545516e9f89 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1652285 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* common: pd_policy: Add notification for DP AltModeAseda Aboagye2019-06-242-1/+13
| | | | | | | | | | | | | | | | | | | | | This commit simply adds a notification that can be called when the device enters DisplayPort Alternate mode or a DP attention VDM is received. Calling the notification will send a MODE_CHANGE host event which may wake the AP. BUG=chromium:786721 BRANCH=firmware-nocturne-10984.B TEST=With other patches, flash nocturne; suspend DUT, plug in powered charge through hub, verify DUT wakes up. Change-Id: Iaa221e69060a7d1015f7c1e2f6f053e6810a674a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1666366 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* kukui/usb_pd_policy: Don't support superspeed lanes.Yilun Lin2019-06-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Kukui doesn't have superspeed lanes, we should avoid using such pin assginments. Also, 1. update usb_mux on receiving DP config packet accordingly, and 2. fix usb_mux setting by removing usb_mux update when receiving DP attention packet. We should inform DP mux on at DP config, and DP mux off at DP safe mode. TEST=print choosed pin mode, and see it choose PIN_C rather than PIN_D. TEST=Plug hub JCA-374 and see the external display is functional. BUG=b:135079572 BRANCH=master Change-Id: Id1edfc5b1962dbef7e5ab79c512d8f2c568777e8 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660524 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Auto-Submit: Yilun Lin <yllin@chromium.org> Commit-Queue: Yilun Lin <yllin@chromium.org>
* topology: Add USB2 & USB3 connectivity info to tcpc_config_tDaisuke Nojiri2019-06-212-0/+17
| | | | | | | | | | | | | | | | | | | | | Intel SoC needs which USB2/3 ports are assigned to which Type-C ports. This patch adds USB2 and USB3 port numbers to tcpc_config_t so that EC_CMD_LOCATE_CHIP can return it to the host. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/134614710 BRANCH=none TEST=TBD Change-Id: I10206dde4d71ac6e40a71c65333db4edd3c81e7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1669880 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* intel_x86: Use common code to get power signal's levelVijay Hiremath2019-06-201-0/+5
| | | | | | | | | | | | | | | Removed redundant code in intel_x86 and reusing the common code for getting power signal's level. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I9cd550a2326456189a087459aeb8e6c88a8cad8e Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1667647 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* minute-ia: load eip value from top of stackJack Rosenthal2019-06-191-0/+3
| | | | | | | | | | | | | | | | For interrupt vectors (as opposed to exception handlers), the eip value is on top of the stack (referentially the return address by C calling convention). Use separate code for WDT vector. BUG=b:129983997 BRANCH=none TEST='crash watchdog' showing correct EIP, CS values Change-Id: I7efb2c71aba63eefd89fc71af089bc14034b7d08 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663188 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-19109-109/+109
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ish: snowball linker cleanupDenis Brockus2019-06-181-2/+2
| | | | | | | | | | | | | | | | Change AON_ROM references to be AON_PERSISTENT, these are not readonly Use the linker to set a snowball structure in the right place so we do not have to maintain hardcoded addresses in the register file BUG=b:132690500 BRANCH=none TEST=make buildall -j and check map location of snowball to be correct Change-Id: I4983a078fbd067b9c7ec9f0c49f962a4cb1581b7 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1664593 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* krane: Enable BC12 detection with gpio controlled.Yilun Lin2019-06-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support CONFIG_BC12_DETECT_POWER_ROLE_TRIGGER. Krane's BC12 detection is controlled by GPIO_BC12_DET_EN by disconnecting USB-PHY, that is: - Assert GPIO_BC12_DET_EN, then USB-PHY is disconnected - Deassert GPIO_BC12_DET_EN, then USB-PHY is connected. The current usb_chg_task will make USB devices not be enumerated, since GPIO_BC12_DET_EN is deasserted only when VBUS attached and BC12 device identified. However, peripherals won't trigger BC12 detection so GPIO_BC12_DET_EN always asserted. To fix this problem, we trigger BC12 detection only when a port is attached and hook USB_PD_CONNECTED to toggle BC12 detection. We have to - Assert GPIO_BC12_DET_EN on SRC device plugged to recognize BC12 charger. - After BC12 device detected, we have to disable BC12 to connect USB-PHY back for enumerating USB devices. - Deassert GPIO_BC12_DET_EN on SNK device plugged to enumerate USB devices. TEST=Test with https://crrev.com/c/1408751/1, and see it is able to recognize Apple 2.4A charger and 5V2A DCP charger. TEST=Boot w/ USB hub plugged (w/ and w/o external BC1.2 charger on the hub) and see USB devices are enumerated. BUG=b:122866184 BRANCH=None Change-Id: I5b3362305361c0c950288fc83072e9bc79082c08 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1575050 Tested-by: Yilun Lin <yllin@chromium.org> Auto-Submit: Yilun Lin <yllin@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Yilun Lin <yllin@chromium.org>
* fpsensor: Change new files' year to 2019Yicheng Li2019-06-151-1/+1
| | | | | | | | | | | | | | Although the code is moved from files created in 2017, these are new files, so change the year to 2019. BRANCH=nocturne BUG=none TEST=make -j buildall Change-Id: I15015c7ad1a713437b04395fd09e6641019f5ff7 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660092 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* include/util: enclose a arg of POWER_OF_TWO into parenthesesNamyoon Woo2019-06-151-1/+1
| | | | | | | | | | | | | It is something should be done. BUG=None BRANCH=None TEST=make buildall -j Change-Id: I7a96385cf82ff458446744ae92ffc8349a443098 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660942 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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