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* bc12: split task handler in init and eventFabio Baltieri2022-05-271-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Split the bc12 internal API from a task loop handler to an init and event handler pair of functions, moving the loop on the caller. This is to allow handling the events from a single task on a followup patch. Current driver behavior should be unchanged, just bringing the loop and wait in the generic code. For a couple of drivers (bd9995x and rt946x) this was not quite possible as they would need some more work to fit in that model, but then those two runs in single task mode already anyway (HAS_TASK_USB_CHG), so no point converting them to fit the model anyway, just running the whole driver in the init() keeps the existing behavior, code will never reach the outer loop. BRANCH=none BUG=b:226411332 TEST=make buildall TEST=zmake testall TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I8e28ad8b5b52b002587aefb68116a14b709729fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3663747 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* usbc: wrap task_set_event to have an explicit port argumentFabio Baltieri2022-05-271-0/+8
| | | | | | | | | | | | | | | | | Define an explicit function to set events for the usb charger tasks, so that the caller is not coupled to the internal task implementation, and we can use a single task on a later patch. BRANCH=none BUG=b:226411332 TEST=make buildall TEST=zmake testall TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I7a1223642b800568bf4f9864f75b2b647c84d29f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3663746 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* zephyr: clean up ioex configsDawid Niedzwiecki2022-05-271-5/+0
| | | | | | | | | | | | | | | | | | In Zephyr, we treat IO expander pins as usual GPIO, thus the same GPIO API is used. There is no need to keep a separate config PLATFORM_EC_IOEX to support IO expander, when we use Zephyr drivers. Keep only PLATFORM_EC_IOEX_CROS_DRV config to enable support for CrosEC drivers for Zephyr builds. BUG=b:231086773, b:208181774 TEST=zmake testall && Make sure PD works on ports 0 and 2 on Brya BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I135cc1b5a58beb2f4e8bfa2384db6fdfd534a01e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3670275 Commit-Queue: Dawid Niedzwiecki <dawidn@google.com> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* CCGXXF: Support enabling SBU FETsVijay Hiremath2022-05-261-0/+1
| | | | | | | | | | | | | | | | CCGXXF chip has SBU line port protection built inside the PD chip hence added code to enable/disable SBU FETs. To support the this vendor specific feature separated the CCGXXF driver structure from standard TCPCI driver. BUG=none BRANCH=none TEST=USB, DP, USB, TBT works on ADL-RVP Change-Id: I06af101f4efa228163dc0a673887bdc368dbd504 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3400678 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* tcpm: Support PD chips with SBU protectionVijay Hiremath2022-05-263-1/+43
| | | | | | | | | | | | | | | | | | | | | Some PD chips have integrated port protection for SBU lines and the switches to enable the SBU lines coming out of the PD chip are controlled by vendor specific registers. Hence, added the code in TCPM & driver skeleton in TCPCI to support those chips. By checking if the SBU enable function exists in TCPM driver before trying to enable the SBU from discrete PPC, this code supports co-existence of both PD based SBU protection and discrete PPC chip SBU protection in a same platform. BUG=none BRANCH=none TEST=make buildall -j, zmake testall Change-Id: I3d3a5eec9077df95c0eb91cf1a709cb79f36ca60 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3227374 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add support for combination of PPC & non-PPC portsVijay Hiremath2022-05-261-0/+13
| | | | | | | | | | | | | | | | | Some PD/TCPC chips have integrated power path control, this CL allows having combination of chips with discrete PPC and integrated PPC in same board. By checking board level function to see if board's port has PPC or not, logic decides to call PPC functions. BUG=none BRANCH=none TEST=Tested on ADL-RVP, CCGXX with integrated PPC & NCT3808 with discrete SN5S330 PPC combo works. Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Change-Id: I5289f41664c9c5bf6c4966c9dcf79274cebe8c2b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3146212 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* usbc: cleanup: Abstract the TCPM control logicVijay Hiremath2022-05-262-16/+46
| | | | | | | | | | | | | | Abstract the TCPM control logic to support various combinations of TCPC chips that support built in PPC and OCP. BUG=none BRANCH=none TEST=make buildall -j, zmake testall Change-Id: I614797829d1d8f230439a70c1822c918f9fea1f3 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3661521 Reviewed-by: Diana Z <dzigterman@chromium.org>
* chip/npcx: Add function to poll DIRTY bit for virtual wire changesTim Wawrzynczak2022-05-261-0/+7
| | | | | | | | | | | | | | | | | | | | | | | The NCPX eSPI Module has a set of registers called VWEVSM. These contain information about the various virtual wires connected via eSPI to the host. One of these is a 'DIRTY' which will be set when the host recognizes a change in the status of one of the virtual wires that the particular VWEVSM register is responsible for. This patch adds a function to poll the DIRTY bit for a given virtual wire until it is no longer set, i.e. the VWIRE change has been acknowledged by the host. BUG=b:230366077 BRANCH=none TEST=tested with next patch Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I87ae66c7af067bd14633edf04f6ee9dc5ffcde99 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3626782 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Jeremy Compostella <jeremy.compostella@intel.corp-partner.google.com>
* charge_manager: add command vbusEric Yilun Lin2022-05-261-0/+1
| | | | | | | | | | | | | | | | | | vbus command prints VBUS voltage through the charge_manager_get_vbus_voltage() BUG=b:203739613 TEST=uart:~$ vbus VBUS C0 = 0 mV VBUS C1 = 12 mV BRANCH=none Change-Id: I43d6da19dfb8f2f2a2bd9f60537f8a319a00b634 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3397144 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* zephyr: gpio: add function to reset GPIO portDawid Niedzwiecki2022-05-261-0/+14
| | | | | | | | | | | | | | | | | | | There is a function to reset a pin to the default state. Add a new function to reset the whole port. The function can be used to e.g. reconfigure an ioexpander chip after reset. BUG=b:231086773, b:208181774 TEST=zmake testall BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I1149bbf05044f888f054692a0ddf7fcf13cfc617 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3645122 Commit-Queue: Dawid Niedzwiecki <dawidn@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* keyboard_mkbp: Remove unused keyboard_send_battery_key methodmparuchuri2022-05-241-9/+0
| | | | | | | | | | | | BUG=b:183436066 BRANCH=none TEST=make -j buildall Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com> Change-Id: I7b81cea2249756f24c86cad8aee369acdc950879 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3644851 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* usb_charge: fix various typos and doxygen tagsFabio Baltieri2022-05-231-4/+5
| | | | | | | | | | | | | Various typo/doxygen fixes in usb_charge.h. BRANCH=none BUG=none TEST=zmake testall Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I15b73a1533eb7be945d5c51a9c4b45e823c5ad2a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3661582 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* usb_charge: drop USB_CHG_TASK_COUNTFabio Baltieri2022-05-231-11/+0
| | | | | | | | | | | | | USB_CHG_TASK_COUNT is not used anywhere, drop it. BRANCH=none BUG=none TEST=zmake testall Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: Ia7fb4d0bbcdb6b6edaea1be96a0d5ada43bbcfba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3661581 Reviewed-by: Aaron Massey <aaronmassey@google.com>
* bmix60: Use CONFIG_<driver>_INT_ENABLEGwendal Grignou2022-05-232-6/+6
| | | | | | | | | | | | | | | | | | | Use CONFIG_<driver>_INT_ENABLE to not include interrupt() and irq_handler() when hardware interrupt are not used. Disable call to motion_sense_fifo() with IS_ENABLED(CONFIG_ACCEL_FIFO). Other use of CONFIG_ACCEL_FIFO are removed: only when a hardware interrupt is configured we enable the sensor FIFO. Otherwise we directly read into the sensor data registers. BUG=b:230401133 BRANCH=asurada,dedede,brya TEST=Build all. Check Zephyr with herobrine. Check on bugzzy. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: Ie33ad8dd34b5723ce9da4029effdae0755d81c03 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609354 Reviewed-by: Yuval Peress <peress@google.com>
* tcs3400: Use CONFIG_<driver>_INT_ENABLEGwendal Grignou2022-05-231-0/+20
| | | | | | | | | | | | | | | Use CONFIG_<driver>_INT_ENABLE to not include interrupt() and irq_handler() when hardware interrupt are not used. Disable call to motion_sense_fifo() with IS_ENABLED(CONFIG_ACCEL_FIFO). BUG=b:230401133 BRANCH=asurada,dedede,brya TEST=Build all. Check Zephyr with herobrine. Check on bugzzy. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: Ifc158d739f2b8f1664323af635dad5017f0761e1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609127 Reviewed-by: Yuval Peress <peress@google.com>
* motion_sense: make motion_sense_push_raw_xyz() publicGwendal Grignou2022-05-231-0/+8
| | | | | | | | | | | | | | | It will be used when ACCEL_FIFO is not used in sensor drivers: Instead of calling functions in motion_sense_fifo, we will call motion_sense_push_raw_xyz() to just update sensor->xyz under lock. BUG=b:230401133 BRANCH=asurada,dedede,brya TEST=Build all. Check Zephyr with herobrine. Check on bugzzy. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I4189896be208d6877b6a85765c2bde983532dd3c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609124 Reviewed-by: Yuval Peress <peress@google.com>
* board: remove CONFIG_ACCEL_LIS2DW_AS_BASE variableGwendal Grignou2022-05-231-6/+0
| | | | | | | | | | | | | | | | | | | LIS2DW can be used in force mode or interrupt mode. Since ACCEL_INTERRUPTS does not give the flexibility to enable interrupt for a single sensor, LIS2DW_AS_BASE has been introduced. Superseded by LIS2DW_INT_ENABLE. Fixes commit 8df548726b24 ("driver: lis2dw12/lis2dwl: add polling mode support") Fixes commit 4df10f7b2b0e ("zephyr: driver: add ST accel_lis2dw12") BUG=b:230401133 BRANCH=asurada,dedede,brya TEST=Build all. Check Zephyr with herobrine. Check on bugzzy. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I7e6ecab7eed803808dc97f84f61def339def0e40 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609122 Reviewed-by: Yuval Peress <peress@google.com>
* config.h: Add missing ICM42607 interrupt config variableGwendal Grignou2022-05-231-0/+1
| | | | | | | | | | | | | | CONFIG_ACCELGYRO_ICM42607_INT_EVENT was used but not defined in config.h. BUG=b:230401133 BRANCH=asurada,dedede,brya TEST=Build all. Check Zephyr with herobrine. Check on bugzzy. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I7dca95c94c8e020613ebe9ca4fd57ce8e087beb5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609119 Reviewed-by: Yuval Peress <peress@google.com>
* OCP: Update OCP handling to match PD 3.1 specDiana Z2022-05-231-0/+7
| | | | | | | | | | | | | | | | | | | | The PD 3.1 spec has added a new criteria that we must start ErrorRecovery after three OCP events on a port. Additionally, this change moves more of the OCP logic into the OCP module itself and makes it more closely match the existing spec instructions. We now hard reset right away and queue up an alert message for later when a new contract is in place. BRANCH=guybrush BUG=b:228403079,b:233364677 TEST=on nipperkin, OCP port repeatedly and observe expected resets and Alert messages, and observe no Vbus is turned on after fourth OCP Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ibeccc942b1ab638ac93e6e74f0692202f51cf5bb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3658237 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMV2: Add power state change to statusJameson Thies2022-05-212-0/+39
| | | | | | | | | | | | | | | | | The Status Data Block (SDB) was updated in USB PD Revision 3.1 to include a Power State Change field which includes New Power State and New Power State Indicator fields. This CL updates dpm_get_status_msg to include the Power State Change field. BUG=b:227236917 TEST=make try_build_boards and make runhosttests BRANCH=None Signed-off-by: Jameson Thies <jthies@google.com> Change-Id: I05ffaa0a66f19bea781b16ab381930700c7f8e47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3632817 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMV2: Update Status to include temperature informationJameson Thies2022-05-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | The Status message defined in the USB PD Rev 3.0 specification has 2 fields related to a devices operating temperature. (1) internal temperature and (2) temperature status. This CL updates the dpm_get_status_msg function in usb_pd_dpm.c to fill those fields based on a Chromebook's temperature sensors. The PD_TEMP_SENSOR config defines which temperature sensor is used. BUG=b:227236917 TEST=triggered Alert->Get_Status->Status sequence and observed temperature field matches temperature readings from "ectool temps all" Also, "make runhosttests" and "make try_build_boards" BRANCH=None Signed-off-by: Jameson Thies <jthies@google.com> Change-Id: Ic190a1357d951adf740a4ac2f1ff957a04e36478 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3587979 Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: Jameson Thies <jthies@google.com> Commit-Queue: Jameson Thies <jthies@google.com>
* keyboard: Modify register_scancode_set2 APIYu-An Chen2022-05-201-1/+1
| | | | | | | | | | | | | Modify register_scancode_set2 API argument BUG=b:220800586 BRANCH=none TEST=manual check function working Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Change-Id: I3a13c93007c4d929ade0d7e32623b6308f0a05ae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3649936 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* RGBKBD: Add late initializationDaisuke Nojiri2022-05-201-0/+3
| | | | | | | | | | | | | | | | | | is31fl3743b does not successfully change the GCC or scale registers during power-on after a cold reset. This patch adds a delayed initialization to rgbkbd_enable so that the chip will be re-initialized on the first operation (e.g. enable, set brightness, set color). BUG=b:232443638 BRANCH=None TEST=Vell Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ie78983dab73c608aa9d14b3e1f9d1edd2def2e54 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3654489 Reviewed-by: Parth Malkan <parthmalkan@google.com>
* RGBKBD: Set GCC, scale, color in rgbkbd_initDaisuke Nojiri2022-05-201-0/+13
| | | | | | | | | | | | | | This patch makes rgbkbd_init set GCC, scale, and color. The default values are provided as rgbkbd_default. BUG=b:233099161 BRANCH=None TEST=Vell Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Idf9c0bb7af014d5b81d1c02dfe34af55dd219477 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3654488 Reviewed-by: Parth Malkan <parthmalkan@google.com>
* chronicler: Drop battery charging voltageYu-An Chen2022-05-191-0/+2
| | | | | | | | | | | | | drop battery charging voltage depending on battery run time BUG=b:232476937 BRANCH=volteer TEST=power team confirmed charging as expected Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Change-Id: I01649c250b66b6446462ae188198a004dfc7bee5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3646985 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* RGBKBD: Add reset, enable, disable, scale console commandsDaisuke Nojiri2022-05-192-1/+7
| | | | | | | | | | | | | | | This patch renames rgbk command to rgb and adds reset, enable, disable and scale command to the command. BUG=b:233099161 BRANCH=None TEST=Vell Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I0f01f99199400489d418234449c9f9b38969647d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3654486 Reviewed-by: Parth Malkan <parthmalkan@google.com> Commit-Queue: Parth Malkan <parthmalkan@google.com>
* ANX7843: Add datasheet default register tuningDiana Z2022-05-191-0/+4
| | | | | | | | | | | | | | | | | Add an API to set all of the default tuning values given by the datasheet. Additional APIs may be defined as needed to change specific register differences that come up in board SI tuning. BRANCH=None BUG=b:230694492 TEST=zmake testall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6a10df0a6bed67792b399ad7f072ff62f8c2f467 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3639923 Reviewed-by: Robert Zieba <robertzieba@google.com> Reviewed-by: Andrew McRae <amcrae@google.com> Commit-Queue: Andrew McRae <amcrae@google.com>
* retimer: Add support for Intel Hayden Bridge retimerVijay Hiremath2022-05-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Hayden Bridge retimer reuses the Intel Burnside Bridge retimer driver as the configuration register of both the retimers is same. Intel Hayden Bridge is a Type-C multi-protocol retimer to be used in on-board applications. Hayden Bridge offers the ability to latch protocol signals into on-chip memory before retransmitting them onwards. It can be used to extend the physical length of the system without increasing high-frequency jitter. Hayden Bridge supports spec compliant retimer of following protocols: - Display Port: four unidirectional DP lanes - USB3.2 Gen1/2: two bi-directional USB lanes - Thunderbolt/USB4: two bi-directional USB4 lanes - Multifunction Display (MFD): two unidirectional lanes of DP and one bi-directional lane of USB3.2 Gen1/2 BUG=b:228222434 BRANCH=none TEST=Able to test USB, DP, TBT, USB4 on MTLRVP Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Change-Id: I42902163afebe0dc2cf8ff9e4c1081ecd04401b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3138214 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* keyboard: Add register_scancode_set2 APIDaisuke Nojiri2022-05-171-0/+10
| | | | | | | | | | | | | | register_scancode_set2 API allows each board to install an entire scancode set. BUG=b:220800586 BRANCH=None TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ideafef9a4fce6197e56eee6e28acceff77803681 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3644693 Reviewed-by: Parth Malkan <parthmalkan@google.com>
* zephyr: panic: Capture the panic informationAndrew McRae2022-05-171-1/+1
| | | | | | | | | | | | | | | | Re-enable capturing the crash information from Zephyr and placing it in the panic structure at the end of RAM. For the host test environment, use a statically allocated panic data structure. BUG=b:231951177 TEST=zmake build nereid; test crash.ECCrash passes BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: Iaf5230da79fbbbc2ffb0ea49555fad096d8dade0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3634901 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: fix last missing zephyr/ include pathsFabio Baltieri2022-05-161-1/+1
| | | | | | | | | | | | | | | | | | | | Fix few more leftover #include that are stopping the code from compiling with LEGACY_INCLUDE_PATH=n. BRANCH=none BUG=none TEST=zmake build brya # with LEGACY_INCLUDE_PATH=n TEST=zmake build nivviks # with LEGACY_INCLUDE_PATH=n TEST=zmake build corsola # with LEGACY_INCLUDE_PATH=n TEST=zmake build kingler # with LEGACY_INCLUDE_PATH=n TEST=zmake build herobrine # with LEGACY_INCLUDE_PATH=n TEST=zmake build lazor # with LEGACY_INCLUDE_PATH=n TEST=zmake build skyrim # with LEGACY_INCLUDE_PATH=n Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I6520d437d351434a43755dad51598747b57238fa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3637579 Reviewed-by: Yuval Peress <peress@google.com>
* zephyr: tcpm: Add flags property to TCPC yamlAl Semjonovs2022-05-161-0/+8
| | | | | | | | | | | | | Updated ps8xxx device to include TCPC config flags BUG=b:231291434 BRANCH=NONE TEST=Attach USBC to DUT and make sure device is detected. Signed-off-by: Al Semjonovs <asemjonovs@google.com> Change-Id: I9d38ad8ed988bb6d2c57976261dde65cdfe0075b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3645317 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* virtual_battery: Support Battery MFG function and manufacture infoMichael5 Chen12022-05-132-0/+11
| | | | | | | | | | | | | | | Add Battery MFG function and manufacture info (0x70) BUG=b:228360450 BRANCH=kukui TEST=make buildall zmake build -a Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I81c73c468de170dac1ef141514cabbc30bf97536 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3595402 Reviewed-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TCPMV2: Send Alert Message on Power State ChangeJameson Thies2022-05-121-6/+16
| | | | | | | | | | | | | | | | | | Some docks will have lights which are meant to reflect the current power state of a Chromebook. This CL is to send an Alert message to partners when power state changes. If the power state is important to the partner, they can then request more information with a Get_Status command. BUG=b:226228461 TEST=Changed power state of device and observed Alert message in EC log. BRANCH=None Signed-off-by: Jameson Thies <jthies@google.com> Change-Id: If46c0e3b40d0a17c9b746c4efa480696a6293e9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3632821 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* treewide: Convert ESPI_DEFAULT_SCI_WIDTH_US to default VWIRE pulse widthTim Wawrzynczak2022-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | In the corresponding bug, Intel has clarified that this SCI# pulse length requirement is actually for all virtual wires, therefore this patch renames CONFIG_ESPI_DEFAULT_SCI_WIDTH_US to CONFIG_ESPI_DEFAULT_VW_WIDTH_US to reflect its broader purpose. All pulses of virtual wire signals were converted to use this new pulse width config option, and all GPIO pulses were converted back to their original value (65 us). BUG=b:227367177 BRANCH=brya TEST=build Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I1225b3e436cd1dca71c93500538a201d008781b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3610694 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* usb_mux: add TUSB546 driverTing Shen2022-05-101-0/+6
| | | | | | | | | | | | | | | | | | | Reuse the code from existing TUSB1064/TUSB1044 driver and add TUSB546 specific logic to it. Currently the only change is that we will enable IN_HPD when mux enters dock mode, instead of using hpd_update. BUG=b:228289594 TEST=make BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I2182eef1a4c5d8cc830f837c544379e854ac331c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3612720 Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* TCPCI: Allow TCPM to use sink/source control without PPCs presenceDevin Lu2022-05-103-6/+0
| | | | | | | | | | | | | | | This patch removes define CONFIG_USBC_PPC to allow TCPM to use sink and source control without PPCs presence. since they exist generally in TCPCI specification independently of PPCs. BUG=b:211791444 BRANCH=none TEST=make buildall Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ia4be8bf872f981c23908944381b156778f63064b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3597314 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Set tVconnReapplied to 10 msAbe Levkoy2022-05-091-1/+1
| | | | | | | | | | | | | | | The specified range of this timeout is 10-20 ms. Reduce the amount of time that the PE explicitly waits to 10 ms to allow for variable time taken by the TC to actually discharge VCONN. BUG=b:209624473,b:209625351 TEST=Observe VCONN off for 10-20 ms during Data Reset on scope BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ie860266ca22001e8b4425318da7fc3b1dff2de0c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3625574 Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: add a zephyr/ prefix to all zephyr includesFabio Baltieri2022-05-096-7/+7
| | | | | | | | | | | | | | | | | | | This adds a zephyr/ prefix to all #include path pointing to Zephyr header files, so that we could drop LEGACY_INCLUD_PATH once all upstream code has been converted. Generated using something similar to the script in: c7b5b3c419 samples: migrate includes to contain <zephyr/...> prefix BRANCH=none BUG=none TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I5ba2c859fe10a34ea8d3a49a612132ea4d02f2cb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3634345 Reviewed-by: Yuval Peress <peress@google.com>
* zephyr: move USB mux configuration into the device treeTomasz Michalec2022-05-061-0/+12
| | | | | | | | | | | | | | | | | | | | | Create a separated usb_muxes.c file in the shim layer to define the usb_muxes array. Additional USB muxes in a chain are created in the same file. Common properties of the usb_mux DTS node are in cros-ec,usb-mux.yaml file. BUG=b:227757117 TEST=zmake testall BRANCH=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I6cb26404b5cb44c6fce29f4176ebb6707af71d21 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3575157 Commit-Queue: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Tomasz Michalec <tmichalec@google.com>
* chargesplash: State machine implementationJack Rosenthal2022-05-052-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is much of the legwork required for go/cros-charging-splash, at least the portion of connecting the charger from chipset off state. What remains is: - Examining battery state and charger supply to make better decisions about when we can show the splash. - Consider assertion of PROCHOT during bootup of a low power charger, or after display initialization before the power button is pressed. The next CL adds a simple text-based UI on top of this. BUG=b:228370390 BRANCH=none TEST=connect charger and boot to splash on brya (using ghost image) (with full CL stack) TEST=provided integration tests pass Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ic114e975109a338ffaa3be977094020251fc36e6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3575089 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aaron Massey <aaronmassey@google.com>
* i2c_controller: Fix buffer overrun in `i2c_read_sized_block`Robert Zieba2022-05-051-2/+0
| | | | | | | | | | | | | | | | | | | | When passed a length of zero, the current behavior of `i2c_read_sized_block` is to read up to 255 bytes from the i2c bus. This commit changes that behavior so that passing a length of zero is an error. `i2c_read_sized_block` is only used by the smart battery driver, either directly or indirectly through `i2c_read_string`. I've checked that there do not appear to be any places that currently rely on this behavior. BUG=b:228589840 TEST=Verified that battery strings are still read correctly, smart battery mfg access still works BRANCH=guybrush Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: Ic025cd3cc805e6bd935b26100171a13e90b478a0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3605885 Reviewed-by: Diana Z <dzigterman@chromium.org>
* smart battery: Fix mfgacc access function reading wrong number of bytesRobert Zieba2022-05-051-1/+14
| | | | | | | | | | | | | | | | | | | | | `sb_read_mfgacc` currently uses `sb_read_string`. This function reads a null-terminated string. However, the data that is being read is not a null-terminated string. This is causing N-1 bytes to be read instead of N bytes. This commit adds an `sb_read_sized_block` function that is used instead. Only PARAM_SAFETY_STATUS and PARAM_OPERATION_STATUS are read with `sb_read_mfgacc` and neither of these values are a string. BUG=b:228589840 TEST=Ran i2ctrace to verify that right number of bytes are now being read, tested with CL:3578293 to ensure no errors BRANCH=guybrush Change-Id: Iaedb4d28274bda8b6d1ee6d2021ebd04f83767f8 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3606146 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* i2c_controller: Add i2c_read_sized_block functionRobert Zieba2022-05-051-0/+12
| | | | | | | | | | | | | | | | | | | | | Currently there is `i2c_read_string` that reads data in the form `[Length] [byte 0] ... [byte Length-1]`. However this function only reads null terminated strings. This commit adds `i2c_read_sized_block` to support reading a general block of data with a length. This commit also re-implements `i2c_read_string` in terms of `i2c_read_sized_block` This changes the behavior of `i2c_read_string` to produce an empty string on failure. BUG=b:228589840 TEST=Verified that battery strings are read properly, used i2ctrace to verify that `i2c_read_sized_block` reads the correct number of bytes BRANCH=none Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: Id4aaf727048329776311eec5d392aafbd1eef2b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3605884 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* common/usbc: add new DPM for sink capability and request mismatchScott Chao2022-05-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | In TBT EV - Host Source Power Provisioning test item. The port partner will return sink capability that it can support 3A, but it will request 1.5A at the end. In this case, EC will provide 3A for it and provide 1.5A for the second port partner. This case will cause test failed due to EC only provide 1.5A for both port. BUG=b:229683022 BRANCH=none TEST=make -j BOARD=primus TEST=make buildall TEST=verified by GRL Change-Id: Icc4904ec1267b7a34e64c01b626f607999072410 Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3592313 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Request partner's revision information in src/snk startupJameson Thies2022-05-041-4/+34
| | | | | | | | | | | | | | | | | | | | | Adding features from the USB PD 3.1 revision of the specification requires us to know the difference between USB PD Rev 3.0 and USB PD Rev 3.1 devices. But, the message header only has 2 bits for revision and only provides the major revision. To determine a devices minor revision, TCPMv2 will need to send a Get_Revision command and store the Revision response which has major/minor revision/version information. This CL adds support for sending Get_Revision, and receiving Revision. BUG=b:214087135 TEST=Checked that the PE state was correctly holding the Revision response from a USB PD Rev 3.1 partner, and also checked that the stored RMDO value was 0 for a USB PD Rev 3.0 partner. BRANCH=none Signed-off-by: Jameson Thies <jthies@google.com> Change-Id: I99f10c15750c3a1fee1d8bad89b0c4a0b0a6b2ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3607054 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* ec_commands: Add a const for the MCHP MEC IO rangeDustin L. Howett2022-05-031-3/+7
| | | | | | | | | | | | | | | | | | | | | | | Some devices that use the CrOS EC only offer the eight I/O ports required by the Microchip MEC series embedded controller chip via ACPI or another mechanism. While this constant is not used in the ec code itself, we should provide documentation of this fact. BUG=none BRANCH=none TEST=Built successfully Signed-off-by: Dustin L. Howett <dustin@howett.net> Change-Id: Ie99fb029334f1f35197be87185d1e842b7bbf4fb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3460548 Reviewed-by: Prashant Malani <pmalani@chromium.org> Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org> Tested-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCMPV2: Add state to send Status extended messagesJameson Thies2022-05-022-0/+27
| | | | | | | | | | | | | | | | | | | | When a USB PD partner sends a Get_Status message, the EC should respond with a Status message. This CL adds the Status message response and creates a new function in usb_pd_dpm which will be used to build the Status Data Block (SDB). BUG=b:227236917 TEST=triggered Status message and saw that it correctly sent data from a modified dpm_get_status_msg function on a twinkie. BRANCH=None Signed-off-by: Jameson Thies <jthies@google.com> Change-Id: Ifafa6e9ee7d9a62ef75e5c9e96606ffba64c98b0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3602226 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Jameson Thies <jthies@google.com> Tested-by: Jameson Thies <jthies@google.com>
* lid_switch: Move LID_DEBOUNCE_US to public headerJack Rosenthal2022-05-021-0/+5
| | | | | | | | | | | | | | | | | | Make this symbol available to emulation tests that depend on the debounce time. This also lets us clean up some duplicate definitions in the board files too. BUG=b:228370390 BRANCH=none TEST=CQ Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I014e81733c2d196b214127bd49485bab7d02a613 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3615484 Reviewed-by: Aaron Massey <aaronmassey@google.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* RGBKBD: Move initialization to keyboard backlightDaisuke Nojiri2022-05-021-16/+0
| | | | | | | | | | | | | | | This patch removes initialization code for RGB keyboard and let keyboard backlight module handle it. This patch also removes RGB keyboard integration from pwm.c since it's not used or needed. BUG=b:226215987, b:228525798, 223465912 BRANCH=None TEST=ectool rgbkbd, pwmsetkblight, pwmgetkblight on Vell & Taniks Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I01fa445f802607106f2f4a0a8e1469ab759c604b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3615851 Reviewed-by: Parth Malkan <parthmalkan@google.com>
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