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* hadoken: Add Bluetooth defines to board.hMyles Watson2016-07-201-0/+9
| | | | | | | | | | | | | | | | | BUG=None BRANCH=None TEST=make BOARD=hadoken CONFIG_BLUETOOTH_LE CONFIG_BLUETOOTH_LE_STACK CONFIG_BLUETOOTH_LE_RADIO_TEST Change-Id: I0a4bbc20e512c2a2ca02f3690e92e9cec92d3a0e Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/361535 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Levi Oliver <levio@google.com>
* mkbp: Extend EC_CMD_MKBP_GET_INFO.Aseda Aboagye2016-07-191-3/+54
| | | | | | | | | | | | | | | | | | | | - Added ability to query the buttons and switches. - Added ability to report the available buttons or switches. BUG=chromium:626863 BRANCH=None TEST=make -j buildall CQ-DEPEND=CL:358633 CQ-DEPEND=CL:358634 CQ-DEPEND=CL:358989 Change-Id: Ie821491269e8d09578eba92127895c0b6b8e91a9 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/358926 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mkbp: Add support for buttons and switches.Aseda Aboagye2016-07-193-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the matrix keyboard protocol does not have support for handling non-matrixed keys. This commit adds support for buttons which do not appear in the keyboard matrix as well as switches. Additionally, the keyboard FIFO is now just a general MKBP events FIFO which MKBP events are free to use. Now, buttons and switches wil join the key matrix event. BUG=chrome-os-partner:54988 BUG=chrome-os-partner:54976 BUG=chromium:626863 BRANCH=None TEST=Flash kevin, and verify that keyboard is still functional. TEST=make -j buildall CQ-DEPEND=CL:358926 Change-Id: If4ada904cbd5d77823a0710d4671484b198c9d91 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/358633 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common/i2c: Remove I2C read/write commandsNicolas Boichat2016-07-191-2/+4
| | | | | | | | | | | | | | | ectool stopped relying on these commands a while back, remove them to save space. BRANCH=none BUG=chrome-os-partner:23570 TEST=ectool i2cread still works Change-Id: I63c7a60cdc5ad5c654c49f165175e1b2fe8c4262 Reviewed-on: https://chromium-review.googlesource.com/361160 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* g: fix rdd to enable sleepMary Ruthven2016-07-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | When the debug cable is disconnected the a USB suspend interrupt is triggered and puts the chip to sleep before rdd can detect a change on the cc lines and disconnect from CCD. This prevents the DEBUG_STATE_MAP from being reset to detect the debug connect and is left detecting the disconnect. Since the debug accessory is already disconnected the RDD interrupt will wake up the chip right after it goes to sleep. The UTMI and PIN wake source still cause the chip to wake up before the RDD interrupt, so disable those to test this change. BUG=chrome-os-partner:54796 BRANCH=none TEST=Disable wake pin and utmi wake sources. Put cr50 to sleep. Attach a reworked suzy q and make sure cr50 wakes up. Detach it and check that it goes back to sleep. Do that a couple of times. Check CCD is still enabled when the debug accessory is detected and disabled on disconnect. Change-Id: I58a012895bc874dcdd512aa84de9a917469f3139 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/360234 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charger: BD99955: Get the VBUS level from the chargerVijay Hiremath2016-07-131-0/+3
| | | | | | | | | | | | | | | | | Added code to get the VBUS level by reading the charger registers. BUG=chrome-os-partner:55117 BRANCH=none TEST=Manually tested on Amenia, VBUS_VAL (5Ch) & VCC_VAL (5Eh) registers are updated with the correct VBUS value on the respective ports. Change-Id: I3b019b2d87e4c347f12596df387a2a659092ae25 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/359416 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cr50: disable device monitoring when not in ccdMary Ruthven2016-07-121-4/+20
| | | | | | | | | | | | | | | When cr50 is not trying to do ccd, we dont need to monitor the devices. Disable device state detection interrupts and the AP and EC UARTs. BUG=none BRANCH=none TEST=gru and kevin monitor devices correctly when ccd is enabled, and dont monitor anything when it is disabled. Change-Id: Ic3f5974320486ff6dd0147c490a1c294cc2f6a76 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356770 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Add cts.tasklistDaisuke Nojiri2016-07-112-4/+19
| | | | | | | | | | | | | | | | | | | | | | cts.tasklist contains tasks run only for CTS. These tasks are added to the tasks registered in ec.tasklist with higher priority. This design allows board directories to be free from CTS stuff. cts.tasklist can be placed in each suite directory (cts/suite/cts.tasklist). If a suite does not define its own cts.tasklist, the common list is used (i.e. cts/cts.tasklist). BUG=chromium:624520 BRANCH=none TEST=Ran the followings: make buildall make CTS_MODULE=gpio BOARD=nucleo-f072rb make CTS_MODULE=gpio BOARD=stm32l476g-eval Change-Id: Ibb242297ee10a397a8fcb6ff73d8cbc560daa885 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/359445 Reviewed-by: Chris Chen <twothreecc@google.com>
* common: add EC_RTC_ALARM_CLEAR to ec_commands.hStephen Barber2016-07-091-0/+3
| | | | | | | | | | | | | | | | | | | EC_RTC_ALARM_CLEAR should live in ec_commands.h so other EC clients such as the kernel can make use of it. Signed-off-by: Stephen Barber <smbarber@chromium.org> BRANCH=none BUG=chrome-os-partner:52219 TEST=kernel can clear existing alarm Change-Id: I88aefed7e6c37a5aa2e4306c078e90d671c410d0 Reviewed-on: https://chromium-review.googlesource.com/359352 Commit-Ready: Stephen Barber <smbarber@chromium.org> Tested-by: Stephen Barber <smbarber@chromium.org> Reviewed-by: Stephen Barber <smbarber@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* cts: First patch flashes blank testsChris Chen2016-07-091-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The first time you use this with a particular th, connect only th and run ./cts.py --th Then connect both boards and you can run ./cts.py to build/flash both boards. BRANCH=None BUG=None TEST=manual - Enter chroot - Navigate to ec/cts - Connect only th - 'sudo ./cts.py --th' - './cts.py -b' - Exit chroot - Connect both boards - './cts.py -f' Each board should flash successfully Change-Id: Ib14fccabcd9fdad04f9b92817da597bc0dcb3d89 Reviewed-on: https://chromium-review.googlesource.com/358100 Commit-Ready: Chris Chen <twothreecc@google.com> Tested-by: Chris Chen <twothreecc@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: add EC_FEATURE_RTC to features host commandStephen Barber2016-07-091-0/+2
| | | | | | | | | | | | | | | | | | If the EC has CONFIG_HOSTCMD_RTC set to 'y', then export this via the features host command. The kernel can then use this feature to expose an RTC device under /dev/rtc*. Signed-off-by: Stephen Barber <smbarber@chromium.org> BRANCH=none BUG=chrome-os-partner:54639 TEST=`ectool inventory` shows RTC on kevin Change-Id: I644c8e61c4d9f691cc6ca94ef60bee4384c21660 Reviewed-on: https://chromium-review.googlesource.com/359414 Commit-Ready: Stephen Barber <smbarber@chromium.org> Tested-by: Stephen Barber <smbarber@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* Add CONFIG_HOSTCMD_DEBUG_MODE to set default hcdebug modeNicolas Boichat2016-07-091-0/+3
| | | | | | | | | | | | | | | | | | elm EC console output is very spammy, as EC_CMD_MOTION_SENSE_CMD is called every 100ms, so we want to set "hcdebug" to "off" as the default (which still includes errors, but no "normal" commands). BRANCH=none BUG=chrome-os-partner:55001 TEST=make buildall -j TEST=Flash elm EC, see that output is fairly quiet. Change-Id: I70d91c291d934b4f032e5c57f3c333e2c10b93bc Reviewed-on: https://chromium-review.googlesource.com/359112 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* motion: Add ability to stop ring interrupts.Gwendal Grignou2016-06-301-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, it is assumed the host will sooner or later retrieve the events from the sensor ring: It is only used by Android and the sensor HAL is enabling the ring buffer at boot. But if nobody processes the ring, and the ring is almost full, the EC will generate interrupt for every new events. This can happen with ARC, where events generated for ChromeOS will be in the ring but nobody will process them until Android is started. Add a command to allow sending ring MKBP events. It will be used when the IIO ring buffer is enabled / disabled. It also can be used for preventing raising interrupt when the device is about to go to sleep. BRANCH=ryu,cyan BUG=b:25425420,b:27849483 TEST=Check with fiforead that no events are queued when IIO ring buffer is disabled. Check with ectool and androsensor that interrupt generation stops. Change-Id: Ibc85eed2e0eae3a9ec07d191e692118bc2fd0dab Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356689
* keyboard_scan: Support boot key recognition with stuck KSI2Shawn Nematbakhsh2016-06-302-0/+8
| | | | | | | | | | | | | | | | | For certain board configurations, KSI2 will be stuck asserted for all scan columns if the power button is held. We must be aware of this case in order to correctly handle recovery mode key combinations. BUG=chrome-os-partner:54602 BRANCH=None TEST=Manual on gru. Do three-key salute, verify EC detects recovery mode. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I03d76e1121107484f79520745858388f6cae096c Reviewed-on: https://chromium-review.googlesource.com/357590 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Cleanup: gate RTC console/host command behind new config optionsphilipchen2016-06-291-0/+4
| | | | | | | | | | | | | | | | Put RTC code supporting console/host command behind new flags 'CONFIG_CMD_RTC'/'CONFIG_HOSTCMD_RTC' BUG=chromium:613699 TEST=make buildall BRANCH=master Change-Id: Ida52265d124978f48bd6ca522be3badee9f99588 Reviewed-on: https://chromium-review.googlesource.com/356206 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ec_commands: Add suspend control needed for SkylakeGwendal Grignou2016-06-281-0/+17
| | | | | | | | | | | | | Changes were submitted for ec_commands.h but only in the braswell tree. Merge in ToT for future reference. BRANCH=none BUG=chrome-os-partner:50627 TEST=compile. Change-Id: I74f6ce3c5fd2a628879593a65506d10c44ee574d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356551
* common: Decouple temp sensor from thermal throttlingMary Ruthven2016-06-281-0/+12
| | | | | | | | | | | | | | | Not everything with a temperature sensor uses thermal throttling. This change modifies the conditional build to enable building temp sensor source without thermal throttling. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I8c0753f12899e9f203c04477ae520bcda40d5fd8 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356484 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* BD99955: Added support for 'psys' & 'amonbmon' console commandsVijay Hiremath2016-06-271-4/+2
| | | | | | | | | | | | | | | | | | | | Added console commands for the debugging purpose psys - Can be used to measure the system power amonbmon - Can be used to measure AMON/BMON voltage diff, current BUG=chrome-os-partner:54273 BRANCH=none TEST=Manually tested on Amenia psys - Ran fish task and observed psys value changes. amonbmon - AMON & BMON voltage & current are same as measured across sense resistors. Change-Id: I6653e814d9b00efe7dae9ce1fbd7ddbc2356f8e0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/353043 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* usb_mux: Add support for host-controlled 'virtual' USB muxShawn Nematbakhsh2016-06-243-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | For designs where the host SOC is responsible for setting the USB-C SS mux, the EC must track the desired mux state and inform the host when the desired state changes. Then, the host must ask the EC for the new desired state and set the mux accordingly. BUG=chrome-os-partner:52639 BRANCH=None TEST=Manual on gru with subsequent commit. Attach USB dongle in port 1 and DP dongle in port 0, then verify `ectool usbpdmuxinfo` output: Port 0: DP Port 1: USB Flip DP dongle and verify output changes: Port 0: DP INV Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6a99ce93a76c3197f9195cfaa25c5217d09aeb75 Reviewed-on: https://chromium-review.googlesource.com/355281 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ec_commands: Be sure all C code is within #ifnef ACPIGwendal Grignou2016-06-231-2/+2
| | | | | | | | | | | | | | When __ACPI__ is set, only #define are allowed. BRANCH=none BUG=chrome-os-partner:52433 TEST=Coreboot compiles with this code. Change-Id: Iadb3893960f16ff49aa4f4e5871d5d17cbb87642 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/355570 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* mkpb: Add MKBP support over ACPIGwendal Grignou2016-06-222-2/+10
| | | | | | | | | | | | | | | | | | | | Add a host event to support MKPB: When sent, the ACPI code will send a notification to the kernel cros-ec-lpcs driver that will issue EC_CMD_GET_NEXT_EVENT. We can allow code (sensor stack for instance) that uses MKBP to work on ACPI based architecture. Obviously, host event over MKPB is not supported. BRANCH=none BUG=b:27849483 TEST=Check we get sensor events on Cyan through the sensor ring. (cyan branch) Change-Id: Iadc9c852b410cf69ef15bcbbb1b086c36687c687 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353634 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec_commands: use hex to make EC_PWM_MAX_DUTY clearerBrian Norris2016-06-171-2/+2
| | | | | | | | | | | | | | | Some comments in upstream Linux review have suggested this be hex. Makes sense to me. BUG=chromium:621123 TEST=build BRANCH=none Change-Id: Ib7143acc96a2fe593d5e02ad0fba3a501bd8cea2 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353681 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* bd99955: Improve interrupt / USB charger task wake schemeShawn Nematbakhsh2016-06-161-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Previously our charger ISR called a deferred task which woke our charger task. We can skip the deferred task and just wake our charger task directly. The other meaningful change here is to assume that we're using the charger for VBUS detection / BC1.2 if we have a usb_chg task, which holds true for all of our current boards with this charger. BUG=None TEST=Manual on kevin with subsequent commit. Verify charger connect / disconnect detection works properly on both ports, with zinger, donette and generic DCP charger. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Iad4f3ea90947b50859c549b591675e325717209f Reviewed-on: https://chromium-review.googlesource.com/352822 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* elm: anx7688: add anx7688 hpd driverRong Chang2016-06-161-0/+1
| | | | | | | | | | | | | | | | | | | | ANX7688 is a TCPCI compatible port controller with HDMI to DP converter. The HDMI converter needs a reset every time after enabling its function. BRANCH=none BUG=chrome-os-partner:52815 TEST=manual boot elm proto plug and unplug dingdong and check DP output plug/unplug adapter and check pd 0 state Change-Id: I774421d7b0b8d2cfd31e860fcd4eaed08ee48ac7 Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tang Zhentian1 <ztang@analogixsemi.com> Reviewed-on: https://chromium-review.googlesource.com/340371 Commit-Ready: Koro Chen <koro.chen@mediatek.com> Tested-by: Koro Chen <koro.chen@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* amenia: Support DP alt mode of Type-C controller in amenia.li feng2016-06-141-0/+6
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=On Amenia TR1.2, tested with HDMI to Type-C dongle. Both Analogix and Parade ports have HDMI on extended display. Change-Id: Ifb95c289019063a8a24d135e3b3a09cb4d446210 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/348881 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* driver/tcpm: add Type-C controller ps8751 DP alt mode APIli feng2016-06-141-0/+1
| | | | | | | | | | | | | | | BUG=chrome-os-partner:49431 BRANCH=none TEST=On Amenia TR1.2, verified display port outptu is enabled on exteneded display. Seperate patches are needed for testing. Change-Id: I5ca54c91c566725c612a01a51f1af32e2a819e2d Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351319 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* BD99955: Use only one USB charger task for both the portsVijay Hiremath2016-06-141-0/+7
| | | | | | | | | | | | | | | | | | | | | There is only one charger IC and one interrupt PIN for both the ports and also from the ISR it's not possible to decode from which port the interrupt is triggered hence a deferred function is used to trigger the wake event for the ports. As there is no additional benefit of having an extra task, added code to use only one USB charger task for both the ports. BUG=chrome-os-partner:54272 BRANCH=none TEST=Manually tested on Amenia. BC1.2 detection is success and the battery can charge on both the ports (VBUS/VCC). Change-Id: I2745a5a179662aaeef8d48c8c1763919e8853fd0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351752 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* CR50: add support for hardware modexpnagendra modadugu2016-06-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit includes changes required for supporting a hardware based montgomery modexp (r = a ^ e mod N). The function bn_is_bit_set() was previously static, and now added to internal.h, as this function is used by the hardware implementation. Add function declarations for new functions related to the hardware implementation to chip/g/dcrypto/internal.h BRANCH=none CQ-DEPEND=CL:*260618,CL:*260895 BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=all tests in test/tpm_test/tpmtest.py pass Change-Id: I5fe4a6692678b64f27659f42a08d200b6fe6f0cc Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/347462 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Driver: BD99955: Use Charger interrupt to detect VBUS activityVijay Hiremath2016-06-081-0/+13
| | | | | | | | | | | | | | | | | | | Added support to enable the BD99955 charger interrupt to detect the VBUS activity. With this approach GPIO USB_Cx_VBUS_DET_N pin can be removed. BUG=chrome-os-partner:53688 BRANCH=none TEST=Manually tested on Amenia. Type-C, DCP & SDP chargers can negotiate to desired current & voltage. Battery can charge. USB3.0 & USB2.0 sync devices are detected by the Kernel. Change-Id: I5470092c5cd43026aafc1a638ba446d0037c71e7 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/343650 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* ec_commands: Add new EC_CMD_PD_CONTROL commandNicolas Boichat2016-06-072-0/+16
| | | | | | | | | | | | | | | | | | | | | | | This commands makes it possible to control the PD chip (or the interaction between EC and PD), from the AP. - PD_SUSPEND: Suspends the PD chip: EC needs to stop talking to PD chip. Useful at beginning of PD FW update. - PD_RESUME: Resumes the PD chip: EC can start talking to PD chip again. Useful at end of PD FW update. - PD_RESET: Resets the PD chip (called at the end of the update). - PD_CONTROL_DISABLE: Prevents further calls to this command (for security reason, we do not want the AP to be able to call the other subcommands after the update has been performed). BRANCH=none BUG=chrome-os-partner:52433 TEST=ectool pdcontrol {suspend,resume,reset,disable} Change-Id: I7a955dd27b65086c21d195a6504aa7392eb0406d Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/342584 Reviewed-by: Randall Spangler <rspangler@google.com>
* reef: enable WiFi power control supportKevin K Wong2016-06-031-0/+3
| | | | | | | | | | | | | | | | add a new config flag to support active low power control signal BUG=chrome-os-partner:53665 BRANCH=none TEST=Use multimeter to check for voltage present on the WiFi slot. Use gpioget to check GPIO state in S0 (on) and S5 (off). Change-Id: Ibeca88d16f39eadd7f29589cd3cd15aeef0dd524 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/347085 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* usb_charger: Support inverted 5V_EN GPIO polarityShawn Nematbakhsh2016-06-021-0/+6
| | | | | | | | | | | | | | | | | Kevin uses inverted polarity (low = enable 5V output), so add a new CONFIG to support this. BUG=chrome-os-partner:53777 BRANCH=None TEST=Manual on Kevin. Enable USB charger tasks, verify that VBUS is properly detected on no-battery case. Change-Id: Ifb3e5fa9db1973d9826435712711f0cb0fd1d3a5 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/349260 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: pd: Define VBUS detection sourceShawn Nematbakhsh2016-06-021-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent: - When operating as a TCPC, it indicated that the VBUS level should be tracked (through GPIO inputs) and sent to the external TCPM when appropriate. - When operating as a TCPM, it indicated that the VBUS level should be obtained by querying the TCPC. These two independent uses have been split into CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which sould be more clear. In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for other means of VBUS detection. BUG=chromium:616580 BRANCH=None TEST=Verify kevin continues to boot + charge. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923 Reviewed-on: https://chromium-review.googlesource.com/348950 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* COMMON: move precharge time to config.hRyan Zhang2016-06-012-1/+4
| | | | | | | | | | | | | | move PRECHARGE_TIMEOUT to config.h so that we can customize precharge time to meet client's spec. BUG=none BRANCH=master TEST=`make -j buildall`, precharge time is set to 300s in elm. Change-Id: I5c3bf0d5c5240b9c087e6cdb7c6e97301efa9f84 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/348151 Reviewed-by: Shawn N <shawnn@chromium.org>
* CR50: port dcrypto/cr50 code to depend on third_party/cryptocnagendra modadugu2016-05-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Port SHA and P256 code to depend on third_party/cryptoc. Remove config options CONFIG_SHA1, and CONFIG_SHA256 as these are provided by third_party/cryptoc. Also remove unused config options CONFIG_SHA384, CONFIG_SHA512. Crypto functions prefixed by dcrypto_ (declared in internal.h ), DCRYPTO_ (declared in dcrypto.h) are implemented under chip/g/dcrypto, and otherwise are implemented under third_party/cryptoc. BRANCH=none BUG=chrome-os-partner:43025,chrome-os-partner:47524,chrome-os-partner:53782 TEST=all tests in test/tpm_test/tpmtest.py pass Change-Id: If7da02849aba9703573559370af5fae721d594fc Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/340853 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* driver: Add support bma255 sensorWonjoon Lee2016-05-312-0/+2
| | | | | | | | | | | | | | | | BMA255 is one of BMA2x2 accel sensor series. Adding defines,driver from https://github.com/BoschSensortec/BMA2x2_driver BUG=chrome-os-partner:52877 BRANCH=none TEST="accelread 2" is working on kevin, also check accelrate, accelrange can set proper value on IC Change-Id: I99932ff75aae91a744fe18dddc010b802085a2da Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/347722 Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Initialize charge suppliers after change manager is initializedVijay Hiremath2016-05-281-0/+2
| | | | | | | | | | | | | | | | | | Initialize the charge suppliers after change manager is initialized, otherwise charge supplier current & voltage values will be overwritten to -1 by the charge manager ini function. BUG=chrome-os-partner:53788 BRANCH=None TEST=Observed there are no "CL: p(port) s(supplier) i-1 v-1" prints on the EC console. Change-Id: Id0212c502d5833c016ac79ee15d21304d6d7ceb2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/347896 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* pwm: Modify new PWM host commands to take 16-bit duty cycleShawn Nematbakhsh2016-05-271-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EC_CMD_PWM_SET_DUTY / EC_CMD_PWM_GET_DUTY were recently added and are not yet in use. Future-proof these commands by taking a 16-bit duty cycle parameter and converting it between the [0-100] percent used by internal EC functions. BUG=chromium:615109 BRANCH=None TEST=Manual on chell. `ectool pwmsetduty kb 65535` - Verify KB backlight goes to 100% `ectool pwmgetduty kb` - Prints 65535 `ectool pwmgetduty 0` - Prints 65535 `ectool pwmsetduty 0 0` - Verify KB backlight goes to 0% `ectool pwmgetduty kb` - Prints 0 `ectool pwmgetduty disp` - Error res 3 (unsupported PWM type) `ectool pwmsetduty 1` - Error res 3 (non-existent PWM index) `ectool pwmsetduty kb 6550` + `ectool pwmgetduty kb` - Prints 6553 (round up) `ectool pwmsetduty kb 6560` + `ectool pwmgetduty kb` - Prints 6553 (round down) Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic6996fc6e1e69359274b2f9a1120ee7002db991c Reviewed-on: https://chromium-review.googlesource.com/347608 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org>
* cr50: monitor the state of Servo, the EC, and APMary Ruthven2016-05-272-0/+39
| | | | | | | | | | | | | | | | | There are a couple of issues that cr50 has when it cannot know the state of servo, the EC, and the AP. This change adds support so we can detect when the AP or EC has been powered on and when servo has been connected. It uses the UART RX signals to monitor the power state of the AP and EC. The TX signals are used to monitor the state of servo. BUG=chrome-os-partner:52056,chrome-os-partner:52322 BRANCH=none TEST=verify device states are correct when the AP and EC are powered on or off and when Servo is attached or detached Change-Id: Id0a2281b65cb367ecc8d0ca2f9a576672318a5fb Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/344019
* Cr50: NvMem: Connected function stubs in /board/tpm2/NVMem.cScott2016-05-261-3/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | Used #define CONFIG_FLASH_NVMEM to have functions in /board/tpm2/NVMem.c utlitize on chip Nvmem functions. On chip NV Memory availability is tied to an internal nvmem error state which itself only depends on finding at least one valid partition. Added nvmem_is_different and nvmem_move functions which were needed to complete the tpm2 platform interface. In addition, added unit tests to support these two new functions. BUG=chrome-os-partner:44745 BRANCH=none TEST=manual make runtests TEST_LIST_HOST=nvmem and verify that all tests pass. Tested with tcg_test utility to test reads/writes using the command "build/test-tpm2/install/bin/compliance --ntpm localhost:9883 --select CPCTPM_TC2_3_33_07_01". Change-Id: I475fdd1331e28ede00f9b674c7bee1536fa9ea48 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/346236 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* NvMem: Added NV Memory module to ec/common/Scott2016-05-262-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | Full implementation of NvMem read, write, and commit functions. Includes partition definitions, shared memory allocation, and initialization function. Includes a set of unit tests located in ec/test/nvmem.c which verify functionality. This module is required by Cr50, however this CL does not include any Cr50 specific code. BUG=chrome-os-partner:44745 BRANCH=none TEST=manual make runtests TEST_LIST_HOST=nvmem and verify that all tests pass Change-Id: I515b094f2179dbcb75dd11ab5b14434caad37edd Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/345632 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* servo_micro: add programmable serial numberNick Sanders2016-05-263-0/+37
| | | | | | | | | | | | | | | | This change provides a console command for setting, and loading a usb serial number from flash. This feature adds CONFIG_USB_SERIALNO, and currently only has a useful implementation when PSTATE is present. BUG=chromium:571477 TEST=serialno set abcdef; serialno load; reboot BRANCH=none Change-Id: I3b24cfa2d52d54118bc3fd54b276e3d95412d245 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/337359 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* servo_v4: Fix ADC console commandNick Sanders2016-05-261-12/+0
| | | | | | | | | | | | | | | | | | | | | | The console adc command prints adc values in the order they appear in hardware, however they are lableled in the order they are enumerated in board.h, which is not necessarily the same. This prints the correct name and value pairs, and removes the adc_read_all_channels function which is not otherwise used. BUG=chromium:571476 BRANCH=None TEST="adc" command associates correct values with names now. Change-Id: I688641953d20082224b4120eaefe0d634ad4c74c Signed-off-by: Nick Sanders <nsanders@google.com> Reviewed-on: https://chromium-review.googlesource.com/340892 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* mkbp_event: Don't discard event source structures due to LTOShawn Nematbakhsh2016-05-251-3/+3
| | | | | | | | | | | | | | | BUG=chrome-os-partner:53729 BRANCH=None TEST=Manual on gru. Verify .rodata.evtsrcs section is non-empty in ec.RO.map. Verify that we're no longer spammed with HC 0x67 (due to constantly asserted interrupt). Change-Id: I57ad1ba7fbdd99dfab84341560aff094ce9bc5b6 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/347415 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* CR50: remove dependence of assert.h on util.hnagendra modadugu2016-05-251-29/+1
| | | | | | | | | | | | | | | | | | | | | Third party code includes standard system headers, but may not have include paths configured for the platform. Remove the dependency between assert.h and platform headers util.h, and panic.h. BRANCH=none BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=make buildall succeeds Change-Id: Ic8d4dc1944765d2f0f80782afa574d7b8e54eb0f Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/347080 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* common/i2c: Add I2C passthru_protect commandNicolas Boichat2016-05-243-0/+24
| | | | | | | | | | | | | | | | | | This allows the AP to protect a I2C passthru bus. A board-specific function then defines what I2C commands are allowed, so that we can white/black list some addresses (e.g. I2C address allowing PD chip FW updating). BRANCH=none BUG=chrome-os-partner:52431 TEST=Book elm-rev1 Change-Id: Ib106924418b16388ea8ea53c7b6bda6ef92e1d09 Signed-off-by: Nicolas Boichat <drinkcat@google.com> Reviewed-on: https://chromium-review.googlesource.com/345761 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@google.com>
* Driver: BD99955: Enable BC1.2 supportVijay Hiremath2016-05-242-1/+2
| | | | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=Manually tested on Amenia. Connected Zinger, Type-C, DCP & CDP chargers. Device can negotiate to desired current & voltage and the battery can charge. USB2.0 sync device is detected by Kernel. Change-Id: I58cb69289eef9a966e06bef8fe31d35beaec5e27 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/341030 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* kevin: rk3399: enabling RTC wakeupShelley Chen2016-05-231-0/+3
| | | | | | | | | | | | | | | | | | Enabled CONFIG_CMD_RTC_ALARM. EC_HOST_EVENT_RTC is enabled when the rtc_alarm goes off, alerting the AP to transition from S3->S0. BUG=chrome-os-partner:52218 BRANCH=None TEST=rtc_alarm <num> and see event set in ec console after <num> seconds. Also, check if new bit set through hostevent command in ec before/after rtc_alarm goes off. Change-Id: I53b1705ce0925000f35b9f80752035d198db3310 Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/345474 Reviewed-by: Shawn N <shawnn@chromium.org>
* spi_flash: Add protect_range table for W25Q40stabilize-8350.21.BDavid Hendricks2016-05-191-0/+3
| | | | | | | | | | | BUG=chrome-os-partner:53035 BRANCH=none TEST=needs testing Change-Id: I4b2bc758a22c2c19ddf0438a2af26f8c76093081 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/339291 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* chip: it83xx: Optimize interrupt usage of LPC accessDino Li2016-05-181-3/+0
| | | | | | | | | | | | | | | | | | LPC access interrupt only enabled when EC entering deep doze mode. This will reduce interrupt of LPC access. Also, this interrupt is always enabled for LPC platform to support "CONFIG_LOW_POWER_S0". Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=Tested ectool command 'version' x 10000. Change-Id: I9053c4018b38a8a852c3c6254e1fcde625f3fa3a Reviewed-on: https://chromium-review.googlesource.com/336112 Commit-Ready: Dino Li <dino0303@gmail.com> Tested-by: Dino Li <dino0303@gmail.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
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