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* ec_commands: Add limits.h for linux kernel compatibilityGwendal Grignou2020-03-121-3/+3
| | | | | | | | | | | | | For Uxx_MAX macros, we need to include limits.h. BUG=chromium:945948 BRANCH=none TEST=compile. Check kernel 4.19 with this change compiles as well. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: Id498a1c647acab3007d5e368ed4b15382ef1c392 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2098871 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: motion_sense: implement AP command to read dirty calibrationYuval Peress2020-03-111-1/+17
| | | | | | | | | | | | BRANCH=None BUG=b:138303429,chromium:1023858 TEST=buildall Change-Id: I857dbc0975a239a6d8419015d8b9e34415b477cf Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2044702 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* it83xx/adc: add voltage comparator featureRuibin Chang2020-03-111-0/+3
| | | | | | | | | | | | | | | | | | | | Add voltage comparator feature. BUG=b:149094481 BRANCH=none TEST=on board it83xx_evb, 1.set VCMP1 threshold 2.8v: external input 3v, the INT would be triggered and ADC5 read the correctly voltage. 2.set VCMP0 threshold 0.2v: external input 0v, the INT would be triggered and ADC5 read the correctly voltage. Change-Id: I59510b1c6bd38004ff06e0fcbd2a671e895d59e3 Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2062110 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* keyboard: Add a new config for the keyboard customizationZhuohao Lee2020-03-104-2/+31
| | | | | | | | | | | | | | | In order to support a non-chromeos keyboard matrix, we can add a new config CONFIG_KEYBOARD_CUSTOMIZATION to customize the keyboard matrix in the board setting. BUG=b:148034320 BRANCH=firmware-hatch-12672.B TEST=build pass Change-Id: I6a32a1f79aeb09805c5f47f8540ea25f67a34f7f Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2035444 Reviewed-by: Jett Rink <jettrink@chromium.org>
* i2c: Cleanup I2C tracing outputKeith Short2020-03-101-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The output of the I2C tracing is hard to parse, especially for reads to I2C registers. This change creates only a single I2C trace for each I2C transfer (instead of 2 entries), and labels the write and read parts of the I2C transaction clearly. Example output (TCPC device during disconnect): i2c: 1:0x20 wr 0x10 rd 0x01 0x00 i2c: 1:0x20 wr 0x10 0x01 0x00 i2c: 1:0x20 wr 0x1A rd 0x1A i2c: 1:0x20 wr 0x1D rd 0x10 i2c: 1:0x20 wr 0x1C rd 0x70 i2c: 1:0x20 wr 0x2F 0x21 i2c: 1:0x20 wr 0x1C 0x70 i2c: 1:0x20 wr 0x2F 0x00 i2c: 1:0x20 wr 0x1C rd 0x70 i2c: 1:0x20 wr 0x1C 0x60 BUG=none BRANCH=none TEST=make buildall TEST=Enable CONFIG_I2C_DEBUG and verify output. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I077196e70ae3abb6c462cf08a3f944b43fdcf82a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2091573 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: online_calibration: Fire MKBP event on new calibrationYuval Peress2020-03-095-0/+64
| | | | | | | | | | | | | | Implement online calibration for accelerometers and fire a new MKBP event when a new calibration value is computed. TEST=Added new unit tests BRANCH=None BUG=b:138303429,chromium:1023858 Change-Id: I31ec7164be0d8c7dac210a1ac4b94ec9ecd6a60a Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2012847 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* remove cr50 related filesNamyoon Woo2020-03-0919-2457/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BUG=b:149350081 BRANCH=none TEST=build all, and emerged ec related packages for host and octopus. $ make buildall -j $ cros_workon --host list chromeos-base/chromeos-cr50-dev chromeos-base/chromeos-ec chromeos-base/chromeos-ec-headers chromeos-base/ec-devutils chromeos-base/ec-utils chromeos-base/ec-utils-test dev-util/hdctools $ sudo emerge chromeos-cr50-dev -j $ sudo emerge chromeos-ec -j $ sudo emerge chromeos-ec-headers -j $ sudo emerge ec-devutils -j $ sudo emerge ec-utils -j $ sudo emerge ec-utils-test -j $ sudo emerge hdctools -j $ cros_workon-octopus list chromeos-base/chromeos-ec chromeos-base/chromeos-ec-headers chromeos-base/ec-devutils chromeos-base/ec-utils chromeos-base/ec-utils-test dev-util/hdctools $ sudo emerge-octopus chromeos-ec -j $ sudo emerge-octopus chromeos-ec-headers -j $ sudo emerge-octopus ec-devutils -j $ sudo emerge-octopus ec-utils -j $ sudo emerge-octopus ec-utils-test -j $ sudo emerge-octopus hdctools -j Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: If751b26b0635b0021c077338e96eaa8e8dcf17a5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080631 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* ec_commands.h: add info_4 in sensor request structureGwendal Grignou2020-03-071-1/+1
| | | | | | | | | | | | | Fixes: 267da3cfc ("common: Add feature flag for online calibration") BUG=chromium:1023858 TEST=compile BRANCH=none Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I7e7784e509062f28c8dc12d52fe8daed2ab73b23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2084398 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TCPMv2: Probe cable identity in PE_SRC_DiscoveryDiana Z2020-03-061-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds probing of the cable identity during startup as a source. There is no timing requirement for message spacing when sent from discovery, but this change starts with DiscoverIdentityTimer spacing to avoid spamming the cable too quickly. This can be tuned later if desired. When the port partner is running PD 2.0, the communications with the cable must also use PD 2.0. Otherwise, communications may be whatever revision the cable responds with. This change also corrects the tVDMBusy timer, which is 50 ms in both the PD 2.0 and PD 3.0 specs, and only clears discovery information when not power swapping. BUG=b:148834626 BRANCH=None TEST=on kindred, confirmed: 1. cable was probed during startup on connection as source a. cable probing stopped after an ACK b. cable probing did not continue past 20 messages with no GoodCRC 2. cable was note probed during startup as sink (charger connected) Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I65979f30d26ad8a37f507994a24ddc86c5cb41ff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2084012 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec_commands.h: Minor changes to integrate with cros_ec_commands.hGwendal Grignou2020-03-051-3/+14
| | | | | | | | | | | | | | | - Update license - Extend #ifdef to remove code not needed by the kernel. BUG=chromium:945948 BRANCH=none TEST=compile. Check changes with linux-next/master cros_ec_commands.h. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: If0d5a49498a17a24ad7fae6e6bab9b7378374067 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2084024 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* pcal6408: add ioexpander driverPaul Ma2020-03-051-0/+3
| | | | | | | | | | | | | | | | Add NXP PCAL6408 io expander support. BUG=b:150385481 BRANCH=none TEST=Change dalboz board specific files and verify hdmi hpd status can be detected correctly. Other gpios can be initialized and can input or output correct value by console commands ioexget and ioexset. Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Change-Id: I94c63149bac4ecbac4078abfe375d3009c944079 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2082299 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Button: Clean up button librarydnojiri2020-03-052-2/+4
| | | | | | | | | | | | | | | | | | | | Define BUTTON_DEBOUNCE_US and use it for recovery, volume, and power. Use struct button_config for characterizing power button. Introduce CONFIG_POWER_BUTTON_FLAGS for power button customization. Signed-off-by: dnojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=Verified power button works on Helios. TEST=Verified powerbtn command works on Helios. Change-Id: I4fd0db1da6190127f223d9c27b02ae370fa91c03 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2088279 Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* common/keyboard_8042: When pressed, print F11-F15 for debugRajat Jain2020-03-041-2/+2
| | | | | | | | | | | | | | | | | | Vivaldi adds support for a new keyboard layout, and more function keys. The scan matrix is here: https://drive.google.com/corp/drive/u/1/folders/17UtVQ-AixnlQuicRPTp8t46HE-sT522E Allow to print F11-F15 labels when debugging those extra keys. BUG=b:146501925 TEST=Check extra keys by putting debug prints in the EC. BRANCH=firmware-hatch-12672.B Signed-off-by: Rajat Jain <rajatja@google.com> Change-Id: I0714baf4a8981b90aefdd3b955ebf93985f70197 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080602 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* remove board/cr50 and chip/gNamyoon Woo2020-03-031-43/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes cr50 related files from platform/ec. BUG=b:149350081 BRANCH=none TEST=$ make buildall -j $ cros_workon --host list chromeos-base/chromeos-cr50-dev chromeos-base/chromeos-ec chromeos-base/chromeos-ec-headers chromeos-base/ec-devutils chromeos-base/ec-utils chromeos-base/ec-utils-test dev-util/hdctools $ sudo emerge chromeos-cr50-dev -j $ sudo emerge chromeos-ec -j $ sudo emerge chromeos-ec-headers -j $ sudo emerge ec-devutils -j $ sudo emerge ec-utils -j $ sudo emerge ec-utils-test -j $ sudo emerge hdctools -j $ cros_workon-octopus list chromeos-base/chromeos-ec chromeos-base/chromeos-ec-headers chromeos-base/ec-devutils chromeos-base/ec-utils chromeos-base/ec-utils-test dev-util/hdctools $ sudo emerge-octopus chromeos-ec -j $ sudo emerge-octopus chromeos-ec-headers -j $ sudo emerge-octopus ec-devutils -j $ sudo emerge-octopus ec-utils -j $ sudo emerge-octopus ec-utils-test -j $ sudo emerge-octopus hdctools -j Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: Ifa3a037fff17177204ce1a9b88474490fb9be3ed Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2083659 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* vboot: Add a reboot option to keep EFS in RO with the AP off.Sam McNally2020-03-033-0/+8
| | | | | | | | | | | | | | | | | | | | With EFS, the EC will typically switch to RW shortly after boot. cros_ec_softrec_power triggers recovery mode using the hostevent console command after rebooting the EC with ap-off and then simulates a power button press. This requires the EC to remain in RO after rebooting so doesn't currently work with EFS. Add a reboot option "ap-off-in-ro" to request the EC remain in RO with the AP off after rebooting. BUG=b:149657030 TEST=make buildall; firmware_RecoveryCacheBootKeys on puff BRANCH=none Change-Id: I65d291106accebf18bb46d951351def122627e61 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2077699 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common/keyboard_8042: Add ability to send/receive AUX dataRaul E Rangel2020-03-022-0/+20
| | | | | | | | | | | | | | | | | | | | * Added CHAN_AUX to CHAN enum. * Added two new types to kblog for AUX data. * Moved mouse methods to handle_mouse_data so they can respond on the AUX channel. * Call lpc_aux_put_char to put an AUX byte. * Added send_aux_data_to_host and send_aux_data_to_device to pipe data in and out of the 8042. CONFIG_8042_AUX must be set if the board implements these methods. BUG=b:145575366 BRANCH=none TEST=Verified I can see AUX data going in and out. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Iea1fc315846a9f768a1d82e309ff0725d1d2a9c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079695 Reviewed-by: Edward Hill <ecgh@chromium.org>
* include/lpc.h: Expose lpc_aux_put_charRaul E Rangel2020-03-021-0/+8
| | | | | | | | | | | | | | | * Expose lpc_aux_put_char so we can call it from common/keyboard_8042. * Renamed lpc_mouse_put_char to lpc_aux_put_char so it's more generic. * Added the send_irq parameter for parity with lpc_keyboard_put_char. BUG=b:145575366 BRANCH=none TEST=Verified it builds Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I61854ed7c9b9ad1c50e55735747cfb25ca15762b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079694 Reviewed-by: Edward Hill <ecgh@chromium.org>
* TCPMv2: Add BIST RX and TX states needed by PD FAFTSam Hurst2020-02-291-0/+6
| | | | | | | | | | | | | | | | Split the BIST state into BIST RX and TX states. These states are accessed from the pd console which enables the device to work with PD FAFT. BUG=chromium:1021235 BRANCH=none TEST=make -j buildall Manual tests: Change-Id: I1f8280b8a31b0faa012e2098b6fc51b24d7ee1fc Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962975 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* volteer: Prevent glitch on SLP_S3_L during power onKeith Short2020-02-291-0/+12
| | | | | | | | | | | | | | | | | Reconfigure the SLP_S3_L power interrupt as an output and drive this signal low while the PP3300_A rail comes up. This prevents a glitch on the SLP_S3_L signal that can affect the power sequencing. BUG=b:143346794 BRANCH=none TEST=make buildall TEST=Verify Volteer boots. With debug code enabled, verify SLP_S3_L drives low while PP3300 turns on. Change-Id: Ic8204874cb9e68a1af27fafcf5274d50ce5cb38f Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068535 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* usb_mux: retimer: mux as chained mux and retimerDenis Brockus2020-02-282-143/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes retimers appear as generic muxes. By allowing a chain of muxes they can be stacked up to the new configurations that zork requires and will continue to work as they did before on configurations that only have a single mux. The code used to have two different arrays, 1) muxes and 2) retimers. On one of the zork configurations the processor MUX stopped being the primary mux and the retimer took its place. In a different configuration of that same platform it left the primary and secondary alone but the mux_set FLIP operation had to be ignored. Since the same interfaces needed to be available for both it stopped making sense to have two different structures and two different methods of handling them. This consolodates the two into one. The platforms that do not have retimers, this change will not make any difference. For platforms like zork, it will remove the retimers and make them chained muxes. So testing on trembyle makes sense to verify, BUG=b:147593660 BRANCH=none TEST=verify USB still works on trembyle Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common/system: Add sysinfo host commandTom Hughes2020-02-281-0/+20
| | | | | | | | | | | | | | | | | | This command is useful to use during testing to verify the state of the system (e.g., locked/unlocked, currently running image, etc.). BRANCH=none BUG=b:146447208 TEST=make buildall -j TEST=ectool --name=cros_fp sysinfo TEST=ectool --name=cros_fp sysinfo flags TEST=ectool --name=cros_fp sysinfo reset_flags TEST=ectool --name=cros_fp sysinfo firmware_copy Change-Id: I714b6bd8c0d7192386404c25a831e38438fa5238 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2047032 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* common/system: Unify ec_current_image and system_image_copy_tTom Hughes2020-02-284-32/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "enum ec_current_image" is exposed in ec_commands.h (and used by non-EC code, such as biod). We also have an "enum system_image_copy_t" that is the exact same thing (though has a few more definitions). A followup CL (I714b6bd8c0d7192386404c25a831e38438fa5238) adds the "sysinfo" host command, so we want to be able to expose all the potential image variants. Rather than maintain two enums that can potentially get out of sync, unify the code to use a single enum. We choose to keep the "enum ec_current_image", since external code depends on it. To verify that this change results in no changes to the generated binaries: ./util/compare_build.sh --board all BRANCH=none BUG=b:146447208 TEST=./util/compare_build.sh --board=all Change-Id: I13776bc3fd6e6ad635980476a35571c52b1767ac Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2036599 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* volteer: Configure EC_VOLUP_BTN_ODL for next buildKeith Short2020-02-272-0/+20
| | | | | | | | | | | | | | | | Update the GPIO assignment for the EC_VOLUP_BTN_ODL signal for the next board build. BUG=b:144933528 BRANCH=none TEST=make buildall TEST=Verify volume buttons with board ID=0 Change-Id: I28e53573b6a6a9ba7e5df0458ded8b988c25ac04 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2065489 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* chip/npcx/lpc: Set bit 5 when sending AUX responses.Raul E Rangel2020-02-271-0/+3
| | | | | | | | | | | | | | The linux kernel expects bit 5 to be set in the status register when the output buffer contains and AUX packet. BUG=b:145575366 BRANCH=none TEST=Verified bit 5 is set when sending aux packets Change-Id: I0d3944ea6fd04224d9f9bcf0e1b0b3c8633ad786 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2073281 Reviewed-by: Edward Hill <ecgh@chromium.org>
* c2d2: add support for I2C-based flashingJett Rink2020-02-271-0/+8
| | | | | | | | | | | | | | | | Add necessary console command to allow C2D2 to pass through i2c bus for ec and ap. Also hook into common ite programming mode code. BRANCH=servo BUG=b:148610186,b:147381671 TEST=flash ampton with C2D2 adapter Change-Id: I1d9b20684b45ff0d101b9cfff8b0b0a85e6c0c70 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2064594 Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Matthew Blecker <matthewb@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* ish: infrastructure changes to support ish5.4 PMLeifu Zhao2020-02-271-0/+6
| | | | | | | | | | | | | | | | | | Infrastructure related changes to support enabling power management for ish5.4 on tgl rvp platform. BUG=b:149238813 BRANCH=none TEST=ISH can successfully enter into D0i1/D0i2/D0i3 on tgl rvp. Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Change-Id: I50b6f1a4fe9c14f9479af2a2a438ec7395ec27a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056149 Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
* usb_set_suspend: Use "enable" consistentlyAbe Levkoy2020-02-271-2/+2
| | | | | | | | | | | | | | The port is enabled when suspend is not enabled and vice versa. Avoid confusing these idioms. BUG=none TEST=make buildall BRANCH=none Change-Id: I3063793334ac875afee8a176f96625e8903d2694 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057979 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Update USB C1 reset for next buildstabilize-volteer-12931.B-masterKeith Short2020-02-261-0/+3
| | | | | | | | | | | | | | | | Update the GPIO assignment for the USB_C1_RT_RST_ODL signal for the next board build. BUG=b:144933528, b:148243971 BRANCH=none TEST=make buildall TEST=Check unassigned board ID or board ID=0 uses legacy GPIO setting. Otherwise new GPIO setting is used. Change-Id: I4621e039e4461a4e10ab87bc2d4e000b5dcaa885 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057496 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TUSB544: Add driverDiana Z2020-02-251-0/+1
| | | | | | | | | | | | | Driver code for the TUSB544 redriver BRANCH=None BUG=b:149561847 TEST=builds Change-Id: I391d6d264ff9d326c2d45569124dd1366f892812 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2062766 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv1/v2: Move hex8tou32 and remote_flashing to common fileSam Hurst2020-02-251-0/+25
| | | | | | | | | | | | | BUG=chromium:1021235 BRANCH=none TEST=make buildall -j Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: Ia243d5062c77d8f6b8299fbd131cabfdbcffb01e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2070452 Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Sam Hurst <shurst@google.com>
* gpio: Free gpio.inc from oppressive orderCraig Hesling2020-02-252-14/+140
| | | | | | | | | | | | | | | | | | | | | | | | | This CL enables gpio.wrap to correct the order of all declaration in gpio.inc. Previously, gpio.inc had to be written such that GPIO_INTs were at the top of the file, GPIOs following GPIO_INTs, and then IOEX_INTs before IOEXs declaration. This ordering was required because the signal name enums were used to index into the interrupt handler table. See crrev.com/c/263973 (gpio: Refactor IRQ handler pointer out of gpio_list). This constraint not only limited the creativity and art of an individual crafting a gpio.inc, but also made recursively including gpio.inc's (for baseboard or other) messy and ugly. BRANCH=none BUG=none TEST=make buildall Change-Id: Ie4531b95b65728b646087f00e9434f4cfdc49287 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056498 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* servo_micro: move ite flashing codeJett Rink2020-02-252-0/+33
| | | | | | | | | | | | | | | | In preparation for servo_micro and c2d2 to sharing the ite, i2c flashing code, move it to a stm specify common file. It is STM specific because it explicitly uses STM registers to accomplish the non-compliant i2c waveforms needed to put the ITE EC into flash mode. BRANCH=servo BUG=b:148610186,b:79684405 TEST=flash ampton with servo_micro using this code Change-Id: Ia0f3f944df2f8a8ad47ea5a62c5f0edae2c71943 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2064592 Reviewed-by: Diana Z <dzigterman@chromium.org>
* EFS2: Sync cr50_comm_err with Cr50's definitiondnojiri2020-02-241-2/+3
| | | | | | | | | | | | | | | | | This patch syncs enum cr50_comm_err with the one defined in cr50_stab. Signed-off-by: dnojiri <dnojiri@chromium.org> BUG=chromium:1045217 BRANCH=none TEST=Boot reworked Helios and verify software sync works. Change-Id: I2848a2d03fc90cbc9b292edaee1760e9ed32298d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2069029 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* TCPMv1/v2: Move pd_set_polarity() to common fileVijay Hiremath2020-02-242-8/+8
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: Idf6908bfc3e79a960a7de6e4249c2f50b41b56e6 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052645 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMV1/2: Make the PD Config Flags more consistentSam Hurst2020-02-221-15/+53
| | | | | | | | | | | | | | | | | | | | The current use of the PD Config Flags are a bit confusing and has been changed to the following: The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY is enabled, one of the following must be enabled: CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine CONFIG_USB_PD_TCPMV2 - current power delivery state machine BUG=b:149993808 BRANCH=none TEST=make -j buildall Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519 Reviewed-by: Diana Z <dzigterman@chromium.org>
* power/common: Add board specific API for 5V controlAseda Aboagye2020-02-211-0/+10
| | | | | | | | | | | | | | | | | | | Some boards need different mechanisms to enable/disable the 5V rail that's not simply setting the PP5000_EN GPIO. This commit adds a new board specific API to control the 5V rail. If a board needs something more complex, they should define `board_power_5v_enable`. BUG=b:149794574 BRANCH=None TEST=Add definition for waddledoo, build and flash, verify that sub-board 5V is turn on as well. Change-Id: I333e3fb8f2b4e7f1907c792c0e35581150857f17 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2065494 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* intel_x86: Add CONFIG_BOARD_HAS_AFTER_RSMRSTAseda Aboagye2020-02-212-0/+16
| | | | | | | | | | | | | | | | | | | Some x86 boards need to perform some workarounds after handling RSMRST_L, therefore this commit adds a CONFIG_* option to enable this, CONFIG_BOARD_HAS_AFTER_RSMRST. A board callback, board_after_rsmrst() will be called after RSMRST is changed. BUG=b:148688874 BRANCH=None TEST=Enable CONFIG_* option, verify that callback is called once RSMRST changes. Change-Id: Ic6b6b4a0f23639e3fd4d9e69c95b3d94e44a2162 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2058693 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* it83xx/dac: add DAC moduletim2020-02-213-0/+5
| | | | | | | | | | | | | | | | | | The DAC module has four channels. We can set output voltage when DAC channel is enabled by this driver. BUG=b:149094279 BRANCH=none TEST=The console command #dac set as follows: read: dac [ch] write: dac [ch] [voltage] [ch]:2-5, [voltage]:0(disable)-3300 Change-Id: I8e815cb5bc749467581d5f771fd6f9e0995fca3b Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2046685 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Servo: Adds persistent storage of MAC addressBrian J. Nemec2020-02-213-0/+42
| | | | | | | | | | | | | | | | | | | | | | | Adds a field to the persistent storage to store the MAC address of the device. This is enabled on ServoV4 in order to store the MAC address for the integrated ethernet port. Added a console command to set and load this value. BUG=b:149506580 TEST=Verified setting and loading the MAC address using: 'macaddr set 12:34:56:78:90:ab' and 'macaddr' or 'macaddr load' Verified that MAC addresses over 19 characters long return an error response and not update the MAC. Verified no set serial number will return the uninitialized string. Verified that the MAC address can be updated independently of serialno Verified that the persist_state fields restore during firmware updates Change-Id: I8425ce9e13322e99a4f59df444ea0dc73821aa6b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2063330 Tested-by: Brian Nemec <bnemec@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Brian Nemec <bnemec@chromium.org>
* nct3807: potential connection cleanupDenis Brockus2020-02-201-12/+15
| | | | | | | | | | | | | | | | | | | | I changed TCPMv2 to call tcpm_set_new_connection instead of tcpm_set_cc when connecting at the parent state for a new connection type. This allows the NCT3807 to clear out DRP and set the correct connection instead of clobbering what the hardware determined to be correct and setting it to an open listen. BUG=b:149593609 BRANCH=none TEST=verify USB-C Change-Id: I7402d3417a14fdc4158636e4716ef7fbdf4fa4a3 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2064184 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* TCPMv1/v2: Move pd_is_try_source_capable() to common fileVijay Hiremath2020-02-191-0/+5
| | | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I79f75d23f6091a264c11b4da6cf0cea26205df60 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052648 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* driver/tcpm/it8xxx2: PD driver for chip it8xxx1/8xxx2Ruibin Chang2020-02-191-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PD driver for chip it8xxx1/8xxx2 series. BRANCH=none BUG=none TEST=test below functions on PDEVB port0, 1, 2 with TCPMv1 (set cc toggle by console cmd): 1.pin configuration console cmd "gpioget" check gpio settings. memory dump check cc pin alternate settings. 2.Tx data error handle Message discard, No GoodCRC, Tx not enable, Timeout errors happen, corresponding INT will be triggered then do properly handle. 3.basic pd connection SNK:connect with adaptor, request max power (15V,3A), state SNK_READY. SRC:enable DRP role, connect with dongle, provide power (5V,1.5A), source Vconn 5v, get ack of cable discover id, state SRC_READY. 4.pd module disable SNK:connect with adapter. console cmd "hibernate sec", driver disable pd module, check still connection with adapter via dead battery rd. And when resume from hibernate, pd init can re-enable pd module, re-connect with adapter. SRC:connect with dongle. console cmd "hibernate sec", driver disable pd module, check cc pin (not Vconn source pin) volt power down to ~0v. And when resume from hibernate, pd init can re-enable pd module, re-connect with dongle. 5.Tx hard reset console cmd "pd port hard", check hard reset message by lecroy analyzer. 6.Tx cable reset check cable reset message by lecroy analyzer. 7.SOP' enable SRC:connects to SNK via E-mark cable. Source Vconn successfully, and receives cable's ack of discover id request. Not source Vconn to cable, and receives nothing of discover id request (this isn't effect on request SNK flow). 8.power role swap console cmd "pd port swap power", check pd protocol by lecroy. Change-Id: I687e0e65e2687ebbb790eb1e1c8c459305f4dbc1 Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2009538 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usbc: remove tri-state polarityDenis Brockus2020-02-151-7/+1
| | | | | | | | | | | | | | | | | | TCPCIr2 had an issue with setting CC coming out of DRP that if the polarity was not retained that the connection dropped back to OPEN. Unfortunately this change broke many of the other TCPCI implementations. I am working on a different method of dealing with coming out of DRP and this is no longer needed. BUG=none BRANCH=none TEST=verify USB-C is working Change-Id: Ifa8f26d417df2f5d5f41a23fbf7e6f9129031e94 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056968 Reviewed-by: Jett Rink <jettrink@chromium.org>
* nct38xx: auto-toggle exit cleanupDenis Brockus2020-02-152-21/+12
| | | | | | | | | | | | | | | | | | Don't set the polarity behind the back of the PD stack. Just clear the DRP and leave the CC lines so they look just as we found them. This will allow TRY to work and we will no go OPEN because we set the CC lines to something that was not expected. BUG=b:149415919 BRANCH=none TEST=verify USB-C connections are working Change-Id: I766514bd46922000ea8916d61d00265e7e5e4fd4 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2053461 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* tcpci: Rename TCPC_FLAGS_TCPCI_V2_0 to TCPC_FLAGS_TCPCI_REV2_0Edward Hill2020-02-141-2/+2
| | | | | | | | | | | | | | | | | | Align naming of TCPC_FLAGS_TCPCI_V2_0 to match spec: "USB Type-C Port Controller Interface Specification" "Revision 2.0, Version 1.0" BUG=none BRANCH=none TEST=none Change-Id: I27752847581e449c3a2f6be438704d3e514c937d Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057375 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Temp sensor: Remove action_delay_sec fieldDiana Z2020-02-141-3/+0
| | | | | | | | | | | | | | The action_delay_sec field hasn't actually been referenced by any code since 2013. Removing the corresponding struct field. BUG=None BRANCH=None TEST=builds Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv1/v2: Move PD & Partner type detection code to common fileVijay Hiremath2020-02-141-2/+2
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: Icb9dfe998df889e8e2d6de7776d9889295115708 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2052644 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Reduce number of arguments of pd_build_request()Vijay Hiremath2020-02-142-14/+3
| | | | | | | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=Manually tested on Volteer 1. When only one charger connected: Able to negotiate to PD max. 2. When two chargers are connected (one on each port): Non charging port is rejected Swaps the charging port based on charger's priority Change-Id: Ib7fdc5d31bf36189a85f8cd3217bec78f83a9efe Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051318 Reviewed-by: Keith Short <keithshort@chromium.org>
* tcpmv2: make connect after auto-toggle driver specificDenis Brockus2020-02-132-0/+23
| | | | | | | | | | | | | | | | | | | | | nct38xx needs to have the cached polarity set in order to leave DRP mode without going back to an OPEN line. Other TCPCI implementations break when this happens. So moved it to a driver specific function instead TODO(b/149415919): Consider trying to clear the DRP mode instead of changing the polarity BUG=b:149311437 BRANCH=none TEST=verify charger functions on Trogdor Change-Id: I5092a468d860b573a6e5acaf7c013b3425916efb Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2050336 Tested-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* common: Migrate online calibration to own moduleYuval Peress2020-02-131-0/+29
| | | | | | | | | | | | | | | This change moves the code that handles caching the temperature (which is the first step in online calibration) into a new compilational unit. TEST=None BRANCH=None BUG=b:138303429,chromium:1023858 Change-Id: Ib1fe3d2234dc2436e2bbfd4febd22196e5cdafef Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906340 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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