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* Revert "power: Clear AP_IDLE when waking up by PB or LID"Daisuke Nojiri2020-08-011-24/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 27ee378bb78a299a0983379be83eb6d55860b4ae. Reason for revert: b/162508724 A wake-up source from hibernation needs to be determined only by RO. Reverting back to the original implementation: CL:2236589. Original change's description: > power: Clear AP_IDLE when waking up by PB or LID > > Currently, AP_IDLE is cleared when EC wakes up by the power button or > the lid open. > > This patch extends the logic from CONFIG_EXTPOWER_GPIO to > CONFIG_EXTPOWER so that the bug (chromium:1073960) can be also fixed > on the boards using non-GPIO method for extpower_is_present. > > Tested as follows on Trembyle: > 1. Put DUT in hibernation. > 2. Wake up DUT and observe: > a. When waking up by power button, AP is turned on. > b. When waking up by lid open, AP is turned on. > c. When waking up by AC, AP is left idle. > > BUG=b:157077589, chromium:1073960, b:159350276 > BRANCH=none > TEST=See above. > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > Change-Id: I944aaac036ce58659e81b7021e52a3291f31e951 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283946 > Reviewed-by: Jett Rink <jettrink@chromium.org> Bug: b:157077589 Bug: chromium:1073960 Bug: b:159350276 Bug: b:162508724 Change-Id: Iaf9d0af2ca8c48bbf2529c4ba05493837dd76287 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2333106 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* power: Clear AP_IDLE when waking up by PB or LIDDaisuke Nojiri2020-07-221-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, AP_IDLE is cleared when EC wakes up by the power button or the lid open. This patch extends the logic from CONFIG_EXTPOWER_GPIO to CONFIG_EXTPOWER so that the bug (chromium:1073960) can be also fixed on the boards using non-GPIO method for extpower_is_present. Tested as follows on Trembyle: 1. Put DUT in hibernation. 2. Wake up DUT and observe: a. When waking up by power button, AP is turned on. b. When waking up by lid open, AP is turned on. c. When waking up by AC, AP is left idle. BUG=b:157077589, chromium:1073960, b:159350276 BRANCH=none TEST=See above. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I944aaac036ce58659e81b7021e52a3291f31e951 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283946 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Battery: Implement smart discharge systemDaisuke Nojiri2020-06-201-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CrOS EC chooses only one of the two powre-saving states when the system is left idle. One is to hibernate and the other is to cut off the battery. And these are determined at compile time. If the system hibernates, EC will not have a chance to cut off the battery before the state of charge reaches critical low. If the system is in cutoff, it requires an AC adapter to wake up. So, neither behavior is ideal. This patch introduces the smart discharge system. Given the number of hours to zero capacity as a target, it tries to choose the better state for idling. For example, if the state of charge is high, it will hibernate the system because the target can be met before the battery completely drains. If the state of charge is low, it will keep the EC up so that it can cutoff the battery. Tests are done on Bloog as follows: Verify EC selects not to hibernate when the remaining capacity is below the stay-up threshold. The ectool smartdischarge command is tested as follows: localhost ~ # ectool smartdischarge Hours to zero capacity: 0 h Stay-up threshold: 0 mAh Cutoff threshold: 0 mAh Hibernate discharge rate: 0 uA Cutoff discharge rate: 0 uA localhost ~ # ectool smartdischarge 2160 Hours to zero capacity: 2160 h Stay-up threshold: 0 mAh Cutoff threshold: 0 mAh Hibernate discharge rate: 0 uA Cutoff discharge rate: 0 uA localhost ~ # ectool smartdischarge 2160 200 1500 EC result 3 (INVALID_PARAM) localhost ~ # ectool smartdischarge 2160 1500 200 Hours to zero capacity: 2160 h Stay-up threshold: 3240 mAh Cutoff threshold: 432 mAh Hibernate discharge rate: 1500 uA Cutoff discharge rate: 200 uA localhost ~ # ectool smartdischarge 2160 1500 0 EC result 3 (INVALID_PARAM) localhost ~ # ectool smartdischarge 0 Hours to zero capacity: 0 h Stay-up threshold: 0 mAh Cutoff threshold: 0 mAh Hibernate discharge rate: 1500 uA Cutoff discharge rate: 200 uA Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:152431365, b:157602162 BRANCH=none TEST=See above Change-Id: I1470b13203f3653ae0e495cd5ec8ed05f3c5102f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2216392 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* system: Clear AP_IDLE when waking up from hibernation by ACDaisuke Nojiri2020-06-111-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, AP_IDLE is set when EC is left idle in G3. This makes the AP stay off after EC wakes up from hibernation (for any wake-up source). This makes a board require another power button press to boot the system from hibernation. This change makes RO clear AP_IDLE unless AC is present. When AC is present, EC doesn't hibernate. So, AC presence infers the EC woke up from hibernation by AC. That is, if the system wakes up by a power button press, AP_IDLE is cleared and AP will be turned on (unless it's overwritten by AP_OFF). Tested as follows on Trembyle: 1. Put DUT in hibernation. 2. Wake up DUT and observe: a. When waking up by power button, AP is turned on. b. When waking up by lid open, AP is turned on. c. When waking up by AC, AP is left idle. BUG=b:157077589, chromium:1073960 BRANCH=none TEST=See above. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ie5020bbe50ad489f4e3010820681cc57ff51b941 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236589
* power: Don't print timestamp for powerinfo commandDaisuke Nojiri2020-06-091-1/+1
| | | | | | | | | | | | | | | | This patch makes powerinfo command print the result without a timestamp like other console commands. This shouldn't break FAFT. If it does, FAFT should be fixed. BUG=none BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I90f032dc2d079d9d674489d2236b05f6051e574f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219122 Reviewed-by: Craig Hesling <hesling@chromium.org>
* power: add power_wait_mask_signals_timeout()Eric Yilun Lin2020-05-081-2/+7
| | | | | | | | | | | | | | | | | | Currently, we can only wait for a signal is presented via power_wait_signals*(). However, we might want to wait a power signal disappeared. power_wait_mask_signals_timeout() does the thing, which can wait until a power signal is disappeared. BRANCH=master BUG=b:150341779 TEST=test with CL:2120114 Change-Id: I0bbc04fcf76e67d7cfe86096a42e3b767a136ef9 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176820 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* power: Boot on wake from hibernation for non-EFS2 boardsDaisuke Nojiri2020-05-061-2/+1
| | | | | | | | | | | | | | | | | | | | | | | CONFIG_BOOT_ON_HIBERNATE_WAKE allows boards to choose either to get PD power or to keep the consistent behavior between S5 and hibernation. EFS2 boards can get both. This patch replaces the macro with CONFIG_VBOOT_EFS2 so that non EFS2 boards automatically choose the option (to boot on wake from hibernation). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:1073960 BRANCH=none TEST=Verified on Zork AP stays off after wake up from hibernation. Change-Id: I1707153357777db082ae64f86f8303f0e408b1a7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2184545 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* power: Don't boot after waking up from hibernationDaisuke Nojiri2020-05-061-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | When a device shuts down and is idle for 60 mins (configurable), EC enters hibernation. When an AC adapter is plugged, the system boots. This is not expected behavior and not consistent with the behavior that the system stays off on AC plug-in before hibernation. This patch fixes the above inconsistency by storing AP_OFF flag before entering hibernation after 60 mins idle in S5. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:1073960 BRANCH=none TEST=Verified Bloog stays off after waking up from hibernation on AC plug-in. Change-Id: I097bee97164284dd4c35f8bf9389c76319fd676a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176555 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* power/common: Add board specific API for 5V controlAseda Aboagye2020-02-211-5/+9
| | | | | | | | | | | | | | | | | | | Some boards need different mechanisms to enable/disable the 5V rail that's not simply setting the PP5000_EN GPIO. This commit adds a new board specific API to control the 5V rail. If a board needs something more complex, they should define `board_power_5v_enable`. BUG=b:149794574 BRANCH=None TEST=Add definition for waddledoo, build and flash, verify that sub-board 5V is turn on as well. Change-Id: I333e3fb8f2b4e7f1907c792c0e35581150857f17 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2065494 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* power: Make power_signal_get_level() overridableAseda Aboagye2020-02-051-1/+1
| | | | | | | | | | | | | | | | | This commit makes power_signal_get_level() overridable as there are some boards (like dedede) which have power sequencing inputs which are not simply just GPIOs nor eSPI VW. BUG=b:148169171 BRANCH=None TEST=`make -j buildall` Change-Id: I16fbf54b0688b432c82312a431f1d9f7cc074278 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032727 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* EC: Implementation for AP reboot from G3 state using ectool command.Sooraj Govindan2019-12-101-1/+17
| | | | | | | | | | | | | | | | | | | | The new ectool command 'ectool reboot_ap_on_g3' will reboot AP from G3 state on initiation of DUT shutdown. Thus eliminating the dependency of servo to trigger wake events when testing AP cold boot cycles. BUG=b:129507479 BRANCH=None TEST=Tested on hatch board. From Kernel console, entered the below commands: $ectool reboot_ap_on_g3 $shutdown -h now Observed AP boots back to S0 upon G3. Change-Id: Ie6fcbd2f00eb6c22ed498ab82dac53132dbbf4a3 Signed-off-by: Poornima Tom <poornima.tom@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918993 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* power: Fix CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS checksKeith Short2019-10-111-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | Regardless of the state of CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS, if CONFIG_HOSTCMD_ESPI is enabled, then the AP can still generate virtual wire interrupts. Replace checks of CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS for power signals with CONFIG_HOSTCMD_ESPI. This fixes a processor exception that was caused by siglog_add() when the AP generated a virtual wire interrupt. The VW signals start at GPIO_COUNT so were causing buffer overflows of gpio_list[]. BUG=b:142406787 BRANCH=none TEST=buildall -j TEST=Enable CONFIG_BRINGUP on kohaku. Without change RO causes processor exception, with change RO and RW boots and AP boots. Change-Id: I81ab6f2fed217f5aad3ca7fae64c850e3af49f43 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1850275 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* printf: Convert %l to %llEvan Green2019-10-051-1/+1
| | | | | | | | | | | | | | | | | | | | | In order to make our printf more standard, utilize %ll for long long arguments, rather than %l. This does cost a little bit in flash space for that extra l in a couple of places, but enables us to turn on compile-time printf format checking. For this commit only, the semantics are such that both %l and %ll take 64-bit arguments. In the next commit, %l goes to its correct behavior of taking a sizeof(long) argument. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Cq-Depend:chrome-internal:1863686,chrome-internal:1860161,chrome-internal:1914029 Change-Id: I18081b55a8dbf5ef8ec15fc499ca75e59d31da58 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819652 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* host_command: Change host command return value to enum ec_statusTom Hughes2019-10-021-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host command handler callback function returns an int, it's easy to accidentally mix up the enum ec_error_list and enum ec_status types. The host commands always expect an enum ec_status type, so we change the return value to be of that explicit type. Compilation will then fail if you accidentally try to return an enum ec_error_list value. Ran the following commands and then manually fixed up a few remaining instances that were not caught: git grep --name-only 'static int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#static int \(.*\)(struct host_cmd_handler_args \*args)#\ static enum ec_status \1(struct host_cmd_handler_args \*args)##' git grep --name-only 'int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#int \(.*\)(struct host_cmd_handler_args \*args)#\ enum ec_status \1(struct host_cmd_handler_args \*args)##' BRANCH=none BUG=chromium:1004831 TEST=make buildall -j Cq-Depend: chrome-internal:1872675 Change-Id: Id93df9387ac53d016a1594dba86c6642babbfd1e Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816865 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cutoff: ensure logs are flushed before cut-offYilun Lin2019-09-101-0/+2
| | | | | | | | | | | | | | Logs may not appear in the console without flush if battery been cut-off. TEST=See the logs are flushed to console before cutoff BRANCH=None BUG=None Change-Id: I73363856c50dea1ec409b8041d96227d6538bcc3 Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772863 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* power: Make HC host_sleep_event independent from power common.Yilun Lin2019-08-231-71/+0
| | | | | | | | | | | | | | | | | | host_sleep_event provides the AP power state information to EC, and this is not necessary bound to CONFIG_POWER_COMMON. This CL moves the HC out of CONFIG_POWER_COMMON. TEST=1. make buildall -j 2. #define CONFIG_POWER_TRACK_HOST_SLEEP_STATE kukui_scp, and see it build successfully. BUG=b:136240895 BRANCH=none Cq-Depend: chromium:1760656 Change-Id: I5555c7ba8b97547ce9fc0ff8e2bff14ef3da8fe7 Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753563 Reviewed-by: Jett Rink <jettrink@chromium.org>
* power: Replace weak attr with __overridableYilun Lin2019-08-221-7/+5
| | | | | | | | | | | | | | | | | This CL annotates __overridable to the following functions: board_system_is_idle power_chipset_handle_host_sleep_event power_board_handle_host_sleep_event TEST=make buildall BUG=none BRANCH=none Change-Id: I0168b69c49fab5672238711d4f3a6a5517cdd8b3 Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1761759 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* intel_x86: Use common code to get power signal's levelVijay Hiremath2019-06-201-1/+1
| | | | | | | | | | | | | | | Removed redundant code in intel_x86 and reusing the common code for getting power signal's level. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I9cd550a2326456189a087459aeb8e6c88a8cad8e Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1667647 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ec: Remove extraneous new line as the end of CPRINTS stringsNicolas Boichat2019-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | CPRINTS already prints a new line, no need to add another one. Spotted during boot on kukui, and then realized there are many more instances: "" [3.689239 Module 7 is not supported for clock disable ] "" BRANCH=none BUG=none TEST=make buildall -j TEST=`git grep CPRINTS | grep "\\\\n\""` shows nothing of interest. Change-Id: I4d2bbbc65a91fa56c6e6115aa5c353bfd2b384a1 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660519 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-131-1/+2
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* power: Manipulate wake mask during s0ix timeoutsEvan Green2019-05-081-11/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | When S0ix failure detection is enabled and a timeout occurs such that the SLP_S0 line never actually toggles, then s0ix_transition_timeout() sets the HANG_DETECT event bit. This doesn't quite work in this scenario, since the wake mask is only enabled when the power state transitions to S0ix, which happens when the SLP_S0 line toggles. So the AP never sees the event, since it's not in the wake mask and so never causes the EC->AP interrupt line to change. Detect this situation in the timeout function, and explicitly move the wake mask to its S0ix value so that when the event bit is set, (if it is in the wake mask), the system will wake up. Doing this forcefully gets the wake mask out of sync with the power state. So upon resume, explicitly restore the wake mask to its S0 state. BUG=b:131434497 BRANCH=none TEST=suspend_stress_test -c1 --suspend_min=60 with a firmware where S0ix fails. Change-Id: Id2e67c6933a7895fba85ccfdff9b336629eabf24 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1592469 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* 7-seg display: Add config to display port80 msg and power statesAyushee2019-05-031-0/+3
| | | | | | | | | | | | | | | | | Adding this CL to display port80 message and power states of EC & SOC on the 7-segment display. BRANCH=None BUG=b:130738086 TEST=Manually tested on intelrvp, able to verify the power states and port80 message displayed on the 7 segment display Change-Id: I4437cfcd60662c8637e406e425f98fad1a4ba7ed Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1575433 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* power: Init host_sleep_event resume_transitionsEvan Green2019-04-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | I had missed a piece of feedback from Karthik about initializing the sleep transitions member of the resume response to avoid returning uninitialized data from the EC. This is especially important if CONFIG_POWER_S0IX_FAILURE_DETECTION is not selected, because then it will *always* return uninitialized data. This drives the kernel nuts, since it has no way to know if that config is on or not. BUG=b:123716513 BRANCH=none TEST=Test suspend with kernel support for this message, and the EC config both on and off. Change-Id: Id35bfe2730327b08f451a4d84277a13e47380a61 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1551687 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* power/intel_x86: Introduce s0ix failure detectionEvan Green2019-03-281-10/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces logic in the EC that can detect if the host attempted to go into S0ix, but never made it. The host already sends commands indicating its intent to enter S0ix, and the EC has a SLP_S0 line that gets asserted by the AP when it actually enters S0ix. All that's needed to monitor failures is to arm a timer when receiving the S0ix suspend message. If the SLP_S0 pin goes low, then the suspend occurred and the timer is canceled. If the timer expires before SLP_S0 goes low, then the EC wakes the AP up, since it has entered a shallower idle state than intended, and should be alerted to avoid short battery life. The timer is also started when SLP_S0 is deasserted on resume. The SoC comes out of S0ix to perform housekeeping activities unbeknownst to Linux. In cases where housekeeping fails to suspend all the way back down, this timer will wake the AP. Additionally, the number of S0ix transitions is reported on resume. This enabled the AP to analyze the amount of "sleepwalking" that is done, and can complain if it seems to be waking up too often. Design doc at: https://docs.google.com/document/d/1mY-v02KAuOyET3td9s5GnxeUgMiAcD058oLEo57DZpY/edit BUG=b:123716513 BRANCH=None TEST=Test S0ix on hatch with modified code that forces a timeout, use ectool to send messages manually before and after timeout, Hack Linux to fail suspend very late to verify no regressions. Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Ia64b496675a13dbed4ef74637f51e39eee68aa1a Reviewed-on: https://chromium-review.googlesource.com/1501512 Commit-Ready: Evan Green <evgreen@chromium.org> Tested-by: Evan Green <evgreen@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* power: Allow board to take custom action on G3 timer expirationDaisuke Nojiri2019-03-281-9/+24
| | | | | | | | | | | | | | | | | | | | | This patch introduces board_system_is_idle callback function. It's called when system is in G3. A board can customize its action taken when system is idle in G3 using battery thresholds, expiration timer, etc. determined at runtime. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=nami,strago,coral TEST=Verify Vayne cut off battery on G3 idle expiration while other Nami's hibernate. Change-Id: I6118a074ac7d844b99d9c0f3eb638b72d5894008 Reviewed-on: https://chromium-review.googlesource.com/1512623 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* power: Refactor POWER_G3 state logicDaisuke Nojiri2019-03-121-18/+13
| | | | | | | | | | | | | | | | | | | | | | This patch refactors the logic for POWER_G3 state. This patch additionally makes the power task sleep instead of break and return from power_common_state if system_hibernate returns, which shouldn't happen. Other than that, there is no functionality change. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=nami,strago,coral TEST=Verify Vayne hibernates when it's left idle in s5 for 60 mins. Change-Id: Ib4a0e9a0e26fdc867395950e3f77bb06e6977f8b Reviewed-on: https://chromium-review.googlesource.com/1512622 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* power/common: Wait some time before updating wake masksFurquan Shaikh2018-10-301-5/+35
| | | | | | | | | | | | | | | | | | | | | | On platforms like KBL, the device keeps waking up periodically for very short intervals to allow some SoC components to do book-keeping activities. If the user happens to trigger EC-related wake event during this short window, then the wakeup event could be missed because it looks like the host is in S0 to the EC. In order to avoid the race condition, update wake mask using a deferred call to allow the system state to stabilize. BUG=b:118490626 BRANCH=nocturne TEST=No more lid open failures observed on nocturne. Change-Id: I13f9f5760aaf7e54c676f43c48f9fc8de572fd01 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1303133 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* power: add chipset_in_or_transitioning_to_stateJett Rink2018-09-071-0/+31
| | | | | | | | | | | | | | | | | | | | | | | We need a method that we can call from the chipset notify hooks that can clearly distinguish which state you are about to be in. This is made evident by the child CL for putting a MUX into low power mode in S5. Without this method, we have to put chipset state into the PD task variable and use that instead (since chipset_in_state won't work because we are in the S3S5 state) BRANCH=none BUG=b:112136208,b:111196155,chromium:736508 TEST=On Phaser the 3300_pd_a drops from 92mW to 32 mW when the charger is plugged into C1 and the SoC is in S5. The rail also says at 32mW after removing and plugging the power back in while the SoC is in S5. Also ensured that power is low upon first insertion and AP does not come on automatically. Change-Id: I93cce2aa319c9689efce222919e5389471001a00 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1211368 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to ↵Furquan Shaikh2018-07-271-4/+4
| | | | | | | | | | | | | | | | | | | | | CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS This change renames CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SIGNALS in order to make it clear that this config option indicates that chipset sleep signals (SLP_S3 and SLP_S4) are tranmitted over virtual wires instead of physical lines with eSPI. BUG=b:111859300 BRANCH=None TEST=make -j buildall Change-Id: Iab4423abc9102164d4f43296a279c24355445341 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1151048 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* power: Add power_get_state APIDaisuke Nojiri2018-07-251-0/+5
| | | | | | | | | | | | | | | | | This patch adds power_get_state API, which returns the low-level power chipset state. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=make buildall Change-Id: I104fdf9623f64416d8c27d583cd434920808afdb Reviewed-on: https://chromium-review.googlesource.com/1144447 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* espi: rename remaining eSPI optionsJett Rink2018-05-231-4/+4
| | | | | | | | | | | | | Change prefix from CONFIG_ESPI to CONFIG_HOSTCMD_ESPI for consistency. BRANCH=none BUG=chromium:818804 TEST=Full stack builds and works on yorp (espi) and grunt (lpc) Change-Id: I8b6e7eea515d14a0ba9030647cec738d95aea587 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067513 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* lpc/espi: convert remaning CONFIG_LPC to CONFIG_HOSTCMD_X86Jett Rink2018-05-221-1/+1
| | | | | | | | | | | | | | We have converted all LPC-only configs to HOSTCMD_LPC so the remaining CONFIG_LPC defines represent the common case. BRANCH=none BUG=chromium:818804 TEST=Full stack builds and works on yorp (espi) and grunt (lpc) Change-Id: Iba9a48f2cab12fadd0d9ab8eab0d5d5476eab238 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067503 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* power/common: Preserve 5v enable across sysjumpJustin TerAvest2018-04-191-0/+25
| | | | | | | | | | | | | | | | | | | | | | The value of pwr_5v_en_req needs to be preserved when the EC performs a sysjump, otherwise any task calling power_5v_enable(tid, 0) will drop the 5v rail for the entire system. I've scheduled this at HOOK_PRIO_FIRST for restoring the value to ensure that no other init hooks read a stale value, but I'm not sure if that's necessary. BUG=b:78275296 BRANCH=none TEST=Booted yorp with power only connected to USB-C port 0 Change-Id: I3a9ed24a5fde02b60163ad2c5e3252759f8c1c5b Signed-off-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1020066 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* debugging: Correcting console channel to chipset instead of switchJett Rink2018-03-061-1/+1
| | | | | | | | | | | | BRANCH=none BUG=none TEST=build all Change-Id: I900dbe9f9053310c4cef2d125445fc8aa0fe6b67 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/949724 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* power: Fix interrupt enable in siglog_deferredEdward Hill2018-01-111-1/+1
| | | | | | | | | | | | | | | | Recent eSPI change (d813935) resulted in siglog_deferred leaving interrupts disabled. BUG=b:71764538 BRANCH=none TEST=apshutdown on grunt, see power signal changes Change-Id: I33e234ad7191af92e2c4ffef700fc5b9356c3c71 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/860571 Commit-Ready: Aaron Durbin <adurbin@google.com> Tested-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Aaron Durbin <adurbin@google.com>
* espi: Add API to test if signal is eSPI virtual wireScott Worley2018-01-021-11/+19
| | | | | | | | | | | | | | | | | | | | | | Add espi_signal_is_vw in new file common/espi.c for testing if a signal is an eSPI virtual wire. API used in power common and intel_x86. Fix CONFIG_BRINGUP support for eSPI (off by default). Add espi_vw_get_wire_name returning a pointer to constant string. Chip modules do not need to maintain names of eSPI signals. BRANCH=none BUG= TEST=Build poppy and other eSPI enabled boards. Test power state machine. Change-Id: I13319e79d208c69092a02ec3ac655477d3043d61 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/836818 Commit-Ready: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* host_events: Introduce unified host event commandJenny TC2017-12-061-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unified Host Event Programming Interface (UHEPI) enables a unified host command EC_CMD_PROGRAM_HOST_EVENT to set/get/clear different host events. Old host event commands (0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F) is supported for backward compatibility. But newer version of BIOS/OS is expected to use UHEPI command (EC_CMD_PROGRAM_HOST_EVENT) The UHEPI also enables the active and lazy wake masks. Active wake mask is the mask that is programmed in the LPC driver (i.e. the mask that is actively used by LPC driver for waking the host during suspended state). It is same as the current wake mask that is set by the smihandler on host just before entering sleep state S3/S5. On the other hand, lazy wake masks are per-sleep masks (S0ix, S3, S5) so that they can be used by EC to set the active wake mask depending upon the type of sleep that the host has entered. This allows the host BIOS to perform one-time programming of the wake masks for each supported sleep type and then EC can take care of appropriately setting the active mask when host enters a particular sleep state. BRANCH=none BUG=b:63969337 TEST=make buildall -j. And verfieid following scenario 1). Verified wake masks with ec hostevent command on S0,S3,S5 and S0ix 2). suspend_stress_test with S3 and S0ix 3). Verified "mosys eventlog list" in S3 and s0ix resume to confirm wake sources (Lid, power buttton and Mode change) 4). Verified "mosys eventlog list" in S5 resume to confirm wake sources (Power Button) 5). Verified above scenarios with combination of Old BIOS + New EC and New BIOS + Old EC(making get_feature_flags1() return 0) Change-Id: Idb82ee87fffb475cd3fa9771bf7a5efda67af616 Signed-off-by: Jenny TC <jenny.tc@intel.com> Reviewed-on: https://chromium-review.googlesource.com/576047 Commit-Ready: Jenny Tc <jenny.tc@intel.com> Commit-Ready: Jenny Tc <jenny.tc@intel.corp-partner.google.com> Tested-by: Jenny Tc <jenny.tc@intel.com> Tested-by: Jenny Tc <jenny.tc@intel.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* power: Add default sleep event state HOST_SLEEP_EVENT_DEFAULT_RESETFurquan Shaikh2017-10-311-2/+2
| | | | | | | | | | | | | | | | | | Instead of using HOST_SLEEP_EVENT_S0IX_RESUME as a reset state to reinitialize S0ix flag, add a new default state HOST_SLEEP_EVENT_DEFAULT_RESET. This also allows different parts of the code to take correct action depending upon the state that is currently triggered. BUG=None BRANCH=None TEST=Verified that SLP_S0# interrupt doesn't get asserted during runtime S0ix. Change-Id: Id6fc8f3b015561d2899a9d39796b77a11a57e758 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/745901 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* power: Add task-safe API to control 5V rail.Aseda Aboagye2017-10-231-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For certain cannonlake designs, the 5V rail can be controlled by both the chipset task as well as other tasks such as the USB charger tasks to perform BC1.2 detection. This commit introduces an API that allows the tasks to enable/disable the 5V rail. Enable requests will immediately enable the rail, however, attempting to disable the rail will only result in a request. Once all tasks want to turn off the 5V rail, the rail will be turned off. A bitmask is introduced to keep track of the requests. Index 0 is for the chipset task. All of this is gated behind a config option: CONFIG_POWER_PP5000_CONTROL BUG=b:65991615 BRANCH=None TEST=With other zoombini code, verify that 5V can be enabled and disabled. Change-Id: I1722b4a272c4d6ee24408929f5a7402051bb9cf3 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/722322 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: Call power_chipset_handle_host_sleep_event on state resetFurquan Shaikh2017-10-031-0/+1
| | | | | | | | | | | | | | | | Any time the host sleep state is updated (including reset of host sleep state), make a callback into power_chipset_handle_host_sleep_event to allow mainboard and chipset to take any necessary action. BUG=b:65421825 BRANCH=None TEST=make -j buildall Change-Id: Ib4d35fa0b417500090361e4e26415feedb663e35 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/683797 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* power: Add flag to disable power signal at bootFurquan Shaikh2017-10-031-1/+4
| | | | | | | | | | | | | | | Add a new flag to allow boards to indicate if a power signal has to be enabled/disabled at boot. BUG=b:65421825 BRANCH=None TEST=make -j buildall Change-Id: Ibe7ab74e8191c58433087d8024b344d7e845f17e Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/679981 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* power: Expose power_signal_{enable/disable}_interrupt outside power/common.cFurquan Shaikh2017-10-031-1/+11
| | | | | | | | | | | | | | | 1. Make power_signal_enable_interrupt visible outside power/common.c 2. Add corresponding power_signal_disable_interrupt function. BUG=b:65421825 BRANCH=None TEST=make -j buildall Change-Id: I04b7b053cc1ffe978fcbac5b2cb746d21b198aa2 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/679980 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* power: Add flags parameter to power_signal_infoFurquan Shaikh2017-10-031-1/+7
| | | | | | | | | | | | | | | | | | | | | | Replace structure member "level" in power_signal_info with "flags". "level" has been used on all boards to indicate active-high or active-low levels. Addition of "flags" allows easy extension of power_signal_info structure to define various flags that might be applicable to power signals (e.g. "level"). Going forward, additional flag will be added in follow-up CLs. Also, provide a helper function power_signal_is_asserted that checks the actual level of a signal and compares it to the flags level to identify if a power signal is asserted. BUG=b:65421825 BRANCH=None TEST=make -j buildall Change-Id: Iacaabd1185b347c17b5159f05520731505b824b8 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/679979 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* power: Provide chipset and board callbacks on host sleep event commandFurquan Shaikh2017-09-221-0/+8
| | | | | | | | | | | | | | | | This change allows chipset and board to perform any action when host indicates intention to enter sleep state. Chipset can take action like enable/disable power signal interrupts and boards can enable/disable decay of VRs on host intent to enter/exit S0ix. BUG=b:65732924 BRANCH=None TEST=make -j buildall Change-Id: I6298825d4ee96a07b93523c2f366527ae2be8a27 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/677498 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Fix inconsistent task function declarationsStefan Reinauer2017-08-081-1/+1
| | | | | | | | | | | | | | | Tasks are defined inconsistently across the code base. Signed-off-by: Stefan Reinauer <reinauer@google.com> BRANCH=none TEST=make buildall -j, also verify kevin boots to OS BUG=none Change-Id: I19a076395a9a8ee1e457e67a89d80d2f70277c97 Reviewed-on: https://chromium-review.googlesource.com/602739 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* S0ix: use both SLP_S0 interrupt and host command for s0ixJenny TC2017-07-241-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | EC currently uses a host command from kernel to enter s0ix. This patch waits for the SLP_S0 interrupt to come after receiving the host command before entering S0ix. On the exit path, the SLP_S0 interrupt directly triggers the exit rather than waiting for the host command. BRANCH=none BUG=b:37443151 TEST=check in EC logs for SLP_S0 entry and powerindebug output, check suspend_stress_test on reef and soraka works fine, make -j8 buildall runs fine Change-Id: Ie5507b7a1e723532f07bc0671c2abd364f6224a2 Signed-off-by: Subramony Sesha <subramony.sesha@intel.com> Signed-off-by: Archana Patni <archana.patni@intel.com> Signed-off-by: Jenny TC <jenny.tc@intel.com> Reviewed-on: https://chromium-review.googlesource.com/513705 Commit-Ready: Jenny Tc <jenny.tc@intel.com> Tested-by: Jenny Tc <jenny.tc@intel.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* task: Wait for HOOK_INIT completion before scheduling tasksShawn Nematbakhsh2017-06-191-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until HOOK_INIT has completed, do not allow any tasks other than HOOKS or IDLE to be scheduled. Programmers often make the assumption that a HOOK_INIT function is guaranteed to be run before task code that depends on it, so let's make it so. BUG=chromium:649398 BRANCH=None TEST=Manual on kevin, compare boot without patch: ... [0.004 power state 0 = G3, in 0x0008] <-- from chipset task RTC: 0x00000000 (0.00 s) [0.004 power state 4 = G3->S5, in 0x0008] RTC: 0x00000000 (0.00 s) [0.005 clear MKBP fifo] [0.006 clear MKBP fifo] [0.006 KB init state: ... <-- from keyscan task [0.012 SW 0x05] [0.155 hash start 0x00020000 0x00019a38] [0.158 HOOK_INIT DONE!] ... to boot with patch: ... RTC: 0x58cc614c (1489789260.00 s) [0.004 clear MKBP fifo] [0.005 clear MKBP fifo] [0.010 SW 0x05] [0.155 hash start 0x00020000 0x000198e0] [0.157 HOOK_INIT DONE!] ... Also, verify kevin boots to OS and is generally functional through sysjump and basic tasks, and verify elm (stm32f0 / cortex-m0) boots. Change-Id: If56fab05ce9b9650feb93c5cfc2d084aa281e622 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/456628 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Apollolake: Enter/exit from S0ix based on host commands from kernelArchana Patni2016-11-171-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the entry/exit model for S0ix from a PCH SLP_S0 signal based model to a hybrid host event/direct interrupt model. The kernel will send host events on kernel freeze/thaw exit; EC will initiate the S0ix entry based on host command and exit via another host command from kernel. The assertion of SLP_S0 comes later than HC(suspend) and deasserion of SLP_S0 comes earlier than HC(resume). ________ ________ SLP_S0 |______________________| _____ ________ HC |___________________________| BRANCH=none BUG=chrome-os-partner:58740 TEST=Build/flash EC and check 'echo freeze > /sys/power/state' command in OS shell. Verify idle state transitions during display off and periodic wakes from S0ix do not lead to state transitions in EC. Change-Id: Ie18c6c2ac8998f59141641567d1d740cd72c2d2e Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Signed-off-by: Subramony Sesha <subramony.sesha@intel.com> Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Signed-off-by: Archana Patni <archana.patni@intel.com> Reviewed-on: https://chromium-review.googlesource.com/401072 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* skylake: Add support to S0iX based on host commands from KernelVijay Hiremath2016-11-131-4/+0
| | | | | | | | | | | | | | | | | | Picked the code from Glados branch. Change-Id: I4bf114235c4d542dd7cf0dad6427c771e54d4611 https://chromium-review.googlesource.com/#/c/331358/ BUG=chrome-os-partner:59742 BRANCH=none TEST=make buildall -j Change-Id: Ib79f1209dfd9e6a9de0438cb1866bba2939e5393 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/410036 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
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