summaryrefslogtreecommitdiff
path: root/power/mediatek.c
Commit message (Collapse)AuthorAgeFilesLines
* power: mediatek: Do not block power state by waiting for power button releaseKoro Chen2016-07-111-13/+2
| | | | | | | | | | | | | | | | | | | The firmware needs to talk to the EC while the power button is pressed. If the EC did not even leave the S5->S3 state this is not possible. Seems like the piece of code is not even necessary, check_for_power_off_event will catch the long press asynchronously later on anyway. BRANCH=none BUG=chrome-os-partner:54781 TEST=power up by power button and hold it, there should be no error logs during EC sync, and screen turns on for a short time then off Change-Id: Ic0cccb6cfc5ddd389c1111a77ec06530a9e429ef Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/359152 Reviewed-by: Rong Chang <rongchang@chromium.org>
* Deferred: Use deferred_data instead of function pointerAnton Staaf2016-04-181-2/+3
| | | | | | | | | | | | | | | | | | | | | Previously calls to hook_call_deferred were passed the function to call, which was then looked up in the .rodata.deferred section with a linear search. This linear search can be replaced with a subtract by passing the pointer to the deferred_data object created when DECLARE_DEFERRED was invoked. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None CQ-DEPEND=CL:*255812 TEST=make buildall -j Change-Id: I951dd1541302875b102dd086154cf05591694440 Reviewed-on: https://chromium-review.googlesource.com/334315 Commit-Ready: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* power: mediatek: correct a typo in set_pmic_pwronKoro Chen2016-04-141-1/+1
| | | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:52343 TEST=power up and should not see "5V power not ready" Change-Id: Ie8e3fd1610ff14356632205d9d81d31a838f9162 Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/338886 Reviewed-by: Tony Lin <tonycwlin@google.com> Reviewed-by: Rong Chang <rongchang@chromium.org>
* elm: initial elm mainboardRong Chang2016-04-141-7/+19
| | | | | | | | | | | | | | | | | | | | | | | | Elm is an oak variant that uses ANX7688 PD port controller. This CL sets PD port count to 1 and modifies TCPC I2C address to 0x50. Other elm changes are included in this change: - add 2 KX022 motion sensors, remove BMI160 - remove ALS - LED configuration changed to 2 bi-color LEDs - remove pi3usb30532 - add ANX7688 mux driver - change PD interrupt polarity BRANCH=none BUG=none TEST=manual make BOARD=elm -j load and test on elm proto Signed-off-by: Rong Chang <rongchang@chromium.org> Change-Id: I8ad02da9acade985bc0e7e2f85d9e58db7e6b38d Reviewed-on: https://chromium-review.googlesource.com/331453 Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: make sure power button is stable when waiting for releaseYH Huang2016-03-161-33/+4
| | | | | | | | | | | | | | | | | | The debounce timer might be too slow to actually update the state of debounced_power_pressed by the time we do power_button_is_pressed in the S3->S5 state transition. Call power_button_wait_for_release() instead of wait_for_power_button_release() to make sure there are no deferred actions. BRANCH=none BUG=chrome-os-partner:50362, chrome-os-partner:51109 TEST=During dev mode screen, press power button, note the device stays off TEST=sudo test_that -b oak <DUT_IP> firmware_FwScreenPressPower Change-Id: Ic60c1847ba461ef874dea5bf7d03675622f24beb Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/332310 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Clean up CONFIG_PMIC_FW_LONG_PRESS_TIMER related codesKoro Chen2016-03-161-14/+0
| | | | | | | | | | | | | | | | | | | | | CONFIG_PMIC_FW_LONG_PRESS_TIMER was ported long time ago from Tegra, but the codes are actually not used and erroneous. It might wrongly trigger set_pmic_pwron(0), and turn off PMIC power accidentally. This causes POWER_GOOD lost and power state will go back to S5 during boot up. Clean up the codes by referencing check_for_power_off_event() of Rockchip. BRANCH=none BUG=none TEST=bootup and press power button quickly right after we are in S0. Bootup should still complete normally. Change-Id: Ie034efa3575dbebae4debb1afc206fddd9116350 Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/332724 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Add delay before we turn off VBATKoro Chen2016-03-161-0/+7
| | | | | | | | | | | | | | | | After power good is lost, PMIC requires some time to turn off all its internal power before we can turn off VBAT by set_system_power(0). This ensures the power measurement is within PMIC spec when system is shut down. BRANCH=none BUG=none TEST=measure the power rails of PMIC after system is shut down Change-Id: I55d4d99ed0ef69b103a4e52e9f9eec1c9e6265b5 Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/332409 Reviewed-by: Rong Chang <rongchang@chromium.org>
* gaia, mediatek, rockchip, tegra: No more disabling key scanning in power filesDouglas Anderson2016-02-181-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In http://crosreview.com/28402 code was added to power/gaia.c that disabled keyboard scanning if the power button was pressed. The purpose, according to that change, was to prevent accidental reboots by pressing the power button together with another key that wasn't the "Refresh" key (specifically: LCtrl, Tab, Reload, t, [, ], y, Dim Screen and Mute). At the time the original code was added, there was already code in the power button interrupt handler to accomplish the same purpose: see commit 29d25d807c18 ("Keyboard scan must stop driving columns when power button is pressed."). It's unclear if the code in the interrupt handler didn't work or if there was some other bug with it. ...or if perhaps the changes in "gaia/power.c" weren't actually needed and the important part of the original change was the mutex added to the scanning task. In any case, current testing indicates that the code in power/gaia.c, power/rockchip.c, and power/tegra.c isn't needed anymore. I ran through the test sequence described in the original CL on my veyron_jerry and I don't see any accidental reboots. It's also instructive to note that only ARM boards (all presumably copied from gaia) have this extra code. Presumably if the code was actually needed then x86 boards would also need it. In any case, let's remove it. It's suspected that there's some crazy race where the disable in power/rockchip.c is overriding the enable in the main power key handling code and leaving the keyboard disabled. BRANCH=None BUG=chrome-os-partner:48470 TEST=Same test as CL:28402 Change-Id: I6d21167ce3d773c9616abd4a728247a1934b96d6 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/327843 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit dfae7e7ad45f4ce0e8f820caaa05a8754bba0250) Reviewed-on: https://chromium-review.googlesource.com/328013
* oak: cancel long press timer when lost power_good or entering S3Ben Lok2015-11-041-13/+23
| | | | | | | | | | | | | | | | | | | | | | 1. refer to commit 8bd44bf4, oak has similar issue: if power good is lost and the power button still press, we need cancel the long press timer, otherwise EC will crash. 2. Furthermore, EC will crash too if long press timer is still active during entering S3. 3. The debounce of suspend & power_good signal can be removed on rev4 because rev4 doesn't adopt level shifter. BRANCH=None BUG=chrome-os-partner:46857 TEST=Manual 1. press power button during coreboot, and it can shutdown normally, or 2. run test case: > test_that -b oak <DUT IP> firmware_FwScreenPressPower Change-Id: I584d8beeb31b6c01289bfe4790453a4a3bd35b1c Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/309942 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: handle the warm reset key from servo boardBen Lok2015-11-031-0/+12
| | | | | | | | | | | | | | | | | | Warm reset key from servo board lets the POWER_GOOD signal deasserted temporarily (about 1~2 seconds) since Oak rev4. In order to detect this case, check the AP_RESET_L status, ignore the transient state if reset key is pressing. BUG=chrome-os-partner:46655 BRANCH=none TEST=make buildall -j; Press warm reset key of servo board, AP should reset normally. Change-Id: Ib9f111d2273cde61354e72367fe74d4ee15d2291 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/307201 Tested-by: Yidi Lin <yidi.lin@mediatek.com> Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: ensure PMIC power button is released after SYSJUMP.Ben Lok2015-10-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | There is a race condition between SYSJUMP and function release_pmic_pwron_deferred(). Process of EC SW Sync will delay the execution time of release_pmic_pwron_deferred(). PMIC will shutdown the power, if PMIC power button can not be released within 8 seconds (depends on PMIC spec). In order to ensure PMIC power button will be released in time, just release it after SYSJUMP. BUG=chrome-os-partner:46392 BUG=chrome-os-partner:46656 BRANCH=none TEST=make buildall -j; Enable EC SW sync and normal mode in coreboot, Kernel should bootup successfully. Change-Id: I45d4aa0f0d4280e68282ea11ccfda05201f88aae Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/307220 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: updates GPIO setting for rev4Ben Lok2015-09-231-1/+5
| | | | | | | | | | | | | | | | | | | | | Modify the GPIO seeting according to the Oak rev4 schematic. BRANCH=none BUG=none TEST=manual Confirm all reversion of oak can be built pass: make -j EXTRA_CFLAGS=-DBOARD_REV=4 BOARD=oak make -j BOARD=oak clean make -j EXTRA_CFLAGS=-DBOARD_REV=3 BOARD=oak make -j BOARD=oak clean make -j EXTRA_CFLAGS=-DBOARD_REV=2 BOARD=oak make -j BOARD=oak clean make -j EXTRA_CFLAGS=-DBOARD_REV=1 BOARD=oak Change-Id: Ib1051f29df9d1919f0ae3ecaf55dc0997ea29c3e Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/300728 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: revise the cold reset timing.Ben Lok2015-09-181-9/+19
| | | | | | | | | | | | | | | | | | | | | | | since we add debounce time (50 ms) for SUSPEND & POWER GOOD signal after oak rev3 (commit e58a913b). It will causes the chipset_reset function failure, because PMIC_COLD_RESET_L_HOLD_TIME is short. PMIC_COLD_RESET_L_HOLD_TIME should be greater than 100 ms [SUSPEND_DEBOUNCE_TIME (50 ms) + POWER_DEBOUNCE_TIME (50 ms)]. So, revise PMIC_COLD_RESET_L_HOLD_TIME to 120ms. And, using hook to avoid blocking the EC console when executing "apreset" EC console command. BRANCH=none BUG=chrome-os-partner:44955 TEST=manual Run EC console command, after AP enter S0: > apreset AP should be reset normally. Change-Id: I04e31aef8be3092ad39b5f1b1c2b75b78b4d1d7b Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/299625 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: power: set 8s for long power key press to force shutdownYH Huang2015-09-181-5/+5
| | | | | | | | | | | | | | | | | Since the firmware_ECPowerButton testcase holds down power button about 10s to shut down without powerd, we set DELAY_FORCE_SHUTDOWN about 8s to make sure the powerbutton is pressed long enough to force shutdown. BRANCH=none BUG=chrome-os-partner:43412 TEST=manual run "firmware_ECPowerButton" testcase on rev3. Change-Id: Ib41cdecfa0342236d618e6fdffcb64bf7f51b557 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/296884 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: enable MBKP events for PD eventsBen Lok2015-08-311-2/+2
| | | | | | | | | | | | | | | | | | | (refer to CL:273620) enable the MKBP event feature to send host event and wire up the PD specific events. But, CONFIG_MKBP_EVENT conflicts with CONFIG_KEYBOARD_PROTOCOL_MKBP, due to the GPIO name of EC interrupt pin. Align the GPIO naming of EC interrupt pin to EC_INT_L. BRANCH=none BUG=chrome-os-partner:44643 TEST=On Oak rev3, plug/unplug USB devices and add kernel trace to see the PD events happening. Change-Id: I10de9c6611583bb6165bdc1848e542d4b8bba954 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/296012 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* mediatek: Fix llama buildShawn Nematbakhsh2015-08-061-15/+1
| | | | | | | | | | | | | | The llama AP_RESET GPIO differs in polarity from oak. BUG=chromium:517250 TEST=`make buildall -j` BRANCH=None Change-Id: Id06bf39e758b528d154936a3e8561704fdf4cce9 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290950 Commit-Queue: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* oak: increase the PMIC power key press time to 5 seconds.Ben Lok2015-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | There are 3 methods to power on the system: 1) Pulling PWRKEY low (User presses PWRKEY) 2) Setting BBWAKEUP high 3) Valid charger plug-in We should ensure that BBWAKEUP should be high when release PWRKEY. Due to the RTC driver of coreboot will move to ramstage, and the setup timing of BBWAKEUP will be postpone. In order to ensure PMIC keeping the power until coreboot pull BBWAKEUP up, it needs to increase the PMIC power key press time to avoid PMIC turn the power off. This change is related to: https://chromium-review.googlesource.com/#/c/257389/ BRANCH=none BUG=none TEST=manual Update coreboot with above patch, press power key and system should power on normally. Change-Id: I7fabc49e0b3956885cb83a0b40c31c60080d0cbc Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290538 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: revise warm reset control for rev3Ben Lok2015-08-051-9/+21
| | | | | | | | | | | | | | | | | | | | | | The AP warm reset pin is changed from rev3 of oak board. PB3 is stuffed before rev3 and connected to PMIC RESET pin to reset the AP. For rev3, the AP reset mechanism is changed: PC3 connects to PMIC SYSRSTB, pull PC3 to low, to reset AP. BRANCH=none BUG=none TEST=manual 1. define CONFIG_BOARD_OAK_REV_2 in board.h make -j BOARD=oak 2. define CONFIG_BOARD_OAK_REV_3 in board.h make -j BOARD=oak both cases should be built successfully and run "apreset" command. AP should be reset normally. Change-Id: I979e93acf755509f8cb7a12dd77eb7c9e7a98ccc Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/289476 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: enable EC sleep in S3Ben Lok2015-08-051-3/+8
| | | | | | | | | | | | | | | In S3, the EC isn't expecting AP host commands, so it's safe to enable sleep BRANCH=none BUG=none TEST=Check sleep mask in S0 and S3. Also check sleep mask after sysjump with AP on and with AP off. Change-Id: I9dcfe996e8e92e6703d71bbe966cd2447c6b14fe Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290002 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: power: Set 10s for long power key press to force shutdownYH Huang2015-08-031-5/+5
| | | | | | | | | | | | | | | | | In order to pass the test case "firmware_ECPowerButton", I change the value of DELAY_FORCE_SHUTDOWN from 11s to 10s. The test case holds down power button about 10s to shut down without powerd. BRANCH=none BUG=none TEST=manual run "firmware_ECPowerButton" test case. Change-Id: I3da93769f1cb52b04c447df9a7795d3c28ab2bf0 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/282153 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: power: change power state while losting POWER_GOOD signalYH Huang2015-08-011-16/+76
| | | | | | | | | | | | | | | | | Check IN_POWER_GOOD signal in S0 and go to S3 if IN_POWER_GOOD is lost. Finally it will go to S5(G3). Check suspend and power good signal after POWER_DEBOUNCE_TIME to avoid transient state. BRANCH=none BUG=none TEST=manual Test power related commands such as "shutdown -P now" or "apshutdown". Change-Id: Ia06fc7d8334c0dfbb0263474f57e4dca7313d331 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/282680 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: set a debounce time for suspend signalBen Lok2015-06-301-1/+13
| | | | | | | | | | | | | | | | | The suspend signal from SoC of oak should be kept at least 50ms. Add a debounce time for suspend singal detection, to avoid transient state during SoC boot up. BUG=chrome-os-partner:42023 BRANCH=none TEST=plug PD power adaptor to type-c port C1, The keyboard should be worked (Ensure EC communication is oaky) Change-Id: I4a6bb4e8ba9d417fe2a3045846d38b2129516d78 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/282471 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
* oak: power: add the console command "power on/off"YH Huang2015-06-251-1/+60
| | | | | | | | | | | | | | Add the console command "power on/off" for AP power on/off. BRANCH=none BUG=none TEST=manual enter "power on/off" in the ec console to turn AP power on/off. Change-Id: I16d2af72bc1bf045e7672acd9471dff0a672aff5 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/280957 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: power off ap if reboot ap-offYH Huang2015-06-231-22/+28
| | | | | | | | | | | | | | | When ec gets the console command "reboot ap-off", turn off ap. BRANCH=none BUG=none TEST=manual Enter "reboot ap-off" in ec console and then ap is off. Change-Id: Iba2c3743ae37ee9ceaadba58752d2129fb00d3a8 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/277976 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Queue: Rong Chang <rongchang@chromium.org>
* oak: add initial support for oak board rev1Rong Chang2015-05-271-44/+52
| | | | | | | | | | | | | | | Add initial support for Oak rev1 board. This is just the EC and includes battery charging but does not include USB PD. BUG=none BRANCH=none TEST=load on oak board and get console Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Alec Berg <alecaberg@chromium.org> Change-Id: I626f3921025fbc39ba22b04eeb6dd1084cd70777 Reviewed-on: https://chromium-review.googlesource.com/261678
* llama: enable the EC backlight override for mediatek platform.Ben Lok2015-03-091-2/+34
| | | | | | | | | | | | | | | | | | | 1. Override the panel backlight enable signal from SoC in llama board, force the backlight off on lid close. 2. Revise the function llama_lid_event to mtk_lid_event, makes more sense. BRANCH=master BUG=none TEST=lid switch to open/close, observe the LCD backlight behavior. the backlight should be off, when lid is close. the backlight should be on, when lid is open. BOARD=llama Change-Id: Id1bff440c8bb6cee19c82615e916b8a2f2aa62ac Signed-off-by: Ben Lok <ben.lok@mediatek.com> (cherry picked from commit a90516b0a5493a55536e29d550f65cc743156710) Reviewed-on: https://chromium-review.googlesource.com/255441 Reviewed-by: Rong Chang <rongchang@chromium.org>
* llama: add llama board supportBen Lok2015-02-101-0/+637
This is to add llama board support: - new files in board/llama folder, including battery.c and led.c - new file power/mediatek.c, which is mostly based on power/tegra.c - modified flash_ec for llama board - disable tests for llama board. BRANCH=none BUG=none TEST=make BOARD=llama Change-Id: Ie1ae068c1a402f08e1449668b1be8f31105bb804 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/243510 Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: lok.ben ben.mtk <ben.lok.mtk@gmail.com> Commit-Queue: lok.ben ben.mtk <ben.lok.mtk@gmail.com>
View Lorry Controller Status