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* power: Add chipset and board callbacks for sleep hangsRob Barnes2022-03-171-2/+3
| | | | | | | | | | | | | | | | | | Instead of passing a callback to host_sleep, define overridable board and chipset callbacks for sleep hang detection. Introduce a sleep_hang_type enum that identifies the type of sleep hang (suspend or resume). These changes make it eaier for boards to implement custom logic to handle sleep hangs. BUG=b:218892808 BRANCH=guybrush TEST=Observe suspend hang detection on Nipperkin with KI Change-Id: Ifacf90f808b1447633f7cfc2d570209d1e233950 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3529606 Reviewed-by: Diana Z <dzigterman@chromium.org>
* qcom: Catch the unexpected case that POWER_GOOD up again after lostWai-Hong Tam2022-02-161-7/+19
| | | | | | | | | | | | | | | | | | When the POWER_GOOD was lost, it sets the shutdown_from_on flag. We don't expect the POWER_GOOD up again. However, a hardware bug makes this happen. Catch this unexpected case and go straight to turn off the switchcap. BRANCH=None BUG=b:218878427 TEST=Typed "shutdown -P now" in userspace. Saw the EC warning message: [41.599700 Warning: POWER_GOOD up again after lost] Change-Id: Ieadffd5347f46070336cc608af2ed3cbc20c612c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3466417 Reviewed-by: Alexandru Stan <amstan@chromium.org> Commit-Queue: Alexandru Stan <amstan@chromium.org>
* qcom: Unconditionally disable AP_RST_L interrupt on power offWai-Hong Tam2022-02-161-5/+6
| | | | | | | | | | | | | | | | Move disabling the AP_RST_L interrupt out of the if clause. The if clause won't be entered if the shutdown is triggered by POWER GOOD lost. BRANCH=None BUG=b:218878427 TEST=Triggered the power off sequence from the AP side. Checked the AP_RST_L interrupt disabled. Change-Id: I69c22a44f6fa42ec4397b52a7a2d9d025c2de5b4 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3466416 Reviewed-by: Alexandru Stan <amstan@chromium.org>
* qcom: Swap a reliable signal to confirm PMIC powerWai-Hong Tam2022-02-121-2/+2
| | | | | | | | | | | | | | | | | | | | Previously, we used the PMIC_KPD_PWR_ODL as a signal to confirm if the PMIC is powered. In the recent QC project, the KPD_PWR_N has internal pull-up to a PMIC's 1.1V rail. The 1.1V is under the Vih(min). So the EC may sample it incorrectly and may lead to a wrong decision path. The PMIC_RESIN_L signal has internal pull-up to a 1.8V. Using this signal is more reliable. BRANCH=None BUG=b:218876104 TEST=Verified the power-on and power-off sequence. Change-Id: I9217f334f2684a8b4265a44f3b10b07412a250d2 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3456706 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* qcom: Clear all power-on trigger flags after handling oneWai-Hong Tam2022-02-101-22/+20
| | | | | | | | | | | | | | | | | Multiple power-on trigger flags may be flipped. The check_for_power_on_event() handles one according to the precedence. It should clear all other flags at the end. Otherwise, the pending flag may trigger another unexpected power-on. BRANCH=None BUG=b:218518083 TEST=Tested all the power-on triggers. Change-Id: Ia94fa80b3aba40a2cbb552d937ffb56507f9ee3b Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3450999 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* qcom: Move the execution of warm reset to CHIPSET contextWai-Hong Tam2022-01-271-11/+28
| | | | | | | | | | | | | | | | | | | | | In CrOS EC, the `apreset` command is executed in the CONSOLE context. But in Zephyr, the command is executed in the lowest priority task context. This low priority task is easily preempted and makes the power signal missing. This miss is wrongly treated as the PMIC not respond correctly and trigger a cold reset sequence: S0 -> S5 -> S0. This CL moves the execution to the CHIPSET task context. It is now independent from the console runtime. BRANCH=None BUG=b:215252361 TEST=Call the `apreset` command, just a warm reset triggered. Change-Id: I2be65db46b453421c2a04d10a75c01dbf16f1f89 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3418118 Reviewed-by: Alexandru Stan <amstan@chromium.org>
* qcom: Rename the POWER_REQ_COLD_RESETWai-Hong Tam2022-01-271-4/+4
| | | | | | | | | | | | | Make the name clearer to reflect the request of the cold reset. BRANCH=None BUG=b:215252361 TEST=Trigger the `apreset` command and have the same behavior. Change-Id: I4dbd241433945449cd41db5cf956312462280cee Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3418117 Reviewed-by: Alexandru Stan <amstan@chromium.org>
* qcom: Refactor the AP warm reset sequenceWai-Hong Tam2022-01-271-9/+26
| | | | | | | | | | | | | | | | | Separate the warm reset sequence to the function warm_reset_seq(). Rename the power-on sequence to the function power_on_seq(). Rename the power-off sequence to the function power_off_seq(). No logical change. BRANCH=None BUG=b:215252361 TEST=Trigger the `apreset` command and have the same behavior. Change-Id: I90a5a547b8b182b9236fed3d73a0a4febc56ee0c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3418116 Reviewed-by: Alexandru Stan <amstan@chromium.org>
* power: Add default cases for power state handlersEvan Green2021-12-011-0/+5
| | | | | | | | | | | | | | | | | In preparation for the addition of the new POWER_S4 state (and transition states) coming in, add default cases for ARM power state handlers, which won't be adding phony transitions through a non-existent S4 state. BRANCH=None BUG=b:204947672 TEST=hiberman hibernate --test-keys on volteer Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: I48c884131037cbff917230134a34718c32ce75db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3286183 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* qcom: Add checks for EFS2 to the power on sequenceKeith Short2021-11-121-7/+16
| | | | | | | | | | | | | | | | | | | | | | | When EFS2 is enabled, the normal boot will always have the EC_RESET_FLAG_SYSJUMP set. Always enabled auto power on of the AP unless one of the following conditions is true: 1. EC_RESET_FLAG_AP_OFF reset flag is set 2. EC_RESET_FLAG_SYSJUMP reset flag is set, and EC_RESET_FLAG_EFS is not set. BUG=b:193719620 BRANCH=none TEST=Verify EC powers up AP after performing a sysjump when EFS2 is enabled. TEST=Set recovery mode, verify EC goes back to RO. On power down, EC jumps to RW and the AP stays in G3. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I222c5f6c729901b455888432cd01fe7e67b4aa7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3257770 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* power: Combine chipset_reset_reason and chipset_shutdown_reasonTom Hughes2021-11-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | When building with clang, it warns: power/amd_x86.c:59:18: error: implicit conversion from enumeration type 'enum chipset_reset_reason' to different enumeration type 'enum chipset_shutdown_reason' [-Werror,-Wenum-conversion] report_ap_reset(reason); The two enums are already set up so that they don't overlap, so just combine them into a single enum. BRANCH=none BUG=b:172020503 TEST=./util/compare_build.sh -b all -j 120 => All boards match, except: burnet cerise damu fennel jacuzzi juniper kakadu kappa katsu kodama krane kukui makomo stern willow Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I47620e59e02a84c04dde4469f36ad37dccbcd9e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3238250 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* qcom: Deprecate WARM_RESET handlings in SC7280Wai-Hong Tam2021-09-171-10/+15
| | | | | | | | | | | | | | | | Add guards to limit the long warm_reset handling only in SC7180, such that the future generations, like SC7280, don't have it. BRANCH=None BUG=b:187980397, b:187098628 TEST=Built all the Chromium EC images and Zephyr EC images. TEST=Modify a board to use the SC7280 CONFIG. Change-Id: Iad011f58522641cde2f469f71114473476c53d67 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893070 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* herobrine: Always enable the 5V railWai-Hong Tam2021-09-161-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare the next hardware revision. It has a PPC chip which requires 5V rail in S5. The 5V rail enable pin should be turned on whenever the EC is powered. Since the existing 5V rail enabling is done inside the qcom power sequence. Trogdor and Herobrine both shares this qcom power sequence. For Trogdor, this CL moves the 5V rail enabling from the qcom power sequence to the board level hook. For Herobrine, this CL updates the GPIO name and modifies the default level to HIGH. The CONFIG of 5V control should be disabled. As no board level hook to modify the 5V rail, the 5V is always on. BRANCH=None BUG=b:199804198 TEST=Booted both Zephyr and EC-OS images on Herobrine. Checked the 5V rail is enabled in S0 and S5. TEST=Booted both Zephyr and EC-OS images on Lazor. Checked the 5V rail is enabled in S0 and disabled in S5. Change-Id: Ifa98ee0c4e970dd89952e94cc6a0e289798e6a57 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163918 Reviewed-by: Keith Short <keithshort@chromium.org>
* qcom: Increase the delay between powering on the switchcap and the PMICWai-Hong Tam2021-08-121-2/+5
| | | | | | | | | | | | | | Measured the delay on Herobrine IOB + Trogdor MLB is ~200ms. Pick a larger delay 300ms. BRANCH=None BUG=None TEST=Booted AP successfully. Change-Id: Iaba20995e23c2f2041601c9fc17f35a1cb9300c4 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3083184 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* qcom: Move enabling/disabling 3.3V rail to the board levelWai-Hong Tam2021-07-141-4/+2
| | | | | | | | | | | | | | | | | | | | | | In the next generation, the 3.3V rail is not controlled by EC anymore. Move the control logic to the board level. The 3.3V rail should be enabled before the power on sequence, so use the hook chipset pre-init hook. Disable it on the chipset shutdown complete hook. For Trogdor, do it on the baseboard level. For Herobrine, do it on the board level, Herobrine-NPCX7, only. Herobrine-NPCX9 and other future boards don't need it. BRANCH=None BUG=b:187980397, b:192253134 TEST=Tested the Lazor EC-OS and Zephyr images and booted to AP. TEST=Tested the Herobrine-NPCX7 EC-OS and Zephyr images and booted to AP. Change-Id: I7e025123f8997629b9b0db46e30ea9c716bdbf99 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993213 Reviewed-by: Keith Short <keithshort@chromium.org>
* qcom: Deprecate AP_RST_REQ in SC7280Wai-Hong Tam2021-07-131-0/+2
| | | | | | | | | | | | | | | Add guards to deprecate the AP_RST_REQ power signal. The AP_RST_REQ is power signal only valid in SC7180. BRANCH=None BUG=b:187980397, b:148246695 TEST=Built all the Chromium EC images and Zephyr EC images. TEST=Modify a board to use the SC7280 CONFIG. Change-Id: I0b12889dd2549665d2c2d6bfc06fddd9b9357175 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993210 Reviewed-by: Keith Short <keithshort@chromium.org>
* qcom: Enable AP_RST_L interrupt on sysjump to RWWai-Hong Tam2021-06-221-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | The AP_RST_L interrupt is default disabled. It avoids unnecessary power signal messages in G3/S5 as the signal is floating (no power). The interrupt is then enabled during S5->S3 and disabled during S3->S5. However, when sysjump to RW, the interrupt is back to default disabled. This causes the `apreset` command fails to sample the AP_RST_L signal and forces to execute a cold reboot sequence. We should enable AP_RST_L interrupt when the initial power state is S0, the sysjump to RW scenario. BRANCH=Trogdor BUG=b:185551931 TEST=Tested on Coachz, reboot EC, sysjump to RW, perform `apreset` which executes a warm AP reboot. Change-Id: I7eae5f2bcacfebeeee529aa7ad96409cfe9122e9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977573 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* qcom: Deprecate QSIP_ON, a load switch enableWai-Hong Tam2021-05-221-9/+0
| | | | | | | | | | | | | | | | | | QSIP_ON is only valid on Trogdor rev-1. It controls the load switch enable. The load switch is used for experiments but leaving it off consumes power. On other Trogdor boards, QSIP_ON is just NC. Since we no longer support Trogdor rev-1, deprecate the control in the power sequence. BRANCH=None BUG=b:159999589 TEST=Build the Trogdor image. Change-Id: Ie5f04ed3de5f14ba32a92fa8223e8769bb97cf82 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2911505 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* qcom: Generalize the power signals and functions for SC7x80Wai-Hong Tam2021-05-171-14/+14
| | | | | | | | | | | | | Rename the power signals from SC7180 to SC7X80. Rename the functions. BRANCH=None BUG=b:187980397 TEST=Built all the Chromium EC images and Zephyr EC images. Change-Id: Icf932b5cc892dcc9e57bff10bdd6db8d532f24a9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893485 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* qcom: Generalize the filenames for Qualcomm chipsetsWai-Hong Tam2021-05-171-0/+1176
The existing SC7180 power sequence can be reused on its next generation. Generalize the filenames, sc7180.c/sc7180.h to qcom.c/qcom.h. BRANCH=None BUG=b:187980397 TEST=Built all the Chromium EC images and Zephyr EC images. Change-Id: Ie04218ef0a12a4e8aa2db353040c5c39c533ae6f Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893484 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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