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* reset: Log the reason for AP resets.Jonathan Brandmeyer2018-07-261-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provides a new EC host command 'uptime info' which gathers up some information which may be useful for debugging spurious resets on the AP (was the EC reset recently? Why was the EC reset? If the EC reset the AP, why did it do so?, etc.). Provide ectool support for the same. Example results of `ectool uptimeinfo`: ``` localhost ~ # ectool uptimeinfo EC uptime: 475.368 seconds AP resets since EC boot: 2 Most recent AP reset causes: 315.903: reset: console command 363.507: reset: keyboard warm reboot EC reset flags at last EC boot: reset-pin | sysjump ``` BRANCH=none TEST=Perform some `apreset` commands from the EC console and observe their side-effects via the `ectool uptimeinfo` command on the AP side. Test sequences include no-resets through 5 resets, observing that the ring buffer handling was correct. BUG=b:110788201, b:79529789 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Change-Id: I0bf29d69de471c64f905ee8aa070b15b4f34f2ba Reviewed-on: https://chromium-review.googlesource.com/1139028 Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* power/rk3399: Check aborted suspend for s0s3_usb_wake_power_seqPhilip Chen2018-04-201-1/+5
| | | | | | | | | | | | | BUG=b:78321971 BRANCH=scarlet TEST=build kevin and scarlet Change-Id: I9e0c842cd8f4186147fa8e6d001b1c21ddad7e89 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1022746 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Derek Basehore <dbasehore@chromium.org>
* Code cleanup: Remove cold reset logicVijay Hiremath2018-04-031-3/+2
| | | | | | | | | | | | | | | | | | | | | Majority of the chipsets do not have a dedicated GPIO to trigger AP cold reset. Current code either ignores cold reset or does a warm reset instead or have a work around to put AP in S5 and then bring back to S0. In order to avoid the confusion, removed the cold reset logic and only apreset is used hence forth. BUG=b:72426192 BRANCH=none TEST=make buildall -j Manually tested on GLKRVP, apreset EC command can reset AP. Change-Id: Ie32d34f2f327ff1b61b32a4d874250dce024cf35 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/991052 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* scarlet: shutdown PP900_S0 power rail when S3Lin Huang2018-02-091-2/+2
| | | | | | | | | | | | | | | | | | | we need to shutdown PP900_S0 power rail when S3 to save power consumption, let's do it. BUG=b:62644399 BRANCH=none TEST=run suspend_stress_test, it pass 1000 cycles CQ-DEPEND=CL:890228 Change-Id: I366effe9d2a99cb608069dd5d599171d32a9b4ce Signed-off-by: Lin Huang <hl@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/841902 Commit-Ready: Brian Norris <briannorris@chromium.org> Tested-by: Derek Basehore <dbasehore@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Derek Basehore <dbasehore@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org>
* scarlet: Assert SYS_RST_L in S5Philip Chen2018-01-231-1/+11
| | | | | | | | | | | | | | | | | | | | | To support CR50 deep sleep mode: In up-sequence, SYS_RST_L needs to remain asserted on the transition to S5 and then deasserted on the transition to S0; In down-sequence, SYS_RST_L needs to be asserted on the transition to S5. This only affects Scarlet. BUG=b:35647982 BRANCH=none TEST=minitor SYS_RST_L pin to confirm it is toggled right Change-Id: Ic73d39c531f9d28b2087a23d58613e98ec80dbd2 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/866115 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power/rk3399: Change power-off sequence for KD panelPhilip Chen2018-01-161-1/+1
| | | | | | | | | | | | | | | | | We should turn off PP3300_S0 and then PP1800_S0 to meet KD panel spec. PP3300_S0 has to be on in S3_WoUSB, so PP1800_S0 also has to be on - let's move PP1800_S0_EN to s0s3_usb_wake_power_seq. BUG=b:71057948 BRANCH=none TEST='suspend_stress_test' for 10+ cycles without seeing things go wrong Change-Id: Ic44411062b4c9e857b9f8ca6565550ba8bd2f950 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/862254 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* power/rk3399: Fix the power sequence length passed to power_seq_run()Philip Chen2017-12-201-2/+2
| | | | | | | | | BUG=b:63037490 BRANCH=none TEST=build scarlet Change-Id: I80b068a7846037f43e7b385cf8e2ee0b08f42b15 Signed-off-by: Philip Chen <philipchen@google.com>
* cleanup: power/rk3399: Remove unused power sequencePhilip Chen2017-12-201-45/+0
| | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I87c7a6274cbcb355a71987b26e8f092fbdbe8fa0 Signed-off-by: Philip Chen <philipchen@google.com>
* power/rk3399: Poll IN_PGOOD_S0 on up-sequenceShawn Nematbakhsh2017-12-121-4/+23
| | | | | | | | | | | | | | | | | | | | | | Waiting out HOOK_TICK_INTERVAL for a non-interrupt power signal can cause boot delays of up to 500ms, which can lead to dropped host commands and other bad side effects. Poll IN_PGOOD_S0 when sequencing up to reduce the minimum delay to 5ms. BUG=b:70390178 BRANCH=None TEST=Run "reboot" on EC console, check timestamp of S0 transition print: [0.332974 power state 3 = S0, in 0x000f] Compare to pre-patch: [0.692799 power state 3 = S0, in 0x000f] Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I4b8891f75d896b1ae47d8f12ed07581f20b6ae7c Reviewed-on: https://chromium-review.googlesource.com/822594 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* power: Add flags parameter to power_signal_infoFurquan Shaikh2017-10-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | Replace structure member "level" in power_signal_info with "flags". "level" has been used on all boards to indicate active-high or active-low levels. Addition of "flags" allows easy extension of power_signal_info structure to define various flags that might be applicable to power signals (e.g. "level"). Going forward, additional flag will be added in follow-up CLs. Also, provide a helper function power_signal_is_asserted that checks the actual level of a signal and compares it to the flags level to identify if a power signal is asserted. BUG=b:65421825 BRANCH=None TEST=make -j buildall Change-Id: Iacaabd1185b347c17b5159f05520731505b824b8 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/679979 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* power/rk3399: fixes pp900_s0 for power timing v2Caesar Wang2017-09-111-0/+2
| | | | | | | | | | | | | | | | | | Due to the power timing v2 had defined the S3_USB_WAKE, We need enable the PP900_S0 for power timing v2. Fixes: 098bde322f567 ("power/rk3399: Don't turn off the pp900_s0 during s3") CQ-DEPEND=CL:647053 BRANCH=none BUG=b:65270978 TEST=build and bring up on scarlet board Change-Id: If8aedc03d54e9f4953ab994da426272137440d36 Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/656858 Tested-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* power/rk3399: Don't turn off the pp900_s0 during s3Caesar Wang2017-09-071-4/+3
| | | | | | | | | | | | | | | The PP900_LOGIC can't be disabled for now, maybe we will disable it in later, since the ATF hadn't done it. In order to the suspend to resume function is fine, let's keep it first. BRANCH=none BUG=b:65270978 TEST=build and run the S2R stress tests on nefario board Change-Id: I932ee2b7667115df7516729f60faa71598f36d93 Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/647053 Reviewed-by: Shawn N <shawnn@chromium.org>
* power/rk3399: Fix wrong return state when POWER_S3S0 failedJeffy Chen2017-08-231-1/+1
| | | | | | | | | | | | | | | | | Currently we are returning POWER_S3S0 when POWER_S3S0 failed, which would cause dead loop. Return POWER_S0S3 instead to avoid that. BUG=b:64886507 TEST=build and boot Change-Id: Ia6567ee6edd399c0eb39e88006436753fa303507 Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/625637 Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: Support non-INT power signal pinsPhilip Chen2017-08-171-0/+37
| | | | | | | | | | | | | | | | Optionally do polling for power signal pins which are not set as INT pins. BUG=b:64528567 BRANCH=none TEST=boot scarlet rev1 with a non-INT power signal pin Change-Id: I327753fcc0f1c6482c5f5eb3df28f67181b4eb62 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/611649 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* power/rk3399: Fix the control of SYS_RST_LPhilip Chen2017-08-101-0/+1
| | | | | | | | | | | | | | | | We should assert SYS_RST_L during S5-to-S3 transition no matter which CHIPSET_POWER_SEQ_VERSION it is. BUG=b:63408169 BRANCH=none TEST=build nefario Change-Id: Ic792f3735db290b8750e4acee0d82d3d75e5d443 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/609324 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* power/rk3399: Add CHIPSET_POWER_SEQ_VERSION == 3Philip Chen2017-07-291-11/+63
| | | | | | | | | | | | | | | | | | | This change is for Nefario rev0. Compared to version 1, we merge some pp900 power rails and disable power for some accessories in S3. Fixed the conflict with CL:572211. BUG=b:63408169 BRANCH=none TEST=build nefario Change-Id: Ibe67f86c8b51f7d1efd15d301692f63831a93876 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/588332 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* power/rk3399: Support USB wake in host-requested wakeable S3Shawn Nematbakhsh2017-07-281-6/+49
| | | | | | | | | | | | | | | | | | | | For boards with POWER_SEQUENCING_VERSION = 2 (and likely future versions), allow the host to request "wakeable suspend", which will leave rails enabled to allow wake-on-usb. BUG=b:63037490 BRANCH=kevin TEST=With subsequent commit, compile on scarlet w/ power sequencing version = 2. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Iaadd371b1d1509d185c8c8306b72760dcfe9989f Reviewed-on: https://chromium-review.googlesource.com/572211 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* power/rk3399: Assert SYS_RST_L from S5 to S3Philip Chen2017-07-201-1/+1
| | | | | | | | | | | | | | | | To fix a previous mistake and align the SYS_RST control for all rk3399 boards. BUG=b:62640322 BRANCH=none TEST=build scarlet with 'CHIPSET_POWER_SEQ_VERSION == 2' Change-Id: Iab91ea713c512afd10f15df38fbdb2dd6c62cb23 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/578306 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power/rk3399: Fix the new power sequencing to support new boardstabilize-9756.BPhilip Chen2017-07-171-3/+6
| | | | | | | | | | | | | | | BUG=b:62640322, b:62269890 BRANCH=none TEST=build scarlet with POWER_SEQUENCING_VERSION == 2 && CHIP == stm32 Change-Id: I314b21a909324a7d4666569525d9daddd300abdb Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/572338 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power/rk3399: Add a new power sequencingPhilip Chen2017-07-131-6/+51
| | | | | | | | | | | | | | | | | | This change is for Scarlet rev1. BUG=b:62640322 BRANCH=none TEST= 1) build Scarlet with 'CHIPSET_POWER_SEQ_VERSION == 2' successfully 2) build Kevin (CHIPSET_POWER_SEQ_VERSION == 0), and verify Kevin still boots Change-Id: I084a7b51fb1fdd8b6d50aa06189f34054162fc9a Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/568224 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power/rk3399: Table-based power sequencingPhilip Chen2017-06-221-76/+107
| | | | | | | | | | | | | | | | | We need to refactor power/rk3399.c to make it more flexible to support different power sequences for upcoming follower boards. BUG=b:62640322 BRANCH=none TEST=manaully test on scarlet and kevin: S0->S3->S0 and S0->S3->S5->G3->S5->S3->S0 work. Change-Id: I70cdcbaba046bfab4fe832eca58f30524e99e6de Reviewed-on: https://chromium-review.googlesource.com/540783 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* scarlet: modify power-on sequencephilipchen2017-06-081-0/+12
| | | | | | | | | | | | | | | | | | | Merge PP900_USB_EN, PP900_PLL_EN, and PP900_PMU_EN. Add a new config flag to enable different power-on sequences on one SOC. BUG=chrome-os-partner:62207, b:62307687 BRANCH=gru TEST=build kevin/gru/scarlet Change-Id: Iec3082384aa321636c59169b2bc55f773463f3d0 Reviewed-on: https://chromium-review.googlesource.com/434158 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/524979 Commit-Ready: Philip Chen <philipchen@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* power: rk3399: Wake from S3 on power button press rather than shutdownShawn Nematbakhsh2016-12-011-7/+1
| | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:58599 BRANCH=gru TEST=Boot kevin, go to S3, verify power button wakes. Hold power button in S3, verify device wakes and then shuts down. Go to S3, close lid, press power button, and verify no wake occurs. Change-Id: I4fa2e4967babc18cea9b5ffc7cec264b6f2fa8e3 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/399518 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> (cherry picked from commit 97bdf83b41834c072c5d1be516c8186c7911cee3) Reviewed-on: https://chromium-review.googlesource.com/415489 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Use longer SYS_RST hold time on chipset resetShawn Nematbakhsh2016-12-011-1/+5
| | | | | | | | | | | | | | | | | BUG=chrome-os-partner:57990 BRANCH=gru TEST=On kevin, verify `apreset` and kernel panic cause successful AP reset. Change-Id: Ic5ad2fd2d2d08ae32a60314e30f4cdff061da164 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/395533 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 8fb0dedd8daebeca3757bc341d0a5355d3b26ba5) Reviewed-on: https://chromium-review.googlesource.com/396136 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* kevin: Add Sensor in S3, disable keyboard wakeup in tablet mode.Gwendal Grignou2016-11-041-6/+6
| | | | | | | | | | | | | | | | | | | | Let sensor be powered on in S3. It is useful for Android and if we want to disable keyboard wakeup based on lid angle. Allow EC to disable touchpad and not send keyboard events when lid angle is greater than 180. BUG=chrome-os-partner:57510,chromium:620633 BRANCH=gru TEST=In S3, check the sensors are readable. Check that when in S3 and lid angle is < 180 EC sends keyboard events. Check that when in S3 and lid angle is > 180 EC does not send keyboard events. Change-Id: I4e7959ed37bc5dfdf9c105ecae94c314b253d77f Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/406739 Commit-Ready: Gwendal Grignou <gwendal@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* power: rk3399: Decrease max. latency for aborted suspendShawn Nematbakhsh2016-10-281-20/+20
| | | | | | | | | | | | | | | | Make several calls to msleep() rather than one single call. BUG=chrome-os-partner:58474 BRANCH=gru TEST=S/R stress test on kevin. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Icdc8f221c51519e0f2b95d273aa0523ea3a4eeee Reviewed-on: https://chromium-review.googlesource.com/401930 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403460 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Adjust power-down sequencing delaysShawn Nematbakhsh2016-10-281-12/+10
| | | | | | | | | | | | | | BUG=chrome-os-partner:58474 BRANCH=gru TEST=suspend_stress_test on kevin for 50 cycles. Change-Id: Ice721e04c6d4389520f40c4ca72f5bec0e1bdb5b Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/399992 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403459 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org>
* power: rk3399: turn off the center logic in s3Caesar Wang2016-10-271-5/+6
| | | | | | | | | | | | | CQ-DEPEND=CL:386537 BUG=chrome-os-partner:54291 TEST=turn off the center-logic BRANCH=None Change-Id: I73577e15cc0a8474d8eb2ed1a48f5aba59e54c6a Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/381158 Reviewed-by: Catherine Xu <caxu@google.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Debounce PGOOD_SYS signalShawn Nematbakhsh2016-10-171-2/+4
| | | | | | | | | | | | | | | | | | | | | | PGOOD_SYS may glitch for a period not to exceed 1ms. When PGOOD_SYS or PGOOD_AP are deasserted, wait for up to 100ms for both signals return before transitioning out of S0. BUG=chrome-os-partner:56822 BRANCH=gru TEST=Manual on kevin, boot device and verify it remains in S0 without spurious transitions to S3. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I95ccae54fc5939c835f00dc9b7cf88b9d0553c11 Reviewed-on: https://chromium-review.googlesource.com/393148 Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit b867d3fc9dea04ac65f5288fb99d3ed65c127644) Reviewed-on: https://chromium-review.googlesource.com/396139 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Enable PP900_PCIE earlier to prevent leakageShawn Nematbakhsh2016-09-301-2/+2
| | | | | | | | | | | | | | | | | | Enable PP90_PCIE along with PPVAR_LOGIC and PP900_AP to avoid leakage. BUG=chrome-os-partner:57952 BRANCH=Gru TEST=Verify kevin powers up / down successfully. Change-Id: I6fa47edcdde482d3fa2f249cfdff6e060a445f42 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/390896 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit b41006ba84bc86e453c241296309fadf9a864032) Reviewed-on: https://chromium-review.googlesource.com/391037 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Print RTC when resetting chipset.Aseda Aboagye2016-09-231-0/+3
| | | | | | | | | | | | | | | | | | In order to help correlate EC logs with those from the kernel, it was suggested that the EC could periodically print the RTC time. This commit prints out the RTC time when a chipset reset is requested. BUG=chrome-os-partner:57731 BRANCH=gru TEST=Build and flash kevin. Trigger watchdog from kernel and verify that RTC time is printed when the chipset is reset. Change-Id: Idc9a815c3337f720d41d16e0d844b4c1ea6728d8 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/388857 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Minimize resume latency on short suspendShawn Nematbakhsh2016-09-081-0/+25
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:56605 BRANCH=None TEST=Manual on kevin, modify code to force CHECK_ABORTED_SUSPEND() condition to be true for each respective case, verify AP resumes successfully. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ib3ec3c287c14ea2b9b410171a173c38c9385a90f Reviewed-on: https://chromium-review.googlesource.com/378078 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* power: rk3399: Hold SYS_RST low before powering on P1.8_PMUShawn Nematbakhsh2016-08-291-8/+12
| | | | | | | | | | | | | | | | | | | Holding SYS_RST low will keep the TPM in reset, and prevent a reset-too-soon-after-power-on case that put the TPM into a bad state. BUG=chrome-os-partner:56414 BRANCH=None TEST=Manual on kevin rev5, verify board still seqences from G3->S0 and back, S0->S5 and back, S0->S3 and back. Change-Id: I07671079deedb757314679608d848b1620aa67d6 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374899 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Catherine Xu <caxu@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
* power: rk3399: Debounce PGOOD_AP signalShawn Nematbakhsh2016-08-251-3/+28
| | | | | | | | | | | | | | | | | PGOOD_AP may go low for a period < 100ms during regulator output voltage transitions, so ignore such pulses. BRANCH=None BUG=chrome-os-partner:54814 TEST=On kevin, verify suspend / resume succeeds for 10 cycles. Change-Id: I5b6240a570472e1ea74de6e5f2341472ea7afe6b Reviewed-on: https://chromium-review.googlesource.com/374524 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Shunqian Zheng <zhengsq@rock-chips.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* rk3399: Remove useless calls to wireless_set_state()Shawn Nematbakhsh2016-08-241-17/+0
| | | | | | | | | | | | | | | | | rk3399 doesn't use AP-controlled wireless power state and CONFIG_WIRELESS isn't defined, so wireless_set_set() is in fact an empty useless function. BUG=None BRANCH=None TEST=Verify basic EC functionality on Kevin. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6e3631012ca1f356555a847793050ebdef8eee52 Reviewed-on: https://chromium-review.googlesource.com/373643 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* power: rk3399: Implement latest power sequencingShawn Nematbakhsh2016-08-241-33/+40
| | | | | | | | | | | | | | BUG=chrome-os-partner:55981,chrome-os-partner:56105 BRANCH=None TEST=Verify kevin rev5 sequences up from S5, down to S3, and back to S0. Change-Id: I65b73e4a0a46c631c6e40f154cf92810f5aabb72 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/366951 Commit-Ready: Derek Basehore <dbasehore@chromium.org> Tested-by: Catherine Xu <caxu@google.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Derek Basehore <dbasehore@chromium.org>
* kevin: increase the delay in chipset_resetMary Ruthven2016-07-281-1/+1
| | | | | | | | | | | | | | | | | Cr50 has sys_rst_l as a wake source, but it can't tell which pin woke it on resume. To know the source it has to check the value of the pin on resume. This change makes the delay long enough for Cr50 to resume and check that sys_rst_is asserted. BUG=chrome-os-partner:55674 BUG=b:30308276 BRANCH=none TEST=enable sleep on cr50 and verify apreset still reset it Change-Id: I8e088c5f13a4222142161d8b79550dfc6eb529d6 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/364170 Reviewed-by: Shawn N <shawnn@chromium.org>
* rk3399: Start 'force shutdown' timer on initial power pressShawn Nematbakhsh2016-07-261-5/+6
| | | | | | | | | | | | | | | | | | On a power press that will bring the system to S0, start our 8 sec timeout in case the power button is never released. BUG=chrome-os-partner:55666 BRANCH=None TEST=Press and hold power button on kevin to bring device to S0, verify device boots in normal mode and powers down ~8 seconds after initial press. Change-Id: I1cbb52974bcc09d23a130df13815cee07968467a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/363592 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* rk3399: Transition to / from S3 based upon GPIO_AP_EC_S3_S0_LShawn Nematbakhsh2016-07-211-5/+18
| | | | | | | | | | | | | | | | BRANCH=None TEST=Set GPIO_AP_EC_S3_S0_L high from sysfs, verify EC power state machine enters S3. BUG=chrome-os-partner:54328 CQ-DEPEND=CL:*270114 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I0fbd49775c245f3d747ddb46801ed89085829e12 Reviewed-on: https://chromium-review.googlesource.com/352651 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* rk3399: kevin: Inhibit booting w/ insufficient pwrAseda Aboagye2016-07-181-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | Before, as soon as the EC started booting, it would unconditionally boot the AP (unless explicitly told not to. ie: "reboot ap-off"). However, we weren't waiting for our power to settle which was causing some brownouts. This would happen when trying to boot without the battery. This commit causes the EC to inhibit powering on the AP until we have sufficient power. BUG=chrome-os-partner:55289 BRANCH=None TEST=Flash EVT2; verify can boot normally. TEST=Remove battery and insert charger. Verify that DUT can boot up. TEST=Insert drained battery. Verify power on is inhbited. Plug in charger and verify that DUT can power on. Change-Id: Ifb40766fcc1d330674ec39de6d81174f92b6d658 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/361005 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Control power state properly on power button / lid toggleShawn Nematbakhsh2016-06-241-10/+45
| | | | | | | | | | | | | | | | | | | | | | | | - Power up the AP automatically on initial EC power-on. - In S0, wait for 8s power button hold before powering down. - In S3 and lower, power down immediately on power press. - In G3 / S5, power up on lid open. BUG=chrome-os-partner:54582,chrome-os-partner:54511 BRANCH=None TEST=Manual on gru. Verify the following: - AP powers up when battery initially attached. - `reboot` powers up AP after EC reset. - `reboot ap-off` doesn't power up AP. - `apshutdown` + `lidclose` + `lidopen` causes AP power-up. - Holding power for 4s in S0 does not change power state. - Holding power for 8s in S0 causes AP power down. Change-Id: I588056549a972212c28b9aa6a83fe2e0b179baa9 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/355650 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* gru/kevin: Turn PP1800_PMU on earlier in sequenceDavid Schneider2016-06-141-2/+2
| | | | | | | | | | | | | | | PP1800_PMU impacts the initial centerlogic voltage due to DVS circuitry. Since there's no other sequencing dependency, turn it on earlier. This fixes centerlogic from initially starting too high (1.5V). BUG=none BRANCH=none TEST=Watch PPVAR_CENTERLOGIC and confirm that it starts at the target voltage Change-Id: Icac076a7e8aef978401452a98d9f6bc8b373d94f Signed-off-by: David Schneider <dnschneid@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/352247 Reviewed-by: Shawn N <shawnn@chromium.org>
* gru: Enable charging of USB-A devices in S3Shawn Nematbakhsh2016-06-141-15/+0
| | | | | | | | | | | | | | | | | Leave USB-A charging enabled in S3, and move gru-specific code into board hooks, out of the power state driver. BUG=chrome-os-partner:54159 BRANCH=None TEST=Manual on gru. Verify USB-A enable GPIOs are asserted in S0 and deasserted in G3. Change-Id: Icadeb771226dd0fda4ae96fdde9b3984d87fdd15 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/351670 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* power: rk3399: Add power-down sequencingShawn Nematbakhsh2016-06-141-51/+37
| | | | | | | | | | | | | | | | | Power-down sequence in reverse order of power-up, with delays extended to 10ms, to allow rails extra time to decay. BUG=chrome-os-partner:54159 BRANCH=None TEST=Manual on gru. Verify repeated `powerbtn` commands on console boot + power-down the SOC. Change-Id: I2e8fb39f8f900e56deef6b386bae1c336aa1f963 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/351520 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* gru: Initial mainboard commitShawn Nematbakhsh2016-05-041-0/+15
| | | | | | | | | | | | | | | | Clone of kevin w/ minor GPIO / LED changes. BUG=chrome-os-partner:52736 BRANCH=None TEST=Verify image boots + sequences on kevin p1. Change-Id: I7d3f3ce97a8b080516b635a3d2b7bc3c6515c6d9 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/340542 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* rk3399: Set power state based on input signalsShawn Nematbakhsh2016-05-041-9/+49
| | | | | | | | | | | | | | | | | | | | | Use input signals to verify power state and determine power state after sysjump. BUG=chrome-os-partner:52878 BRANCH=None TEST=Manual on kevin. - Verify AP powers up on 'powerbtn'. - AP shuts down on 'apshutdown'. - AP re-powers / resets on 'powerbtn' + 'apreset'. - AP doesn't shutdown on 'sysjump rw' while in S0. Change-Id: Id24feb0f8490aa7cb73c46178085ff2e46f8d0a6 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/341704 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* kevin: GPIO changes for new proto buildShawn Nematbakhsh2016-04-291-6/+3
| | | | | | | | | | | | | BUG=chrome-os-partner:52171 TEST=Verify old kevin boards still boot + power sequence. BRANCH=None Change-Id: Iacc02beba05ef3e80ffa59aa7fc5718c12bae20c Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/338043 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power/rk3399: Implement chipset reset / shutdown routinesShawn Nematbakhsh2016-04-141-8/+15
| | | | | | | | | | | | | | | | | Implement warm reset and force shutdown routines, which are called from other modules. BUG=chrome-os-partner:51926, chrome-os-partner:51923 BRANCH=None TEST=Verify 'apshutdown' on EC console goes to G3. Verify 'apreset' causes AP reset while staying in S0. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ifb479287f87f31ac49e007c337cc0c24a79898e6 Reviewed-on: https://chromium-review.googlesource.com/338923 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* power: rk3399: Add power down sequencingShawn Nematbakhsh2016-03-291-9/+34
| | | | | | | | | | | | | | | | Add simple power down control for rk3399. BUG=chrome-os-partner:51722 TEST=Verify power button powers up SOC. Verify next power button press powers down SOC. BRANCH=None Change-Id: Ibf4c9c3cb155b59ca7f2b6feb4f51ff173f407c7 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/335531 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* power: Add support for rk3399 power sequencingShawn Nematbakhsh2016-03-141-0/+212
Add power-up sequencing for rk3399. This is very much a WIP and the sequence will surely change greatly. BUG=chrome-os-partner:50819 BRANCH=None TEST=`make buildall -j` Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I3bacdc8516cfe081411032d55374dd1ab21b2d9d Reviewed-on: https://chromium-review.googlesource.com/331658 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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