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* sc7180: Notify RESUME hooks in S3S0 if boot from offWai-Hong Tam2020-09-031-24/+23
| | | | | | | | | | | | | | | | | | | | | After enabling the suspend hang detection, the RESUME hooks are deferred to S0. When the kernel sets the host sleep event to flag the resume completion, EC notifies the RESUME hooks. However, when it boots from an off state, G3 or S5, the kernel won't set this host sleep event. Should explicitly notify the RESUME hooks in the S3S0 state. The change also renames the flag boot_from_g3 to boot_from_off and carries it forward to S3S0; and renames the flag shutdown_from_s0 to shutdown_from_on and carries it forward to S3S5. BRANCH=None BUG=b:148149387, b:167155164 TEST=Verified the RESUME hooks are called when boot from S5. Change-Id: I48ee09ad66e53363e7a20d9602b37571177ac300 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391202 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* sc7180: Decouple the switchcap control from the power sequenceWai-Hong Tam2020-09-021-4/+4
| | | | | | | | | | | | | | | | | Currently, SC7180 power sequence is tightly coupled with a single switchcap part, i.e. DA9313. Should decouple the switchcap control from the power sequence, such that more different switchcap parts can be supported. BRANCH=None BUG=b:163867792 TEST=Built the affect images and booted into kernel. Change-Id: I7f63cd22bbc308672c40a734be4f6dfc80e07158 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2386480 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* asurada: keep PP5000_A on at G3Ting Shen2020-08-281-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | In current EC implementation, EC turns off PP5000_A in G3. Since PPC is powered by PP5000_A, it needs special logic to handle the re-power and re-initialization. See b:154775121 for more discussion. To simplify the logic, change the behavior to turn PP5000_A off only when hibernate, so we won't need to worry about re-initialize PPC anymore (resume from hibernate is a reboot, so it's also covered here). BUG=b:154775121 TEST=1) Run the test script in CL:2169443 2) Verify PD is functional whenever EC is awake. BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I07c03f9a8c0b77012d1284a283ce489e54b1a058 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378940 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* Revert "power: Don't boot after waking up from hibernation"Daisuke Nojiri2020-08-181-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 8db6eb89540a0ca72e29633ffbfd1eac10d6ad6a. Reason for revert: See chromium:1073960 Original change's description: > power: Don't boot after waking up from hibernation > > When a device shuts down and is idle for 60 mins (configurable), EC > enters hibernation. When an AC adapter is plugged, the system boots. > This is not expected behavior and not consistent with the behavior > that the system stays off on AC plug-in before hibernation. > > This patch fixes the above inconsistency by storing AP_OFF flag before > entering hibernation after 60 mins idle in S5. > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > > BUG=chromium:1073960 > BRANCH=none > TEST=Verified Bloog stays off after waking up from hibernation on > AC plug-in. > > Change-Id: I097bee97164284dd4c35f8bf9389c76319fd676a > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176555 > Reviewed-by: Gwendal Grignou <gwendal@chromium.org> > Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> > Tested-by: Daisuke Nojiri <dnojiri@chromium.org> > Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> Bug: chromium:1073960 Change-Id: I2792dd6d868118ffcba533a3cdb5195cc7d71b76 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363099 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* Revert "system: Clear AP_IDLE when waking up from hibernation by AC"Daisuke Nojiri2020-08-181-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4aacf83506fd959d1341e29b664f6e4fe97824cb. Reason for revert: See chromium:1073960 Original change's description: > system: Clear AP_IDLE when waking up from hibernation by AC > > Currently, AP_IDLE is set when EC is left idle in G3. This makes the AP > stay off after EC wakes up from hibernation (for any wake-up source). > This makes a board require another power button press to boot the > system from hibernation. > > This change makes RO clear AP_IDLE unless AC is present. When AC is > present, EC doesn't hibernate. So, AC presence infers the EC woke > up from hibernation by AC. That is, if the system wakes up by a power > button press, AP_IDLE is cleared and AP will be turned on (unless it's > overwritten by AP_OFF). > > Tested as follows on Trembyle: > 1. Put DUT in hibernation. > 2. Wake up DUT and observe: > a. When waking up by power button, AP is turned on. > b. When waking up by lid open, AP is turned on. > c. When waking up by AC, AP is left idle. > > BUG=b:157077589, chromium:1073960 > BRANCH=none > TEST=See above. > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > Change-Id: Ie5020bbe50ad489f4e3010820681cc57ff51b941 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236589 Bug: b:157077589 Bug: chromium:1073960 Change-Id: Id92d0d3657a622338581cb111d3925cbc11bf168 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363080 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* sc7180: Increase the timeout of waiting enough powerWai-Hong Tam2020-08-181-1/+1
| | | | | | | | | | | | | | | | In a device without battery plugged, EC has to wait PD to negotiate to at least 7.5W. Some charger takes a bit longer to negotiate a PD contract and misses the timeout. AP won't autoboot. This CL increases the timeout. BRANCH=None BUG=b:165027088, b:150240129 TEST=Unplugged the battery, plugged a PD charger, and AP booted up. Change-Id: I775f87c2a7c25a3c160bd97d09bbbc1d617095b4 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360435 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* task: Change mutex_lock() assertEdward Hill2020-08-151-7/+2
| | | | | | | | | | | | | | | | | | | Instead of asserting that task_start() has not been called, just return without doing any locking. This avoids the need to fix every caller of mutex_lock() to check task_start_called(). BUG=b:164461158 BRANCH=none TEST=Esc+F3+Power enters recovery, does not assert. Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ic157d7e7041185a67f257f0f5710fd02e45cd77f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2357496 Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* sc7180: Don't neglect the delay in a forced shutdownWai-Hong Tam2020-08-131-3/+3
| | | | | | | | | | | | | | | | In a forced shutdown, it just waits the POWER_GOOD drop to low, but not wait the SYSTEM_POWER_ON_DELAY. If AP requests EC reboot at shutdown, EC reboots immediately right after turns off the switchcap. Better to delay a bit. BRANCH=None BUG=b:156981868, b:163613549 TEST=After switching from normal to dev mode, AP boots normally. Change-Id: Iae300aa03dd0a991f62742159613377fe2388760 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2352440 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* task: Fix mutex_lock() assert (reland)Edward Hill2020-08-121-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | mutex_lock() must not be used in interrupt context. Add an assert to catch this. Also assert task_start_called() since task ID is not valid before this. Also remove an old assert since comparing id with TASK_ID_INVALID doesn't make sense. Add check for task_start_called() for NPCX flash_lock, I2C port_mutex, pwr_5v_ctl_mtx, STM32 bkpdata_write_mutex. This was submitted CL:2309057, reverted CL:2323704, submitted CL:2335738, reverted CL:2341706. BUG=b:160975910 BRANCH=none TEST=boot AP, jump to RW Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I0aadf29d073f0d3d798432099bd024a058332412 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343450 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* sc7180: Cancel the power button timer during the power state transitionWai-Hong Tam2020-08-111-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | A timer is created in the check_for_power_off_event(), which waits for the power button long press. Should cancel the timer during the power state transition; otherwise, EC will crash. The S3 state calls the check_for_power_off_event() too. So cancel the timer during S3->S0 and S3->S5. BRANCH=None BUG=b:163367454 TEST=Checked the bug scenario: * In VT2, run powerd_dbus_suspend and EC transits the state to S3. * Press power button * EC transits the state to S0; no crash. TEST=Tested the normal shutdown case: * Hold the power button * After 8s, EC transits to S3 and then S5 after the power button is released. TEST=Tested the change in check_for_power_off_event(): * Hold the power button * In VT2, run "shutdown -H now" which makes POWER_GOOD drop * EC transits to S3 and then S5 after the power button is released Change-Id: Ia279e890954cf77f94ae8907a2782f94265c849a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2346600 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* sc7180: Fix the S3 state checkWai-Hong Tam2020-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Should use the CHIPSET_STATE_SUSPEND to check if it is in S3, instead of CHIPSET_STATE_STANDBY, which is actually the S0ix state. BRANCH=None BUG=b:148149387 TEST=Hached to make EC in S3 and then trigger AP warm reset. Noticed the the CHIPSET_RESET_HOOK triggered and entered the if clause. > [90.811712 power state 2 = S3, in 0x001c] [90.812383 power state 2 = S3, in 0x001d] [90.867572 power state 2 = S3, in 0x001e] [90.944061 power state 2 = S3, in 0x001c] [90.944957 power state 2 = S3, in 0x001d] [91.000530 power state 2 = S3, in 0x001e] [91.101117 power state 2 = S3, in 0x001c] [91.101785 power state 2 = S3, in 0x001d] [91.156711 power state 2 = S3, in 0x001e] [91.157318 Chipset reset: exit s3] [91.157659 Handle sleep: 0] 12 signal changes: 90.811621 +0.000000 PS_HOLD => 0 90.812012 +0.000391 AP_RST_L => 0 90.867371 +0.055359 AP_RST_L => 1 90.867483 +0.000112 PS_HOLD => 1 90.943970 +0.076487 PS_HOLD => 0 90.944357 +0.000387 AP_RST_L => 0 91.000328 +0.055971 AP_RST_L => 1 91.000441 +0.000113 PS_HOLD => 1 91.100809 +0.100368 PS_HOLD => 0 91.101183 +0.000374 AP_RST_L => 0 91.156510 +0.055327 AP_RST_L => 1 91.156623 +0.000113 PS_HOLD => 1 Change-Id: I8a3f2fec7e7c0ca784d5d742e5e9352fa019b18e Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2346601 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* sc7180: Monitor AP_RST_L from PMIC to notify HOOK_CHIPSET_RESETWai-Hong Tam2020-08-081-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | The HOOK_CHIPSET_RESET should be notified when the AP resets. In x86 platforms, EC monitors the LPC LRESET pin. This LRESET pin is asserted when the chipset resets. However, ARM platforms don't use LPC. We need another way to monitor AP reset. This CL modifies the SC7180 power sequence, to monitor the AP_RST_L signal from PMIC. PMIC uses the AP_RST_L to notify AP reset. A complete warm reset sequence will toggle the AP_RST_L signal 3 times. EC monitors the AP_RST_L signal and wait it transition 3 times to notify the HOOK_CHIPSET_RESET. In case, the AP_RST_L is not toggled 3 times, still notifies the hook but prints a warning message. BRANCH=None BUG=b:163078082 TEST=Checked the HOOK_CHIPSET_RESET is notified after AP warm reset. Change-Id: I4e7b0f0d266e01526deaf54afcdfd2ac1037b8f6 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343753 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* sc7180: Support the sleep failure detection to SC7180 power sequenceWai-Hong Tam2020-08-081-5/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This only adds the sleep failure detection support to SC7180 power sequence but not enable it yet. The board has to explicitly define the following CONFIG to enable this feature: * CONFIG_CHIPSET_RESUME_INIT_HOOK * CONFIG_POWER_SLEEP_FAILURE_DETECTION Without defining the CONFIGs, the only change is to disable/enable the AP_SUSPEND signal interrupt; the suspend/resume hooks are unchanged, i.e. not wait for the host sleep event. With defining the CONFIGs, the suspend failure detection is enabled. When AP_SUSPEND is deasserted, only the RESUME_INIT hook is triggered to initialize the SPI interface, such that EC can receive the host sleep event. The RESUME hook is delayed to be triggered until AP sends the resume event. If AP_SUSPEND becomes asserted before receiving the host event, will back to S3 and the SUSPEND_COMPLETE hook is triggered to disable the SPI interface. If no host event is received and no AP_SUSPEND assertion, a timeout happens and wake the AP with a HANG_DETECT event. BRANCH=None BUG=b:148149387 TEST=Tried the following scenaiors (the CONFIGs not defined): (1) On AP_SUSPEND assertion, SUSPEND hook triggered, go to S3; (2) On AP_SUSPEND deassertion, RESUME hook triggered, go to S0. Checked the follower CL for the configs defined. Change-Id: I28301921a4c85aab092cdc8af9d6ff4b1da7ec61 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321876 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* power: Move the sleep failure detection to a common libraryWai-Hong Tam2020-08-072-122/+143
| | | | | | | | | | | | | | | | Move the sleep failure detection logic from intel_x86 power sequence to a common library, i.e. host_sleep. This CL simply moves the code, without any logic change. BRANCH=None BUG=b:162083524 TEST=Build the hatch board. Change-Id: Ia3f70804ded8d80c4a079a36fbf1819c05a2090b Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321874 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* power/intel_x86: Abstract the chipset specific functionsWai-Hong Tam2020-08-071-21/+37
| | | | | | | | | | | | | | | | | This CL abstracts the chipset specific functions, that makes the hang detection logic clearer. The changes are like: * Set the sleep_notify variable through the call sleep_set_notify() * The chipset specific timeout handle is moved to a callback function. This callback is passed to sleep_start_suspend(). BRANCH=None BUG=b:162083524 TEST=Build the hatch board. Change-Id: Ib9462f1fecbd39d63607bb9f10d1994e54c9ac64 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2327837 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* power/intel_x86: Decouple LPC logic from sleep detectionWai-Hong Tam2020-08-051-13/+15
| | | | | | | | | | | | | | | | Move the LPC handling logic out of the sleep failure detection functions. For example, move the lpc_s0ix_suspend_clear_masks() to the first SUSPEND hook, move power_update_wake_mask() out of sleep_complete_resume(). BRANCH=None BUG=b:162083524 TEST=Build the hatch board. Change-Id: I16c4ed88e7cf40aabb9ce2d9ec95f7994dfe7efc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321873 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* ec: change usage of dummySam Hurst2020-08-051-1/+1
| | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the term "dummy" with inclusive alternatives. BUG=b:162781382 BRANCH=None TEST=make -j buildall `grep -ir dummy *` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* power/intel_x86: Generalize the sleep failure detection, not bound to S0ixWai-Hong Tam2020-08-041-69/+75
| | | | | | | | | | | | | | | | | | | This change prepares to separate the sleep failure detection out of intel_x86, such that other chipset power sequence can reuse the code. It only touches the naming. No logic changes. * Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION * Modify the function and variable names, to avoid S0ix * Modify the comment to more neutral BRANCH=None BUG=b:162083524 TEST=make buildall -j Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* Revert "power: Clear AP_IDLE when waking up by PB or LID"Daisuke Nojiri2020-08-011-24/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 27ee378bb78a299a0983379be83eb6d55860b4ae. Reason for revert: b/162508724 A wake-up source from hibernation needs to be determined only by RO. Reverting back to the original implementation: CL:2236589. Original change's description: > power: Clear AP_IDLE when waking up by PB or LID > > Currently, AP_IDLE is cleared when EC wakes up by the power button or > the lid open. > > This patch extends the logic from CONFIG_EXTPOWER_GPIO to > CONFIG_EXTPOWER so that the bug (chromium:1073960) can be also fixed > on the boards using non-GPIO method for extpower_is_present. > > Tested as follows on Trembyle: > 1. Put DUT in hibernation. > 2. Wake up DUT and observe: > a. When waking up by power button, AP is turned on. > b. When waking up by lid open, AP is turned on. > c. When waking up by AC, AP is left idle. > > BUG=b:157077589, chromium:1073960, b:159350276 > BRANCH=none > TEST=See above. > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > Change-Id: I944aaac036ce58659e81b7021e52a3291f31e951 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283946 > Reviewed-by: Jett Rink <jettrink@chromium.org> Bug: b:157077589 Bug: chromium:1073960 Bug: b:159350276 Bug: b:162508724 Change-Id: Iaf9d0af2ca8c48bbf2529c4ba05493837dd76287 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2333106 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* sc7180: Enable the load switch during AP power-onWai-Hong Tam2020-07-301-0/+9
| | | | | | | | | | | | | | | | | | | | The QSIP_ON GPIO controls the load switch enable. The load switch is redundant and used for experiments. But leaving it off consumes power. Should enable it during AP power-on and disable it during AP power-off, such that it doesn't waste power. Add the QSIP_ON GPIO to the trogdor board. It was added since rev-1 (rev-0 is NC). BRANCH=None BUG=b:159999589 TEST=Checked AP power-on and power-off. Change-Id: Ia1ef6a0c2285b5adcc53b717f7f310b15eb1d941 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2327632 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Jim Guerin <jguerin@google.com>
* sc7180: Add debug command to fake AP_SUSPEND signal to enter/exit S3Wai-Hong Tam2020-07-301-3/+45
| | | | | | | | | | | | | | | | The AP_SUSPEND signal doesn't work on ToT kernel. It needs more work. Introduce a way to fake the signal for testing. BRANCH=None BUG=b:148149387 TEST=Typing "fakesuspend on" in S0, transit into S3; then typing "fakesuspend off" in S3, transit into S0; then typing "fakesuspend reset", back to using AP_SUSPEND signal. Change-Id: I706b576a848f9875e8ce6bed4c71ea7e33dfc315 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324988 Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
* power/intel_x86: Add a config check for S0ixWai-Hong Tam2020-07-291-2/+0
| | | | | | | | | | | | | | | | | | The S0ix requires the CONFIG_POWER_TRACK_HOST_SLEEP_STATE enabled; otherwise, a compilation error happens. Add a config check for it and simplify some #ifdef clauses. BRANCH=None BUG=b:162083524 TEST=make buildall -j TEST=Removing the CONFIG_POWER_TRACK_HOST_SLEEP_STATE on hatch caused a fail. Change-Id: Ic685d1ca5d05d705fcf6bb43717fc05f6526274e Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321871 Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* sc7180: Allow the idle task to go into deep sleep in S3 or lowerWai-Hong Tam2020-07-291-2/+4
| | | | | | | | | | | | | | Move the enable_sleep(SLEEP_MASK_AP_RUN) call from S5S3 to S3S0, such that the idle task can go into deep sleep in S3. BRANCH=None BUG=b:148149387 TEST=Tried to trigger different states on the power sequence. Change-Id: I9f7ea0186547ea460b3a07d4e98cef0fa6c16b08 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321878 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* power/mt8183: reset EC if EC has jumped and AP rebootsEric Yilun Lin2020-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | Resets EC if EC has jumped before and we want to boot AP. In the normal flow, EC should stay at RW and reset itself and AP should request EC for bootblock when start booting. On some testing scenario, we might want to boot AP after RO->RW->RO transition, and in such case, AP won't be able to boot due to AP_SYS_RST_ODL been pulled down by the SLG, and SLG latches output until the next EC_RST_ODL. So in such test cases, we should reset the EC. BUG=b:161584167 TEST=boot AP; sysjump RO; apshutdown; powerbtn 1200; ensure AP boots BRANCH=kukui Change-Id: Ia4066f1764b83acf6835f344393dcad8c125d0e3 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2319494 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* ec: change usage of "sane" per inclusive languagePaul Fagerburg2020-07-222-2/+2
| | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the terms "sane", "sanity check", and similar with inclusive/non-stigmatizing alternatives. BUG=b:161832469 BRANCH=None TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows results only in third-party code or documentation. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169 Reviewed-by: Jett Rink <jettrink@chromium.org>
* sc7180: Support staying and leaving S3Wai-Hong Tam2020-07-221-3/+15
| | | | | | | | | | | | | | | | | | In the previous power state machine, S3 was just a transitional state between S0 <-> S5. This change supports staying and leaving S3, by checking the AP_SUSPEND signal. BRANCH=none BUG=b:148149387 TEST=Powered DUT on and off; verified transition to S0 and S5. TEST=Modified the AP_SUSPEND signal; verified transition to S3 and S0. Change-Id: I7978be31d05546c814d2588eaf1f4e1ac47638ce Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220833 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Commit-Queue: Alexandru M Stan <amstan@chromium.org>
* power: Clear AP_IDLE when waking up by PB or LIDDaisuke Nojiri2020-07-221-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, AP_IDLE is cleared when EC wakes up by the power button or the lid open. This patch extends the logic from CONFIG_EXTPOWER_GPIO to CONFIG_EXTPOWER so that the bug (chromium:1073960) can be also fixed on the boards using non-GPIO method for extpower_is_present. Tested as follows on Trembyle: 1. Put DUT in hibernation. 2. Wake up DUT and observe: a. When waking up by power button, AP is turned on. b. When waking up by lid open, AP is turned on. c. When waking up by AC, AP is left idle. BUG=b:157077589, chromium:1073960, b:159350276 BRANCH=none TEST=See above. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I944aaac036ce58659e81b7021e52a3291f31e951 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283946 Reviewed-by: Jett Rink <jettrink@chromium.org>
* power: Use a general name for PMIC_RESIN_L signal on sc7180 and sdm845Wai-Hong Tam2020-07-202-20/+20
| | | | | | | | | | | | | Don't bound to the PMIC part name. BRANCH=None BUG=b:148113568 TEST=Built the affected images. Change-Id: I3c2e8851294b957aa133c6a8528de3960a3e468c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2303815 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* sc7180: Add debug message for the switchcap no power caseWai-Hong Tam2020-07-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some board, we saw the behavior that the switchcap asserts its GPIO to report the output rail in a good range but actually the rail has no voltage. This CL adds a debug message for it by checking the PMIC_KPD_PWR_ODL GPIO value. This open-drain GPIO should be pulled by the PMIC. For the switchcap no power case, the message prints out and cancel the power on sequence. BRANCH=None BUG=b:159776965 TEST=Manually overrode the PMIC_KPD_PWR_ODL to low. Triggered the power on sequence and checked it cancelled: [28.365326 power state 1 = S5, in 0x0005] [28.365757 power on 4] RTC: 0x5eb941ba (1589199290.00 s) [28.366407 power state 5 = S5->S3, in 0x0005] [28.366862 power button released in time] [28.369017 set_system_power(1)] [28.495140 set_pmic_pwron(1)] [28.495614 PMIC_KPD_PWR_ODL not pulled up by PMIC; cancel pwron] [28.496110 POWER_GOOD not seen in time] [28.496487 set_system_power(0)] RTC: 0x5eb941ba (1589199290.00 s) [28.507645 power state 1 = S5, in 0x0005] Change-Id: Id2362a8c87746cc756192aae0b0489cf3d95d133 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277344 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Battery: Implement smart discharge systemDaisuke Nojiri2020-06-201-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CrOS EC chooses only one of the two powre-saving states when the system is left idle. One is to hibernate and the other is to cut off the battery. And these are determined at compile time. If the system hibernates, EC will not have a chance to cut off the battery before the state of charge reaches critical low. If the system is in cutoff, it requires an AC adapter to wake up. So, neither behavior is ideal. This patch introduces the smart discharge system. Given the number of hours to zero capacity as a target, it tries to choose the better state for idling. For example, if the state of charge is high, it will hibernate the system because the target can be met before the battery completely drains. If the state of charge is low, it will keep the EC up so that it can cutoff the battery. Tests are done on Bloog as follows: Verify EC selects not to hibernate when the remaining capacity is below the stay-up threshold. The ectool smartdischarge command is tested as follows: localhost ~ # ectool smartdischarge Hours to zero capacity: 0 h Stay-up threshold: 0 mAh Cutoff threshold: 0 mAh Hibernate discharge rate: 0 uA Cutoff discharge rate: 0 uA localhost ~ # ectool smartdischarge 2160 Hours to zero capacity: 2160 h Stay-up threshold: 0 mAh Cutoff threshold: 0 mAh Hibernate discharge rate: 0 uA Cutoff discharge rate: 0 uA localhost ~ # ectool smartdischarge 2160 200 1500 EC result 3 (INVALID_PARAM) localhost ~ # ectool smartdischarge 2160 1500 200 Hours to zero capacity: 2160 h Stay-up threshold: 3240 mAh Cutoff threshold: 432 mAh Hibernate discharge rate: 1500 uA Cutoff discharge rate: 200 uA localhost ~ # ectool smartdischarge 2160 1500 0 EC result 3 (INVALID_PARAM) localhost ~ # ectool smartdischarge 0 Hours to zero capacity: 0 h Stay-up threshold: 0 mAh Cutoff threshold: 0 mAh Hibernate discharge rate: 1500 uA Cutoff discharge rate: 200 uA Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:152431365, b:157602162 BRANCH=none TEST=See above Change-Id: I1470b13203f3653ae0e495cd5ec8ed05f3c5102f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2216392 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* sc7180: Handle the exception cases of power onWai-Hong Tam2020-06-181-35/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the switchcap and PMIC functions return a success or error code. In the power on sequence, an error happening in the middle will make it skip the remaining steps, and then calls the power off sequence to restore back S5. The power off sequence don't care about any error and perform the entire procedure. BRANCH=None BUG=b:159101052 TEST=Manually trigger power on and power off. TEST=Forced to a switchcap error, it went back to S5. > gpioset DA9313_GPIO0 0 > power on Requesting power on > RTC: 0x5ed1d4a7 (1590809767.00 s) [7177.018477 power state 4 = G3->S5, in 0x0005] RTC: 0x5ed1d4a7 (1590809767.00 s) [7177.019409 power state 1 = S5, in 0x0005] [7177.019918 power on 4] RTC: 0x5ed1d4a7 (1590809767.00 s) [7177.021168 power state 5 = S5->S3, in 0x0005] [7177.021700 power button released in time] [7177.024143 set_system_power(1)] [7177.076708 SWITCHCAP NO POWER GOOD!] [7177.187407 set_system_power(0)] RTC: 0x5ed1d4a7 (1590809767.00 s) [7177.188564 power state 1 = S5, in 0x0005] Change-Id: Iaf2676d84513056b3a1deb4f4c554c607e588c37 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2250668 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* sc7180: Move the hook notifications out of power_on and power_offWai-Hong Tam2020-06-181-22/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the functions power_on and power_off just contain the power rail control. Move the hook notifications out of them. So they can be reused in the follow-up change. Also move the battery level check out of the power_off. BRANCH=None BUG=b:153594300 TEST=Manually trigger power on and power off. TEST=For the low battery case, no misleading messages: > power on Requesting power on > RTC: 0x5ecf416f (1590641007.00 s) [14.208200 power state 4 = G3->S5, in 0x0005] RTC: 0x5ecf416f (1590641007.00 s) [14.211855 power state 1 = S5, in 0x0005] [14.213840 power on 4] RTC: 0x5ecf416f (1590641007.00 s) [14.214463 power state 5 = S5->S3, in 0x0005] [14.214898 power button released in time] [14.220408 Not enough power to boot (2 %, 0 mW)] [14.323917 Not enough power to boot (2 %, 0 mW)] [14.425590 Not enough power to boot (2 %, 0 mW)] [14.530575 Not enough power to boot (2 %, 0 mW)] [14.635587 Not enough power to boot (2 %, 0 mW)] [14.740618 Not enough power to boot (2 %, 0 mW)] [14.744386 Not enough power to boot (2 %, 0 mW)] RTC: 0x5ecf4170 (1590641008.00 s) [14.747297 power state 1 = S5, in 0x0005] Change-Id: Ic368b28ba045dfced7979deca545d2393d3453b7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2250667 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* asurada rev0: Remove control of PP3300_U and PP1800_U.Tony Lin2020-06-111-6/+0
| | | | | | | | | | | | | | | Those power rails are controlled by PMIC (MT6359) BUG=none TEST=Boot asurada with PP3300_U and PP1800_U BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I52d93e0ce77b3cd9b5c58e7289ef56293cde3ada Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2222383 Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* system: Clear AP_IDLE when waking up from hibernation by ACDaisuke Nojiri2020-06-111-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, AP_IDLE is set when EC is left idle in G3. This makes the AP stay off after EC wakes up from hibernation (for any wake-up source). This makes a board require another power button press to boot the system from hibernation. This change makes RO clear AP_IDLE unless AC is present. When AC is present, EC doesn't hibernate. So, AC presence infers the EC woke up from hibernation by AC. That is, if the system wakes up by a power button press, AP_IDLE is cleared and AP will be turned on (unless it's overwritten by AP_OFF). Tested as follows on Trembyle: 1. Put DUT in hibernation. 2. Wake up DUT and observe: a. When waking up by power button, AP is turned on. b. When waking up by lid open, AP is turned on. c. When waking up by AC, AP is left idle. BUG=b:157077589, chromium:1073960 BRANCH=none TEST=See above. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ie5020bbe50ad489f4e3010820681cc57ff51b941 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236589
* JSL: Wait 60ms to turn off PP5000_U after PP3300_AAseda Aboagye2020-06-091-0/+7
| | | | | | | | | | | | | | | | | | | For Jasperlake, we need to wait 60ms after PP3300_A goes down before turning off PP5000_U. This time is needed to allow VCCIN AUX to discharge properly. BUG=b:157784504 BRANCH=None TEST=Build and flash waddledoo, verify that a 60ms delay is added when PP3300_A turns off when shutting down. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I0fc08bfd597c0e0264f4ff52ccec3a1504f9fb8e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229605 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* kakadu: turn off Vconn boost gpio pin when S5/G3Scott Chao2020-06-091-0/+3
| | | | | | | | | | | | | | It should be ~0V in G3, 5V in S3/S0. And this pin can solve apple HDMI dongle issue. BUG=b:156570690 BRANCH=kukui TEST=make -j BOARD=kakadu TEST=make buildall Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Change-Id: I3bd23a0534d0d63fe22bf26ed3a24b34b73fa142 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2235235 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* power: Don't print timestamp for powerinfo commandDaisuke Nojiri2020-06-091-1/+1
| | | | | | | | | | | | | | | | This patch makes powerinfo command print the result without a timestamp like other console commands. This shouldn't break FAFT. If it does, FAFT should be fixed. BUG=none BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I90f032dc2d079d9d674489d2236b05f6051e574f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219122 Reviewed-by: Craig Hesling <hesling@chromium.org>
* stoney: Initialize chipset state to S5 after sysjumpDaisuke Nojiri2020-06-091-14/+25
| | | | | | | | | | | | | | | | | | | | | | | | Currently, RW initializes the chipset state to G3 and forces the chipset to shut down unless the AP is already powered on. This behavior is based on the assumption that sysjump happens only upon a request from the AP. With EFS2, it's no longer the case because EC jumps while the AP is off. AP may be off, resetting (i.e. s0->s5->s0), or shutting down (s0->s5). This patch makes RW set the chipset state to S5 if the corresponding power signals are on. BUG=b:156694627, b:157077589 BRANCH=none TEST=test_that suite:faft_bios Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Id8fdd10f411f403cb42bd8429fef737e88421ae9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220547 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* x86 power: Initialize chipset state to S5 after sysjumpDaisuke Nojiri2020-06-091-14/+26
| | | | | | | | | | | | | | | | | | | | | | | | Currently, RW initializes the chipset state to G3 and forces the chipset to shut down unless the AP is already powered on. This behavior is based on the assumption that sysjump happens only upon a request from the AP. With EFS2, it's no longer the case because EC jumps while the AP is off. AP may be off, resetting (i.e. s0->s5->s0), or shutting down (s0->s5). This patch makes RW set the chipset state to S5 if the corresponding power signals are on. BUG=b:154778457 BRANCH=none TEST=Verify test_that suite:faft_bios passes. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I65cbb6c6e7f8a01e80d83a74e376ceb9628b9789 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213733 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aaron Durbin <adurbin@google.com>
* hooks: Introduce HOOK_CHIPSET_SHUTDOWN_COMPLETEWai-Hong Tam2020-06-0610-0/+30
| | | | | | | | | | | | | | | | | | | A new hook HOOK_CHIPSET_SHUTDOWN_COMPLETE is introduced, which are called from the chipset task, while the system has already shut down and all the suspend rails are already off. It will be used for executing pending EC reboot at the chipset shutdown. The EC reboot should be executed when the chipset is completely off. BRANCH=None BUG=b:156981868 TEST=Built all boards. Change-Id: I12f26957e46a1bb34ef079f127b0bddd133cd4e7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2228395 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* power/icelake: Don't cache GPIO_PCH_DSW_PWROKSooraj Govindan2020-05-181-3/+1
| | | | | | | | | | | | | | | | | | | | There is a potential race condition for passthrough DSW_PWROK pin as the PCH_DSW_PWROK is set to low by chipset_force_shutdown() and is not updated by dsw_pwrok_pass_thru(). To avoid this, use current values of EC_DSW_PWROK and PCH_DSW_PWROK to set the passthrough value. BUG=b:150985246 BRANCH=None TEST=`make -j buildall` Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com> Change-Id: I0249a948ea8814cbc3462630e99a471010a056df Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204337 Tested-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Trogdor: Remove triggering AP cold reset over a hostcommandWai-Hong Tam2020-05-162-12/+0
| | | | | | | | | | | | | | | This route hasn't been used. Remove it. That makes the chipset_reset() do the same thing for all requests. BRANCH=None BUG=b:119261783 TEST=Ran the command "ectool apreset" in userspace; returned error: EC result 1 (INVALID_COMMAND) Change-Id: I8cb8b0df508ab0cbcebafed528c2204f6210cbf7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204581 Reviewed-by: Julius Werner <jwerner@chromium.org>
* cometlake-discrete: create a S0->S3 fast pathPeter Marheine2020-05-112-1/+40
| | | | | | | | | | | | | | | | | Latency for powering off VCCIO needs to be lower than we can reliably achieve using the regular state machine. Add a fast path via a specialized interrupt to do the S0->S3 transition that should have lower latency (low enough to satisfy the relevant timing requirements). BRANCH=None BUG=b:155672968 TEST=Verified shutdown_s0_rails() runs on S3 interrupt with low latency, measured timing is now in spec. Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I2753d3490bbefc8f6fccba6cc90e808c969e53b1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182109 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* mt8192: add MediaTek MT8192 power sequencing supportEric Yilun Lin2020-05-082-0/+455
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add power sequencing for asurada rev0 board. Craft mt8192 PS from mt8183. Mostly are the same, except that MT8192 doesn't use EC reset as AP reset. BRANCH=none BUG=b:150341779 TEST=TEST=Tried the following cases: * Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control pwr_button:press sleep:0.2 pwr_button:release Result: G3 -> S0 * Console command: apreset Result: S0, AP reboots * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 Change-Id: Ib8ac1ed700fc0a46fe8a1e6e40e1fefa3401d3c0 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2120114 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* power: add power_wait_mask_signals_timeout()Eric Yilun Lin2020-05-081-2/+7
| | | | | | | | | | | | | | | | | | Currently, we can only wait for a signal is presented via power_wait_signals*(). However, we might want to wait a power signal disappeared. power_wait_mask_signals_timeout() does the thing, which can wait until a power signal is disappeared. BRANCH=master BUG=b:150341779 TEST=test with CL:2120114 Change-Id: I0bbc04fcf76e67d7cfe86096a42e3b767a136ef9 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176820 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* power: Boot on wake from hibernation for non-EFS2 boardsDaisuke Nojiri2020-05-061-2/+1
| | | | | | | | | | | | | | | | | | | | | | | CONFIG_BOOT_ON_HIBERNATE_WAKE allows boards to choose either to get PD power or to keep the consistent behavior between S5 and hibernation. EFS2 boards can get both. This patch replaces the macro with CONFIG_VBOOT_EFS2 so that non EFS2 boards automatically choose the option (to boot on wake from hibernation). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:1073960 BRANCH=none TEST=Verified on Zork AP stays off after wake up from hibernation. Change-Id: I1707153357777db082ae64f86f8303f0e408b1a7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2184545 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* power: Don't boot after waking up from hibernationDaisuke Nojiri2020-05-061-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | When a device shuts down and is idle for 60 mins (configurable), EC enters hibernation. When an AC adapter is plugged, the system boots. This is not expected behavior and not consistent with the behavior that the system stays off on AC plug-in before hibernation. This patch fixes the above inconsistency by storing AP_OFF flag before entering hibernation after 60 mins idle in S5. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:1073960 BRANCH=none TEST=Verified Bloog stays off after waking up from hibernation on AC plug-in. Change-Id: I097bee97164284dd4c35f8bf9389c76319fd676a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176555 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* power/mt8183: fix power btn behavior for clamshell devicesTing Shen2020-04-281-0/+4
| | | | | | | | | | | | | BUG=b:154443823 TEST=able to do hard showdown between 8~10 sec BRANCH=kukui Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ia06507c42ce492e83b758d2f70ad2a3f9e91212c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2155826 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* Trogdor: Add a delay to ensure the power-off sequence completeWai-Hong Tam2020-04-221-0/+9
| | | | | | | | | | | | | | | | | | | | | | | The existing power-off sequence waits for one of the rails (L10A) drop and then turns off the switchcap. The L10A rail is in the middle of the power-off sequence. The entire sequence may not complete yet. This CL adds a delay to ensure the sequence complete. Qualcomm measured the entire POFF duration is around 70ms. Setting this delay to 70ms is more than enough. BRANCH=None BUG=b:154537026, b:148478165 TEST=Triggered power off and on multiple time. TEST=Toggled warm_reset multiple time. Change-Id: I10bce33ba39c8ed6269c040f934e7b7dd2422d7e Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2159925 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Commit-Queue: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Increase the delay between power-on the system and power-on the PMICWai-Hong Tam2020-04-221-2/+6
| | | | | | | | | | | | | | | | | | This is about the delay between power-on the system (switchcap) and power-on the PMIC. Some latest PMIC firmware needs this delay longer, when doing a cold reboot. Did an experiment; it should be 100ms+. BRANCH=None BUG=b:152936484, b:148478165 TEST=Did quick power off and on for 100 iterations, S0->S5->S0, like: $ dut-control ec_uart_cmd:'power off' sleep:0.1 ec_uart_cmd:'power on' TEST=Toggled warm_reset for 100 iterations, like: $ dut-control warm_reset:on sleep:0.2 warm_reset:off Change-Id: I0e7287011620a2e065655a46d6358f0cc1d5e03a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2159625 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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