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* power: Fix host_command_hibernation_delay returnTomasz Michalec2021-09-031-1/+1
| | | | | | | | | | | | | | | host_command_hibernation_delay() should return enum ec_status and correct value of this type to indicate success is EC_RES_SUCCESS BUG=none BRANCH=none TEST=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I50902829a7ef5d09786ab81bff9d791bac0dfad6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140204 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* qcom: Increase the delay between powering on the switchcap and the PMICWai-Hong Tam2021-08-121-2/+5
| | | | | | | | | | | | | | Measured the delay on Herobrine IOB + Trogdor MLB is ~200ms. Pick a larger delay 300ms. BRANCH=None BUG=None TEST=Booted AP successfully. Change-Id: Iaba20995e23c2f2041601c9fc17f35a1cb9300c4 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3083184 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* qcom: Move enabling/disabling 3.3V rail to the board levelWai-Hong Tam2021-07-141-4/+2
| | | | | | | | | | | | | | | | | | | | | | In the next generation, the 3.3V rail is not controlled by EC anymore. Move the control logic to the board level. The 3.3V rail should be enabled before the power on sequence, so use the hook chipset pre-init hook. Disable it on the chipset shutdown complete hook. For Trogdor, do it on the baseboard level. For Herobrine, do it on the board level, Herobrine-NPCX7, only. Herobrine-NPCX9 and other future boards don't need it. BRANCH=None BUG=b:187980397, b:192253134 TEST=Tested the Lazor EC-OS and Zephyr images and booted to AP. TEST=Tested the Herobrine-NPCX7 EC-OS and Zephyr images and booted to AP. Change-Id: I7e025123f8997629b9b0db46e30ea9c716bdbf99 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993213 Reviewed-by: Keith Short <keithshort@chromium.org>
* qcom: Deprecate AP_RST_REQ in SC7280Wai-Hong Tam2021-07-131-0/+2
| | | | | | | | | | | | | | | Add guards to deprecate the AP_RST_REQ power signal. The AP_RST_REQ is power signal only valid in SC7180. BRANCH=None BUG=b:187980397, b:148246695 TEST=Built all the Chromium EC images and Zephyr EC images. TEST=Modify a board to use the SC7280 CONFIG. Change-Id: I0b12889dd2549665d2c2d6bfc06fddd9b9357175 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993210 Reviewed-by: Keith Short <keithshort@chromium.org>
* Power: Cast hibernate delay before converting to microsecondsDiana Z2021-07-121-1/+2
| | | | | | | | | | | | | | | | If the hibernate delay has been configured to be very large, then the conversion into microseconds may overflow a uint32_t. So cast before multiplying. BRANCH=None BUG=b:190056419 TEST=on guybrush, confirm target is in the correct range (i.e. 2 months from now) Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I449b0d14418cb119080e2e03960a3a31fab4bf2b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3018450 Reviewed-by: Rob Barnes <robbarnes@google.com>
* AMD: Ignore forced shutdown if transitioningDiana Z2021-07-021-1/+1
| | | | | | | | | | | | | | | | | | | Ignore new forced shutdown requests if we're in the process of transitioning to off already. Otherwise, the power button press may turn the system back on again. BRANCH=None BUG=b:192463842 TEST=on guybrush, run the battery down to 2% in S0 and observe that we can successfully enter G3 even when additional chipset_force_shutdown() commands come through during the transition Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie2c83db939fe1cc8b3258903e209cba6394027fb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3000849 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* kukui: enable HOST_SLEEP_STATE to smooth suspend trasnsitionEric Yilun Lin2021-06-291-0/+71
| | | | | | | | | | | | | | | | | To smooth the suspend transition to prevent from EC waking up AP during S0->S3. BUG=none TEST=ensure AP notify EC before suspending BRANCH=kukui,icarus Change-Id: I6d4d79be2688c53e0057f5e60a394cfa8974e501 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987228 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* power: Reorder the power_chipset_init and the interrupt enableWai-Hong Tam2021-06-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous order is: * power_chipset_init() * enabling/disabling the power signal interrupts There is a need that power_chipset_init() modifies the power signal interrupt enabling/disabling, like crrev.com/c/2977573. The power_chipset_init() checks if AP is ON or OFF; when AP is OFF, a power signal interrupt is disabled (default) to avoid the floating interrupt storm; but when AP is ON, the power signal interrupt is enabled. But the next action resets the interrupt to default. This CL reorders it to: * enabling/disabling the power signal interrupts * power_chipset_init() So the interrupt enable/disable status won't be overridden. BRANCH=None BUG=b:185551931 TEST=Tested on Coachz, reboot EC, sysjump to RW, perform `apreset` which executes a warm AP reboot. Change-Id: I1740fed1d37a312ac822b2a91e9ebd5502756a1f Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2986224 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: asurada: move power/it8xxx2 to be in power/mt8192Denis Brockus2021-06-223-15/+10
| | | | | | | | | | | | | | | | | | | | The power_signal_list was mistakenly moved to a new file power/it8xxx2.c and is used by both zephyr and cros-ec. This moves the content of this file into where it belongs at power/mt8192.c BUG=b:180980668 BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I687f097bee37ac5211c3a7d04019e2dd70207889 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2980111 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* qcom: Enable AP_RST_L interrupt on sysjump to RWWai-Hong Tam2021-06-221-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | The AP_RST_L interrupt is default disabled. It avoids unnecessary power signal messages in G3/S5 as the signal is floating (no power). The interrupt is then enabled during S5->S3 and disabled during S3->S5. However, when sysjump to RW, the interrupt is back to default disabled. This causes the `apreset` command fails to sample the AP_RST_L signal and forces to execute a cold reboot sequence. We should enable AP_RST_L interrupt when the initial power state is S0, the sysjump to RW scenario. BRANCH=Trogdor BUG=b:185551931 TEST=Tested on Coachz, reboot EC, sysjump to RW, perform `apreset` which executes a warm AP reboot. Change-Id: I7eae5f2bcacfebeeee529aa7ad96409cfe9122e9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977573 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* asurada: enable HOST_SLEEP_STATE to smooth suspend trasnsitionEric Yilun Lin2021-06-151-0/+70
| | | | | | | | | | | | | | | | | | | | | | | MT8192 previously didn't enable the command due to it already has AP_IN_SLEEP_L, but we found that if we don't have the command, EC might have rare chance to interrupt AP with hostevent when AP in transition to S3, and cause the suspend failure. This CL enables CONFIG_POWER_TRACK_HOST_SLEEP_STATE so the EC is able to handle the AP's hint to disable non-wakeup hostevent when it's transisting to S3. BUG=b:186709406 TEST=ensure EC received the AP's note BRANCH=asurada Change-Id: I7a2a7eefc7620817ca446fd24370375130daf6be Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954984 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* host sleep: add command to change sleep fail detection timeoutBoris Mittelberg2021-05-261-1/+46
| | | | | | | | | | | | | | | sleeptimeout is a new EC console command to change S3/S0ix sleep fail detection timeout. Needed for debug only. The command is present only if CONFIG_POWER_SLEEP_FAILURE_DETECTION is defined BRANCH=none BUG=b:187532888 TEST=manual Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I9a2afbb89dbfb4bdaf8666e06cf810e7cace9aad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2904896 Reviewed-by: caveh jalali <caveh@chromium.org>
* qcom: Deprecate QSIP_ON, a load switch enableWai-Hong Tam2021-05-221-9/+0
| | | | | | | | | | | | | | | | | | QSIP_ON is only valid on Trogdor rev-1. It controls the load switch enable. The load switch is used for experiments but leaving it off consumes power. On other Trogdor boards, QSIP_ON is just NC. Since we no longer support Trogdor rev-1, deprecate the control in the power sequence. BRANCH=None BUG=b:159999589 TEST=Build the Trogdor image. Change-Id: Ie5f04ed3de5f14ba32a92fa8223e8769bb97cf82 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2911505 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* zephyr: asurada: Enable power button and sequencingDenis Brockus2021-05-192-1/+15
| | | | | | | | | | | | | BUG=b:180980668 BRANCH=none TEST=get powerbtn command in shell Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I1af4673b7eff84149e3aabad7ff09445a1f96e1b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895306 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* qcom: Create new configs for SC7280Wai-Hong Tam2021-05-181-0/+1
| | | | | | | | | | | | | | | Create new configs (Chromium EC namespace and Zephyr namespace) for SC7280. In this state, SC7280 power sequence has no difference from SC7180. BRANCH=None BUG=b:187980397 TEST=Built all the Chromium EC images and Zephyr EC images. TEST=Modify a board to use the new CONFIG. Change-Id: I178b8ffa5d79d3828baf222ac77906ab2262cf76 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893069
* qcom: Generalize the power signals and functions for SC7x80Wai-Hong Tam2021-05-171-14/+14
| | | | | | | | | | | | | Rename the power signals from SC7180 to SC7X80. Rename the functions. BRANCH=None BUG=b:187980397 TEST=Built all the Chromium EC images and Zephyr EC images. Change-Id: Icf932b5cc892dcc9e57bff10bdd6db8d532f24a9 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893485 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* qcom: Generalize the filenames for Qualcomm chipsetsWai-Hong Tam2021-05-173-3/+3
| | | | | | | | | | | | | | | The existing SC7180 power sequence can be reused on its next generation. Generalize the filenames, sc7180.c/sc7180.h to qcom.c/qcom.h. BRANCH=None BUG=b:187980397 TEST=Built all the Chromium EC images and Zephyr EC images. Change-Id: Ie04218ef0a12a4e8aa2db353040c5c39c533ae6f Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893484 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* amd_x86: Check for S0ix before S3Rob Barnes2021-04-271-3/+6
| | | | | | | | | | | | | | | Cezanne is asserting both SLP_S0 and SLP_S3 for S0ix. On Intel only SLP_S3 is asserted. Move check for S0ix before check for S0 so EC enters correct power state. BUG=b:186135411 TEST=EC reports S0ix power state BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I47ede14e8031ba4d6a01399f2501801e597a6b1f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847332 Reviewed-by: Diana Z <dzigterman@chromium.org>
* AMD Power: Remove reference to S5 pauseDiana Z2021-04-121-3/+0
| | | | | | | | | | | | | | | | | The AMD power states don't actually reference the S5 pause variable, and instead always pause in S5 when power transitioning. It appears only braswell and samus power transitions actually use this pause to change their power sequencing. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I0bdaa714fa41a696a8e446b04a62aba793e59432 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818527 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
* Power: Add configurable S5 timeoutDiana Z2021-04-101-5/+39
| | | | | | | | | | | | | | | | Similar to the hibdelay command, allow the time we spend in S5 to be configurable for the sake of power testing in this state. It may be set to 0 for an immediate drop, or -1 to stay in S5 forever. BRANCH=None BUG=b:184941436 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If2f8cf91ba982822e2e33cb17f84f38c40907d2e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818526 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* alderlake: Remove resolved TODOCaveh Jalali2021-04-021-4/+1
| | | | | | | | | | | | | | This removes a TODO for b/179524867. We have determined that no special handling needs to be performed in chipset_handle_espi_reset_assert. BRANCH=none BUG=b:179524867 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I6d40b6119e3bef613e5ba2d9adfa986b79be9078 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798982 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* power: change pwr_5v_ctl_mtx to use K_MUTEX_DEFINEJack Rosenthal2021-03-231-7/+1
| | | | | | | | | | | | | | Use K_MUTEX_DEFINE() to automatically initialize this mutex, removing the requirement to call k_mutex_init(). BUG=b:177677037 BRANCH=none TEST=zmake testall && make buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I2873f5bd46788b24442f0121377abb3132be2622 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2782234 Reviewed-by: Simon Glass <sjg@chromium.org>
* power: sc7180: move power signals definition to sc7180 commonJack Rosenthal2021-03-182-0/+37
| | | | | | | | | | | | | | | | Move the SC7180 power signals list from Trogdor baseboard directory to common code under sc7180.{c,h}. This allows us to include this code more directly for Zephyr builds, without needing to pull anything out of the Trogdor baseboard directory. BUG=b:183054226 BRANCH=none TEST=make buildall && zmake testall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I3657e7a1c1ee8b9593574e6f65d07eda1f7ec61c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2774360 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Hooks: Add HOOK_CHIPSET_HARD_OFFDiana Z2021-03-181-0/+4
| | | | | | | | | | | | | | | Add a new hook called HOOK_CHIPSET_HARD_OFF which is called upon entry to the G3 power state. BRANCH=None BUG=b:166787955,b:167996216,chromium:1045209 TEST=make -j buildall, runs on waddledee with no linking errors Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If260207910d882d17aeb766c9e99a7a6099006c7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415171 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* guybrush: Enable CONFIG_CHIPSET_X86_RSMRST_DELAYRob Barnes2021-03-161-0/+4
| | | | | | | | | | | | | | | | Add a delay of 10ms between S5_PGOOD and RSMRST_L. Needed to meet timing specs. 10ms matches what is used on Intel. This may need to be tuned for AMD chipsets. BUG=b:182802230 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I8e2c5a2b47866496a1ae598089e4ac5aa5fa45d3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764971 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* host_sleep: Fix a race condition on resume from S0ixKeith Short2021-03-051-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | When resuming for S0ix, the CHIPSET task transitions to the POWER_S0ixS0 state and sets a timer to ensure the AP sends HOST_SLEEP_EVENT_S0IX_RESUME. However, the APs resume message can sometimes arrive before the CHIPSET task transitions to POWER_S0ixS0. This sequence causes the EC to generate a false EC_HOST_EVENT_HANG_DETECT event during resume. BUG=b:180592353 BRANCH=volteer TEST=Repeatedly run "powerd_dbus_suspend" from AP and resume using built-in keyboard. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I550daaaf5411c31f17d608cc341f86da9b934a84 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2737552 Tested-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* guybrush: Enable S0ix for amd_x86Rob Barnes2021-02-121-0/+220
| | | | | | | | | | | | | | | | | Enable S0ix for amd_x86. This closely follows the intel_x86.c implementation. b/179294969 tracks merging intel_x86.c and amd_x86.c BUG=b:175234270 BRANCH=None TEST=Build for Guybrush Boot Zork, enter and leave suspend. Note, Zork does not support S0ix Change-Id: I874d2e9019fcc162c7ebfb6091b179ba482a4e47 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2673905 Reviewed-by: Diana Z <dzigterman@chromium.org>
* power: Rename stoney.c to amd_x86.cRob Barnes2021-02-102-2/+3
| | | | | | | | | | | | | | | | | Rename stoney.c to amd_x86.c since it covers all currently supported AMD chipsets. Add CHIPSET_CEZANNE to guard any differences between STONEY and CEZANNE chipsets. BUG=b:175234270 BRANCH=None TEST=Build for zork and guybrush Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I96f82127729d64970b8d46fc8ef4ddba6489dd8a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2683923 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* icelake : fix power sequence behaviorJacky Wang2021-02-081-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove powerok signal checking the current GPIO level step. We found the GPIO_EC_AP_PCH_PWROK_OD did not setting to low when system shutdown. The signal EC_AP_PCH_PWROK_OD is connect with signal IMVP9_VRDAY_OD. The gpio_get_level get GPIO status from the EC register GPDMR and gpio_set_level set GPIO level by EC register GPDR. If signal IMVP9_VRDAY_OD is low, the EC GPDRM will read EC_AP_PCH_PWROK_OD status is low even the GPDR is set to High. We remove the signal status check to make sure power sequence is expected. BUG=b:171450533 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Check system can power on. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Ia8d8c096b15c09644432736df5ca5fc10d91c954 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2675322 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* alderlake: Implement chipset supportCaveh Jalali2021-02-072-170/+108
| | | | | | | | | | | | | | | | | | | | | | | This provides support for the Intel Alder Lake SoC in conjunction with the Silergy SLG4BD44540 power sequencer. A new config option (CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540) is provided to enable this setup. This is intended to be used by brya and its variants. Other Alder Lake boards that use the Ice Lake style power sequencing are not affected by this new config option. BRANCH=none BUG=b:173575131,b:177275055,b:177277633 TEST=buildall passes Change-Id: I74c36f06fc8ad26c163093753140a5ca242d75c7 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2675309 Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* brya: Clone power sequencer from icelakeCaveh Jalali2021-02-061-0/+344
| | | | | | | | | | | | | | | | This clones the icelake power sequencer code as a baseline for brya's custom power sequencer. This is solely intended to highlight the customizations in following patches. BRANCH=none BUG=b:173575131 TEST=buildall passes Change-Id: Ib9f0b986ab617002f987fed26e8aba1f9322a3e1 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2675308 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* host_sleep: Add config.h before ec_commands.hSimon Glass2021-02-041-0/+1
| | | | | | | | | | | | | | | Unfortunately ec_commands.h define BUILD_ASSERT() which then conflicts with Zephyr's definition. Add the config.h header to work around this. BUG=none BRANCH=none TEST=builds host_sleep.c without warnings Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ia1c4a555717c6422d3c43d47e8bbaa1ddf83bba3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2676262 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Lazor: Modify SWITCHCAP_PG_CHECK_TIMEOUT and _WAITSue Chen2021-01-201-2/+2
| | | | | | | | | | | | | | | | | It was found that the LN9310 3:1 mode active timing is late. The Switchcap power good checking needs timeout more than 50 msec. BUG=b:177955474 BRANCH=trogdor TEST=Make sure pressing power button + F3 can power on successfully. Change-Id: Ieaabf5cb923b5ac3cc73b31f1dbc8e0504424290 Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639001 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: John Crossley <crossley@lionsemi.corp-partner.google.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* zephyr: remove guard to call of lpc_s3_resume_clear_masksJack Rosenthal2021-01-071-6/+1
| | | | | | | | | | | | | | This function is shimmed now, we can take away the guard. BUG=b:172678200 BRANCH=none TEST=power on volteer Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I7589b3485930e8d40966e9e71434b98648018872 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2615130 Commit-Queue: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* kukui: do not boot AP if low-battery and no chargerEric Yilun Lin2020-12-221-0/+19
| | | | | | | | | | | | | | | | BUG=b:134101454 TEST=#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 96; at batt 93%, no adapter, powerbtn, stay at G3 at batt 93%, with adapter, powerbtn, boot to S0 at batt 97^, without adapter, powerbtn, boot to S0 BRANCH=kukui Change-Id: Ib0ee742ccd1f04aaa173a34455c1333853e0ce50 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597122 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* Revert "zephyr: Add battery and smart battery options"Eric Yilun Lin2020-12-141-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit ac4f512e60af42efe693e6955c110a7908090e56. Reason for revert: This CL stops chipset_task forever, revert this to boot AP. Original change's description: > zephyr: Add battery and smart battery options > > Shim in battery and smart battery support. > > BUG=b:175248556 > BRANCH=none > TEST=boot on volteer, run 'battery' command. > TEST=run 'ninja menuconfig' and check KConfig help text. > 20-12-10 20:08:12.778 battery > 20-12-10 20:08:13.509 Status: 0x02c0 DCHG INIT RC > 20-12-10 20:08:13.529 Param flags:00000003 > 20-12-10 20:08:13.541 Temp: 0x0b63 = %.1d K (%.1d C) > 20-12-10 20:08:13.541 V: 0x2a1e = 10782 mV > 20-12-10 20:08:13.541 V-desired: 0x3390 = 13200 mV > 20-12-10 20:08:13.541 I: 0x0000 = 0 mA > 20-12-10 20:08:13.550 I-desired: 0x0a19 = 2585 mA > 20-12-10 20:08:13.550 Charging: Allowed > 20-12-10 20:08:13.550 Charge: 0 % > 20-12-10 20:08:13.550 Manuf: LG > 20-12-10 20:08:13.555 Device: AC17A8 > 20-12-10 20:08:13.573 Chem: LIO > 20-12-10 20:08:13.573 Serial: 0xb754 > 20-12-10 20:08:13.573 V-design: 0x2d1e = 11550 mV > 20-12-10 20:08:13.573 Mode: 0x6001 > 20-12-10 20:08:13.573 Abs charge:0 % > 20-12-10 20:08:13.573 Remaining: 0 mAh > 20-12-10 20:08:13.577 Cap-full: 4932 mAh (4833 mAh with 98 % compensation) > 20-12-10 20:08:13.585 Design: 5360 mAh > 20-12-10 20:08:13.594 Time-full: 0h:0 > 20-12-10 20:08:13.594 Empty: 0h:0 > > Change-Id: Ie782e75ee4027ab2a5c6a0ae7f4ad81e9c360711 > Signed-off-by: Simon Glass <sjg@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2575199 Bug: b:175248556 Change-Id: I66086d8fee46d5fd02d26938468a7d76dab71c6e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2589140 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@chromium.org> Tested-by: Eric Yilun Lin <yllin@chromium.org>
* zephyr: Add battery and smart battery optionsKeith Short2020-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Shim in battery and smart battery support. BUG=b:175248556 BRANCH=none TEST=boot on volteer, run 'battery' command. TEST=run 'ninja menuconfig' and check KConfig help text. 20-12-10 20:08:12.778 battery 20-12-10 20:08:13.509 Status: 0x02c0 DCHG INIT RC 20-12-10 20:08:13.529 Param flags:00000003 20-12-10 20:08:13.541 Temp: 0x0b63 = %.1d K (%.1d C) 20-12-10 20:08:13.541 V: 0x2a1e = 10782 mV 20-12-10 20:08:13.541 V-desired: 0x3390 = 13200 mV 20-12-10 20:08:13.541 I: 0x0000 = 0 mA 20-12-10 20:08:13.550 I-desired: 0x0a19 = 2585 mA 20-12-10 20:08:13.550 Charging: Allowed 20-12-10 20:08:13.550 Charge: 0 % 20-12-10 20:08:13.550 Manuf: LG 20-12-10 20:08:13.555 Device: AC17A8 20-12-10 20:08:13.573 Chem: LIO 20-12-10 20:08:13.573 Serial: 0xb754 20-12-10 20:08:13.573 V-design: 0x2d1e = 11550 mV 20-12-10 20:08:13.573 Mode: 0x6001 20-12-10 20:08:13.573 Abs charge:0 % 20-12-10 20:08:13.573 Remaining: 0 mAh 20-12-10 20:08:13.577 Cap-full: 4932 mAh (4833 mAh with 98 % compensation) 20-12-10 20:08:13.585 Design: 5360 mAh 20-12-10 20:08:13.594 Time-full: 0h:0 20-12-10 20:08:13.594 Empty: 0h:0 Change-Id: Ie782e75ee4027ab2a5c6a0ae7f4ad81e9c360711 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2575199
* power/host_sleep: Fix notifying about power state transitionsPatryk Duda2020-12-081-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CL:2321874 moves sleep_set_notify() and sleep_notify_transition() under CONFIG_POWER_SLEEP_FAILURE_DETECTION ifdef and introduces their no-op counterparts if CONFIG_POWER_SLEEP_FAILURE_DETECTION is not defined. Before that CL aforementioned functions were outside ifdef. Commit message also mentions that CL is only moving code, not performing any logical changes. Therefore this CL is moving sleep_set_notify() and sleep_notify_transition() outside ifdef and removes their no-on counterparts to eliminate logical changes introduced in CL:2321874 Issue was found when running EC ToT on octopus (casta). When AP was going to S0ix EC reported that fact, but PD was not changing DRP state to 'toggle off'. BUG=b:162083524, b:161775827 BRANCH=none TEST=Compile and flash firmware on octopus (tested on casta). Go to ChromeOS Developer Console and issue 'powerd_dbus_suspend' Check EC console if PD stack is reporting state transition and make sure that DRP is set to 'toggling off' Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I6ba4187c8549ee6d9e3b19543d67c49520927cb8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2575064 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* power/mt8192: back to S5 when PMIC failed to shutdownTing Shen2020-12-041-0/+4
| | | | | | | | | | | | | | | | | | | | `apshutdown` sometimes fails to shutdown PMIC, when this happens, powerstate will bounce between G3 and S5G3 until watchdog kicks in. To fix this, we should detect PMIC status in S5G3, go back to S5 to retry shutdown if PMIC is still alive. BUG=b:174546890 TEST=Run the reproduce steps in b/174546890#comment13, verify EC enters G3. BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I1f0544e16d818074378f58f1208bd586031a5ebb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2573895 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* power: move headers to include/powerJack Rosenthal2020-12-0315-528/+9
| | | | | | | | | | | | | | This makes the headers visible to the Zephyr build. BUG=b:173798264 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I3b6d27c1234b3924ee8902a86eec5fdb2ccd9998 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2571897 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* sc7180: Increase delays between enabling switchcap and enabling PMICWai-Hong Tam2020-12-021-5/+5
| | | | | | | | | | | | | | | | According to some experiments, the current delays are not enough on some boards. Add larger margin to the value. Also do the same on the power-off sequence delay. BRANCH=Trogdor BUG=b:163613549 TEST=Made DUT transit to DEV mode and the next auto-boot worked fine. Change-Id: Ia72c725fe1e8ff795e637e1b4b99b097478bcc1a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2565635 Commit-Queue: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Ectool: support reboot AP from G3 state with configurable delay.ravindr12020-11-231-1/+27
| | | | | | | | | | | | | | | On using Ectool command - reboot_ap_on_g3 [<delay>] && shutdown -h now, AP must perform a reboot from G3 state to S0 state with configurable delay in seconds on it's next corresponding shutdown cycle. BUG=b:172885634 BRANCH=none TEST=Run Ectool command - reboot_ap_on_g3 50 && shutdown -h now. Change-Id: I2c5eb304d27a9647f0adc220d91de2d0b4061460 Signed-off-by: ravindr1 <ravindra@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2528731 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: shim in power sequencingJack Rosenthal2020-11-202-2/+13
| | | | | | | | | | | | | Enable shimming of power sequencing code. BUG=b:171312361 BRANCH=none TEST=With zephyr-chrome CL... https://screenshot.googleplex.com/4m6N6vd2Nx5FpiD.png Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I8fb96019c8c636010d2cd136c0116df41fc9f148 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2548308
* power: allow eSPI virtual wires without eSPI host commands for zephyrJack Rosenthal2020-11-191-3/+3
| | | | | | | | | | | | | | | | | | | For Zephyr OS, we want to get eSPI up and going for power sequencing without having to bring in all of the host command dependencies. Right now the power sequencing code assumes that if we are using eSPI for host commands, that means we might have eSPI virtual wires too. Instead, use the separate option CONFIG_HOST_ESPI_VW_POWER_SIGNAL, which is what we actually want, and allow that to be defined without CONFIG_HOSTCMD_ESPI. BUG=b:171312361 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I2f56ef3ab9cc566f5e0e3926fea96484daa93236 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2548302 Reviewed-by: Yuval Peress <peress@chromium.org>
* sc7180: Fix forever loop if not enough power to boot APWai-Hong Tam2020-11-141-2/+5
| | | | | | | | | | | | | | | | | | | | When the power supply is not enough (<10W adapter and no battery) to boot AP, should clear the boot_from_off flag and go back to S5; otherwise, the boot_from_off flag will trigger the power-on again. Also do the same on power_on() sequence failed. Increase the delay of checking power, such that the messages are not too noisy. BRANCH=None BUG=b:167155164 TEST=Unplugged the battery, plugged a <10W adapter, checked the "Not enough power to boot (-1 %, 7500 mW)" message just showed 10x. Change-Id: Id7c5e66dab62bc71d3e2e00b3be172e13a146ed5 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2536554 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Kukui: initial a new models kakadu of ec.wen zhang2020-11-021-3/+0
| | | | | | | | | | | | | | | Copy from krane, which is a model from Kukui. Modified for building pass. It will need to be revised later. BUG=b:171763111 BRANCH=master TEST=make -j BOARD=kakadu Change-Id: I87fcf8c8e3bd4fa669e0bcb7fbb9d125a9926cdb Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2501801 Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org>
* Trogdor: Deprecate PMIC_FAULT_L signalWai-Hong Tam2020-10-221-2/+0
| | | | | | | | | | | | | | This signal is no longer connected to PMIC on recent hardware revisions. It is unused. Deprecate it. BRANCH=None BUG=b:171245607 TEST=Built the affected Trogdor images. Change-Id: I75562f1aa9e411df38afd321ab63b51e91e7d4f7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488660 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* sc7180: Correct the order of suspend hooksWai-Hong Tam2020-10-141-9/+9
| | | | | | | | | | | | | | | Call the SUSPEND hooks before the SUSPEND_COMPLETE hooks. This matches the resume hooks, that the RESUME_INIT hooks are called before the RESUME hooks. BRANCH=None BUG=b:148149387, b:170604357 TEST=Checked the power off sequence and suspend. Change-Id: Ie51ac808cc142ebd14496056042c7f65be73ffa3 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2468656 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* sc7180: Notify SUSPEND hooks in S0S3 if shutdown from onWai-Hong Tam2020-10-141-2/+7
| | | | | | | | | | | | | | | | This CL pairs with the previous CL:2391202, which notifies the RESUME hook in S3S0 if boot from off. This CL does the counter part, which notifies the SUSPEND hooks in S0S3 if shutdown from on. BRANCH=None BUG=b:148149387, b:170604357 TEST=Verified the SUSPEND hooks are called when shutdown from S0. For example, all the PWM channels are disabled after power off AP. Change-Id: Ib420d5d0e560f30f9c03b5e31788a145279a9c75 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2468476 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* power/mt8192: don't boot AP when wake from AC insertTing Shen2020-10-051-7/+19
| | | | | | | | | | | | | | | | | Implement the wakeup behavior defined in our spec: AC insert -> wake EC Lid open / Power button -> wake EC + AP BUG=b:163963220 TEST=Verify boot behavior matches the spec BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ifc225c07d9a9faf25cf99578d535e63f63fc9bff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437238 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
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