| Commit message (Collapse) | Author | Age | Files | Lines |
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Enable S0ix for amd_x86. This closely follows the
intel_x86.c implementation. b/179294969 tracks merging
intel_x86.c and amd_x86.c
BUG=b:175234270
BRANCH=None
TEST=Build for Guybrush
Boot Zork, enter and leave suspend.
Note, Zork does not support S0ix
Change-Id: I874d2e9019fcc162c7ebfb6091b179ba482a4e47
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2673905
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Rename stoney.c to amd_x86.c since it covers all currently supported
AMD chipsets. Add CHIPSET_CEZANNE to guard any differences between
STONEY and CEZANNE chipsets.
BUG=b:175234270
BRANCH=None
TEST=Build for zork and guybrush
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I96f82127729d64970b8d46fc8ef4ddba6489dd8a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2683923
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Remove powerok signal checking the current GPIO level step.
We found the GPIO_EC_AP_PCH_PWROK_OD did not setting to low
when system shutdown. The signal EC_AP_PCH_PWROK_OD is
connect with signal IMVP9_VRDAY_OD.
The gpio_get_level get GPIO status from the EC register GPDMR
and gpio_set_level set GPIO level by EC register GPDR.
If signal IMVP9_VRDAY_OD is low,
the EC GPDRM will read EC_AP_PCH_PWROK_OD status is low
even the GPDR is set to High.
We remove the signal status check to make sure power sequence is expected.
BUG=b:171450533
BRANCH=firmware-dedede-13606.B
TEST=BOARD=galtic
Check system can power on.
Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com>
Change-Id: Ia8d8c096b15c09644432736df5ca5fc10d91c954
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2675322
Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This provides support for the Intel Alder Lake SoC in conjunction with
the Silergy SLG4BD44540 power sequencer.
A new config option (CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540) is provided
to enable this setup.
This is intended to be used by brya and its variants. Other Alder Lake
boards that use the Ice Lake style power sequencing are not affected by
this new config option.
BRANCH=none
BUG=b:173575131,b:177275055,b:177277633
TEST=buildall passes
Change-Id: I74c36f06fc8ad26c163093753140a5ca242d75c7
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2675309
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This clones the icelake power sequencer code as a baseline for brya's
custom power sequencer. This is solely intended to highlight the
customizations in following patches.
BRANCH=none
BUG=b:173575131
TEST=buildall passes
Change-Id: Ib9f0b986ab617002f987fed26e8aba1f9322a3e1
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2675308
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Unfortunately ec_commands.h define BUILD_ASSERT() which then conflicts
with Zephyr's definition. Add the config.h header to work around this.
BUG=none
BRANCH=none
TEST=builds host_sleep.c without warnings
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ia1c4a555717c6422d3c43d47e8bbaa1ddf83bba3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2676262
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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It was found that the LN9310 3:1 mode active timing is late.
The Switchcap power good checking needs timeout more than 50 msec.
BUG=b:177955474
BRANCH=trogdor
TEST=Make sure pressing power button + F3 can power on successfully.
Change-Id: Ieaabf5cb923b5ac3cc73b31f1dbc8e0504424290
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639001
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: John Crossley <crossley@lionsemi.corp-partner.google.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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This function is shimmed now, we can take away the guard.
BUG=b:172678200
BRANCH=none
TEST=power on volteer
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I7589b3485930e8d40966e9e71434b98648018872
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2615130
Commit-Queue: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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BUG=b:134101454
TEST=#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 96;
at batt 93%, no adapter, powerbtn, stay at G3
at batt 93%, with adapter, powerbtn, boot to S0
at batt 97^, without adapter, powerbtn, boot to S0
BRANCH=kukui
Change-Id: Ib0ee742ccd1f04aaa173a34455c1333853e0ce50
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597122
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This reverts commit ac4f512e60af42efe693e6955c110a7908090e56.
Reason for revert: This CL stops chipset_task forever, revert this to boot AP.
Original change's description:
> zephyr: Add battery and smart battery options
>
> Shim in battery and smart battery support.
>
> BUG=b:175248556
> BRANCH=none
> TEST=boot on volteer, run 'battery' command.
> TEST=run 'ninja menuconfig' and check KConfig help text.
> 20-12-10 20:08:12.778 battery
> 20-12-10 20:08:13.509 Status: 0x02c0 DCHG INIT RC
> 20-12-10 20:08:13.529 Param flags:00000003
> 20-12-10 20:08:13.541 Temp: 0x0b63 = %.1d K (%.1d C)
> 20-12-10 20:08:13.541 V: 0x2a1e = 10782 mV
> 20-12-10 20:08:13.541 V-desired: 0x3390 = 13200 mV
> 20-12-10 20:08:13.541 I: 0x0000 = 0 mA
> 20-12-10 20:08:13.550 I-desired: 0x0a19 = 2585 mA
> 20-12-10 20:08:13.550 Charging: Allowed
> 20-12-10 20:08:13.550 Charge: 0 %
> 20-12-10 20:08:13.550 Manuf: LG
> 20-12-10 20:08:13.555 Device: AC17A8
> 20-12-10 20:08:13.573 Chem: LIO
> 20-12-10 20:08:13.573 Serial: 0xb754
> 20-12-10 20:08:13.573 V-design: 0x2d1e = 11550 mV
> 20-12-10 20:08:13.573 Mode: 0x6001
> 20-12-10 20:08:13.573 Abs charge:0 %
> 20-12-10 20:08:13.573 Remaining: 0 mAh
> 20-12-10 20:08:13.577 Cap-full: 4932 mAh (4833 mAh with 98 % compensation)
> 20-12-10 20:08:13.585 Design: 5360 mAh
> 20-12-10 20:08:13.594 Time-full: 0h:0
> 20-12-10 20:08:13.594 Empty: 0h:0
>
> Change-Id: Ie782e75ee4027ab2a5c6a0ae7f4ad81e9c360711
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2575199
Bug: b:175248556
Change-Id: I66086d8fee46d5fd02d26938468a7d76dab71c6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2589140
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@chromium.org>
Tested-by: Eric Yilun Lin <yllin@chromium.org>
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Shim in battery and smart battery support.
BUG=b:175248556
BRANCH=none
TEST=boot on volteer, run 'battery' command.
TEST=run 'ninja menuconfig' and check KConfig help text.
20-12-10 20:08:12.778 battery
20-12-10 20:08:13.509 Status: 0x02c0 DCHG INIT RC
20-12-10 20:08:13.529 Param flags:00000003
20-12-10 20:08:13.541 Temp: 0x0b63 = %.1d K (%.1d C)
20-12-10 20:08:13.541 V: 0x2a1e = 10782 mV
20-12-10 20:08:13.541 V-desired: 0x3390 = 13200 mV
20-12-10 20:08:13.541 I: 0x0000 = 0 mA
20-12-10 20:08:13.550 I-desired: 0x0a19 = 2585 mA
20-12-10 20:08:13.550 Charging: Allowed
20-12-10 20:08:13.550 Charge: 0 %
20-12-10 20:08:13.550 Manuf: LG
20-12-10 20:08:13.555 Device: AC17A8
20-12-10 20:08:13.573 Chem: LIO
20-12-10 20:08:13.573 Serial: 0xb754
20-12-10 20:08:13.573 V-design: 0x2d1e = 11550 mV
20-12-10 20:08:13.573 Mode: 0x6001
20-12-10 20:08:13.573 Abs charge:0 %
20-12-10 20:08:13.573 Remaining: 0 mAh
20-12-10 20:08:13.577 Cap-full: 4932 mAh (4833 mAh with 98 % compensation)
20-12-10 20:08:13.585 Design: 5360 mAh
20-12-10 20:08:13.594 Time-full: 0h:0
20-12-10 20:08:13.594 Empty: 0h:0
Change-Id: Ie782e75ee4027ab2a5c6a0ae7f4ad81e9c360711
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2575199
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CL:2321874 moves sleep_set_notify() and sleep_notify_transition()
under CONFIG_POWER_SLEEP_FAILURE_DETECTION ifdef and introduces their
no-op counterparts if CONFIG_POWER_SLEEP_FAILURE_DETECTION is not
defined. Before that CL aforementioned functions were outside ifdef.
Commit message also mentions that CL is only moving code, not performing
any logical changes.
Therefore this CL is moving sleep_set_notify() and sleep_notify_transition()
outside ifdef and removes their no-on counterparts to eliminate logical
changes introduced in CL:2321874
Issue was found when running EC ToT on octopus (casta). When AP was
going to S0ix EC reported that fact, but PD was not changing DRP
state to 'toggle off'.
BUG=b:162083524, b:161775827
BRANCH=none
TEST=Compile and flash firmware on octopus (tested on casta).
Go to ChromeOS Developer Console and issue 'powerd_dbus_suspend'
Check EC console if PD stack is reporting state transition and make
sure that DRP is set to 'toggling off'
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I6ba4187c8549ee6d9e3b19543d67c49520927cb8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2575064
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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`apshutdown` sometimes fails to shutdown PMIC, when this happens,
powerstate will bounce between G3 and S5G3 until watchdog kicks in.
To fix this, we should detect PMIC status in S5G3, go back to S5 to
retry shutdown if PMIC is still alive.
BUG=b:174546890
TEST=Run the reproduce steps in b/174546890#comment13,
verify EC enters G3.
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I1f0544e16d818074378f58f1208bd586031a5ebb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2573895
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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This makes the headers visible to the Zephyr build.
BUG=b:173798264
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I3b6d27c1234b3924ee8902a86eec5fdb2ccd9998
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2571897
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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According to some experiments, the current delays are not enough on
some boards. Add larger margin to the value. Also do the same on the
power-off sequence delay.
BRANCH=Trogdor
BUG=b:163613549
TEST=Made DUT transit to DEV mode and the next auto-boot worked fine.
Change-Id: Ia72c725fe1e8ff795e637e1b4b99b097478bcc1a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2565635
Commit-Queue: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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On using Ectool command - reboot_ap_on_g3 [<delay>] && shutdown -h now,
AP must perform a reboot from G3 state to S0 state with configurable
delay in seconds on it's next corresponding shutdown cycle.
BUG=b:172885634
BRANCH=none
TEST=Run Ectool command - reboot_ap_on_g3 50 && shutdown -h now.
Change-Id: I2c5eb304d27a9647f0adc220d91de2d0b4061460
Signed-off-by: ravindr1 <ravindra@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2528731
Reviewed-by: Keith Short <keithshort@chromium.org>
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Enable shimming of power sequencing code.
BUG=b:171312361
BRANCH=none
TEST=With zephyr-chrome CL...
https://screenshot.googleplex.com/4m6N6vd2Nx5FpiD.png
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I8fb96019c8c636010d2cd136c0116df41fc9f148
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2548308
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For Zephyr OS, we want to get eSPI up and going for power sequencing
without having to bring in all of the host command dependencies.
Right now the power sequencing code assumes that if we are using eSPI
for host commands, that means we might have eSPI virtual wires too.
Instead, use the separate option CONFIG_HOST_ESPI_VW_POWER_SIGNAL,
which is what we actually want, and allow that to be defined without
CONFIG_HOSTCMD_ESPI.
BUG=b:171312361
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I2f56ef3ab9cc566f5e0e3926fea96484daa93236
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2548302
Reviewed-by: Yuval Peress <peress@chromium.org>
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When the power supply is not enough (<10W adapter and no battery)
to boot AP, should clear the boot_from_off flag and go back to S5;
otherwise, the boot_from_off flag will trigger the power-on again.
Also do the same on power_on() sequence failed.
Increase the delay of checking power, such that the messages are
not too noisy.
BRANCH=None
BUG=b:167155164
TEST=Unplugged the battery, plugged a <10W adapter, checked the
"Not enough power to boot (-1 %, 7500 mW)" message just showed 10x.
Change-Id: Id7c5e66dab62bc71d3e2e00b3be172e13a146ed5
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2536554
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Copy from krane, which is a model from Kukui.
Modified for building pass.
It will need to be revised later.
BUG=b:171763111
BRANCH=master
TEST=make -j BOARD=kakadu
Change-Id: I87fcf8c8e3bd4fa669e0bcb7fbb9d125a9926cdb
Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2501801
Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org>
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This signal is no longer connected to PMIC on recent hardware
revisions. It is unused. Deprecate it.
BRANCH=None
BUG=b:171245607
TEST=Built the affected Trogdor images.
Change-Id: I75562f1aa9e411df38afd321ab63b51e91e7d4f7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488660
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Call the SUSPEND hooks before the SUSPEND_COMPLETE hooks. This matches
the resume hooks, that the RESUME_INIT hooks are called before the RESUME
hooks.
BRANCH=None
BUG=b:148149387, b:170604357
TEST=Checked the power off sequence and suspend.
Change-Id: Ie51ac808cc142ebd14496056042c7f65be73ffa3
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2468656
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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This CL pairs with the previous CL:2391202, which notifies the RESUME
hook in S3S0 if boot from off. This CL does the counter part, which
notifies the SUSPEND hooks in S0S3 if shutdown from on.
BRANCH=None
BUG=b:148149387, b:170604357
TEST=Verified the SUSPEND hooks are called when shutdown from S0.
For example, all the PWM channels are disabled after power off AP.
Change-Id: Ib420d5d0e560f30f9c03b5e31788a145279a9c75
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2468476
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Implement the wakeup behavior defined in our spec:
AC insert -> wake EC
Lid open / Power button -> wake EC + AP
BUG=b:163963220
TEST=Verify boot behavior matches the spec
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ifc225c07d9a9faf25cf99578d535e63f63fc9bff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437238
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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After enabling the suspend hang detection, the RESUME hooks are deferred
to S0. When the kernel sets the host sleep event to flag the resume
completion, EC notifies the RESUME hooks. However, when it boots from an
off state, G3 or S5, the kernel won't set this host sleep event. Should
explicitly notify the RESUME hooks in the S3S0 state.
The change also renames the flag boot_from_g3 to boot_from_off and
carries it forward to S3S0; and renames the flag shutdown_from_s0 to
shutdown_from_on and carries it forward to S3S5.
BRANCH=None
BUG=b:148149387, b:167155164
TEST=Verified the RESUME hooks are called when boot from S5.
Change-Id: I48ee09ad66e53363e7a20d9602b37571177ac300
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391202
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Currently, SC7180 power sequence is tightly coupled with a single
switchcap part, i.e. DA9313. Should decouple the switchcap control
from the power sequence, such that more different switchcap parts
can be supported.
BRANCH=None
BUG=b:163867792
TEST=Built the affect images and booted into kernel.
Change-Id: I7f63cd22bbc308672c40a734be4f6dfc80e07158
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2386480
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
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In current EC implementation, EC turns off PP5000_A in G3. Since
PPC is powered by PP5000_A, it needs special logic to handle the
re-power and re-initialization.
See b:154775121 for more discussion.
To simplify the logic, change the behavior to turn PP5000_A off
only when hibernate, so we won't need to worry about re-initialize
PPC anymore (resume from hibernate is a reboot, so it's also
covered here).
BUG=b:154775121
TEST=1) Run the test script in CL:2169443
2) Verify PD is functional whenever EC is awake.
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I07c03f9a8c0b77012d1284a283ce489e54b1a058
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378940
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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This reverts commit 8db6eb89540a0ca72e29633ffbfd1eac10d6ad6a.
Reason for revert: See chromium:1073960
Original change's description:
> power: Don't boot after waking up from hibernation
>
> When a device shuts down and is idle for 60 mins (configurable), EC
> enters hibernation. When an AC adapter is plugged, the system boots.
> This is not expected behavior and not consistent with the behavior
> that the system stays off on AC plug-in before hibernation.
>
> This patch fixes the above inconsistency by storing AP_OFF flag before
> entering hibernation after 60 mins idle in S5.
>
> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
>
> BUG=chromium:1073960
> BRANCH=none
> TEST=Verified Bloog stays off after waking up from hibernation on
> AC plug-in.
>
> Change-Id: I097bee97164284dd4c35f8bf9389c76319fd676a
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176555
> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
Bug: chromium:1073960
Change-Id: I2792dd6d868118ffcba533a3cdb5195cc7d71b76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363099
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
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This reverts commit 4aacf83506fd959d1341e29b664f6e4fe97824cb.
Reason for revert: See chromium:1073960
Original change's description:
> system: Clear AP_IDLE when waking up from hibernation by AC
>
> Currently, AP_IDLE is set when EC is left idle in G3. This makes the AP
> stay off after EC wakes up from hibernation (for any wake-up source).
> This makes a board require another power button press to boot the
> system from hibernation.
>
> This change makes RO clear AP_IDLE unless AC is present. When AC is
> present, EC doesn't hibernate. So, AC presence infers the EC woke
> up from hibernation by AC. That is, if the system wakes up by a power
> button press, AP_IDLE is cleared and AP will be turned on (unless it's
> overwritten by AP_OFF).
>
> Tested as follows on Trembyle:
> 1. Put DUT in hibernation.
> 2. Wake up DUT and observe:
> a. When waking up by power button, AP is turned on.
> b. When waking up by lid open, AP is turned on.
> c. When waking up by AC, AP is left idle.
>
> BUG=b:157077589, chromium:1073960
> BRANCH=none
> TEST=See above.
>
> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
> Change-Id: Ie5020bbe50ad489f4e3010820681cc57ff51b941
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236589
Bug: b:157077589
Bug: chromium:1073960
Change-Id: Id92d0d3657a622338581cb111d3925cbc11bf168
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363080
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
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In a device without battery plugged, EC has to wait PD to negotiate to
at least 7.5W. Some charger takes a bit longer to negotiate a PD
contract and misses the timeout. AP won't autoboot. This CL increases
the timeout.
BRANCH=None
BUG=b:165027088, b:150240129
TEST=Unplugged the battery, plugged a PD charger, and AP booted up.
Change-Id: I775f87c2a7c25a3c160bd97d09bbbc1d617095b4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360435
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Instead of asserting that task_start() has not been called,
just return without doing any locking.
This avoids the need to fix every caller of mutex_lock() to check
task_start_called().
BUG=b:164461158
BRANCH=none
TEST=Esc+F3+Power enters recovery, does not assert.
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ic157d7e7041185a67f257f0f5710fd02e45cd77f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2357496
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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In a forced shutdown, it just waits the POWER_GOOD drop to low, but not
wait the SYSTEM_POWER_ON_DELAY. If AP requests EC reboot at shutdown,
EC reboots immediately right after turns off the switchcap. Better to
delay a bit.
BRANCH=None
BUG=b:156981868, b:163613549
TEST=After switching from normal to dev mode, AP boots normally.
Change-Id: Iae300aa03dd0a991f62742159613377fe2388760
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2352440
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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mutex_lock() must not be used in interrupt context. Add an assert
to catch this.
Also assert task_start_called() since task ID is not valid
before this.
Also remove an old assert since comparing id with TASK_ID_INVALID
doesn't make sense.
Add check for task_start_called() for NPCX flash_lock, I2C port_mutex,
pwr_5v_ctl_mtx, STM32 bkpdata_write_mutex.
This was submitted CL:2309057, reverted CL:2323704, submitted
CL:2335738, reverted CL:2341706.
BUG=b:160975910
BRANCH=none
TEST=boot AP, jump to RW
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I0aadf29d073f0d3d798432099bd024a058332412
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343450
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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A timer is created in the check_for_power_off_event(), which waits for
the power button long press. Should cancel the timer during the power
state transition; otherwise, EC will crash.
The S3 state calls the check_for_power_off_event() too. So cancel the
timer during S3->S0 and S3->S5.
BRANCH=None
BUG=b:163367454
TEST=Checked the bug scenario:
* In VT2, run powerd_dbus_suspend and EC transits the state to S3.
* Press power button
* EC transits the state to S0; no crash.
TEST=Tested the normal shutdown case:
* Hold the power button
* After 8s, EC transits to S3 and then S5 after the power button is
released.
TEST=Tested the change in check_for_power_off_event():
* Hold the power button
* In VT2, run "shutdown -H now" which makes POWER_GOOD drop
* EC transits to S3 and then S5 after the power button is released
Change-Id: Ia279e890954cf77f94ae8907a2782f94265c849a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2346600
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Should use the CHIPSET_STATE_SUSPEND to check if it is in S3, instead of
CHIPSET_STATE_STANDBY, which is actually the S0ix state.
BRANCH=None
BUG=b:148149387
TEST=Hached to make EC in S3 and then trigger AP warm reset.
Noticed the the CHIPSET_RESET_HOOK triggered and entered the if clause.
> [90.811712 power state 2 = S3, in 0x001c]
[90.812383 power state 2 = S3, in 0x001d]
[90.867572 power state 2 = S3, in 0x001e]
[90.944061 power state 2 = S3, in 0x001c]
[90.944957 power state 2 = S3, in 0x001d]
[91.000530 power state 2 = S3, in 0x001e]
[91.101117 power state 2 = S3, in 0x001c]
[91.101785 power state 2 = S3, in 0x001d]
[91.156711 power state 2 = S3, in 0x001e]
[91.157318 Chipset reset: exit s3]
[91.157659 Handle sleep: 0]
12 signal changes:
90.811621 +0.000000 PS_HOLD => 0
90.812012 +0.000391 AP_RST_L => 0
90.867371 +0.055359 AP_RST_L => 1
90.867483 +0.000112 PS_HOLD => 1
90.943970 +0.076487 PS_HOLD => 0
90.944357 +0.000387 AP_RST_L => 0
91.000328 +0.055971 AP_RST_L => 1
91.000441 +0.000113 PS_HOLD => 1
91.100809 +0.100368 PS_HOLD => 0
91.101183 +0.000374 AP_RST_L => 0
91.156510 +0.055327 AP_RST_L => 1
91.156623 +0.000113 PS_HOLD => 1
Change-Id: I8a3f2fec7e7c0ca784d5d742e5e9352fa019b18e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2346601
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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The HOOK_CHIPSET_RESET should be notified when the AP resets.
In x86 platforms, EC monitors the LPC LRESET pin. This LRESET pin is
asserted when the chipset resets. However, ARM platforms don't use
LPC. We need another way to monitor AP reset.
This CL modifies the SC7180 power sequence, to monitor the AP_RST_L
signal from PMIC. PMIC uses the AP_RST_L to notify AP reset. A
complete warm reset sequence will toggle the AP_RST_L signal 3 times.
EC monitors the AP_RST_L signal and wait it transition 3 times to
notify the HOOK_CHIPSET_RESET. In case, the AP_RST_L is not toggled
3 times, still notifies the hook but prints a warning message.
BRANCH=None
BUG=b:163078082
TEST=Checked the HOOK_CHIPSET_RESET is notified after AP warm reset.
Change-Id: I4e7b0f0d266e01526deaf54afcdfd2ac1037b8f6
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343753
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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This only adds the sleep failure detection support to SC7180 power
sequence but not enable it yet. The board has to explicitly define
the following CONFIG to enable this feature:
* CONFIG_CHIPSET_RESUME_INIT_HOOK
* CONFIG_POWER_SLEEP_FAILURE_DETECTION
Without defining the CONFIGs, the only change is to disable/enable
the AP_SUSPEND signal interrupt; the suspend/resume hooks are
unchanged, i.e. not wait for the host sleep event.
With defining the CONFIGs, the suspend failure detection is enabled.
When AP_SUSPEND is deasserted, only the RESUME_INIT hook is triggered
to initialize the SPI interface, such that EC can receive the host
sleep event. The RESUME hook is delayed to be triggered until AP
sends the resume event.
If AP_SUSPEND becomes asserted before receiving the host event, will
back to S3 and the SUSPEND_COMPLETE hook is triggered to disable the
SPI interface.
If no host event is received and no AP_SUSPEND assertion, a timeout
happens and wake the AP with a HANG_DETECT event.
BRANCH=None
BUG=b:148149387
TEST=Tried the following scenaiors (the CONFIGs not defined):
(1) On AP_SUSPEND assertion, SUSPEND hook triggered, go to S3;
(2) On AP_SUSPEND deassertion, RESUME hook triggered, go to S0.
Checked the follower CL for the configs defined.
Change-Id: I28301921a4c85aab092cdc8af9d6ff4b1da7ec61
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321876
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Move the sleep failure detection logic from intel_x86 power sequence to
a common library, i.e. host_sleep.
This CL simply moves the code, without any logic change.
BRANCH=None
BUG=b:162083524
TEST=Build the hatch board.
Change-Id: Ia3f70804ded8d80c4a079a36fbf1819c05a2090b
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321874
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This CL abstracts the chipset specific functions, that makes the hang
detection logic clearer. The changes are like:
* Set the sleep_notify variable through the call sleep_set_notify()
* The chipset specific timeout handle is moved to a callback function.
This callback is passed to sleep_start_suspend().
BRANCH=None
BUG=b:162083524
TEST=Build the hatch board.
Change-Id: Ib9462f1fecbd39d63607bb9f10d1994e54c9ac64
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2327837
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Move the LPC handling logic out of the sleep failure detection
functions. For example, move the lpc_s0ix_suspend_clear_masks()
to the first SUSPEND hook, move power_update_wake_mask() out of
sleep_complete_resume().
BRANCH=None
BUG=b:162083524
TEST=Build the hatch board.
Change-Id: I16c4ed88e7cf40aabb9ce2d9ec95f7994dfe7efc
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321873
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the term "dummy" with inclusive
alternatives.
BUG=b:162781382
BRANCH=None
TEST=make -j buildall
`grep -ir dummy *`
The only results are in "private/nordic_keyboard/sdk8.0.0"
which is not our code.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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This change prepares to separate the sleep failure detection out of
intel_x86, such that other chipset power sequence can reuse the code.
It only touches the naming. No logic changes.
* Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION
* Modify the function and variable names, to avoid S0ix
* Modify the comment to more neutral
BRANCH=None
BUG=b:162083524
TEST=make buildall -j
Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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This reverts commit 27ee378bb78a299a0983379be83eb6d55860b4ae.
Reason for revert: b/162508724
A wake-up source from hibernation needs to be determined only by RO. Reverting back to the original implementation: CL:2236589.
Original change's description:
> power: Clear AP_IDLE when waking up by PB or LID
>
> Currently, AP_IDLE is cleared when EC wakes up by the power button or
> the lid open.
>
> This patch extends the logic from CONFIG_EXTPOWER_GPIO to
> CONFIG_EXTPOWER so that the bug (chromium:1073960) can be also fixed
> on the boards using non-GPIO method for extpower_is_present.
>
> Tested as follows on Trembyle:
> 1. Put DUT in hibernation.
> 2. Wake up DUT and observe:
> a. When waking up by power button, AP is turned on.
> b. When waking up by lid open, AP is turned on.
> c. When waking up by AC, AP is left idle.
>
> BUG=b:157077589, chromium:1073960, b:159350276
> BRANCH=none
> TEST=See above.
>
> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
> Change-Id: I944aaac036ce58659e81b7021e52a3291f31e951
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283946
> Reviewed-by: Jett Rink <jettrink@chromium.org>
Bug: b:157077589
Bug: chromium:1073960
Bug: b:159350276
Bug: b:162508724
Change-Id: Iaf9d0af2ca8c48bbf2529c4ba05493837dd76287
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2333106
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
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The QSIP_ON GPIO controls the load switch enable. The load switch is
redundant and used for experiments. But leaving it off consumes power.
Should enable it during AP power-on and disable it during AP power-off,
such that it doesn't waste power.
Add the QSIP_ON GPIO to the trogdor board. It was added since rev-1
(rev-0 is NC).
BRANCH=None
BUG=b:159999589
TEST=Checked AP power-on and power-off.
Change-Id: Ia1ef6a0c2285b5adcc53b717f7f310b15eb1d941
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2327632
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Jim Guerin <jguerin@google.com>
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The AP_SUSPEND signal doesn't work on ToT kernel. It needs more work.
Introduce a way to fake the signal for testing.
BRANCH=None
BUG=b:148149387
TEST=Typing "fakesuspend on" in S0, transit into S3;
then typing "fakesuspend off" in S3, transit into S0;
then typing "fakesuspend reset", back to using AP_SUSPEND signal.
Change-Id: I706b576a848f9875e8ce6bed4c71ea7e33dfc315
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324988
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
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The S0ix requires the CONFIG_POWER_TRACK_HOST_SLEEP_STATE enabled;
otherwise, a compilation error happens. Add a config check for it
and simplify some #ifdef clauses.
BRANCH=None
BUG=b:162083524
TEST=make buildall -j
TEST=Removing the CONFIG_POWER_TRACK_HOST_SLEEP_STATE on hatch caused
a fail.
Change-Id: Ic685d1ca5d05d705fcf6bb43717fc05f6526274e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321871
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Move the enable_sleep(SLEEP_MASK_AP_RUN) call from S5S3 to S3S0,
such that the idle task can go into deep sleep in S3.
BRANCH=None
BUG=b:148149387
TEST=Tried to trigger different states on the power sequence.
Change-Id: I9f7ea0186547ea460b3a07d4e98cef0fa6c16b08
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321878
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Resets EC if EC has jumped before and we want to boot AP.
In the normal flow, EC should stay at RW and reset itself
and AP should request EC for bootblock when start booting.
On some testing scenario, we might want to boot AP after RO->RW->RO
transition, and in such case, AP won't be able to boot due to
AP_SYS_RST_ODL been pulled down by the SLG, and SLG latches output
until the next EC_RST_ODL. So in such test cases, we should
reset the EC.
BUG=b:161584167
TEST=boot AP; sysjump RO; apshutdown; powerbtn 1200; ensure AP boots
BRANCH=kukui
Change-Id: Ia4066f1764b83acf6835f344393dcad8c125d0e3
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2319494
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the terms "sane", "sanity check", and
similar with inclusive/non-stigmatizing alternatives.
BUG=b:161832469
BRANCH=None
TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows
results only in third-party code or documentation.
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169
Reviewed-by: Jett Rink <jettrink@chromium.org>
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In the previous power state machine, S3 was just a transitional state
between S0 <-> S5. This change supports staying and leaving S3, by
checking the AP_SUSPEND signal.
BRANCH=none
BUG=b:148149387
TEST=Powered DUT on and off; verified transition to S0 and S5.
TEST=Modified the AP_SUSPEND signal; verified transition to S3 and S0.
Change-Id: I7978be31d05546c814d2588eaf1f4e1ac47638ce
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220833
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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