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* power/mt8186: move ap-idle to highest priority at power_chipset_initTing Shen2023-05-171-8/+11
| | | | | | | | | | | | | | | | | | | AP_IDLE should have higher priority over AP_OFF. (note that in this version there's another bug that the S5->S0 hooks are not invoked when sysjump to RW) BUG=b:280408533 TEST=AP can boot to S0 after following steps: 1) dut-control power_state:rec 2) wait a few seconds to enter recovery screen 3) dut-control power_state:warm_reset Change-Id: I0b69f082f09afac93275bef7d93ca7123ab1099f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4387555 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Sung-Chi Li <lschyi@chromium.org>
* power/x86: Add dedicated interrupt handler for pwrokDaisuke Nojiri2023-05-111-0/+21
| | | | | | | | | | | | | | | | On urgent shutdown, it's required for PCH_PWROK to drop while PCH's voltages are still above 95%. This CL adds a dedicated interrupt handler for DSW_PWROK to reduce the latency. BUG=b:279918234 TEST=Build Agah. Change-Id: I933913fc86c0636b3fed362ddc14712903531e84 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4519341 Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* power/icelake: Wait for enough power before booting the APReka Norman2023-04-181-0/+5
| | | | | | | | | | | | | | | | | | | | | Currently, when dibbi is powered from Type-C only, the AP fails to boot after an EC reboot. This is because it tries to boot the AP before PD negotiation is complete, so there is not enough power to boot. Modify the icelake power sequencing to wait for enough power before trying to boot the AP. This is similar to how CL:1980104 solved the same issue on puff. BRANCH=None BUG=b:272188485 TEST=reboot EC on dibbi with Type-C power only, AP boots successfully Change-Id: I815c69c58d1f6c9c759ec17b81a7b40fc96279f8 Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4421370 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Reka Norman <rekanorman@chromium.org> Commit-Queue: Reka Norman <rekanorman@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* zephyr: Eliminate pointer from SYS_INIT functionsKeith Short2023-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | The upstream change https://github.com/zephyrproject-rtos/zephyr/pull/51217 modified the function signature for the SYS_INIT call, eliminating the unused device pointer. Run the Zephyr provided script ./zephyr/scripts/utils/migrate_sys_init.py to update all callers. BUG=b:278595739 BRANCH=none TEST=zmake build -a Cq-Depend: chromium:4422804 Change-Id: I881bc536cef43a7c3ac4bc5eb3ce1893237bbd1f Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4437049 Reviewed-by: Tristan Honscheid <honscheid@google.com>
* power: Add s0ix counterGrzegorz Bernacki2023-04-141-0/+10
| | | | | | | | | | | | | | This commit adds counter which increments every time EC detects going into S0ix state. BUG=b:261869264 TEST=Tested on skyrim BRANCH=none Change-Id: I26475d80a891e64509686000e9fd37681553ef76 Signed-off-by: Grzegorz Bernacki <bernacki@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4239441 Reviewed-by: Robert Zieba <robertzieba@google.com>
* mt8186,mt8188: check the holder of AP_RST_ODLEric Yilun Lin2023-04-071-5/+29
| | | | | | | | | | | | | | | | | | | | | | | | | To distinguish the AP shutdown, and the AP reset held by GSC/Servo, we use the SYS_RST_ODL as the reference. If AP_EC_SYSRST_ODL is asserted, but SYS_RST_ODL is not, this is a normal shutdown. If AP_EC_SYSRST_ODL is asserted, and so is SYS_RST_ODL, the AP reset is held by GSC or Servo. In this case, we should let the power state stay at S0 to prevent from an unexpected shutdown. BUG=b:276229973 TEST=pass firmware_CorruptMinios TEST=dut-control warm_reset:on sleep:1 warm:reset:off, it stays at S0 BRANCH=none Change-Id: I9b69caa0d15e6e58e7f11ad1079536bc1954b5ce Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4402421 Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* mt8186,mt8188: fix chipset_force_shutdown before power_chipset_initEric Yilun Lin2023-04-061-1/+9
| | | | | | | | | | | | | | | | | | The power state is not reflect the actual power state before the power_chipset_init. When a chipset_force_shutdown is called before the task inited, the power state API will not reflect the actual state. This CL fix that by querying the signal state instead. BUG=b:276229973 TEST=pass firmware_CorruptMinios.minios_b BRANCH=none Change-Id: I0e48d9745039c6de460fd5579486fe5f3e74cda8 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4387196 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* Host sleep: Consider a reboot after suspend to be a resumeDiana Z2023-03-211-0/+7
| | | | | | | | | | | | | | | | | | | | When we try to wake the host during a failed resume, the host may reboot rather than actually following the resume path. In this case, we will receive events of "0" indicating we're on a fresh boot and the chipset RESUME hooks never run. Instead, we should treat this new boot as a resume in order to ensure the previous SUSPEND hooks get a RESUME call to go with them. BRANCH=None BUG=b:273327518 TEST=on whiterun, run suspend with bad AP FW version and ensure the backlight turns on after we wake the host Change-Id: I9c8e7ad70dbca5245844a31772e99097256e592f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344029 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* mt8186: fix sysjump and hibernate actionsEric Yilun Lin2023-03-201-9/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. fix sysjump will boot the system with AP IDLE 1. fix boot with AP OFF 2. fix boot from hibernate The recent change which make the system staying at S5 for 10 seconds when AP power off. When sysjump requested, the RW part will automatically boot the system from S5 due to the initial in_exiting_off flag defaults to true. Since the exiting_off status is controlled by the power_chipset_init, we don't need the flag defaults to true on boot. Also, change the initial power state S5 to G3. They are the same in rail-wise on mt8186, but not in mt8188. Assign it as G3 to match mt8188 initial GPIO and rail states. When the AC on under hiberante, or the EC boots with AP OFF flag, this ensures the system stay at G3. BUG=b:274051287 b:274063396 b:274368558 TEST=pass firmware_ECPowerButton TEST=pass firmware_ECWakeFromULP TEST=dut-control cold_reset:on sleep:1 cold_reset:off, boot to S0 TEST=dut-control power_state:rec; dut-control power_key:tab. stay at S5->G3 TEST=hibernate, and AC on. The EC stays at G3. BRANCH=none Change-Id: I253f4956665a6a0edc2fe59c5a8a90a7c07a6180 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349381 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* mt8186,mt8188: skip forcing shutdown if AP is offEric Yilun Lin2023-03-151-1/+12
| | | | | | | | | | | | | | | | | | If the AP is off, we should stop calling chipset_force_shutdown() from re-doing shutdown. BUG=b:273657181 TEST=In S0, dut-control power_key:8.2, the chipset_force_shutdown is not called BRANCH=none Change-Id: I4413f984465f10d0f4b588cd6d80ead8464778bc Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4338759 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com>
* mt8186,mt8188: fix warm reset issued by servo and gscEric Yilun Lin2023-03-151-9/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the EC holding SYS_RST_ODL (AP reset) in S3S5. Only asserting the SYS_RST_ODL with forcing shutdown. This will allow the AP to boot when the servo or gsc releases SYS_RST_ODL. When the AP is in reset, the power_state will be set to S5 first, and the target should be G3 if the power state has been put to G3 by S5 inactive timer. This is to prevent EN_PP4200_S5 and PMIC from being turned off, which would prevent the AP from booting when SYS_RST_ODL released if the AP reset was held by gsc or servo. To make it clearer, only three cases that we need to consider: 1. SYS_RST_ODL is held by GSC or Servo 2. SYS_RST_ODL is asserted by AP itself, a gracefully shutdown 3. SYS_RST_ODL is asserted by EC. For case 1, and 2, we don't need to assert SYS_RST_ODL, since the EC is not the initiator. BUG=b:267268982 b:273657518 TEST=On Steelix, and Geralt: * Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control dut-control power_key:8.2 Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control dut-control power_key:9.2 Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control dut-control power_key:tab Result: G3 -> S0 * Console command: apreset Result: S0 -> S0, AP reboots * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 * AP console: reboot Reulst: S0 -> S0 * AP console: poweroff Reulst: S0 -> G3 * Short power press to power-on: $ dut-control dut-control power_key:tab Result: G3 -> S0 * Servo issue warm reset: $ dut-control power_state:warm_reset Result: S0 -> S5 -> S0 * Servo hold warm_reset and release: $ dut-control warm_reset:on sleep:2 warm_reset:off Result: S0 -> S5 -> S0 BRANCH=none Change-Id: I81fc25a5088722487fbbf74d641a5edf4ad450e5 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4338758 Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Eric Yilun Lin <yllin@google.com>
* mt8188: add power signal PMIC_EC_RESETBEric Yilun Lin2023-03-101-0/+9
| | | | | | | | | | | | | | | | | | | | Add PMIC_EC_RESETB signal, which is used by PMIC to reset the AP. After the PMIC hard off triggered, we should wait for the PMIC reset the AP then we can safely remove the PMIC rail EN_PP4200_S5. BUG=b:267268982 TEST=scope the power signals changing is expected when 1. PMIC hard off 2. powerkey forcing shutdown 3. AP issue poweroff BRANCH=none Change-Id: I945d9f4ebbf6d53288c6503df7254ce448073565 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290680 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* mt8188: fix PP4200_S5 enable/disable timingEric Yilun Lin2023-03-101-11/+10
| | | | | | | | | | | | | | | | The timing on/off timing should be moved to G3S5 and S5G3 to align the S5 naming. BUG=b:267268982 TEST=ensure the PG_PP4200_S5 is on/off at S5 state BRANCH=none Change-Id: I2ad6631125216a1400d169064389de38b1e1a60b Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4271050 Commit-Queue: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com>
* mt8186,mt8188: fix power signal maskEric Yilun Lin2023-03-101-0/+1
| | | | | | | | | | | | | | | | The power_signal APIs need a POWER_SIGNAL_MASK shift before used. BUG=b:267268982 TEST=zmake BRANCH=none Change-Id: Id3e588756d309f872e86d60baba8ad82e0e87720 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290679 Auto-Submit: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com>
* mt8186,mt8188: increase PMIC hard off delay by 20% toleranceEric Yilun Lin2023-03-071-1/+2
| | | | | | | | | | | | | | | | | The PMIC hard off delay has a 20% tolerance, so increase the PMIC_HARD_OFF_DELAY to match the spec. BUG=b:267268982 TEST=zmake BRANCH=none LOW_COVERAGE_REASON=geralt bringup Change-Id: I822e6de7c75e9806763e3139f135e8f65c0bf171 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290678 Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* mt8186,mt8188: force turning off PMIC at S3S5Eric Yilun Lin2023-02-221-84/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL ensures that before going to S5, the PMIC has turned off the power source to AP, and we can move SHUTDOWN_COMPLETE to S3S5. It did this by asserting EC_PMIC_EN_ODL at S3S5. For pressing button shutdown, the flow becomes: S0 -> hold powerkey 8 seconds -> S3 -> S3S5 -> hold EC_PMIC_EN_ODL for 8 seconds -> S5 -> G3 For the other shutdowns: S0 -> S3S5 -> hold EC_PMIC_EN_ODL for 8 seconds -> S5 -> G3 Also, the AP won't boot when it's turning off the PMIC (S3S5) until it goes to S5. BUG=b:242012415 b:267268982 TEST=On Steelix, Tentacruel and Geralt: * Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control dut-control power_key:8.2 Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control dut-control power_key:9.2 Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control dut-control power_key:tab Result: G3 -> S0 * Console command: apreset Result: S0 -> S0, AP reboots * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 * AP console: reboots Reulst: S0 -> S0 * AP console: poweroff Reulst: S0 -> G3 * Short power press to power-on: $ dut-control dut-control power_key:tab Result: G3 -> S0 BRANCH=none Change-Id: Iacaa3dbcdafd61b2f3371e2ba376ebdcf29659ff Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4269797 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* mt8186,mt8188: disable IN_AP_SUSPEND interrupt in G3/S5Eric Yilun Lin2023-02-211-12/+6
| | | | | | | | | | | | | | | | | | | GPIO_AP_IN_SLEEP_L will be floating when the AP off, so only enable the interrupt when AP is on. Also, drop the unnecessary interrupt enables, which should have done in power_common_init(). BUG=none TEST=AP suspend, and AP_IN_SLEEP_L is captured by the powerindebug BRANCH=none Change-Id: I496c2a4a0b7d7e2f18d8c14945f67d91878ac045 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4269796 Commit-Queue: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com>
* mt8186,mt8188: check IN_AP_RST signal when wachdog IRQ raisedEric Yilun Lin2023-02-211-5/+2
| | | | | | | | | | | | | | | | | Watchdog interrupt is only significant only when AP is on, which means the IN_AP_RST should not be asserted. BUG=b:242012415 TEST=stop daisydog; echo > /dev/watchdog; EC report AP_WACHDOG reset BRANCH=none LOW_COVERAGE_REASON=initial bringup Change-Id: I2af6fc6f61b909a31e542d86a5a43011cdb6afac Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3820873 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* power/amd_x86: Add support for STB dumpingRobert Zieba2023-02-161-0/+10
| | | | | | | | | | | | | | | | Skyrim supports dumping the contents of the SoCs smart-trace buffer when triggered externally. The contents of the STB can be useful in debugging S0i3 suspend failures. Add support for triggering an STB dump when the SoC hangs during S0i3 entry/exit. BRANCH=none BUG=b:246770811 TEST=Ran on skyrim DUT Change-Id: Ie18c6072a77f6dd306a46d7f76bd345b4f9e75a7 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4220248 Reviewed-by: Diana Z <dzigterman@chromium.org>
* power/mt8186: support mt8188 power sequenceEric Yilun Lin2023-02-101-13/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MT8186 and MT8188 chipset have similar power sequence, so we re-use the mt8186.c. Add power signal EN_PP4200_PG_S5, which controls the PP4200 rail and which is PMIC's VCC. We turn it on/off at S5->S3/S3->S5. Also, drop cros-ec support, which is not used. BUG=b:267268982 TEST=* Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control dut-control power_key:9.2 Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control dut-control power_key:9.2 Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control dut-control power_key:tab Result: G3 -> S0 * Console command: apreset Result: S0 -> S0, AP reboots * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 BRANCH=none Change-Id: I76bf3e4c4352982132e37bf952c29c4fce60f630 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4219278 Commit-Queue: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* qcom: Suppress the power signal log of AP_SUSPENDWai-Hong Tam2023-01-182-1/+10
| | | | | | | | | | | | | | | | Introduce a new flag to suppress the log of the power signal. Enable this new flag for the AP_SUSPEND signal as it toggles frequently in S3. BRANCH=None BUG=b:249750823 TEST=Make the device in S3 and check the EC UART not too noisy. Change-Id: Ib0155373ce85c0adc06153e8d3b24b8ac72c8036 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4172846 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* corsola: power sequence teststabilize-15300.B-mainTing Shen2022-12-301-10/+0
| | | | | | | | | | | | | | | | | | Add a test to verify mt8186 power state machine behavior. power/mt8186.c has above 90% coverage after this CL. BUG=b:256575497 TEST=./twister -v -i --coverage -p native_posix -p unit_testing BRANCH=none Change-Id: I2f274697e83dfc50f6976b8f6d137df6c69da2b9 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4127103 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* power/amd_x86: Add support for external prochot interruptsRobert Zieba2022-12-091-2/+23
| | | | | | | | | | | | | | | This commit adds support for external prochot interrupts to AMD specific x86 power code. BRANCH=none BUG=b:227768313 TEST=Ran on skyrim device LOW_COVERAGE_REASON=No AMD x86 power emulator Change-Id: I9154734c102dd9117f13004d9bce6e3f53409c5d Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3975225 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ec: Support logging system boot time infoRajesh Kumar2022-12-073-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL add support logging system boot time and hostcommand to get boot time info. EC logs elapsed time (in micro second) info since boot for different signal events,that can be used to calculate system boot time in cold boot and warm boot scenarios. Below are the events when EC logs time info ARAIL EC turns on A-RAIL RSMRST EC releases RSMRST# ESPIRST ESPIRST received PLTRST_LOW PLTRST# asserted PLTRST_HIGH PLTRST# deasserted EC_CUR_TIME EC current time cnt increments on every warm reboot and reset to 0 on cold reboot BUG=b:249163956 BRANCH=none TEST='ectool boottime' AP console command is used to fetch data 'reboot' on AP console to trigger warm reboot 'apshutdown' on EC console to trigger cold reboot Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: I47abe3f8a0b7ab43f2af11bf8387c006ba383020 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4081566 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Tested-by: Li-Yu Yu <aaronyu@google.com> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* Revert "ec: Support logging system boot time info"Piotr Pawliczek2022-12-033-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c8325ba18b9f4d5b1f3f3bc739e83d8f591308cf. Reason for revert: broke at least 9 cq builds (https://ci.chromium.org/ui/p/chromeos/builders/cq/cq-orchestrator/b8795833246203447793/overview) Original change's description: > ec: Support logging system boot time info > > This CL add support logging system boot time and hostcommand to get > boot time info. > EC logs elapsed time (in micro second) info since boot for different > signal events,that can be used to calculate system boot time in cold > boot and warm boot scenarios. > > Below are the events when EC logs time info > > ARAIL EC turns on A-RAIL > RSMRST EC releases RSMRST# > ESPIRST ESPIRST received > PLTRST_LOW PLTRST# asserted > PLTRST_HIGH PLTRST# deasserted > EC_CUR_TIME EC current time > cnt increments on every warm reboot and reset to 0 on > cold reboot > > BUG=b:249163956 > BRANCH=none > TEST='ectool boottime' AP console command is used to fetch data > 'reboot' on AP console to trigger warm reboot > 'apshutdown' on EC console to trigger cold reboot > > Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> > Change-Id: I15fedbde252e0452270ef0e3fd4391bf624169f1 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3794612 > Reviewed-by: Boris Mittelberg <bmbm@google.com> > Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Bug: b:249163956 Change-Id: Ie83026c4a3a38c3dd24522901233f06e03430a54 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4077335 Reviewed-by: Jonathon Murphy <jpmurphy@google.com> Commit-Queue: Piotr Pawliczek <pawliczek@chromium.org> Tested-by: Piotr Pawliczek <pawliczek@chromium.org>
* ec: Support logging system boot time infoRajesh Kumar2022-12-023-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL add support logging system boot time and hostcommand to get boot time info. EC logs elapsed time (in micro second) info since boot for different signal events,that can be used to calculate system boot time in cold boot and warm boot scenarios. Below are the events when EC logs time info ARAIL EC turns on A-RAIL RSMRST EC releases RSMRST# ESPIRST ESPIRST received PLTRST_LOW PLTRST# asserted PLTRST_HIGH PLTRST# deasserted EC_CUR_TIME EC current time cnt increments on every warm reboot and reset to 0 on cold reboot BUG=b:249163956 BRANCH=none TEST='ectool boottime' AP console command is used to fetch data 'reboot' on AP console to trigger warm reboot 'apshutdown' on EC console to trigger cold reboot Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: I15fedbde252e0452270ef0e3fd4391bf624169f1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3794612 Reviewed-by: Boris Mittelberg <bmbm@google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* power: Sort header filesJeremy Bettis2022-11-223-9/+9
| | | | | | | | | | | | | | | | | | | | | Sort all includes in power with the clang-format rules used by the zephyr project. BRANCH=None BUG=b:247100970 TEST=zmake build -a TEST=./twister --clobber -v -i TEST=make -j$(nproc) buildall_only runtests TEST=zmake compare-builds Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I8578ad71df08dea1881658e02738ec41220d4666 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4047099 Reviewed-by: Al Semjonovs <asemjonovs@google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Commit-Queue: Al Semjonovs <asemjonovs@google.com> Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
* Reland "hibernate: Add hibernate support to ap power code"Andrew McRae2022-11-101-0/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of commit 16c8fce71986d50d9e10ea089d9d9352818129ad Reworked Kconfig handling. Original change's description: > hibernate: Add hibernate support to ap power code > > Add hibernate support to the AP power sequence code. > > The smart discharge system isn't supported yet. > > The system will hibernate after a delay when the AP is in G3 > and there is no external power connected. > > v2: add tests BUG=b:246643307 TEST=build and run on nivviks BRANCH=none Change-Id: I7f4e5633d05ca545e63ad9784a410284ef83e2b7 Signed-off-by: Andrew McRae <amcrae@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4019012 Reviewed-by: Keith Short <keithshort@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* Revert "hibernate: Add hibernate support to ap power code"Diana Z2022-11-091-181/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 16c8fce71986d50d9e10ea089d9d9352818129ad. Reason for revert: Breaks hibernation on PSL boards (undefines CONFIG_HIBERNATE, which disables hibernate in common/system.c) BUG=b:258093781 Original change's description: > hibernate: Add hibernate support to ap power code > > Add hibernate support to the AP power sequence code. > > The smart discharge system isn't supported yet. > > The system will hibernate after a delay when the AP is in G3 > and there is no external power connected. > > v2: add tests > > BUG=b:246643307 > TEST=Run on nivviks with short delay > BRANCH=none > > Signed-off-by: Andrew McRae <amcrae@google.com> > Cq-Depend: chromium:3985352 > Change-Id: Ib7bb62c3d650a607343a6ea243645346f4b2a797 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3983631 > Reviewed-by: Peter Marheine <pmarheine@chromium.org> > Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Bug: b:246643307 Change-Id: Ia33273d4ebd1903b628cd163a5e3b35882badf14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4017054 Auto-Submit: Diana Z <dzigterman@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Tested-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* zephyr: Bring qcom.c test coverage to 100%Jeremy Bettis2022-11-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test the final lines in qcom.c. Make battery_is_present() test mockable. Change gpio_pmic_resin_l to be input|output so that it can be read. The gpio_emul is strict and doesn't allow reading output gpios. Add gpio_switchcap_pg, instead of using the output gpio as the input power-good-pin. Remove most all of the gpio device pointers, since all the gpios are on the same port. test_chipset_reset_success stopped working because the callback on pmic_resin_l wasn't getting called. Set the interrupt flags to fix. In test_power_button wait to set power_good until after pmic_kpd_pwr_odl is set. This is slightly more realistic. Add 2 more failures cases in power on sequence. Exclude an unreachable line from lcov. BRANCH=None BUG=None TEST=./twister Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: Ie38f53addfbc745e046f017f322dada4486405ec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3994229 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
* hibernate: Add hibernate support to ap power codeAndrew McRae2022-11-011-0/+181
| | | | | | | | | | | | | | | | | | | | | | Add hibernate support to the AP power sequence code. The smart discharge system isn't supported yet. The system will hibernate after a delay when the AP is in G3 and there is no external power connected. v2: add tests BUG=b:246643307 TEST=Run on nivviks with short delay BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Cq-Depend: chromium:3985352 Change-Id: Ib7bb62c3d650a607343a6ea243645346f4b2a797 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3983631 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* power/mt8186: implement ap-idle flagTing Shen2022-10-311-0/+8
| | | | | | | | | | | | | | | | | When EC_RESET_FLAG_AP_IDLE appears, ec should keep the existing power state. BUG=b:256085410 TEST=manually BRANCH=corsola Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I1dd0afc6dc9a9c8a24f19f6dc6877b81d214bd32 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3992832 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Code-Coverage: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org>
* power/alderlake: Consistent GPIO_PG_EC_ALL_SYS_PWRG to ↵Devin Lu2022-10-281-2/+2
| | | | | | | | | | | | | | | | | | | | intel_x86_get_pg_ec_all_sys_pwrgd LOW_COVERAGE_REASON=Doesn't see the Emulator for power seuqence. BUG=b:253957352 BRANCH=none TEST=make buildall On Redrix. System boots up. powerindebug make sure power signal is correctly. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ic4979060d53489169fec2dcfb5e293586f216c71 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3967916 Code-Coverage: Devin Lu <devin.lu@quantatw.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Tested-by: Devin Lu <devin.lu@quantatw.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: Devin Lu <devin.lu@quantatw.com>
* power/alderlake: Add runtime CONFIG for power signalDevin Lu2022-10-281-1/+5
| | | | | | | | | | | | | | | | | Add CONFIG_POWER_SIGNAL_RUNTIME_CONFIG for power signal BUG=b:253957352 BRANCH=none TEST=make buildall Run util/compare_build.sh Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I2ae4cd076d01cd414d327aee0db8e1a899d40fc7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3967915 Commit-Queue: Devin Lu <devin.lu@quantatw.com> Tested-by: Devin Lu <devin.lu@quantatw.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* test: Exclude void overridable stubs from coverageAaron Massey2022-10-201-0/+9
| | | | | | | | | | | | | | | Exclude overridable functions that have zero behavior and return no values from coverage. BRANCH=none BUG=b:252887178 TEST=twister -s zephyr/test/drivers/drivers.power_host_sleep --coverage Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: I7fabfb2215af745809a13ee534922a5431868df5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3956206 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Yuval Peress <peress@google.com>
* tree: Enable warning for fallthrough in switch statementsTom Hughes2022-10-192-4/+4
| | | | | | | | | | | | | | | | | | | | | | | The EC code has generally been good about adding comments about intentional fallthrough in switch statements, but there were a few cases without comments (e.g., https://crrev.com/c/3949622). Enabling -Wimplicit-fallthrough generates a compiler warning if the fallthrough is not annotated with __attribute__((fallthrough)). For convenience, we add a "__fallthrough" macro for this attribute. See https://clang.llvm.org/docs/AttributeReference.html#fallthrough and https://gcc.gnu.org/onlinedocs/gcc/Statement-Attributes.html. BRANCH=none BUG=b:253644823 TEST=make buildall LOW_COVERAGE_REASON=legacy code Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I9f4d6049f4507a25ce706675d159b70e28b4b825 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3957420 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* ec: Remove fake suspend from qcom.cJeremy Bettis2022-10-191-37/+1
| | | | | | | | | | | | | | | | | This was intended to be a short term solution for local testing during bringup of trogdor. It is no longer needed. BRANCH=None BUG=b:148149387 TEST=None Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I2bca46c9a6e07caf13e72255b8a16d7dada3058c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3964547 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* power/icelake: add casts for power signalsTom Hughes2022-10-171-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building with clang, it warns: power/icelake.c:43:11: error: implicit conversion from enumeration type 'enum espi_vw_signal' to different enumeration type 'enum gpio_signal' [-Werror,-Wenum-conversion] .gpio = SLP_S3_SIGNAL_L, ^~~~~~~~~~~~~~~ include/power/intel_x86.h:36:25: note: expanded from macro 'SLP_S3_SIGNAL_L' ^~~~~~~~~~~ Although "enum espi_vw_signal" and "enum gpio_signal" are not directly compatible, it appears that the code in power/common.c takes that into account by calling espi_signal_is_vw(). clang also produces another warning: power/icelake.c:267:19: error: implicit conversion from enumeration type 'enum espi_vw_signal' to different enumeration type 'enum gpio_signal' [-Werror,-Wenum-conversion] gpio_set_flags(SLP_S3_SIGNAL_L, GPIO_ODR_LOW); ~~~~~~~~~~~~~~ ^~~~~~~~~~~~~~~ include/power/intel_x86.h:36:25: note: expanded from macro 'SLP_S3_SIGNAL_L' ^~~~~~~~~~~ However, this warning should not be emitted because this code is inside an IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) block. Changing IS_ENABLED(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) to "#if defined(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE)" works around this. BRANCH=none BUG=b:172020503 TEST=./util/compare_build.sh -b all -j 120 => MATCH Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I1fe6bbb1881572a3eff756220ee960d397344c69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3953255 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* test: host_sleep.c sleep_set_notifyAaron Massey2022-10-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Add a test that verifies behavior from sleep_set_notify and correspondly sleep_notify_transition. Scenarios: * Setting notify state and sleep_notify_transition can fire hook * Setting notify state and sleep_notify_transition clears notify state. * sleep_notify_transition can start a hook with NONE sleep notify state Also conducted two small refactor fixes: * Made privately used variable static * Changed an int type to how it's actually used (enum sleep_notify_type) BRANCH=none BUG=b:252887178 TEST=twister -s zephyr/test/drivers/drivers.power_host_sleep Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: I9d63d1377359035b316ac6aa5de87376b3bb203f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3953317 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* test: host_sleep sleep_start_suspend default timeAaron Massey2022-10-141-1/+2
| | | | | | | | | | | | | | | | | | | | Add a test that verifies a call to sleep_start_suspend() propagates a timeout deferred call to board/chip-specific timeout handlers after the default delay. Also clarified documentation that previously made testing the default timing functionality non-obvious and potentially confuse callers of the API. BRANCH=none BUG=b:252887178 TEST=twister -s zephyr/test/drivers/drivers.power_host_sleep Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: Id585b5bb4ee9015c7448b4da26460a690e2990b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3953474 Reviewed-by: Yuval Peress <peress@google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* power: Remove param to power_common_stateJeremy Bettis2022-10-051-3/+3
| | | | | | | | | | | | | | | | | | | | | Instead of passing the static var state to power_common_state(), just use the static var directly. This should make no change in the live code, but will allow tests to call power_set_state() while the chipset_task is blocked waiting for events. BRANCH=None BUG=b:236074354 TEST=CQ Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I3a59f1e3008bf23a88d2b07d26c2ebd9720588a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3936945 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* Update license boilerplate text in source code filesMike Frysinger2022-09-1223-23/+23
| | | | | | | | | | | | | | | Normally we don't do this, but enough changes have accumulated that we're doing a tree-wide one-off update of the name & style. BRANCH=none BUG=chromium:1098010 TEST=`repo upload` works Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b Signed-off-by: Mike Frysinger <vapier@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203 Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: tests: Test handling of special key combos in `keyboard_scan.c`Tristan Honscheid2022-09-091-1/+1
| | | | | | | | | | | | | | | Test that VOL_UP + ALT + {R|H} cause AP reboot and hibernate, respectively. BRANCH=None BUG=b:244606945 TEST=./twister Signed-off-by: Tristan Honscheid <honscheid@google.com> Change-Id: Ic5d927fe830acbd9f6f33a0e436d6ed7c4301fce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3872728 Reviewed-by: Yuval Peress <peress@google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* tree-wide: const-ify argv for console commandsCaveh Jalali2022-09-016-12/+12
| | | | | | | | | | | | | | | | | | | | | | | This updates the API for console commands from "int cmd(int argc, char **argv)" to "int cmd(int argc, const char **argv)" which is more accurate and in line with common convention. BRANCH=none BUG=b:244387210 TEST="make buildall" passes TEST="zmake build -a" passes TEST="util/compare_build.sh -b all" passes TEST="./twister -v -T zephyr/test" passes Cq-Depend: chrome-internal:4960125 Cq-Depend: chrome-internal:4959932 Change-Id: I57de9f35b85b8f3c7119df36aefb2abf25d2625f Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3863941 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: Mock power sequence driverAl Semjonovs2022-08-251-4/+4
| | | | | | | | | | | | | | | Mock power sequence handling BUG=None BRANCH=NONE TEST=./twister -T zephyr/test Signed-off-by: Al Semjonovs <asemjonovs@google.com> Change-Id: I8ec3198abfb069501bed2c5aa661e31f780e2c34 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3833564 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Yuval Peress <peress@google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* power/mt8186: remove redundant msleepTing Shen2022-08-151-1/+0
| | | | | | | | | | | | | | | | | | | | | The original purpose of msleep(500) line is to wait for pmic ready, it was added in CL:3233783 ps30. After a few code changes, another power_wait_mask_signals_timeout line was added to provide the same functionality. Now we are waiting for pmic twice, we should remove the duplicated msleep call. BUG=b:237249144 TEST=manually BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I15e3930cf07c0ce6c225f61727e0566a0644e32a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3831159 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org>
* util: remove unused includesYuval Peress2022-08-059-1/+9
| | | | | | | | | | | | | | | | Remove these includes as they're not needed in this header. Instead, the includes should go where they're actually being used. BRANCH=none BUG=b:240574048 TEST=make buildall -j TEST=zmake build -a Signed-off-by: Yuval Peress <peress@google.com> Change-Id: I64b10af3216654b2a20caa1cabd267661a0bca39 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3791980 Reviewed-by: Tristan Honscheid <honscheid@google.com> Commit-Queue: Tristan Honscheid <honscheid@google.com>
* power/mt8186: add CHIPSET_SUSPEND_COMPLETE hookTing Shen2022-07-141-0/+2
| | | | | | | | | | | | | | | | | | | | | CHIPSET_RESUME_INIT is usually paired with SUSPEND_COMPLETE (for example: chip/npcx/shi.c). Since we enabled RESUME_INIT on MT8186, we must invoke CHIPSET_SUSPEND_COMPLETE callback when entering S3 too. BUG=b:215659327 TEST=EC power consumption back to 4mw BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I649b7f50aedbd77ea1954fc31295910f08e24cb8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3759110 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Joyce Lee <lyunjie@google.com> Tested-by: Joyce Lee <lyunjie@google.com>
* mt8186: reports reset/shutdown reason in hexEric Yilun Lin2022-07-071-2/+2
| | | | | | | | | | | | | | | It's more readable if the reason is in hex format. BUG=none TEST=the reasons are reports in hex format BRANCH=none Change-Id: I95133806caad9047dcbbffc22b8c1f04033773d8 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3750274 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* mt8186: reports forcing shutdown by long pwrkey pressEric Yilun Lin2022-07-071-5/+14
| | | | | | | | | | | | | | | | | | | | | | | When powerkey long pressed for 8(+-20%) seconds, the PMIC will enter forcing shutdown mode and turn off the rail. If PMIC enters the forcing shutdown process too fast, then the shutdown reason report will be canceled, and we won't know the exactly shutdown reason. This CL reports the shutdown reason when the power is going for S0S3, and hasn't reported the reason. BUG=none TEST=1. at S0, ensure the long powerkey press reports 0x8009 2. apshutdown works 3. shutdown from AP works 4. at S3, long press powerkey: S3->S0->S3->S5->G3 BRANCH=none Change-Id: I1ea8e710a81ed7267c7f87c6c6d711a045603b7e Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3750273 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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