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* run_device_tests: remove -n flag from dut-control cmdJosie Nordrum2021-05-051-10/+7
| | | | | | | | | | | | | | | | | | | Removed the servo board name flag from dut-control command in run_device_tests.py. This flag is needed when there are many servos connected with servods running. Grepped platform/ec directory to remove all uses of this flag. BRANCH=None BUG=None TEST=ran AES test on dartmonkey with servo micro and jlink attached ./test/run_device_tests.py -b dartmonkey -t aes Signed-off-by: Josie Nordrum <JosieNordrum@google.com> Change-Id: I97bf3cd4c524a2b5fb292d255cde57a8b65fcdc4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2689320 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Josie Nordrum <josienordrum@google.com> Tested-by: Josie Nordrum <josienordrum@google.com>
* test: motionsense fifo: Fix time unitsYuval Peress2021-05-051-19/+19
| | | | | | | | | | | | | Convert time units in the test from ns to us BRANCH=none BUG=none TEST=make run-motion_sense_fifo Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I345ce43945d2bcd743347296430d76c2992a953a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2871056 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* common: motionsense fifo: Reset the initialized bits after commitYuval Peress2021-05-041-2/+7
| | | | | | | | | | | | | | | | | | | | | Previously once we had one sample from a sensor, we considered the fifo initialized. Meaning we would use our computed next timestamp to spread the timestamps. This was causing issues with some devices that ended up causing the timestamps to run ahead. Reset next_timestamp_initialized back to 0 after each commit. This will allow repeated timestamps but only if a driver stages/commits the same timestamp twice. Staging the same timestamp with only a single commit will still work as before (which is the expected path). BRANCH=none BUG=b:168335284 TEST=make run-motion_sense_fifo Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ib7c566f69d7c1e4e898050b67105555dd05376e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2871055 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* compile_time_macros: Make _IS_ARRAY work with C++Tom Hughes2021-05-031-0/+13
| | | | | | | | | | | BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I199f05eabad1182ca2da4489361426d04da06691 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2864513 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* mkbp: Separate FIFO from the keyboard driverBoris Mittelberg2021-04-272-2/+2
| | | | | | | | | | | | | | Move protocol-related functionality out from the keyboard driver. This change is required to allow passing button events via MKBP on devices with non-MKBP keyboards. It reorganizes the code without changing the logic. BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: Ifb5b9d8e605f491313ee1dfe2c9950eb52152aa8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2669355
* zephyr: test_util: Add TEST_SUITE macroTomasz Michalec2021-04-161-1/+1
| | | | | | | | | | | | | | | TEST_SUITE macro allows to define Zephyr test as test suite instead of test_main(). Test suite can be used as part of bigger test. BUG=b:185205123 BRANCH=none TEST=zmake testall TEST=make runhosttests Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I834ccf38e256c918623e96bb39597a0b22a874c0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2825910 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* test/cbi: allow to use test with WP GPIO active lowTomasz Michalec2021-04-151-0/+11
| | | | | | | | | | | | | | CBI test is usable without setting CONFIG_WP_ACTIVE_HIGH option. BUG=b:185205123 BRANCH=none TEST=make run-cbi Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I3f33167eac0a6545f8f323ff6935c079e706560b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821698 Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* test/cbi: refactor test to by usable in ZephyrTomasz Michalec2021-04-151-95/+137
| | | | | | | | | | | | | | This change refactors test/cbi.c to use macros common for EC and Zephyr tests. It is based on docs/ztest. BUG=b:185205123 BRANCH=none TEST=make run-cbi Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I1c8eb5263b8bd8f435bb3c64b9dacfd14deb01e3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821697 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* ec: Filter non-FIXED PDOs in servo_v4{p1}Jeremy Bettis2021-04-134-0/+70
| | | | | | | | | | | | | | | | | | | | | | Add a new config CONFIG_USB_PD_ONLY_FIXED_PDOS. If that config is enabled, ignore non-FIXED PDOs in both the console command `ada_srccaps` and also when selecting the preferred PDO for a voltage. Enable CONFIG_USB_PD_ONLY_FIXED_PDOS for servo_v4 and servo_v4p1, since they don't expose non-fixed PDO in their srccaps. Without this change, there is a risk that the "best" PDO for a given voltage will be non-FIXED and then that voltage just won't be supported at all. BRANCH=none BUG=b:178484932 TEST=added Change-Id: I0d1187ca372120c7fe21d627e1b82b59f6334add Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809353 Tested-by: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* ec: Parse battery and augmented PDOs correctly.Jeremy Bettis2021-04-121-0/+129
| | | | | | | | | | | | | | | | Fixes pd_extract_pdo_power() to output the correct voltage and current for non-fixed PDOs. Add unit test. BRANCH=none BUG=b:178484932 TEST=added Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I6de55be3c753e01ef26424896c6fd41b8df8f94b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2805226 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* common: motion_sense: Prevent on/off body from waking up deviceGwendal Grignou2021-03-291-1/+1
| | | | | | | | | | | | | | | | | | | | Introduce a new flag: BYPASS_FIFO to raise an interrupt to the AP when an event is sent. It is not as strong as WAKEUP, as it does not wake up the AP. BYPASS_FIFO must be set when WAKEUP is set. It is applied to sync sensor as well as gesture/activity sensor. BUG=b:123434029 BRANCH=trogdor TEST=Compile Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: Id5aba71e6d11ef31f7fa2c67ba2e07178d088b1b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780834 Reviewed-by: Ching-Kang Yen <chingkang@chromium.org> Tested-by: Ching-Kang Yen <chingkang@chromium.org> Commit-Queue: Ching-Kang Yen <chingkang@chromium.org>
* TCPMv2: Compliance Unit Test - allow PROC.PD.E3 flexibilityDenis Brockus2021-03-191-50/+121
| | | | | | | | | | | | | | | | | Allow the startup messages to be optional and don't require a specific ordering. Also add PR_Swap when PD_ROLE_UFP. BUG=none BRANCH=none TEST=make run-usb_tcpmv2_compliance Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ifef6fa558a789c2ce34a9f9fbf38529dc90d5e6f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2774580 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* TCPMv2: TD.PD.SRC3.E32 compliance unit testDenis Brockus2021-03-194-0/+224
| | | | | | | | | | | | | | BUG=b:182923863 BRANCH=none TEST=make run-usb_tcpmv2_compliance Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I6c2c78a3c236c99aae1570f8bd256399b33066f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2774375 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* crc32: Add crc32_hash and crc32_ctx_hashDaisuke Nojiri2021-03-181-3/+10
| | | | | | | | | | | | | | | This patch adds crc32_hash and crc32_ctx_hash, which compute CRC32 of data in arbitrary length using an internal context and an external context, respectively. BUG=None BRANCH=None TEST=make run-crc Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I08729528fba6b1350bbb8387c048025f72496b2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757097 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* TCPMV2: Add explicit setting of VPD VDO CT CurrentSam Hurst2021-03-122-13/+21
| | | | | | | | | | | | | | | | | | Add the capablility to explicity set a CTVPDs VDO current. BUG=b:165934405 BRANCH=none TEST=make runtests Verified that returned VDO from chocodile_vpdmcu was correct. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I2292024986fa89b228b56678d61d1aef2866c817 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748427 Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Sam Hurst <shurst@google.com>
* TCPMv2: Add PD interface to asynchronously request TC Error RecoveryDiana Z2021-03-093-0/+14
| | | | | | | | | | | | | | | | | If a condition is reached outside the PD task which requires USB Type-C Error Recovery, it can now use pd_set_error_recovery() to request that the PD task execute this. Note that this will return before the error recovery has completed, which is in contrast to the suspend port behavior. BRANCH=None BUG=b:180453483 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I487e0da3ef65c201ff406500f0c95244b460afcb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718836 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Don't check VBUS when entering BIST modeAbe Levkoy2021-02-231-80/+0
| | | | | | | | | | | | | | | | | Temporarily remove check for VBUS = vSafe5V when entering BIST mode. It does this by measuring VBUS, but this facility is inadequate to the purpose on Volteer. Since this even more of an edge case than actually running BIST tests, remove the check for now, pending a more general solution. BUG=b:180957710,b:173023378 TEST=make buildall; pass TDA.2.1.2.2 BMC PHY RX INT REJ on voxel BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I172c1bcc10731c2e405344cdc6ad2b5a1ed80ced Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2714203 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Source out 3.0 A to non-PD portsDiana Z2021-02-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | When no PD sinks require 3.0 A and no FRS ports require it, offer this current level to non-PD sinking devices. The non-PD devices will be downgraded whenever a higher-priority type of port is connected. BRANCH=None BUG=b:141690755 TEST=on madoo, verify: - plugging in a flash drive, it is offered 3.0 A - plugging in a 3.0 A PD sink, flash drive CC resistor is downgraded - unplugging 3.0 A PD sink, flash drive CC resistor is back to 3.0 A - connect power to 3.0 A PD sink, flash drive CC resistor is back to 3.0 A With FRS config check commented out, verify: - flash drive is downgraded and FRS enabled on powered hub plug in - flash drive is back to 3.0 A on FRS hub detach Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iaa5c3f0a6a4f41db83978bb1e1d0b54f2519abb2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2692030 Reviewed-by: Keith Short <keithshort@chromium.org>
* fingerprint: Enable more on-device unit testsTom Hughes2021-02-162-1/+12
| | | | | | | | | | | | | | | | BRANCH=none BUG=b:155235321 TEST=On dragonclaw v0.2 with servo micro and jlink: ./test/run_device_test.py --board bloonchipper => tests pass TEST=On icetower v0.1 with servo micro and jlink: ./test/run_device_test.py --board dartmonkey => tests pass Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I884ee93779235a387ed64bfe02643abee2009243 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2692877 Reviewed-by: Craig Hesling <hesling@chromium.org>
* TCPMv2: Allocate FRS ports 3.0 A when neededDiana Z2021-02-161-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When there are no PD sinks requiring 3.0 A, any FRS ports which require that much current will have FRS detection enabled. If a PD sink requiring 3.0 A is attached, then FRS detection will be disabled on that port again. FRS port partners which require only USB or 1.5 A of current will always have FRS detection enabled. BRANCH=None BUG=b:141690755 TEST=on volteer-based system, verify: - FRS source partners requiring 1.5 A or less always have FRS detection enabled - FRS detection is disabled on detach - FRS source partner requiring 3.0 A has FRS detection enabled if no PD sink needing 3.0 A is present - Plugging in a 3.0 A PD sink disables FRS detection for the 3.0 A FRS partner - Unplugging a 3.0 A PD sink enables FRS detection for the 3.0 A FRS partner - When FRS occurs on 3.0 A port with detection enabled, partner is offered appropriate starting current in first source caps Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib067ac7c1c2f4a6e64f36aeffd1b8dde5cb93760 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2676084 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Eric Herrmann <eherrmann@chromium.org> Tested-by: Eric Herrmann <eherrmann@chromium.org>
* tcpmv2: Only issue SOP' soft reset following PR swapKeith Short2021-02-162-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | Entry to the PE_SNK_Startup and PE_SRC_Startup states resets the protocol layer, and clears the message IDs for all SOP types. These states are entered during initial connect, hard reset, and after a power role swap. The cable should automatically clear it's message IDs on the initial connect (because it didn't have power) and on a hard reset, so modify the PE policy to only send SOP' soft reset after power role swaps. BUG=b:179325862 BRANCH=volteer TEST=Connect TBT loopback device, verify no SOP' soft reset is sent and that TBT entry is successful. TEST=Connect USB+DP monitor when EC starts as SRC/DFP and VCONN source. Verify EC sends SOP' soft reset is sent after power role swap. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2c133eec0e76c1ecb7b79cea94a541fdb55ee9c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2691423 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* CBI: Add rework_id fieldstabilize-rust-13795.B-mainThejaswani Puta thejaswani.putta@intel.com2021-02-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This field will be used to describe all the reworks performed on a board which includes the mandatory, optional and feature reworks. Also modified existing command handlers under ectool and cbi-util tool to support 64 bit length data. Includes build fix for targets where long int is not 64 bits. BUG: b:170385859 BUILD TEST: make BOARD=<BOARD_NAME> -j; make runfuzztests make runhosttests setup_board, cros_workon & emerge-<32-bit target> ec-utils TEST: ./cbi-util create --file ~/cbi_image --board_version 1 --oem_id 2 --sku_id 255 --dram_part_num "01654329efghac" --model_id 15 --rework_id 123456789123456712 --size 256 CBI image is created successfully TEST: ./cbi-util show --file ~/cbi_image CBI image: /home/thejaswani/cbi_image TOTAL_SIZE: 47 Data Field: name: value (hex, tag, size) BOARD_VERSION: 1 (0x1, 0, 1) OEM_ID: 2 (0x2, 1, 1) SKU_ID: 255 (0xff, 2, 1) MODEL_ID: 15 (0xf, 5, 1) REWORK_ID: 123456789123456712 (0x1b69b4bacd05ec8, 9, 8) DRAM_PART_NUM: 01654329efghac (3, 15) Data validated successfully TEST: hexdump -C ~/cbi_image 00000000 43 42 49 1e 00 00 2f 00 00 01 01 01 01 02 02 01 |CBI.../.........| 00000010 ff 05 01 0f 09 08 c8 5e d0 ac 4b 9b b6 01 03 0f |.......^..K.....| 00000020 30 31 36 35 34 33 32 39 65 66 67 68 61 63 00 ff |01654329efghac..| 00000030 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| * 00000100 TEST: localhost ~ # ectool cbi set 9 98765432 8 localhost ~ # ectool cbi get 9 As uint: 98765432 (0x5e30a78) As binary: 78 0a e3 05 00 00 00 00 localhost ~ # ectool cbi set 9 123456789123456712 8 localhost ~ # ectool cbi get 9 As uint: 123456789123456712 (0x1b69b4bacd05ec8) As binary: c8 5e d0 ac 4b 9b b6 01 localhost ~ # ectool cbi set 9 1234 2 localhost ~ # ectool cbi get 9 As uint: 1234 (0x4d2) As binary: d2 04 TEST: > cbi(from EC Console) 2021-01-19 20:59:56 [80.979692 CBI Reading board info] 2021-01-19 20:59:56 CBI_VERSION: 0x0000 2021-01-19 20:59:56 TOTAL_SIZE: 54 2021-01-19 20:59:56 BOARD_VERSION: 1 (0x1) 2021-01-19 20:59:56 OEM_ID: (Error 1) 2021-01-19 20:59:56 MODEL_ID: (Error 1) 2021-01-19 20:59:56 SKU_ID: 655361 (0xa0001) 2021-01-19 20:59:56 FW_CONFIG: 199683 (0x30c03) 2021-01-19 20:59:56 PCB_SUPPLIER: (Error 1) 2021-01-19 20:59:56 SSFC: (Error 1) 2021-01-19 20:59:56 REWORK_ID: 1234 (0x4d2) 2021-01-19 20:59:56 43 42 49 8c 00 00 36 00 00 01 01 02 04 01 00 0a |CBI...6.........| 2021-01-19 20:59:56 00 06 04 03 0c 03 00 03 19 4d 54 35 33 45 35 31 |.........MT53E51| 2021-01-19 20:59:56 32 4d 36 34 44 34 4e 57 2d 30 34 36 20 57 54 3a |2M64D4NW-046 WT:| 2021-01-19 20:59:56 45 00 09 02 d2 04 ff ff ff ff ff 7f ff ff ff ff |E...............| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2020-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| Signed-off-by: Thejaswani Puta <thejaswani.putta@intel.com> Change-Id: I073a119d43c94cd266503a0fc972a62134b3385f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2693746 Tested-by: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com> Commit-Queue: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Revert "CBI: Add rework_id field"Peter Marheine2021-02-101-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 48ce00b56ce350cbec0e67b1b489aaa145c2b3a4. Reason for revert: fails to build on targets where unsigned long is not 64 bits BUG: chromium:1176495 Original change's description: > CBI: Add rework_id field > > This field will be used to describe all the reworks performed on > a board which includes the mandatory, optional and feature reworks. > > Also modified existing command handlers under ectool and cbi-util tool > to support 64 bit length data. > > BUG: b:170385859 > TEST: ./cbi-util create --file ~/cbi_image --board_version 1 > --oem_id 2 --sku_id 255 --dram_part_num "01654329efghac" > --model_id 15 --rework_id 123456789123456712 --size 256 > CBI image is created successfully > > TEST: ./cbi-util show --file ~/cbi_image > CBI image: /home/thejaswani/cbi_image > TOTAL_SIZE: 47 > Data Field: name: value (hex, tag, size) > BOARD_VERSION: 1 (0x1, 0, 1) > OEM_ID: 2 (0x2, 1, 1) > SKU_ID: 255 (0xff, 2, 1) > MODEL_ID: 15 (0xf, 5, 1) > REWORK_ID: 123456789123456712 (0x1b69b4bacd05ec8, 9, 8) > DRAM_PART_NUM: 01654329efghac (3, 15) > Data validated successfully > > TEST: hexdump -C ~/cbi_image > 00000000 43 42 49 1e 00 00 2f 00 00 01 01 01 01 02 02 01 |CBI.../.........| > 00000010 ff 05 01 0f 09 08 c8 5e d0 ac 4b 9b b6 01 03 0f |.......^..K.....| > 00000020 30 31 36 35 34 33 32 39 65 66 67 68 61 63 00 ff |01654329efghac..| > 00000030 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > * > 00000100 > > TEST: > localhost ~ # ectool cbi set 9 98765432 8 > localhost ~ # ectool cbi get 9 > As uint: 98765432 (0x5e30a78) > As binary: 78 0a e3 05 00 00 00 00 > > localhost ~ # ectool cbi set 9 123456789123456712 8 > localhost ~ # ectool cbi get 9 > As uint: 123456789123456712 (0x1b69b4bacd05ec8) > As binary: c8 5e d0 ac 4b 9b b6 01 > > localhost ~ # ectool cbi set 9 1234 2 > localhost ~ # ectool cbi get 9 > As uint: 1234 (0x4d2) > As binary: d2 04 > > TEST: > > cbi(from EC Console) > 2021-01-19 20:59:56 [80.979692 CBI Reading board info] > 2021-01-19 20:59:56 CBI_VERSION: 0x0000 > 2021-01-19 20:59:56 TOTAL_SIZE: 54 > 2021-01-19 20:59:56 BOARD_VERSION: 1 (0x1) > 2021-01-19 20:59:56 OEM_ID: (Error 1) > 2021-01-19 20:59:56 MODEL_ID: (Error 1) > 2021-01-19 20:59:56 SKU_ID: 655361 (0xa0001) > 2021-01-19 20:59:56 FW_CONFIG: 199683 (0x30c03) > 2021-01-19 20:59:56 PCB_SUPPLIER: (Error 1) > 2021-01-19 20:59:56 SSFC: (Error 1) > 2021-01-19 20:59:56 REWORK_ID: 1234 (0x4d2) > 2021-01-19 20:59:56 43 42 49 8c 00 00 36 00 00 01 01 02 04 01 00 0a |CBI...6.........| > 2021-01-19 20:59:56 00 06 04 03 0c 03 00 03 19 4d 54 35 33 45 35 31 |.........MT53E51| > 2021-01-19 20:59:56 32 4d 36 34 44 34 4e 57 2d 30 34 36 20 57 54 3a |2M64D4NW-046 WT:| > 2021-01-19 20:59:56 45 00 09 02 d2 04 ff ff ff ff ff 7f ff ff ff ff |E...............| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2020-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| > > Change-Id: Ic8163ceaec55c429c9836f9a1e75d0de31ea072b > Signed-off-by: Thejaswani Puta <thejaswani.putta@intel.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641127 > Reviewed-by: Keith Short <keithshort@chromium.org> > Commit-Queue: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com> > Tested-by: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com> Change-Id: Ifc4625446018b5a2d666205b2c9c649e75cdc138 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2684078 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Peter Marheine <pmarheine@chromium.org> Tested-by: Peter Marheine <pmarheine@chromium.org>
* CBI: Add rework_id fieldThejaswani Puta thejaswani.putta@intel.com2021-02-101-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This field will be used to describe all the reworks performed on a board which includes the mandatory, optional and feature reworks. Also modified existing command handlers under ectool and cbi-util tool to support 64 bit length data. BUG: b:170385859 TEST: ./cbi-util create --file ~/cbi_image --board_version 1 --oem_id 2 --sku_id 255 --dram_part_num "01654329efghac" --model_id 15 --rework_id 123456789123456712 --size 256 CBI image is created successfully TEST: ./cbi-util show --file ~/cbi_image CBI image: /home/thejaswani/cbi_image TOTAL_SIZE: 47 Data Field: name: value (hex, tag, size) BOARD_VERSION: 1 (0x1, 0, 1) OEM_ID: 2 (0x2, 1, 1) SKU_ID: 255 (0xff, 2, 1) MODEL_ID: 15 (0xf, 5, 1) REWORK_ID: 123456789123456712 (0x1b69b4bacd05ec8, 9, 8) DRAM_PART_NUM: 01654329efghac (3, 15) Data validated successfully TEST: hexdump -C ~/cbi_image 00000000 43 42 49 1e 00 00 2f 00 00 01 01 01 01 02 02 01 |CBI.../.........| 00000010 ff 05 01 0f 09 08 c8 5e d0 ac 4b 9b b6 01 03 0f |.......^..K.....| 00000020 30 31 36 35 34 33 32 39 65 66 67 68 61 63 00 ff |01654329efghac..| 00000030 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| * 00000100 TEST: localhost ~ # ectool cbi set 9 98765432 8 localhost ~ # ectool cbi get 9 As uint: 98765432 (0x5e30a78) As binary: 78 0a e3 05 00 00 00 00 localhost ~ # ectool cbi set 9 123456789123456712 8 localhost ~ # ectool cbi get 9 As uint: 123456789123456712 (0x1b69b4bacd05ec8) As binary: c8 5e d0 ac 4b 9b b6 01 localhost ~ # ectool cbi set 9 1234 2 localhost ~ # ectool cbi get 9 As uint: 1234 (0x4d2) As binary: d2 04 TEST: > cbi(from EC Console) 2021-01-19 20:59:56 [80.979692 CBI Reading board info] 2021-01-19 20:59:56 CBI_VERSION: 0x0000 2021-01-19 20:59:56 TOTAL_SIZE: 54 2021-01-19 20:59:56 BOARD_VERSION: 1 (0x1) 2021-01-19 20:59:56 OEM_ID: (Error 1) 2021-01-19 20:59:56 MODEL_ID: (Error 1) 2021-01-19 20:59:56 SKU_ID: 655361 (0xa0001) 2021-01-19 20:59:56 FW_CONFIG: 199683 (0x30c03) 2021-01-19 20:59:56 PCB_SUPPLIER: (Error 1) 2021-01-19 20:59:56 SSFC: (Error 1) 2021-01-19 20:59:56 REWORK_ID: 1234 (0x4d2) 2021-01-19 20:59:56 43 42 49 8c 00 00 36 00 00 01 01 02 04 01 00 0a |CBI...6.........| 2021-01-19 20:59:56 00 06 04 03 0c 03 00 03 19 4d 54 35 33 45 35 31 |.........MT53E51| 2021-01-19 20:59:56 32 4d 36 34 44 34 4e 57 2d 30 34 36 20 57 54 3a |2M64D4NW-046 WT:| 2021-01-19 20:59:56 45 00 09 02 d2 04 ff ff ff ff ff 7f ff ff ff ff |E...............| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2020-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| 2021-01-19 20:59:56 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| Change-Id: Ic8163ceaec55c429c9836f9a1e75d0de31ea072b Signed-off-by: Thejaswani Puta <thejaswani.putta@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641127 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com> Tested-by: Thejaswani Putta <thejaswani.putta@intel.corp-partner.google.com>
* test/run_device_tests.py: Add icetower MPU addressTom Hughes2021-02-081-5/+8
| | | | | | | | | | | | | | | We expect a data access violation at CONFIG_RAM_BASE, which is 0x24000000 on icetower. BRANCH=none BUG=b:170432597 TEST=On icetower v0.1 with servo micro and jlink attached ./test/run_device_tests.py --board dartmonkey -t mpu_ro mpu_rw Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I2162f8b77f6bbf3606762c3de73c6c1b32a8ec92 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682780 Reviewed-by: Yicheng Li <yichengli@chromium.org>
* TCPMv2: Remove prl_resetAbe Levkoy2021-02-082-2/+2
| | | | | | | | | | | | | It is now unused in implementation code. BUG=b:179198412,b:173725284 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: If9ce77f5958d4ee168412b22bd77cba2c4d0ec49 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2679992 Reviewed-by: Diana Z <dzigterman@chromium.org>
* test: Only run UART fpsensor test on bloonchipperTom Hughes2021-02-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | dartmonkey does not have UART transport enabled, so the test will fail. BRANCH=none BUG=b:170432597 TEST=On icetower v0.1 with servo micro and jlink: ./test/run_device_tests.py --board dartmonkey --test \ fpsensor_uart_ro \ fpsensor_uart_rw \ fpsensor_spi_ro \ fpsensor_spi_rw TEST=On bloonchipper v0.2 with servo micro and jlink: ./test/run_device_tests.py --board bloonchipper --test \ fpsensor_uart_ro \ fpsensor_uart_rw \ fpsensor_spi_ro \ fpsensor_spi_rw Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I0268adf1a306dd7c569f4174bbf714996ac8011c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2669416 Reviewed-by: Craig Hesling <hesling@chromium.org>
* Update FPMCU console UART name and power railTom Hughes2021-01-291-4/+4
| | | | | | | | | | | | | | | | The FPMCU console UART has been renamed to raw_fpmcu_console_uart_pty in https://crrev.com/c/2637968. The same CL added "fpmcu_pp3300" as an alias for "spi1_vref". BRANCH=none BUG=b:177331210 TEST=On dragonclaw v0.2 with segger jlink: ./test/run_device_tests.py --board bloonchipper -t aes Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: If616421a55a6ecdfcf589b1c1b663820890b01ee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638448 Reviewed-by: Craig Hesling <hesling@chromium.org>
* math_util: fix incorrect int_sqrtf implementationTing Shen2021-01-271-0/+19
| | | | | | | | | | | | | | | | | | | | | Correct the binary search interval for small x. The range should be at least [0, sqrt(2 ** 31)] ~= [0, 46341]. Also fixed some corner cases and added unit test for it. BUG=b:177384512 TEST=1)`watch -n 0.3 ectool motionsense lid_angle` verify the angle looks reasonable. 2) TEST_LIST_HOST=fp make runhosttests BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I394fe3a59ac51ec4491a24399848f179c1074b95 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2646041 Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Yilin Yang (kerker) <kerker@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* TCPMv2: Wait for tSrcTransition after AcceptAbe Levkoy2021-01-261-3/+3
| | | | | | | | | | | | | | | | | During power contract negotiation, after sending Accept, wait for tSrcTransition before transitioning the supply and sending PS_RDY. See PD r3.0, v2.0, Table 7-22. BUG=b:173023378 TEST=Pass TDA.2.1.2.2 using MQP compliance tester (or at least don't fail due to sending PS_RDY too early). BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I76e31ff5df6bfd71f78642bda25e1e8f9f590f9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644179 Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: JC Huang <j.c.huang@quanta.corp-partner.google.com>
* pd: fix superspeed mux steering on UFPVincent Palatin2021-01-251-0/+6
| | | | | | | | | | | | | | | | | | | | | When the device has a USB superspeed UFP (which is uncommon, this is either servo v4.1 or a laptop port in SS device-mode), if we connect as a sink *before* trying PD communication, we should connect the SS mux without waiting for the partner PD comm capability as we might never be able to communicate with it over PD. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=b:150614702 BRANCH=servo TEST=use the sink mode enabled by 'cc pdsnk', connect to a USB-C Chromebook, try both video output on USB-C->mini-DP and USB 3.0. Change-Id: Iea0409fce2cb7aca089814ae406a7c05848dd8e4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637647 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* test: port accel_cal to ZtestPaul Fagerburg2021-01-221-28/+26
| | | | | | | | | | | | | | | BUG=b:172240633 BRANCH=none TEST=build for both EC and Ztest: `TEST_LIST_HOST=accel_cal make runhosttests` `zmake configure --test -B build/accel_cal zephyr/test/accel_cal` Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: Ie787403b36d775d4185cafad8ca134561a97794b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645198 Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-3/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-3/+3
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Test that PE ignores invalid BIST requestsAbe Levkoy2021-01-224-13/+86
| | | | | | | | | | | | | | | Send the PE BIST requests with inappropriate VBUS voltages or inappropriate BIST modes. Verify that the PE ignores them. BUG=b:173023378,b:169385081,b:172709198,b:173028832,b:173028791 BUG=b:173141941,b:173142113 TEST=run-usb_pe_drp passes BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I240ff6746debcf49934419940ab4f49b54e2b7e9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639585 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* common:test: refactor test_util.h to accommodate ZephyrYuval Peress2021-01-211-22/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change refactors test functionality in test_util.h to better accomomdate zTests. This is done by: * Removing the shim version of test_util.h. This was causing a conflict that made it harder to tell what's being used. This involved migrating some needed code over: - Defining different TASK_PARAMS. - Defining test_pass for Zephyr tests. * Creating a macro (DECLARE_EC_TEST) that will automatically handle creating the individual test functions for both platform and Zephyr tests. * Creating a macro (TEST_MAIN) that will automatically handle creating the main test entry function. This use to be test_main(void) for Zephyr and run_test(int, char**) for platform/ec. To do this we'll be removing the int, char** arguments from platform/ec. This may result in some tests having to be refactored, but overall should improve the test codebase as tests should remain deterministic (i.e. not depend on any outside arguments/parameters). * Creating some common ztest_ function/macros that will allow writing platform/ec tests in a zephyr like style. see test/base32.c for an example. * Update the type of __shared_mem_buf to match Zephyr. This was causing an issue now with the full test_util.h in zephyr/test/system/. BRANCH=none BUG=b:168032590 TEST=make runhosttests TEST=zmake configure --test -B build/host/base32 zephyr/test/base32 Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I72173a3e94c7df09a2966e7ffeb9f5668d030f29 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2634401 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* TCPMv2: Do not check for SinkTxOk in FRS-ModeEric Herrmann2021-01-201-0/+5
| | | | | | | | | | | | | | | | | | | | | | | After an FRS signal, the initial sink will attempt to initiate the FR Swap AMS, and the initial source should apply SinkTxOk. If the initial source is removed entirely, FRS will be triggered butSinkTxOk will never be applied and this will get the initial sink state machine stuck. So, in the case of an FRS ignore the CC voltage. After an FRS signal, the source isn't allowed to initiate an AMS. BUG=b:171740860 TEST=On Volteer with the PS8815, enable FRS and remove the FRS device. Make sure we enter ErrorRecovery instead of hanging in PE_PRS_SNK_SRC_Send_Swap TEST=make buildall BRANCH=none Change-Id: I8373a76c0c19feeb909b0623a1ae2d6b0ad5fa60 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633654 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Compliance Unit Test - TD.PD.SRC.E5 cleanupDenis Brockus2021-01-161-4/+18
| | | | | | | | | | | | | | | | Time delay for HardReset in a better way BUG=none BRANCH=none TEST=make run-usb_tcpmv2_compliance Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I5b22d78069269c306cb49da5b79f13c2a2f6b467 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633457 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-152-2/+2
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* TCPMv2: Process DPMs before discoveryDiana Z2021-01-142-53/+33
| | | | | | | | | | | | | | | | | | | | | | Some devices may reply to discovery differently if they're not yet being offered sufficient current. Process DPM requests before running discovery in order to get these devices into the best state for discovery probing. This also moves the cable soft reset DPM request up to the common DPM request function. Otherwise, it will be considered an unhandled request and dropped before attempting discovery. BRANCH=volteer BUG=b:177303467,b:177001425 TEST=verify we can reliably receive DiscoverSVIDs ACK from LaCie SSD Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I0917476c2aeb0cb9551edde3df14ddd1fd47fcab Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627805 Tested-by: Utkarsh H Patel <utkarsh.h.patel@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Compliance Unit Test - TD.PD.SRC3.E9Denis Brockus2021-01-094-0/+229
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I08a60385c6ed820df9392fe64fe2c2c9e2e1550a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618576 Tested-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* TCPMv2: Compliance Unit Test - TD.PD.SRC3.E8Denis Brockus2021-01-094-0/+254
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I439a7213ff60c8fce600d07aae481cecdb40d340 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618570 Tested-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* TCPMv2: Compliance Unit Test - TD.PD.SRC.E2 cleanupDenis Brockus2021-01-091-4/+9
| | | | | | | | | | | | | | | | cleanup message offsets to be more clear BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I75971aa97742a878ffaa9f5885348a0512faad98 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618569 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Compliance Unit Test - TD.PD.SRC3.E7 cleanupDenis Brockus2021-01-091-1/+6
| | | | | | | | | | | | | | | | cleanup message offsets to be more clear BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I9ec592fbc24db56da2c13b3f2ed1c9f417c04d07 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618568 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Compliance Unit Test - TD.PD.SRC3.E1 cleanupDenis Brockus2021-01-091-5/+12
| | | | | | | | | | | | | | | | cleanup message offsets to be more clear BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I7874b299e5518bd51cf884a41e3cc3c5833c8149 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618567 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* tcpmv2: always issue SOP' soft resetKeith Short2021-01-093-1/+29
| | | | | | | | | | | | | | | | | | | After entering a PD contract, always issue an SOP' soft reset before sending any discovery VDMs to the cable. BUG=b:172364575 BRANCH=volteer TEST=connect monitor with emarked cable, verify SOP' soft reset is sent when EC starts as SNK/DFP. TEST=Connect monitor with non-emark cable. Verify SOP' soft reset is sent once regardless of starting role. TEST=Connect USB4 dock, verify USB4 entry. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Id5026a2c8c9877b860e1356dd33763bad3e51841 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2596838 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Compliance Unit Test - cleanup mock_tcpci_tx_msg_id_resetDenis Brockus2021-01-083-14/+14
| | | | | | | | | | | | | | | | | nit request to rename mock_tcpci_tx_msg_id_reset to be partner_tx_msg_id_reset BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I0bb2bf7937e9c6f858697a1ecd835337652cb29b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2615626 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* TCPMv2: Compliance Unit Test - use CONFIG for NUM_FIXED_BATTERIESDenis Brockus2021-01-082-1/+2
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I0bc4d3f9d7dfebf91d4b7045055440587be7a71e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2615625 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* TCPMv2: Compliance Unit Test - make tx msg id per sop typeDenis Brockus2021-01-073-8/+15
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I9de64e1921029ec4bb5e09ae3aa2c07bf39c692b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2613725 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* TCPMv2: Compliance Unit Test - TD.PD.SRC3.E7Denis Brockus2021-01-076-1/+139
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Iaa6888d2e0d861d64b2747856465789304dde414 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2613724 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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