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* zephyr: support smart USB-A port controlPeter Marheine2022-03-151-4/+0
| | | | | | | | | | | | | | | | | | | | | This enables support for "smart" USB-A ports in addition to the existing "dumb" support, allowing one of them to be selected as well as implementing kconfig support for most of the other options for "smart" ports. For existing boards that enabled USB-A support with the default "dumb" support, their configuration is changed to specifically select that mode because the new choice option cannot have a default. BUG=b:223937974 TEST="smart" port control can be turned on for Nereid BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: If5b0fb393451d31a937c73be2aa3b9623c69307f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3517929 Reviewed-by: Andrew McRae <amcrae@google.com>
* zephyr: tcpm: Add support for FUSB302 Type-C controllerRajesh Kumar2022-03-111-1/+0
| | | | | | | | | | | | | | This add zephyr support for Fairchild's FUSB302 Type-C controller BUG=b:218684235 BRANCH=none TEST=zmake testall Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: I1a55e26021552de8b607e91dd20c901ef2f06844 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3485226 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* Banshee:implement LED behaviorLeo-Tsai2022-03-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement side charger LED and Power breath LED behavior. Power LED: S0 - On S3 - Breath 0.5Hz - Max duty (percentage) = 55 - Fade time (second) = 550ms(In) / 550ms(Out) - Duration time (second) = 500ms - Interval time (second) = 2000ms S5 - Off Charge LED: Charge - Amber Full Charge - Green Low battery - Blink Red Battery error - Blink Red BUG=b:208182468,b:220954645 BRANCH=brya TEST=build make -j BOARD=Banshee pass, verified the side charger LED is working and s0ix can show breath LED Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com> Change-Id: If58fd9e123c4096c840a8e8b5009f8f1bc5ef39f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3506045 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
* zephyr: rename CONFIG_SOC_POWER_MANAGEMENT_TRACE to CONFIG_NPCX_PM_TRACEKeith Short2022-03-071-1/+0
| | | | | | | | | | | | | | | | Following an upstream change, rename CONFIG_SOC_POWER_MANAGEMENT_TRACE to CONFIG_NPCX_PM_TRACE. BUG=none BRANCH=none TEST=zmake testall Cq-Depend: chromium:3504556 Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I06d665461eac6ee429e4b4e86e0d3e5dfa3e4c11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3508152 Reviewed-by: Al Semjonovs <asemjonovs@google.com> Commit-Queue: Al Semjonovs <asemjonovs@google.com>
* zephyr: Add PLATFORM_EC_ALS_TCS3400_EMULATED_IRQ_EVENTSam Hurst2022-03-071-1/+0
| | | | | | | | | | | | | | Add CONFIG_PLATFORM_EC_ALS_TCS3400_EMULATED_IRQ_EVENT option to zephyr BUG=b:204193571 TEST=zmake configure -b herobrine BRANCH=main Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I098116fbb3aff5407fdcf959c6296fc69e0a8414 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3501125 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: port BUTTONS_RUNTIME_CONFIGEric Yilun Lin2022-03-041-1/+0
| | | | | | | | | | | | | | BUG=b:219891339 TEST=buttons are runtime configurable on kingler BRANCH=none Change-Id: Ib58d23ea98fe135413695e5ec88604ece77622d6 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3499688 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* stm32: Introduce define to control extended reset flagsPatryk Duda2022-02-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Some ROs don't support extended reset flags saved in backup RAM. BKPDATA_INDEX_SAVED_RESET_FLAGS_2 (introduced in CL:1295890) was added in the middle of bkpdata_index enum, so it breaks compatibility between RO and RW. In some cases, extended reset flags in backup RAM are cleared because RO wrongly recognizes flags as panic reason. BUG=b:119131962 BRANCH=none TEST=Compile FPMCU firmware for nami with RO nami_fp_v2.2.144-7a08e07eb. Issue 'reboot ro' command from RW part. FPMCU shouldn't stop in RO, because that was not implemented when RO was released. After jump to RW, check if panic data doesn't exist. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ifcefa463c80ec1b498546589dcfc704eba8dfe60 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3477957 Reviewed-by: Bobby Casey <bobbycasey@google.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Tested-by: Patryk Duda <patrykd@google.com> Commit-Queue: Patryk Duda <patrykd@google.com>
* panic: Check panic data size during buildPatryk Duda2022-02-281-0/+1
| | | | | | | | | | | | | | | | | | | | Add build asserts which will check if panic data structure has expected size. This will prevent from extending panic data structure in a way that could break compatibility with RO. To enable check, define CONFIG_RO_PANIC_DATA_SIZE in your board.h file with expected panic data size. BUG=b:119131962 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I1d4b7870ce20c90755853267e1885d118ba08601 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3485136 Tested-by: Patryk Duda <patrykd@google.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Patryk Duda <patrykd@google.com>
* stm32: Add the DFU Boot ManagerBrian J. Nemec2022-02-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added the DFU Boot Manager to control the switch between the DFU and main application region. The DFU Bootmanager performs self checks when the application boots. If any of the following conditions are true it will jump into DFU: * The system backup registers contain a 'Jump to DFU' request. * The start of the RW region is erased indicating the prior firmware update has failed. * An optional check can be enabled to record the number of consecutive unexpected reboots which will be useful for developer test images to avoid locked systems. Testing requires enabling multiple configuration settings set in the follower CL which enables it on Servo_v4. dfu-util version 0.9 lacks the 'leave' parameter required to automatically jump out, systems using this would need to be power cycled to leave DFU. BRANCH=servo BUG=b:217955677 TEST=Enabled the DFU configuration on a Servo_v4. Verified that the runtime identifier is correctly recognized by dfu-util and pydfu.py implementations of the DFU host protocol. Verified firmware updates via the DFU protocol function correctly. TEST=sudo dfu-util -a 0 -s 0x08000000:leave -e -D ec.bin Verified that dfu-util can program the application region. Signed-off-by: Brian Nemec <bnemec@chromium.org> Change-Id: Ie535efc91318244574949542c03efa0b5973cbe5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3443960 Tested-by: Brian Nemec <bnemec@google.com> Reviewed-by: Sam Hurst <shurst@google.com> Commit-Queue: Brian Nemec <bnemec@google.com>
* Add CONFIG_INA219 to config_allowedSimon Glass2022-02-111-0/+1
| | | | | | | | | | | | | | | | | | | | This option is defined by Zephyr, but the Zephyr source tree is not always accessible to the script. Add it to the list to avoid any errors. BUG=b:181323955 BRANCH=none TEST=try CQ Build for plankton then check (without a Zephyr tree): ./util/kconfig_check.py -c build/plankton/.config -a util/config_allowed.txt -p PLATFORM_EC_ -s zephyr/ check See that it now succeeds Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I473ab291cee6074792124c6db5e44bfdaaa0c973 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3453164 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* stm32: Add the DFU Runtime identifiersBrian J. Nemec2022-02-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | Adds a DFU Runtime identifier and a DFU bootmanager to control the switch between the DFU and main application region. The DFU runtime identifier operates on the main application in the RW region. A DFU host recognizes the interface and can send commands to switch the firmware into DFU mode. BRANCH=servo BUG=b:217955677 TEST=Enabled the DFU configuration on Servo_v4 with CONFIG_DFU_RUNTIME TEST='sudo dfu-util -l' Verified the dfu-util recognizes the DFU runtime device. Signed-off-by: Brian Nemec <bnemec@chromium.org> Change-Id: I0e02b7cb35a7c594f169c56a96f965e5d87e3cfb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3441173 Tested-by: Brian Nemec <bnemec@google.com> Reviewed-by: Sam Hurst <shurst@google.com> Commit-Queue: Brian Nemec <bnemec@google.com>
* Add CONFIG_PS2 to config_allowedSimon Glass2022-02-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | This option is defined by Zephyr, but the Zephyr source tree is not always accessible to the script. Add it to the list to avoid any errors. BUG=b:181323955 BRANCH=none TEST=try CQ Build for primus then check (without a Zephyr tree): ./util/kconfig_check.py -c build/primus/.config -a util/config_allowed.txt -p PLATFORM_EC_ -s zephyr/ check See that it now succeeds Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I08f39eb5c5e8d1c50aede1e5c1ec888e3d1027f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3451701 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Makefile: Switch to the Python script for CONFIG checkingSimon Glass2022-02-091-39/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the second attempt, fixing the problem with CONFIG_DAC and other options. These must be left in config_allowed but ignored if they show up as present in Kconfig. Leave the following in config_allowed since they are defined both as CONFIG options in ECOS and Kconfig options in Zephyr: AUDIO_CODEC DAC DMA EEPROM I2C_BITBANG PECI SPI UART_CONSOLE BUG=b:181323955 BRANCH=none TEST=./util/kconfig_check.py -c build/blipper/.config -a util/config_allowed.txt -p PLATFORM_EC_ -s zephyr/ -I ~/cosarm/src/third_party/zephyr/main -i DAC check See that this does not cause an error now Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I1fc7ac9cde106c61dd28b30673830407aa8c1a29 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3425452 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cortex-m: Introduce FPU interrupt handlerPatryk Duda2022-02-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When performing some illegal operation or when result can't be represented using floats, the FPU will assert an interrupt which should be handled. After this change, the EC will inform about type of FPU exception and address where it ocurred. To reduce overhead, the FPU handler will only copy necessary information, schedule fpu_warn() function and clear FPU flags. Message is printed from fpu_warn() which is deferred function (it's called from HOOK task context). Please note that: - FPU interrupt is not asserted immediately after problem occurred, but with noticeable delay, so PC and LR might not be correct. - FPU interrupt will be never triggered on STM32H7 (see errata ES0392 Rev 8, 2.1.2 Cortex-M7 FPU interrupt not present on NVIC line 81). BUG=b:215606535 BRANCH=none TEST=./test/run_device_tests.py --board bloonchipper --tests cortexm_fpu TEST=./test/run_device_tests.py --board dartmonkey --tests cortexm_fpu Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ib6f6c974082affc35302a822f0beea176e204206 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3412259 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bobby Casey <bobbycasey@google.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Patryk Duda <patrykd@google.com>
* Zephyr: Add support for active low backlight enableDiana Z2022-01-311-1/+0
| | | | | | | | | | | | | | Add support for having an active low line in our backlight enable code. BRANCH=None BUG=b:208515128,b:195137794 TEST=zmake testall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id60de51d400740db1480e34fb9d3ed6d2a860042 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3425759 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Revert "Makefile: Switch to the Python script for CONFIG checking"David Stevens2022-01-301-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5b4c6473a341ebbd88463c908b39bb2820e5c43b. Reason for revert: b:216919905 - breaks chromeos CQ Original change's description: > Makefile: Switch to the Python script for CONFIG checking > > Now that the Python script seems to do what we need, switch over to > use that for checking for allowed ad-hoc CONFIGs. > > Sadly we need a work-around for the very old Python 3 version used in > the chroot. > > The new script is better at finding Kconfig options, so this allows some > reductions in the config_allowed.txt file. > > Delete the now-unused shell scripts. > > BUG=b:181323955 > BRANCH=none > TEST=python3 util/test_kconfig_check.py > > Signed-off-by: Simon Glass <sjg@chromium.org> > Change-Id: I2dafc9dfe9d9020638f4e49b5c5ee0fc0b10000b > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923233 > Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Bug: b:181323955 Change-Id: I9b5514f9d2df43033cfd95555612e2e89e6ce724 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3426237 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Nicolas Norvez <norvez@chromium.org> Tested-by: Nicolas Norvez <norvez@chromium.org>
* Makefile: Switch to the Python script for CONFIG checkingSimon Glass2022-01-281-47/+0
| | | | | | | | | | | | | | | | | | | | | | Now that the Python script seems to do what we need, switch over to use that for checking for allowed ad-hoc CONFIGs. Sadly we need a work-around for the very old Python 3 version used in the chroot. The new script is better at finding Kconfig options, so this allows some reductions in the config_allowed.txt file. Delete the now-unused shell scripts. BUG=b:181323955 BRANCH=none TEST=python3 util/test_kconfig_check.py Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I2dafc9dfe9d9020638f4e49b5c5ee0fc0b10000b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923233 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: kconfig: Add FLASH_SIZE_BYTES & MAPPED_STORAGE_BASEWealian Liao2022-01-281-2/+0
| | | | | | | | | | | | | | | | | | This adds PLATFORM_EC_FLASH_SIZE_BYTES & PLATFORM_EC_MAPPED_STORAGE_BASE kconfig option which fetch value from cros-ec,flash node. BUG=b:216385443 BRANCH=none TEST=zmake testall TEST=check FLASH_SIZE_BYTES & MAPPED_STORAGE_BASE have the same value on volteer Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I9ab133e79b870625625e9b5206d67999c96e60a3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3419435 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: add missing Kconfigs for AP throttlingMichał Barnaś2022-01-281-2/+0
| | | | | | | | | | | | | | | | | This commit adds missing Kconfigs for AP throttling based on battery level and discharging current. It will allow to enable them and specify the thresholds beyond which the AP should be throttled. BUG=b:177676794 BRANCH=main TEST=Enable AP throttling on lazor board and check if all configs are properly set Change-Id: Ifff7753e7775c18555ea17b7ecee7e79a112db52 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3420910 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* Zephyr: Add Kconfig for keyboard debugDiana Z2022-01-271-1/+0
| | | | | | | | | | | | | | | | Early in board bringup on systems with no SoC, it can be nice to have keyboard debugs enabled. However, ensure the feature is turned off on more mature boards. BRANCH=None BUG=None TEST=compile guybrush with config and verify it gets set to "n", compile skyrim and ensure it builds Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I2c4465f1e83231ad0f22984577b382f3e02cd370 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3415383 Reviewed-by: Keith Short <keithshort@chromium.org>
* nissa: Add charger config for SM5803Andrew McRae2022-01-251-2/+0
| | | | | | | | | | | | | Add a battery charger config for the SM5803. BUG=b:201000844 TEST=zmake configure -b nereid BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I91b113ee3e7c706dc31dd2d76fd1465cbd0fee04 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3411679 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* zephyr: Regenerate config_allowedSimon Glass2022-01-201-49/+76
| | | | | | | | | | | | | | | | | This file has not been maintained for some months, since the check was turned off. Regenerate it. Unfortunately this adds about 80 CONFIGs that never got a Kconfig added. BUG=b:195718112 BRANCH=none TEST=make buildall -j32 Change-Id: I6abec74bf3f996818d32d2007b6eda821e0ed096 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3388359 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* Fix sort order in config_allowedSimon Glass2022-01-181-1/+1
| | | | | | | | | | | | | | | | | | | | This file got out of sorted order. Fix it. This problem was introduced by: f92bca665 hostcmd: Implement I2C_CONTROL host command which added to the list, but in the wrong place. BUG=b:195718112 BRANCH=none TEST=make buildall -j32 Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I5fa9e7390d1e15696fc549e7b46ad22b85a18b91 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3388357 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Reland "intelrvp: Remove TGLRVP & JSLRVP boards and MECC0.9"Vijay Hiremath2022-01-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of eaa6e6a4939437075f13d9f91beda09fd150b1cc Original change's description: > intelrvp: Remove TGLRVP & JSLRVP boards and MECC0.9 > > As support for TGLRVP & JSLRVP has reached end of life remove these > boards and also support for MECC0.9 that applies only to TGLRVP & > JSLRVP. > > BUG=none > BRANCH=none > TEST=make buildall -j > > Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator > Change-Id: Ic2acb2e87c6db8395a9e8caeaedf130b9dbc3891 > Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3238255 > Reviewed-by: Poornima Tom <poornima.tom@intel.com> > Reviewed-by: Keith Short <keithshort@chromium.org> > Commit-Queue: Keith Short <keithshort@chromium.org> Bug: none Change-Id: Ib417e66ec7ac9d80febe09d4681c9f59a356dfc3 Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3388062 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Poornima Tom <poornima.tom@intel.com> Commit-Queue: Keith Short <keithshort@chromium.org>
* config: change temp_sensor_power from config to gpioMichał Barnaś2022-01-101-1/+1
| | | | | | | | | | | | | | | | | | Split the temp_sensor_power config to separate config and gpio definition. To match the behavior of other optional gpios, there should be config that enables support for feature that requires gpio and per-board define that assigns custom GPIO name to board specific one. BRANCH=main BUG=b:181983966 TEST=zmake testall, compare_build.sh Change-Id: I57ff2532444960170d7a8a08027f13fbce8f34a2 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3314583 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* driver/led: add mp3385 low level driverZick Wei2021-12-201-0/+1
| | | | | | | | | | | | | Add led driver ic mp3385 low level driver. BUG=b:208722790 BRANCH=none TEST=make buildall Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: If6dc272f2420fd7c0bfcd98274a1dcdb35c45748 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3329183 Reviewed-by: Andrew McRae <amcrae@google.com>
* Revert "intelrvp: Remove TGLRVP & JSLRVP boards and MECC0.9"Brian Norris2021-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit eaa6e6a4939437075f13d9f91beda09fd150b1cc. Reason for revert: b/211053714 - build failures Original change's description: > intelrvp: Remove TGLRVP & JSLRVP boards and MECC0.9 > > As support for TGLRVP & JSLRVP has reached end of life remove these > boards and also support for MECC0.9 that applies only to TGLRVP & > JSLRVP. > > BUG=none > BRANCH=none > TEST=make buildall -j > > Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator > Change-Id: Ic2acb2e87c6db8395a9e8caeaedf130b9dbc3891 > Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3238255 > Reviewed-by: Poornima Tom <poornima.tom@intel.com> > Reviewed-by: Keith Short <keithshort@chromium.org> > Commit-Queue: Keith Short <keithshort@chromium.org> Bug: b:211053714 Change-Id: I8102fbdc17859f114a80f87224d165e92ed92729 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3344725 Reviewed-by: Seewai Fu <seewaifu@google.com> Commit-Queue: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org>
* intelrvp: Remove TGLRVP & JSLRVP boards and MECC0.9Vijay Hiremath2021-12-161-1/+0
| | | | | | | | | | | | | | | | | | As support for TGLRVP & JSLRVP has reached end of life remove these boards and also support for MECC0.9 that applies only to TGLRVP & JSLRVP. BUG=none BRANCH=none TEST=make buildall -j Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Change-Id: Ic2acb2e87c6db8395a9e8caeaedf130b9dbc3891 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3238255 Reviewed-by: Poornima Tom <poornima.tom@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* power: Introduce S4 as a real power stateEvan Green2021-12-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support hibernate (suspend to disk) on some systems, there are normally two choices for hibernate's destination power state: shutdown and S4. On most systems, shutdown is the logical choice for Chrome OS, since the wake sources are the same, and device state is properly saved/restored across an S5/G3 transition. However on Brya devices with Intel Keylocker technology, there is an IWKey (intermediate wrapping key) which software by design is not allowed to read. Intel, being no stranger to the concept of hibernate, provisioned support to save and restore this register in a platform area, while still keeping its contents inaccessible to software. However, architecturally they only guarantee this mechanism works down to S3/S4. This means in order to preserve keylocker contents during hibernation, shutdown is no longer an option. We must camp out in the architecturally designated S4 state during hibernation on devices with Intel Keylocker. The EC has long ignored this as a state since the OS doesn't support entering it. This needs to change. This patch introduces a POWER_S4 state. It's modeled after the S3 state, but represents itself as a "chipset soft off" state, like S5. Now, on Intel platforms, we (almost) always transition through S4 on our way up and down. For example, where we would normally go G3->S5->S3->S0, we now go G3->S5->S4->S3->S0. The "almost" refers to unusual error cases, where if power signals are totally wonky we may go from S3 straight to S5. The S3 <-> S5 state transitions also still exist because non-Intel platforms transition directly without going through S4. This bit of consistency was sacrificed to avoid retrofitting a bunch of ARM EC code to transition though a completely phony state. The "almost" refers to unusual error cases, where if power signals are totally wonky we may go from S3 straight to S5. The common Intel code used to look at SLP_S4 as a signal to transition between S5 and S3. Now, we look at SLP_S4 as the signal to transition to S4, and use the SLP_S5 signal to transition deeper, into S5. On platforms with virtual wire support, we should have access to the virtual SLP_S5 line already. On platforms that haven't explicitly set the config for VW_SLP_S5, we merge SLP_S5 and SLP_S4 by making them the same GPIO, so that the transition through S4 simply slides on through. This effectively disables S4 residency, so we disallow advertising S4 residency to the AP unless CONFIG_HOSTCMD_ESPI_VW_SLP_S5 is also enabled. We should then enable this on all new Intel platforms. Signed-off-by: Evan Green <evgreen@chromium.org> BRANCH=None BUG=b:204947672 TEST=hiberman hibernate --test-keys on volteer Change-Id: Icf4798fa517d40ad652a278bbea2051e4c9fb118 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3265286 Commit-Queue: Evan Green <evgreen@chromium.org> Tested-by: Evan Green <evgreen@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* zephyr: kconfig: add PLATOFRM_EC_MATH_UTILEric Yilun Lin2021-11-291-1/+0
| | | | | | | | | | | | | | | | | Make this config independent since it has been dependent to many configs includes motion sensors and USB-PD. BUG=none TEST=zmake testall; grep math_util.o and no config directly uses it. BRANCH=none Change-Id: Id755a28e3f3da99a32b22c0d2e0b1228e7d7e6d0 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3305648 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com> Commit-Queue: Fabio Baltieri <fabiobaltieri@google.com>
* zephyr: add config PLATFORM_EC_USB_PD_TCPM_ANX7447Eric Yilun Lin2021-11-241-3/+0
| | | | | | | | | | | | | | | Support PLATFORM_EC_USB_PD_TCPM_ANX7447 for zephyr. BUG=b:203619750 TEST=zmake testall BRANCH=none Change-Id: If8dc1511be4fdcda33618c094cf9dbd3a69a0936 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291222 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* driver/temp_sensor: support thermal sensor pct2075Zick Wei2021-11-231-0/+1
| | | | | | | | | | | BUG=b:206704936 BRANCH=main TEST=verify thermal sensor work as intended on nipperkin Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Id76d6c09c48a9927e85a0b81b629e9a5639041bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3290824 Reviewed-by: Rob Barnes <robbarnes@google.com>
* config: rename CONFIG_HOSTCMD_SHI to CONFIG_HOST_INTERFACE_SHIKeith Short2021-11-191-1/+1
| | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_SHI to CONFIG_HOST_INTERFACE_SHI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I35959149554f58c8911459dcd025720b6d66eb32 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095843 Tested-by: Michał Barnaś <mb@semihalf.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* config: rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPIKeith Short2021-11-191-1/+1
| | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I7f52614ca9a0dd54cc7e96e51bba40453564198e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095842 Tested-by: Michał Barnaś <mb@semihalf.com>
* config: rename CONFIG_HOSTCMD_LPC to CONFIG_HOST_INTERFACE_LPCKeith Short2021-11-191-1/+1
| | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_LPC to CONFIG_HOST_INTERFACE_LPC. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I6d8722cd314aa7801ea11c1ead5ef6bdd113fd58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095841 Tested-by: Michał Barnaś <mb@semihalf.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* config: rename CONFIG_HOSTCMD_HECI to CONFIG_HOST_INTERFACE_HECIKeith Short2021-11-191-1/+1
| | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_HECI to CONFIG_HOST_INTERFACE_HECI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2a9e490c2fd6f54f7ab9be809ed2711aa3244409 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095840 Tested-by: Michał Barnaś <mb@semihalf.com> Reviewed-by: Aaron Massey <aaronmassey@google.com>
* cleanup: charger: Add BQ25710 sense resistor configsDeepti Deshatty2021-10-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Defined different sense register configs for BQ25710. All the charger chip driver implementation uses common sense register configs i.e CONFIG_CHARGER_SENSE_RESISTOR and CONFIG_CHARGER_SENSE_RESISTOR_AC. When we enable a charger driver for a platform, it is expected that the platform define these sense register configs. But ADLRVP requires two different charger drivers i.e ISL9241 and BQ25720 to be enabled to support all the variant builds. Hence BQ25710 driver is changed to use different sense register configs so that the configs defined for ISL9241 are not affected. BRANCH=none TEST=make -j buildall has no issues Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com> Change-Id: If1e1422246e2e3a5cb628d9a37c23790502b5ca4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3211773 Reviewed-by: Poornima Tom <poornima.tom@intel.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* tree: Remove CONFIG_RO_HEAD_ROOM and CONFIG_RW_HEAD_ROOMTom Hughes2021-10-061-2/+0
| | | | | | | | | | | | | | | | | CONFIG_RO_HEAD_ROOM and CONFIG_RW_HEAD_ROOM are always defined as 0, so remove the values and associated code in order to simplify the code and improve readability. BRANCH=none BUG=b:172020503 TEST=./util/compare_build.sh -b all => MATCH Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Ie11d23befda674cc15dda9a2d66b9c43ea22d49e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3205489 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* zephyr: add CONFIG_LED_ONOFF_STATESDenis Brockus2021-10-061-2/+0
| | | | | | | | | | | | | | | | | | Add CONFIG_PLATFORM_EC_LED_ONOFF_STATES and CONFIG_PLATFORM_EC_LED_ONOFF_STATES_BAT_LOW BUG=none BRANCH=none TEST=make buildall TEST=zmake testall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Iaa858b09774b4caf5fe0a2f2bba4e72532990921 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3205481 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Yuval Peress <peress@google.com> Commit-Queue: Yuval Peress <peress@google.com>
* hostcmd: Implement I2C_CONTROL host commandCaveh Jalali2021-10-011-0/+1
| | | | | | | | | | | | | | | | This adds an host command to get or set the I2C bus speed of an I2C bus located on the EC. BRANCH=none BUG=b:201039003 TEST=with follow-on patches, switched I2C bus speed between 400 kHz and 1 MHz using ectool. Change-Id: Ieaaee8d925509b103771c96bec50a90403766c1a Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3181506 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* driver: Add support for BMI220 sensorMike Lee2021-10-011-0/+1
| | | | | | | | | | | | | | | Based on BMI260 sensor, add support for BMI220 sensor. BUG=b:188373185,b:193945779 BRANCH=dedede,kukui TEST=run factory test on storo360 Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Signed-off-by: Rong Chang <rongchang@chromium.org> Change-Id: Ifa88c7c58203ba405fde757b85570d53a27221a0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3077595 Reviewed-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org>
* zephyr: add support for I2C debuggingKeith Short2021-09-151-2/+0
| | | | | | | | | | | | | | | | | | | Add support for CONFIG_I2C_DEBUG and CONFIG_I2C_DEBUG_PASSTHRU options to zephyr. BUG=none BRANCH=none TEST=zmake testall TEST=Add CONFIG_PLATFORM_EC_I2C_DEBUG=y on herobrine, verify "i2ctrace" command is available and functional. TEST=Add CONFIG_PLATFORM_EC_I2C_DEBUG_PASSTHRU=y on herobrine, verify I2C passthru messages shown during TCPC firmware sync. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ic2d9977af4fa707dab4fdaff332fbcc34491c5fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163211 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Add Kconfig options for PS8xxx TCPCKeith Short2021-09-021-1/+0
| | | | | | | | | | | | | | | | | | Add Kconfig options CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805 and CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815 to enable/disable the workaround for PS8805/PS8815 firmware reporting the incorrect device ID. BUG=none BRANCH=none TEST=zmake testall TEST=On herobrine, verify that "ectool pdchipinfo 0" reports a device ID 0x02. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I16367ae5276e974671b034294275104d5831df21 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140325 Commit-Queue: Wai-Hong Tam <waihong@google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* usbpd: support dynamic PDO selectionEric Yilun Lin2021-09-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support dynamic PDO selection CONFIG_USB_PD_DPS. This config controls the charging voltage and power according to the input power and battery configuration. DPS would continuously evaluate the system load and current charging voltage, and decide a new one by below: 1. If the PDO can fulfill system desired power. 2. If the PDO is efficient for the battery configuration. To detect if the system load cannot be fulfilled by the current PDO, it checks: 1. if the input current closes to the PDO current limit. 2. if the input power closes to the PDO maximum power. To detect if the system load can be fulfilled by a more efficient PDO, it checks: - if the voltage of a new PDO is closer to the battery voltage than the current PDO, and the power is able fulfill the system load. BUG=b:169532537 TEST=1. tested on asurada, the charging voltage is able to switch to different PDOs under different system loads 2. tested that the DPS is able to switch charge port (e.g. C1 12V -> C0 9V) based on the provided PDOs. BRANCH=asurada Change-Id: I7c7706b331dc0d4f8ac68569dc7ed852fc9308e3 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897064 Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* zephyr: shim: add CONFIG_HOSTCMD_DEBUG shimDenis Brockus2021-08-121-1/+0
| | | | | | | | | | | | | | | BUG=b:195948807 BRANCH=none TEST=zmake configure -b $PROJ_HAYATO Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I6de387725db11ad00356c7cf47cb9c0e2e109652 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3087619 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* mchp: Optimize spi_flash_read() APImartin yan2021-08-061-0/+1
| | | | | | | | | | | | | | | | | | Optimize SPI flash read timing, MEC172x QMSPI controller controls CS# by hardware, it will add several system clock cycles delay between CS deassertion to CS assertion at the start of the next transaction, this guarantees SPI back to back transactions, so 1ms delay can be removed to optimze timing. BUG=none BRANCH=none TEST=Tested on ADL RVP and MCHP1727 MECC system via FAFT ECBootTime job save 720ms as EC performs 180KB RW code's SHA256 hash computation Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com> Change-Id: I5cf9c668efb1cd008b91cdd8aa09f7351c017af0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3074767 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Change host interface option to CONFIG_HOSTCMD_SHIKeith Short2021-08-031-1/+1
| | | | | | | | | | | | | | Update SPI host interface config option for inclusive language. BUG=b:163885307 BRANCH=none TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I808d5960fa3e746626465bedc626a95e0f0aaa3f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3066271 Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* config: Delete obsolete configsKeith Short2021-07-301-6/+0
| | | | | | | | | | | | | | | | | | | | | Delete the following configs which are no longer referenced by any source files: CONFIG_CMD_FLASH_LOG CONFIG_CMD_GSV CONFIG_CMD_GSV CONFIG_CMD_LID_ANGLE CONFIG_CMD_PMU CONFIG_CMD_USBMUX BUG=none BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ia304f0579d991a0fccc7bbc7ca7427fe0ed661a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3061902 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: ite: add CONFIG_PLATFORM_EC_FW_RESET_VECTORDenis Brockus2021-07-281-1/+0
| | | | | | | | | | | | | | | | | | | CONFIG_PLATFORM_EC_FW_RESET_VECTOR is used to control CONFIG_FW_RESET_VECTOR in the existing cros-ec code. This allows a chip specific function to be called to obtain the firmware reset vector. BUG=b:194794622 BRANCH=none TEST=zmake configure -b $PROJ_HAYATO Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I49000bc557f86f74af0d8429af6939ad340f21d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3056514 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* zephyr: Remove CONFIG options from allow listDino Li2021-07-231-2/+0
| | | | | | | | | | | | | | | | | | | | | | | Congratulations! The following options are now in Kconfig: CONFIG_HOSTCMD_REGULATOR CONFIG_SMBUS_PEC Config removed with './util/build_allowed.sh -u' Removing these CONFIG options from the allowed list: CONFIG_HOSTCMD_REGULATOR CONFIG_SMBUS_PEC BRANCH=none BUG=none TEST=buildall Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ib12637f9e9d25db3af951a7a12989d334e6a1c5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3045035 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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