| Commit message (Collapse) | Author | Age | Files | Lines |
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Porting the config CONFIG_KEYBOARD_STRICT_DEBOUNCE to Zephyr
BUG=b:242028243
TEST=zmake build steelix
BRANCH=None
Change-Id: I907b597b997f79fb39bba69bec7cfaaba11058a9
Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3819446
Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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This removes the legacy CONFIG_MFT_INPUT_LFCLK config option. There are
no references to this option, so it is safe to remove.
CONFIG_MFT_INPUT_LFCLK appears to have been replaced by setting
mft_t.clk_src to TCKC_LFCLK.
BUG=none
BRANCH=none
TEST=buildall passes
Change-Id: Ief46c7628e4df7798e56f035352c38c0803d3cbc
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3834922
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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CONFIG_PLATFORM_EC_MPU is redundant with the Zephyr Kconfig option,
CONFIG_MPU. Use the Zephyr option directly.
BUG=none
BRANCH=none
TEST=zmake testall --static; compare binaries
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Iff92c7e9fe3a003366d153e618d2450b367fd169
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3791660
Reviewed-by: Aaron Massey <aaronmassey@google.com>
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CONFIG_PLATFORM_EC_ADC is redundant with the Zephyr Kconfig option,
CONFIG_ADC. Use the Zephyr option directly.
Note - projects based on the "minimal" config do not compare. The
minimal config disabled CONFIG_ADC, but the CONFIG_PLATFORM_EC_ADC_CMD
was still enabled. With this CL, CONFIG_PLATFORM_EC_ADC_CMD now depends
on CONFIG_ADC.
BUG=none
BRANCH=none
TEST=zmake testall --static; compare binaries
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I129a3f490abd5c8234bc06ed6f86f2d7ff8a13b0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3791659
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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We leverage unused cc pins as gpio function to upstream for
power saving, and do the changes in cros/main:
1.get IT83XX_USBPD_PHY_PORT_COUNT from dtsi
2.get CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT from dts
BUG=none
BRANCH=none
TEST=check 0x04, 0x05, 0x06 of port0 and port1 reg values,
1.on it8xxx2_evb: both ports cc pin are disabled
2.on krabby: both ports cc pin are enabled, pd works.
3.on nereid: port1 cc pin is disabled, port0 pd works.
Cq-Depend: chromium:3782766
Change-Id: Ib7c766dd592dc50acc316ae316ab92911ba020c7
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3734032
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: Peter Marheine <pmarheine@chromium.org>
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BRANCH=None
BUG=b:239199935
TEST=make -j$(nproc) buildall && echo SUCCESS
TEST=git commit --allow-empty
./util/compare_build.sh -b dartmonkey
./util/compare_build.sh -b all
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I845ca84920af1ca33457b79fe2a3892867ed693c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3767853
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Instead of ignoring BOARD_ and VARIANT_ configs from the list of CONFIGs
allowed to use in legacy EC, just don't parse the Kconfig files from
board, test, project, or chip dirs.
That gives better parity between the kconfiglib based logic and the grep
based logic. This also prevents simple refactors like crrev/c/3745106
from breaking the unit test.
BRANCH=None
BUG=b:238773780
TEST=util/run_tests.sh && make -j40 buildall
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: Idf1d6a2ede86c587c092df1cf060200d178a881b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3763781
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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Changed the unit test to fail if it can't find zephyr or the kconfiglib
instead of skipping, and make it pass.
Run the unit test in the CQ.
In the process, I discovered that it never used kconfiglib because of
errors with ZEPHYR_BASE not being set. Changed kconfig_check to output
the error when it falls back to no kconfiglib.
This exposed that there were missing configs in util/config_allowed.txt
BRANCH=None
BUG=b:238773780,b:181253613
TEST=make -j40 buildall && util/run_tests.sh
Change-Id: I28a050d448a40df034dd9f2305a2d17cd0797468
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3759263
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
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BRANCH=none
BUG=none
TEST=Add 20 blank lines to common/charge_manager.c
and 5 blank lines to common/usb_charger.c
./util/compare_build.sh -b all -j 120
= MATCH
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I0e1364f64fa9f749830cbaa4833fc856eed9abef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3756173
Reviewed-by: Keith Short <keithshort@chromium.org>
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The libfp library prints some values with PRIx32 or PRId32 format
specifiers which, in their compilation environment, output "%lx" and
"%ld".
Unfortunately, support for printing any '%l' format in EC
code was deprecated in issuetracker.google.com/issues/172210614
after changing it from it being treated as a hard-coded 64-bit length.
There was concern that new code using %l with 32-bit values would be
cherry-picked to older branches without the updated printf. In these
cases, the older code would interpret that %l as 64-bit argument,
causing it to over-ingest arguments and potentially behave in an
undefined manner.
Printing 32-bit values with "%l" or "%i" is safe as long as we can
guarantee no legacy code will attempt to print using "%l" with a
64-bit value. The logic here is protected by a config flag that is
only enabled for FPMCU and FPMCU doesn't use long running release
branches.
A printf test is also added to ensure that only dartmonkey and
bloonchipper boards have long32 enabled.
BRANCH=none
BUG=b:234781655
BUG=b:234143158
TEST=./test/run_device_tests.py -b dartmonkey -t printf
TEST=./test/run_device_tests.py -b bloonchipper -t printf
TEST=make runhosttests
Signed-off-by: Bobby Casey <bobbycasey@google.com>
Change-Id: If432f507a31cc12a4c5c4bdcd07c6141407bd70d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3707743
Reviewed-by: Andrea Grandi <agrandi@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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The LPUART is treated as UART9 by the EC codebase, for the purpose of
running the system console.
This CL adds the option of performing USB forwarding on the LPUART, in
the same way as the ordinary numbered UARTS. In particular, the
LPUART clock divisor formula is different by a factor of 256, which
was already handled in uart.c, but not in usart.c.
BUG=b:192262089
TEST=Observed UART forwarding on HyperDebug
BRANCH=none
Signed-off-by: Jes B. Klinke <jbk@chromium.org>
Change-Id: I1661c7dbbc48ddf556fc14d02e9f438ab2773fcc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3706579
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Support second keyboard.
BUG=b:232737379
BRANCH=firmware-volteer-13672.B
TEST=make BOARD=delbin
Signed-off-by: Jacky_Wang <jacky5_wang@pegatron.corp-partner.google.com>
Change-Id: I4ed722d56969cbfd2cb6009cf5bd17dec9176973
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3676893
Commit-Queue: Kenny Pan <kennypan@google.com>
Reviewed-by: Kenny Pan <kennypan@google.com>
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We don't have any supported Braswell boards remaining, delete the
unused code.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ica4ce5c53e7e8a5b727ae23e9bcd3fbc411a594f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3708434
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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There is a mul instruction bug.
The bug may cause instructions of writing back CPU GPR (e.g mv a0,s2)
which following the mul instruction to fail.
This patch disables the 'M' extension and overwrite integer
multiplication and division arithmetic library routines with using
hardware multiplication and division and nop instructions.
This will ensure that there is no write back GPR instruction to follow
mul instruction to avoid the bug.
BUG=b:235297478
BRANCH=asurada,cherry,icarus
TEST=- buildall
- The "M" extension is disabled on cherry image (-march=rv32iac)
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I39b34a91dd77d975b78b6756494691c6b28dc42d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3690042
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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This makes the 'M' extension to be configurable.
BUG=b:235297478
BRANCH=asurada,cherry,icarus
TEST=- buildall
- ISA for cherry images includes "M" extension (-march=rv32imac)
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I56957a6767378121443659a170ca33896ada67ce
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3690041
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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TUSB1064 USB-C mux driver can work only with one TUSB type at the same
time. Allowed types are TUSB1064. TUSB1044, and TUSB546. It makes sense
to introduce PLATFORM_EC_USB_MUX_TUSB_TYPE in Kconfig.usb_mux
BUG=none
TEST=zmake testall
BRANCH=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I7bc583811bce718451d137f09dbe5f20be963f3e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3579120
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Tomasz Michalec <tmichalec@google.com>
Commit-Queue: Tomasz Michalec <tmichalec@google.com>
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This Supports common PWM (Pulse Width Modulation) controlled LEDs
that do not conform to the Chromium OS LED behavior specification.
BUG=none
BRANCH=none
TEST=make buildall; zmake testall
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I9b56fb7d17881a1cc1ff4a8cef789d542ee5865e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3657846
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Added Cypress CCGXXF Single/Dual USB-C Port Controller with Source PPC
chip in Zephyr device tree.
BUG=b:232920124
BRANCH=none
TEST=zmake testall
Able to test USB, DP on MTLRVP
Change-Id: If790588a52fb87ab56439338fe0c8614ccc3dac6
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3513796
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Some platforms require get port to be supported to function. Enabling
get port to support zephyr implementations that require it. Also adds
support for configuring CCGXXF ports in zephyr.
BUG=none
BRANCH=none
TEST=zmake mtlrvpp_npcx and verify cypress ccgxxf ports
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Change-Id: Iab4331ebc9c8d8e247f0aeabf8d0635957942a5b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3602805
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Sam Hurst <shurst@google.com>
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Add a PLATFORM_EC_POWER_BUTTON_INIT_TIMEOUT Kconfig
to set CONFIG_POWER_BUTTON_INIT_TIMEOUT so that the
powerbtn task startup timeout can be configurable.
BUG=b:231675142
TEST=zmake build nereid; flash & run
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I5eb3ebadbaa9a0d9f433acc7bbf07807f2e3a1c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3631720
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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For some x86 boards, the PROCHOT signal is not valid once the AP enters
the C10 state. Add an option to gate PROCHOT detection if the C10 state
is asserted. When the AP exits C10, the EC rechecks the PROCHOT state.
Note that only the Volteer baseboard enables the PROCHOT interrupt, so
it is the only board that is updated to call
throttle_ap_config_prochot().
All gpio.inc files that connect to throttle_ap_prochot_input_interrupt()
all use the pin name EC_PROCHOT_IN_L. Confirmed with these searches:
$ grep -r "GPIO_INT.*throttle_ap_prochot_input_interrupt" . \
| wc -l
31
$ grep -r "EC_PROCHOT_IN_L.*throttle_ap_prochot_input_interrupt" . \
| wc -l
31
$ grep -r "gpio_enable_interrupt.*EC_PROCHOT_IN_L" .
./baseboard/volteer/power.c: \
gpio_enable_interrupt(GPIO_EC_PROCHOT_IN_L);
BUG=b:185810479
BRANCH=volteer
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I73fb328675d9faade13fe0192570dc838de028a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3615479
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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port the PLATFORM_EC_HOSTCMD_BATTERY_V2 and auto-enable
if the PLATFORM_EC_BATTERY_V2 is set
BUG=b:222629048
BRANCH=none
TEST=ectool battery works well when battery is discharging
Change-Id: I4345e34bc2777c4a9830a3e1b9d0184c8704f09d
Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3503075
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Reviewed-by: zanxi chen <chenzanxi@huaqin.corp-partner.google.com>
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Added support to enable discrete Keyboard if the platform needs one
or the raw Keyboard support is not built-in in the EC.
BUG=b:230008245
BRANCH=none
TEST=Able to test it8801 discrete Keyboard on MTLRVP
Change-Id: I6fc40af8bdd006e7af86d2c17fca8faab5412f7e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3601509
Reviewed-by: RAJESH KUMAR <rajesh3.kumar@intel.com>
Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Renamed IT8801 discrete keyboard related names like NOT_RAW, I2C_PORT,
I2C_ADDRESS and Interrupt GPIO to support discrete keyboard in Zephyr
Shim.
BUG=b:230008245
BRANCH=none
TEST=make buildall
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Change-Id: I9be3ff570681f88e1fc3ac0650f9919ad272b847
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3600627
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Add the binding yaml files for all charger chips used in Zephyr. It will
be needed for generating the chg_chips array based on DTS, not defining
in board-specific code.
The yaml files for ISL923x and ISL9241 chips were already present, so
just adjust them to the desired usage.
BUG=b:228237412
TEST=zmake testall
BRANCH=main
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I0e0120d28f03c5d1ba5fb1bd9bbb5a1e878af44f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3586424
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Dawid Niedzwiecki <dawidn@google.com>
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CPS8100 is a Qi wireless power transmitter. This patch adds a driver for
it and integrates it with the PCHG subsystem.
BUG=b:191418683
BRANCH=Brask
TEST=On Brask
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: If6ec1c4811621ce8d553800db9608aa6cf60cd45
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3595282
Reviewed-by: caveh jalali <caveh@chromium.org>
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When we set the EN_S5_RAILS to enable the 3.3v/5v power for the ap
spi flash programming via the C2D2, the power sequence ic will
deassert the SEQ_EC_RSMRST_ODL in the G3 state. In order to avoid
the ap being powered on during the C2D2 programming, we need to
bypass the RSMRST before the system enters the S5. As a result,
we add CONFIG_CHIPSET_X86_RSMRST_AFTER_S5 to block the RSMRST
until the system goes to S5.
Since the APL/GLK already applied the same approach, we enable
the CONFIG_CHIPSET_X86_RSMRST_AFTER_S5 for the APL/GLK by default
in the config.h.
BUG=b:223084533
BRANCH=None
TEST=cros ap flash -b brya -i ${IMAGE}
Change-Id: I14039b405adc62e91436759eddacf6f9dc141eff
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3583905
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
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The MAX6958/MAX6959 is a compact multiplexed common - cathode display
designed to interface microprocessors with seven - segment numerical LED
digits or to discrete LEDs via a 2-wire serial interface compatible with
SMBusTM and I2C.
BUG=b:218684235
BRANCH=none
TEST=zmake testall
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I977c53fb4153da50041d20e68c1b8a084750a18d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3587977
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Allow dynamic modification of the USB port enable
GPIO list so that sub-boards without USB-A ports
can disable the port enable setting.
BUG=b:214858346
TEST=zmake build nivviks
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I12b93a3c20852f68303b158aa20bc9a1c63f6ae5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3592312
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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Drop the shim PWM code, all drivers of Zephyr enable projects are now
using the Zephyr PWM APIs.
The pwm.c file only contains the PWM host command now, so rename the
corresponding Kconfig option and file to reflect that.
BRANCH=none
BUG=b:217741090
TEST=cq dry run
TEST=build and run on brya
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change-Id: I3837a81be98c4c2a9c2f7ceea24e05fe7940c7d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3578701
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The PLATFORM_EC_USB_PD_PORT_MAX_COUNT config can be get based on dts.
PLATFORM_EC_USB_PD_PORT_MAX_COUNT equals a number of instances with
"named-usbc-port" compatible.
BUG=b:176237074
TEST=zmake testall && make buildall
BRANCH=main
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: If66ef429f4b9070e95b9631247423392c811f916
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3539940
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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The config option CONFIG_BC12_DETECT_DATA_ROLE_TRIGGER is
unconditionally enabled in the legacy EC code when using the PI3USB9201
BC1.2 chip. Add an equivalent Kconfig option.
BUG=b:215776286
BRANCH=none
TEST=Connect DCP device, verify charging at 1.5 A
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Idd762d8801ad7e62c02e36c892d5e49a01068d92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3536624
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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This enables support for "smart" USB-A ports in addition
to the existing "dumb" support, allowing one of them to
be selected as well as implementing kconfig support for
most of the other options for "smart" ports.
For existing boards that enabled USB-A support with the default
"dumb" support, their configuration is changed to specifically
select that mode because the new choice option cannot have a
default.
BUG=b:223937974
TEST="smart" port control can be turned on for Nereid
BRANCH=none
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: If5b0fb393451d31a937c73be2aa3b9623c69307f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3517929
Reviewed-by: Andrew McRae <amcrae@google.com>
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This add zephyr support for Fairchild's FUSB302 Type-C controller
BUG=b:218684235
BRANCH=none
TEST=zmake testall
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I1a55e26021552de8b607e91dd20c901ef2f06844
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3485226
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Implement side charger LED and Power breath LED behavior.
Power LED:
S0 - On
S3 - Breath 0.5Hz
- Max duty (percentage) = 55
- Fade time (second) = 550ms(In) / 550ms(Out)
- Duration time (second) = 500ms
- Interval time (second) = 2000ms
S5 - Off
Charge LED:
Charge - Amber
Full Charge - Green
Low battery - Blink Red
Battery error - Blink Red
BUG=b:208182468,b:220954645
BRANCH=brya
TEST=build make -j BOARD=Banshee pass,
verified the side charger LED is working and s0ix can show breath LED
Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com>
Change-Id: If58fd9e123c4096c840a8e8b5009f8f1bc5ef39f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3506045
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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Following an upstream change, rename CONFIG_SOC_POWER_MANAGEMENT_TRACE
to CONFIG_NPCX_PM_TRACE.
BUG=none
BRANCH=none
TEST=zmake testall
Cq-Depend: chromium:3504556
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I06d665461eac6ee429e4b4e86e0d3e5dfa3e4c11
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3508152
Reviewed-by: Al Semjonovs <asemjonovs@google.com>
Commit-Queue: Al Semjonovs <asemjonovs@google.com>
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Add CONFIG_PLATFORM_EC_ALS_TCS3400_EMULATED_IRQ_EVENT option
to zephyr
BUG=b:204193571
TEST=zmake configure -b herobrine
BRANCH=main
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I098116fbb3aff5407fdcf959c6296fc69e0a8414
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3501125
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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BUG=b:219891339
TEST=buttons are runtime configurable on kingler
BRANCH=none
Change-Id: Ib58d23ea98fe135413695e5ec88604ece77622d6
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3499688
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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Some ROs don't support extended reset flags saved in backup RAM.
BKPDATA_INDEX_SAVED_RESET_FLAGS_2 (introduced in CL:1295890) was added
in the middle of bkpdata_index enum, so it breaks compatibility between
RO and RW. In some cases, extended reset flags in backup RAM are cleared
because RO wrongly recognizes flags as panic reason.
BUG=b:119131962
BRANCH=none
TEST=Compile FPMCU firmware for nami with RO nami_fp_v2.2.144-7a08e07eb.
Issue 'reboot ro' command from RW part. FPMCU shouldn't stop
in RO, because that was not implemented when RO was released.
After jump to RW, check if panic data doesn't exist.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ifcefa463c80ec1b498546589dcfc704eba8dfe60
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3477957
Reviewed-by: Bobby Casey <bobbycasey@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Tested-by: Patryk Duda <patrykd@google.com>
Commit-Queue: Patryk Duda <patrykd@google.com>
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Add build asserts which will check if panic data structure has expected
size. This will prevent from extending panic data structure in a way
that could break compatibility with RO.
To enable check, define CONFIG_RO_PANIC_DATA_SIZE in your board.h file
with expected panic data size.
BUG=b:119131962
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I1d4b7870ce20c90755853267e1885d118ba08601
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3485136
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Patryk Duda <patrykd@google.com>
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Added the DFU Boot Manager to control the switch between the DFU
and main application region.
The DFU Bootmanager performs self checks when the application boots.
If any of the following conditions are true it will jump into DFU:
* The system backup registers contain a 'Jump to DFU' request.
* The start of the RW region is erased indicating the prior
firmware update has failed.
* An optional check can be enabled to record the number of
consecutive unexpected reboots which will be useful for
developer test images to avoid locked systems.
Testing requires enabling multiple configuration settings set in the
follower CL which enables it on Servo_v4. dfu-util version 0.9 lacks
the 'leave' parameter required to automatically jump out, systems using
this would need to be power cycled to leave DFU.
BRANCH=servo
BUG=b:217955677
TEST=Enabled the DFU configuration on a Servo_v4. Verified that the
runtime identifier is correctly recognized by dfu-util and pydfu.py
implementations of the DFU host protocol. Verified firmware updates
via the DFU protocol function correctly.
TEST=sudo dfu-util -a 0 -s 0x08000000:leave -e -D ec.bin
Verified that dfu-util can program the application region.
Signed-off-by: Brian Nemec <bnemec@chromium.org>
Change-Id: Ie535efc91318244574949542c03efa0b5973cbe5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3443960
Tested-by: Brian Nemec <bnemec@google.com>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Brian Nemec <bnemec@google.com>
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This option is defined by Zephyr, but the Zephyr source tree is not
always accessible to the script. Add it to the list to avoid any
errors.
BUG=b:181323955
BRANCH=none
TEST=try CQ
Build for plankton then check (without a Zephyr tree):
./util/kconfig_check.py -c build/plankton/.config
-a util/config_allowed.txt -p PLATFORM_EC_ -s zephyr/ check
See that it now succeeds
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I473ab291cee6074792124c6db5e44bfdaaa0c973
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3453164
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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Adds a DFU Runtime identifier and a DFU bootmanager to control the
switch between the DFU and main application region.
The DFU runtime identifier operates on the main application in the RW
region. A DFU host recognizes the interface and can send commands to
switch the firmware into DFU mode.
BRANCH=servo
BUG=b:217955677
TEST=Enabled the DFU configuration on Servo_v4 with CONFIG_DFU_RUNTIME
TEST='sudo dfu-util -l' Verified the dfu-util recognizes the
DFU runtime device.
Signed-off-by: Brian Nemec <bnemec@chromium.org>
Change-Id: I0e02b7cb35a7c594f169c56a96f965e5d87e3cfb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3441173
Tested-by: Brian Nemec <bnemec@google.com>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Brian Nemec <bnemec@google.com>
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This option is defined by Zephyr, but the Zephyr source tree is not
always accessible to the script. Add it to the list to avoid any
errors.
BUG=b:181323955
BRANCH=none
TEST=try CQ
Build for primus then check (without a Zephyr tree):
./util/kconfig_check.py -c build/primus/.config
-a util/config_allowed.txt -p PLATFORM_EC_ -s zephyr/ check
See that it now succeeds
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I08f39eb5c5e8d1c50aede1e5c1ec888e3d1027f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3451701
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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This is the second attempt, fixing the problem with CONFIG_DAC and
other options. These must be left in config_allowed but ignored if
they show up as present in Kconfig.
Leave the following in config_allowed since they are defined both
as CONFIG options in ECOS and Kconfig options in Zephyr:
AUDIO_CODEC
DAC
DMA
EEPROM
I2C_BITBANG
PECI
SPI
UART_CONSOLE
BUG=b:181323955
BRANCH=none
TEST=./util/kconfig_check.py -c build/blipper/.config
-a util/config_allowed.txt -p PLATFORM_EC_ -s zephyr/
-I ~/cosarm/src/third_party/zephyr/main -i DAC check
See that this does not cause an error now
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I1fc7ac9cde106c61dd28b30673830407aa8c1a29
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3425452
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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When performing some illegal operation or when result can't be
represented using floats, the FPU will assert an interrupt which
should be handled.
After this change, the EC will inform about type of FPU exception
and address where it ocurred. To reduce overhead, the FPU handler will
only copy necessary information, schedule fpu_warn() function and clear
FPU flags. Message is printed from fpu_warn() which is deferred function
(it's called from HOOK task context).
Please note that:
- FPU interrupt is not asserted immediately after problem occurred, but
with noticeable delay, so PC and LR might not be correct.
- FPU interrupt will be never triggered on STM32H7 (see errata ES0392
Rev 8, 2.1.2 Cortex-M7 FPU interrupt not present on NVIC line 81).
BUG=b:215606535
BRANCH=none
TEST=./test/run_device_tests.py --board bloonchipper --tests cortexm_fpu
TEST=./test/run_device_tests.py --board dartmonkey --tests cortexm_fpu
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ib6f6c974082affc35302a822f0beea176e204206
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3412259
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bobby Casey <bobbycasey@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Patryk Duda <patrykd@google.com>
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Add support for having an active low line in our backlight enable code.
BRANCH=None
BUG=b:208515128,b:195137794
TEST=zmake testall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id60de51d400740db1480e34fb9d3ed6d2a860042
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3425759
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This reverts commit 5b4c6473a341ebbd88463c908b39bb2820e5c43b.
Reason for revert: b:216919905 - breaks chromeos CQ
Original change's description:
> Makefile: Switch to the Python script for CONFIG checking
>
> Now that the Python script seems to do what we need, switch over to
> use that for checking for allowed ad-hoc CONFIGs.
>
> Sadly we need a work-around for the very old Python 3 version used in
> the chroot.
>
> The new script is better at finding Kconfig options, so this allows some
> reductions in the config_allowed.txt file.
>
> Delete the now-unused shell scripts.
>
> BUG=b:181323955
> BRANCH=none
> TEST=python3 util/test_kconfig_check.py
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Change-Id: I2dafc9dfe9d9020638f4e49b5c5ee0fc0b10000b
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923233
> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Bug: b:181323955
Change-Id: I9b5514f9d2df43033cfd95555612e2e89e6ce724
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3426237
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Nicolas Norvez <norvez@chromium.org>
Tested-by: Nicolas Norvez <norvez@chromium.org>
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Now that the Python script seems to do what we need, switch over to
use that for checking for allowed ad-hoc CONFIGs.
Sadly we need a work-around for the very old Python 3 version used in
the chroot.
The new script is better at finding Kconfig options, so this allows some
reductions in the config_allowed.txt file.
Delete the now-unused shell scripts.
BUG=b:181323955
BRANCH=none
TEST=python3 util/test_kconfig_check.py
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I2dafc9dfe9d9020638f4e49b5c5ee0fc0b10000b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923233
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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This adds PLATFORM_EC_FLASH_SIZE_BYTES &
PLATFORM_EC_MAPPED_STORAGE_BASE kconfig option which fetch value from
cros-ec,flash node.
BUG=b:216385443
BRANCH=none
TEST=zmake testall
TEST=check FLASH_SIZE_BYTES & MAPPED_STORAGE_BASE have the same value
on volteer
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I9ab133e79b870625625e9b5206d67999c96e60a3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3419435
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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