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* stm32mon: add back flashing progressionVincent Palatin2013-02-061-8/+9
| | | | | | | | | | | | | | | | | | | As we no longer have the low-tech dots to show the progression of the on-going flashing, display a completion percentage to give the user a hint of the ETA. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=./util/flash_ec --board=spring and see accurate progression percentage reported. Change-Id: I75ccbe3433acd6c94d03a08bf462ea4516e4ce02 Reviewed-on: https://gerrit.chromium.org/gerrit/42733 Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Modify stm32mon to better suite autotest useVadim Bendebury2013-02-051-17/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces the following modifications: When used outside chroot on Goobuntu the serial interface fails to initialize if parity enable bit is set (for a reason not clearly understood). On top of that the tcsetattr() return value of zero is not a guarantee of success. To be sure that the settings came through one is supposed to read back the driver config and compare it with the desired config. To add insult to injury, gPrecise driver rejects attempts to enable parity. Parity setting is not essential in many cases, this is why we check the actual config and if the only missing setting is parity we print a warning message and continue. In case an operation fails, the exit value should reflect that (so that the autotest suite using the utility could report failure). Often when the programming attempt is undertaken soon after reset, this utility gets overwhelmed with the console output generated by the EC on resets. Consume the output before proceeding. Instead of printing a long set of dots (one per written/read block), print a spinning wheel instead. BRANCH=None BUG=chrome-os-partner:15610 TEST=manual . used the utility to program Snow EC both inside and outside chroot, it succeeded. Observed the failing attempt to set parity when running outside chroot. Observed spinning characters instead of stream of dots. Change-Id: Id25595d35a2a3ca578639cebd508f599e618787c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/42310 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32mon: add ID for stm32f102r8stabilize-3658.0.0David Hendricks2013-01-301-0/+1
| | | | | | | | | | | | | | | | | | This adds a table entry for stm32f102r8. BRANCH=none BUG=none TEST=ran flash_ec successfully on an stm32f102r8 (see notes below) ChipID 0x410 : STM32F102R8 Bootloader v2.2, commands : 00 01 02 11 21 31 43 63 73 82 92 Flash erased. Writing 65536 bytes at 0x08000000 ... (many more dots) ...Done. Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I1f4af0413a4df2c09a1043bdc78a429b79c28533 Reviewed-on: https://gerrit.chromium.org/gerrit/42270 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32mon supports read unprotection.Louis Yung-Chieh Lo2012-07-171-5/+36
| | | | | | | | | | | | | | | | | Details please refer to AN3155 document. BUG=None TEST=run on real machine. % stm32mon -U % stm32mon -u % stm32mon -w new_image Change-Id: I070e18a7cb112afe0ab0d0f0bd06cecc4eefb37e Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27630 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com> Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
* stm32mon: set flash_size to 128KB for chip ID 0x420David Hendricks2012-06-261-1/+1
| | | | | | | | | | | | | | | | | This updates the flash_size to match 128KB parts. Unfortunately there does not seem to be an easy way to differentiate between the 64KB and 128KB parts at runtime. BUG=none TEST=tested on Snow Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ie1ca6f6d04753e91d937f67dec193fcf5566251e Reviewed-on: https://gerrit.chromium.org/gerrit/26188 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* stm32mon: more robust serial communicationVincent Palatin2012-06-011-11/+24
| | | | | | | | | | | | | | | | | | | | | | | - throw away all the incoming garbage after a NACK to be protect against unexpected behavior on the embedded monitor. - increase the command timeout : on STM32F100, I have measured up to 1.4s to execute the erase 64kB command. With the current 2s timeout, it was failing when you are unlucky (since it's using a integer second timestamp to measure the timeout). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=with a Snow, flash the board using stm32mon -w ec.bin from various states. Change-Id: I260b3b1311eac9be7c43f835eeac68051befd24a Reviewed-on: https://gerrit.chromium.org/gerrit/24314 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* stm32mon: complete support for stm32f100Vincent Palatin2012-05-221-4/+42
| | | | | | | | | | | | - add the simple erase command - fix the flash size Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=./build/snow/util/stm32mon -d /dev/pts/10 -w ec.bin Change-Id: I9bdb0cf06759a04bd2bbef24d559eb67e4c0aa00
* stm32l: workaround missing mass erase featureVincent Palatin2012-03-061-10/+26
| | | | | | | | | | | | | The STM32L15xx monitor does not implement the mass erase, so we need to use the page erase feature and loop. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on Discovery, fill the flash with a pattern, then erase, write a firmware image, read back the content of the flash, run the firmware. Change-Id: Icf0e9812a5d491fea78472a0203ddbbc3e813b2f
* stm32l: add a tool to flash the SoC using the serial monitorVincent Palatin2012-02-061-0/+659
When run with BOOT0=1 and BOOT1=0, the STM32L enters a system monitor which allows flashing over the serial port (USART1 pins PA9 and PA10). Implement commands to flash and run a program from a linux Host. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=on a serial port connected to Discovery board pins PA9 and PA10, run manually the various tools commands. Change-Id: I42f95ed50a56d82d728989149b3e47210af9dc96