| Commit message (Collapse) | Author | Age | Files | Lines |
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Move all the boards directories together under zephyr/boards from
their scattered locations under projects/.
This is the first step towards de-coupling the concept of a Zephyr
board from baseboard/board/model, as it currently is. Further work
will be required to actually unify these directories and delete the
baseboard-specific names from our tree.
BUG=b:193814903
BRANCH=none
TEST=zmake testall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I33a344af6890b2c2c54f1e91f0f0fa85caaf19d3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3035222
Commit-Queue: Yuval Peress <peress@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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The NPCX header generator configs are duplicated on multiple projects.
Move them to the default in Kconfig.npcx.
BRANCH=None
BUG=b:192253134
TEST=Built the brya, kohaku, lazor, volteer, asurada, and posix-ec
images. Booted the lazor image on Lazor board.
Change-Id: I560434473d76ba67fc089ead4ab39efbb5ab6703
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3029002
Reviewed-by: Keith Short <keithshort@chromium.org>
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Delete the Kconfig options that are now setup by default for the NPCX7
chipset.
BUG=none
BRANCH=none
TEST=zmake testall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I7bfca4a85e2b469e0f9e6d59f873851ca081cf29
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954921
Reviewed-by: Yuval Peress <peress@chromium.org>
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NPCX series ROM code changes the chip basic setting by firmware binary
header for loading the firmware from flash to RAM. All the NPCX series
chips could use it, so those configuration options are moved to
upstream.
The ecst chip version automatic select by CONFIG_SOC_NPCX7MNX.
Currently, the project setting doesn't set to the expected chip part
number. Change the following project to select the target chip &
configure ecst header:
- volteer: npcx7m7fc
- trogdor: npcx7m6fc
- kohaku: npcx7m6fc
BUG=b:184448653
BRANCH=none
TEST=zmake testall
TEST=volteer boot to OS
Cq-Depend: chromium:2872415
Signed-off-by: Yuval Peress <peress@chromium.org>
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Ieed6c21536401f70950ddd1f18d243b127d896ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2867128
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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For CONFIG_BOARD_RESET_AFTER_POWER_ON feature, the longer
initialization time lets H1 reset EC before EC writes
EC_RESET_FLAG_INITIAL_PWR flag to BBRAM. It causes EC couldn't
recognize the first reset-pin for the current mechanism.
Set the volteer, kohaku, delbin firmware NPCX firmware header to
improve the initialization time:
core clock to SPI clock ratio - 2,
SPI clock - 50MHz,
flash read mode - dual
BUG=None.
BRANCH=None.
TEST=Check output header offset 6 = 0x0c, offset 7 = 0x03.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: If9b3cd9a5ed7086a44ec7efa7bb5c7c40d4bcd81
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2759763
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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The CONFIG_CORTEX_M_SYSTICK option cannot be used with the Nuvoton
kernel timer support.
BUG=b:177904393
BRANCH=none
TEST=zmake testall
Cq-Depend: chromium:2713759
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I30f1c1a2c00319e8f787f4b98bc164fc43125165
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2714262
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
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Enable watchdog on Volteer & kohaku.
BUG=b:176523207, b:177604307
BRANCH=None.
TEST=Trigger watchdog by 'waitms 2000' &&
don't trigger watchdog by 'waitms 1000' on volteer.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I59a2031c14725ac8f9ae294e1a5cbfae84ebdab6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2706666
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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Make npcx builds done by zephyr have valid format, this means:
1. Only the first section (RO) should have the header.
2. The header should use the chip information or add new Kconfig
values if needed.
3. This should not be done per board (one centralized place).
Move the cmake logic to generate the header via ecst.py script (
located in the zephyr repository and is used to generate the header
for the npcx chips) to a common place: zephyr/CMakeLists.txt. With
that change, the board-specific CMakeLists.txt is now removed, to
be replaced with a call to set ECST_CHIP_ARG. This value must be
set because zephyr only defines SOC_NPCX7M6FB while our specific chip
is different.
For the same reason, both volteer and kohaku require overriding
zephyr's default CONFIG_FLASH_SIZE for the npcx7m6fb.
Additionally, each build (RO/RW) will no longer generate the final
output using the board's name. This will help zmake find the image
with the header without requiring additional arguments.
BRANCH=none
BUG=b:164421798
TEST=build volteer, flash the joined binary, see it boot
TEST=build kohaku
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I418c138e33812c411503f8260fdaa85059a737c9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682173
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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The build for Kohaku needed to add the include/drivers
directory so that system calls can be generated (this
mirrors volteer). Additionally, since kohaku isn't
upstreamed, it needed the CONFIG_FLASH_SIZE value.
BRANCH=none
BUG=b:176828988, b:174481378
TEST=zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I19989e85e22360e12c0dc0ee29b6769673023a22
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2659679
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Kohaku uses the same EC chip as volteer. Adding a second device will
help give us a tiny bit more build diversity too, which is a good
thing probably.
This just adds a minimal build for kohaku with just UART support. No
power sequencing, keyboard, USB-C, charging, etc.
BUG=b:177609422
BRANCH=none
TEST=flash onto kohaku, observe working shell and timers
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I277510081c9e06b516b6c29f790e16dd1dfe8028
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2631361
Reviewed-by: Simon Glass <sjg@chromium.org>
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