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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-0520-1796/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* zephyr: Change NPCX BBRAM status information to LOG_INFWealian Liao2021-09-281-4/+3
| | | | | | | | | | | | | | | | | | NPCX BBRAM module provides VBAT/VSBY/VCC power drop information. The status bit will set when the chip power-up or hibernate PSL wake-up, which provides the false error alarm. This CL changes the power drop information to LOG_INF. BUG=none BRANCH=none TEST=Check the log with LOG_LEVEL_INF. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I36bafedbc694333236ae8824310cfdfcceab7ac8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3180704 Reviewed-by: Aaron Massey <aaronmassey@google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* zephyr: convert fwctrl register to syscon driverYuval Peress2021-09-271-13/+30
| | | | | | | | | | | | | | | | Note that currently CONFIG_SYSCON=y is required. There's an ongoing PR (https://github.com/zephyrproject-rtos/zephyr/pull/38762) to remove that requirement in favor of simply detecting an enabled node in DT via the compatible string. BRANCH=none BUG=b:179900857, b:165777478, b:200642229 TEST=zmake testall Signed-off-by: Yuval Peress <peress@google.com> Change-Id: Idad1f53afbda503e0e0b2fdf2931d5267a391d4d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3177749 Reviewed-by: Sam Hurst <shurst@google.com>
* Revert "npcx: correct the image copies indication bits for npcx9"caveh jalali2021-09-211-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 20222d48571fa44c76fdb0ededd0ed042e9f8244. Reason for revert: brya thinks it's in EC-RW when it's really still in EC-RO. Original change's description: > npcx: correct the image copies indication bits for npcx9 > > In npcx5/7, we use two reserved bits in the BSC1 register (offset 0x07 > of the MDC register) to indicate what the current image copy is. > In npcx9, these two bits are used by the booter. We need to change them > to another two empty scratch bits which are not used by the booter. > > BUG=b:165777478 > BRANCH=none > TEST=pass "make buildall" > TEST=check the related bits changed by "sysump ro" and "sysjump rw" > > Signed-off-by: Jun Lin <CHLin56@nuvoton.com> > Change-Id: I6bcfe6d8752c6fa10022a21956d2e0ceb7f9418e > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153119 > Tested-by: CH Lin <chlin56@nuvoton.com> > Reviewed-by: caveh jalali <caveh@chromium.org> > Auto-Submit: CH Lin <chlin56@nuvoton.com> > Commit-Queue: caveh jalali <caveh@chromium.org> Bug: b:165777478 Change-Id: I24cdfec0d5c8cd998f087525ae21b2a3daea43a7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3172266 Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Tested-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* npcx: correct the image copies indication bits for npcx9Jun Lin2021-09-171-0/+8
| | | | | | | | | | | | | | | | | | | | In npcx5/7, we use two reserved bits in the BSC1 register (offset 0x07 of the MDC register) to indicate what the current image copy is. In npcx9, these two bits are used by the booter. We need to change them to another two empty scratch bits which are not used by the booter. BUG=b:165777478 BRANCH=none TEST=pass "make buildall" TEST=check the related bits changed by "sysump ro" and "sysjump rw" Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I6bcfe6d8752c6fa10022a21956d2e0ceb7f9418e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153119 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Auto-Submit: CH Lin <chlin56@nuvoton.com> Commit-Queue: caveh jalali <caveh@chromium.org>
* zephyr: driver: bbram: Migrate to upstream driverYuval Peress2021-09-102-15/+15
| | | | | | | | | | | | | | | | | Migrate the BBRAM driver to the upstream version. BRANCH=none BUG=b:195843756 TEST=zmake testall Cq-Depend: chromium:3147080 Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I441e58f94c4874e268aad36df2f036a88187801b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3147230 Tested-by: Yuval Peress <peress@google.com> Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Yuval Peress <peress@google.com>
* zephyr: compile NPCX monitorKeith Short2021-08-267-0/+845
| | | | | | | | | | | | | | | Compile the NPCX monitor code under the Zephyr environment. BUG=b:197162681 BRANCH=none TEST=Build zephyr for volteer. Verify npcx_monitor.bin is created. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Idba6e013288eb9c300c91ea57313db08e13b2e97 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3116567 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: CH Lin <chlin56@nuvoton.com>
* zephyr: drop IS_ZEPHYR_VERSION usages from npcx espi driverJack Rosenthal2021-08-191-25/+0
| | | | | | | | | | | | | | | This code was added after v2.5 was already dropped from the tree. These macros are not necessary. BUG=b:197159539 BRANCH=none TEST=zmake testall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Idbbf3d6431542a707f5abe954b56838a4b18403b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104787 Commit-Queue: Yuval Peress <peress@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: cleanup Zephyr v2.5 ifdefsJack Rosenthal2021-08-111-16/+1
| | | | | | | | | | | | | | We no longer support version 2.5. Drop these obsolete ifdefs. BUG=b:195571108 BRANCH=none TEST=zmake testall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I85985108bcf175a2756a2f8096b0aa9e3c22fce5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3086368 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* zephyr: eSPI: npcx: unify the access to eSPI event dataJun Lin2021-08-101-0/+38
| | | | | | | | | | | | | | | | | | | | | Follow PR:37194 to access KBC/ACPI event data via structure if the Zephyr version is v2.6. Otherwise, use the original chip-vendor-specific macro on version v2.5. BUG=none BRANCH=none TEST=pass "zmake testall" TEST=test on Volteer, verify that the platform can boot up to OS screen; make sure keyboard is functional. Cq-Depend: chromium:3054142 Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: Iff857809b3c11e734825c113cb8d9913a7a177f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3053140 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* zephyr: shim: use NPCX_CLK_CTRL_NODE for clock controlFabio Baltieri2021-08-061-1/+1
| | | | | | | | | | | | | | | | | Zephyr NPCX drivers has been switched to the link time device definition, and now NPCX_CLK_CTRL_NODE is available to point to the pcc node directly. Use that in the EC code as well for the clock API. BRANCH=none BUG=none TEST=build and run on volteer Cq-Depend: chromium:3000806, chromium:3070703 Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I8a5b5426c5e6a9167cd232fc72e50d372958b31c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001584 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Move BBRAM access functions to common system.cWealian Liao2021-08-041-43/+6
| | | | | | | | | | | | | | | | | | NPCX & IT8xxx2 series are both use BBRAM for scratchpad/reset_flags access. cros_bbram API already handles the chip-specific code. This CL moves scratchpad/reset_flags access functions to the common system.c to avoid duplicate those functions. BUG=none BRANCH=none TEST=zmake testall TEST=check reset cause on lazor & npcx_evb Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I0a394e5fbf784ec2e3caea77f194c88ae9d5542e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3067156 Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org>
* zephyr: Remove NPCX dependency from shim/src/espi.cYuval Peress2021-07-222-0/+41
| | | | | | | | | | | | | | | | Allow building the zephyr/shim/src/espi.c for other SOCs by adding inline functions to abstract away these concepts. Each SOC should then implement these under the zephyr/shim/chip/<soc> specific directory. BRANCH=none BUG=b:189954415 TEST=zmake testall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I776bd65326b509ada3b271177ae727a32d4f96da Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044400 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: cros_system_npcx: Move chip ID to devicetreeWealian Liao2021-07-121-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UPSTREAM PR(https://github.com/zephyrproject-rtos/zephyr/pull/36663) adds the chip ID information. ``` soc-id { compatible = "nuvoton,npcx-soc-id"; family-id = <0x20>; chip-id = <0xXX>; device-id = <0xXX>; revision-reg = <0xXXXXXXXX X>; }; ``` This CL changes chip information API to use the UPSTREAM devicetree node. For the get_chip_name(), change to compare the ID at devicetree node & return the build part number or the chip id. BUG=none BRANCH=none TEST=zmake testall TEST='version' console command Cq-Depend: chromium:3010788, chromium:3010789 Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ic10c9671ecf466649dbb90a3b4acda97df4f823a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3000362 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: shim: compile out pm_policy_low_power_devices for v2.6Fabio Baltieri2021-07-011-18/+2
| | | | | | | | | | | | | | | The function call has been removed in v2.6, changing the version condition to exclude it entirely so it's clear that it can be dropped once we drop support for v2.5. BRANCH=none BUG=b:186651036 TEST=build tested Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: Icbf4d06e6d7e8f4910dde66b89dceadc4b6f39ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3000246 Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: npcx: Fix NPCX_PWDWN_CTL redefine warningWealian Liao2021-06-301-19/+3
| | | | | | | | | | | | | | | UPSTREAM has NPCX_PWDWN_CTL definition. This CL transfers to use UPSTREAM NPCX_PWDWN_CTL macro to fix the redefine warning. BRANCH=none BUG=none TEST=build byra without warning TEST='sysjump RW' is correct Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ib92f2263f3e10cae5d8b0ebd4f3b274c8c7359a0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994229 Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: use DEVICE_DT_GET for various shim modulesFabio Baltieri2021-06-282-10/+12
| | | | | | | | | | | | | | | | Convert various device_get_binding to DEVICE_DT_GET, which is processed at link time and more efficient. Same pattern on different modules where the output is checked using device_is_ready. BRANCH=none BUG=none TEST=zmake configure -b -B ~/build-volteer/ zephyr/projects/volteer/volteer TEST=zmake configure -b -B ~/build-it8xxx2_evb/ zephyr/projects/it8xxx2_evb Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: If426420da2c61b3bc02eb77e122469a1a40799f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2985463 Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: shim: use DEVICE_DT_GET for clock controlFabio Baltieri2021-06-281-1/+1
| | | | | | | | | | | | | | | | | | | This changes the clock control calls to use DEVICE_DT_GET instead of device_get_binding. DEVICE_DT_GET is more efficient since it's allocated at link time. These are then used by clock_control_on, which already checks for device_is_ready, so no extra safety checks are needed. BRANCH=none BUG=none TEST=zmake configure -b -B ~/build-volteer/ zephyr/projects/volteer/volteer TEST=zmake configure -b -B ~/build-it8xxx2_evb/ zephyr/projects/it8xxx2_evb Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I76a2c47165d197c799be25d8e7e40a1a0873777d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2985462 Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: enable related configs for flash driver on it8xxx2Tim Lin2021-06-231-0/+28
| | | | | | | | | | | | | | | | | | | | These flash related configs have to be enabled for the flash driver of it8xxx2. This CL also distinguishes the flash configs into header file of it8xxx2 and npcx. BUG=b:187192628 BRANCH=none TEST=zmake -lDEBUG configure -b -B zephyr/build_ite \ zephyr/projects/it8xxx2_evb zmake -lDEBUG configure -b -B zephyr/build_volteer \ zephyr/projects/volteer/volteer Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com> Change-Id: Ic6a2e89a24676d6ac484a389c938ab0692971be0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2952280 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: Update power policy to support v2.6Yuval Peress2021-06-171-1/+27
| | | | | | | | | | | | | Update power_policy.c to support API changes in v2.6. BRANCH=none BUG=b:190731415 TEST=build brya with both 2.5 and 2.6 Change-Id: I757b465e03f8da30e1f00d6bde8234e1434e90db Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970988 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: npcx9: implement system_download_from_flashYuval Peress2021-06-063-2/+113
| | | | | | | | | | | BRANCH=none BUG=b:188605676 TEST=run `sysjump RW` on brya Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ic771a0452cd044355dd2a0e0f32fa6e2d3711a44 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2936009 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: npcx9: add __start_gdma function to .lowpower_ram2 sectionYuval Peress2021-06-064-6/+81
| | | | | | | | | | | | | This function is needed for the flash api workaround. BRANCH=none BUG=b:188605676 TEST=build brya Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I3ddd72e7664755f07bc967695b1502a43af3e57a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2936008 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: npcx9: implement system_mpu_configYuval Peress2021-06-062-0/+83
| | | | | | | | | | | | | This function is taken from chip/npcx/ and is used for the flash workaround. BRANCH=none BUG=b:188605676 TEST=build brya Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I70775523d180a602c08f7059f0fe003c05007edf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2936007
* zephyr: npcx9: Add linker elements needed for flash api workaroundYuval Peress2021-06-041-0/+25
| | | | | | | | | | | | BRANCH=none BUG=b:188605676 TEST=build brya Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I900f4af147e048a374b56875579d838deaa17eae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2936006 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: move keyboard_raw most functions to shim/srcRuibin Chang2021-05-181-66/+0
| | | | | | | | | | | | | | | Move shim/chip/npcx/keyboard_raw.c most functions to shim/src/keyboard_raw.c. BUG=none BRANCH=none TEST=zmake -lDEBUG configure -B zephyr/build -b zephyr/projects/volteer/volteer Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Change-Id: Ic69752223517cabb9e1d1c7ff16c9eb4914186db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2900122 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: npcx: Add power management supportKeith Short2021-04-292-0/+40
| | | | | | | | | | | | | | Add power management support for the NPCX family. BUG=b:184653704 BRANCH=none TEST=zmake testall TEST=Verify deep sleep on Volteer (with next CL) and measure power. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I86eef50c13742e7ca717da38a92636e589af6c58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855527 Reviewed-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
* zephyr: Add unused GPIOs implementation in shimmed gpio driverMulin Chao2021-04-232-0/+56
| | | | | | | | | | | | | | | | | | | | This CL adds ununed GPIOs configuration support in shimmed gpio driver. By adding IO phandles in 'unused-gpios' prop of board device-tree file, the shimmed driver will configure them one by one (depends on board circuit or io-pad design in chip) to prevent leakage current and get better power consumption in the lowest power state. BUG=b:184783076 BRANCH=none TEST=zmake testall Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ia4fe29cc244e27855faa1b57c2d1f8319b1246c3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2817141 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: npcx: Add cros_system chip info implementationMulin Chao2021-04-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add NPCX chip_vendor(), chip_name(), and chip_revision implementation for cros_system driver. BUG=none BRANCH=none TEST=Build & boot ec on volteer. TEST=Press 'version' in console and show related chip information: ``` 21-04-06 17:53:00.681 uart:~$ version 21-04-06 17:53:01.795 Chip: Nuvoton NPCX796FC 02 21-04-06 17:53:01.795 Board: 2 21-04-06 17:53:01.795 RO: _v2.0.8287+db38ffd6d 21-04-06 17:53:01.795 RW: _v2.0.8287+db38ffd6d 21-04-06 17:53:01.795 Build: _v2.0.8287+db38ffd6d ``` Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I73d016f5fa1da6c03e38b312eb4f1b0445a2c1d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2807479 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: shim: SHI: fix bugJun Lin2021-04-021-2/+2
| | | | | | | | | | | | | | | | | This is the follow-up CL to fix the bug addressed in the comment of the CL:2786888 BUG=b:182600858 BRANCH=none TEST=pass zmake build Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: Id1923f3dc0ac357cbcac876a5e68f304024867ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799336 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Zephyr: npcx: shim SHIJun Lin2021-03-312-0/+86
| | | | | | | | | | | | | | BUG=b:182600858 BRANCH=none TEST=Test host command "version" and "Hello" on npcx7_evb and the host emulator. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: Ie9424d9e68a04f575bc6f695b29ca64f14147eef Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2786888 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Enable link time optimization (LTO)Keith Short2021-03-241-5/+5
| | | | | | | | | | | | | | | | | | | The upstream Zephyr repo does not support LTO. Reconfigure the platform/ec source files into a cmake library so the LTO option can be enabled for all the platorm/ec sources. This reduces the Volteer flash image size by 9176 bytes. BUG=none BRANCH=none TEST=zmake testall TEST=boot zephyr-ec on Volteer, verfiy AP boots Cq-Depend: chromium:2776218 Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I8312773c8b21c498ec8116a8558b7571831159ff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2776217 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: npcx: add reset cause checkWealian Liao2021-03-242-39/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | The reset cause will influence the initialization flow. We define some of initial flow of the reset cause for the following development. This CL include the following: 1. Add check_reset_cause() which sets the system reset flag. 2. Add chip_bbram_status_check() to clear the error status & show the error message. 3. Add CONFIG_BOARD_RESET_AFTER_POWER_ON feature. 4. Define the initialize flow for reset cause. BRANCH=none BUG=b:178101173 TEST=check the following reset cause by 'sysinfo' 1. power-up 2. reset-pin reset 3. soft by 'reboot' console command 4. watchdog by 'waitms 2000' Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I515868d8cda4544fdbe782210b0108b4dda0d8cc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2731180 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: npcx: clock: add clock turbo/normal functionsJun Lin2021-03-111-0/+32
| | | | | | | | | | | | | | | | | | | | Implement the following functions in Zephyr: 1. clock_turbo 2. clock_normal 3. clock_enable_module With these, the CPU clock can speeds up when computing the hash value and goes back to normal when the computation is done. BRANCH=none BUG=b:182224114 TEST=Volteer no longer watchdog resets and can boot up to ChromeOS Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I419cf68c4212fdc588b9fd2a08331c4e81ccf0a0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748197 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: npcx: add read & write reset flag functionWealian Liao2021-03-101-3/+65
| | | | | | | | | | | | | | This CL adds chip_save_reset_flags() & chip_read_reset_flags(). Also, fulfill the system_reset() BUG=b:176523207 BRANCH=None. TEST=check 'reboot wait-ext' will wait 10s Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Idb9c2e90e8ad5e8a989f33ac904c3b778b8f48e4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2731179 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: npcx: add system reset driverWealian Liao2021-02-221-3/+17
| | | | | | | | | | | | | | | | | | This CL include the following: 1. Add cros_system_soc_reset() API for system reset. 2. Add NPCX soc reset driver. NPCX chip doesn't have the specific system reset functionality. Use watchdog reset as the system reset. BUG=b:176523207 BRANCH=None. TEST=reset EC by 'reboot' console command Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ia86bfac548ef48e18e501a29f3cbb632f33a3e8a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2698739 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* zephyr: Drop duplicate IS_BIT_SET()Simon Glass2021-02-191-0/+3
| | | | | | | | | | | | | | | This gives a warning about a duplicate definition since it is defined in Zephyr now. BUG=b:180409973 BRANCH=none TEST=warning is gone Change-Id: I6d7a7b5f344bf6ab4168a2dee062c9199175faf9 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2705443 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: add npcx-specific system functions for external storage.Yuval Peress2021-02-123-0/+201
| | | | | | | | | | | | | | | | In order to sysjump we first need to copy the RW image from flash. rom_chip.h adds a macro to call ROM function download_from_flash (while system_external_storage.c contains all the npcx specific code needed to perform the sysjump). BRANCH=none BUG=b:167392037 TEST=zmake testall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I762954a71e87036b63513ae8b400605ed507fcf6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2693527 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: add stub implementation of clock_turboYuval Peress2021-02-123-0/+22
| | | | | | | | | | | | | | | | Some functionality (sysjump in particular) makes use of altering the clock rate. This should eventually live in Zephyr proper, but for now stubbing it will get things working, just a bit slower. BRANCH=none BUG=b:167392037, b:180112248 TEST=zmake testall TEST=build volteer, flash, see that it runs. Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I91ff57c7e0f5cda60556087e6c46ba1d08f8b4a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2693526 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: initial support for kohakuJack Rosenthal2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | Kohaku uses the same EC chip as volteer. Adding a second device will help give us a tiny bit more build diversity too, which is a good thing probably. This just adds a minimal build for kohaku with just UART support. No power sequencing, keyboard, USB-C, charging, etc. BUG=b:177609422 BRANCH=none TEST=flash onto kohaku, observe working shell and timers Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I277510081c9e06b516b6c29f790e16dd1dfe8028 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2631361 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: add host command handlerWealian Liao2020-12-312-0/+19
| | | | | | | | | | | | | | | | | | | | | | | The CL include the following: 1. Add host command handler. For the Zephyr shim, the host command handler is invoked by ESPI_PERIPHERAL_EC_HOST_CMD event in ESPI_BUS_PERIPHERAL_NOTIFICATION eSPI event. 2. Add system_reset() empty function for host command build pass in shim/ship/npcx/system.c BRANCH=none BUG=b:175217186 TEST=Get the host command & show on the console for volteer. e.g. [HC 0x0d] [HC 0x0d err 1] Cq-Depend: chromium:2603204 Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ifd70b9a73c3a2404530182cfc4ce5f3ce4038b49 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2594756 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>
* zephyr: Fix missing GPIO header in keyboard_rawSimon Glass2020-12-171-0/+1
| | | | | | | | | | | | | Fix the warning about npcx_get_gpio_dev() not being declared. BUG=b:174871569 BRANCH=none TEST=build for zephyr, see the warning gone Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ic0ef6e85baf884fa2c0d0a09044fd1da606e4bb8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2595221 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: remove dependency on chip specific code for npcxYuval Peress2020-12-102-46/+0
| | | | | | | | | | | | | BRANCH=none BUG=b:175249000 TEST=zmake testall Cq-Depend: chromium:2583272 Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ie50e56df60e060c3741013912ab46d807fc5e417 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2582819 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: shim the keyboard scanSimon Glass2020-12-013-0/+123
| | | | | | | | | | | | | | | | | | It shims the keyboard_scan task by introducing another keyboard_raw.c which calls down to the zephyr-chrome cros_kb_raw driver. BRANCH=none BUG=b:167405015 TEST=Build pass by zmake configure -B ./build projects/experimental/volteer. TEST=Check all the keys on volteer platform by "ksstate". Change-Id: Ic87f67c28779f7feafa350020a07ba87e3600ecd Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Signed-off-by: Mulin Chao <MLChao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2523839 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Zephyr: Migrate i2c implementation to chip family specific fileYuval Peress2020-11-162-1/+2
| | | | | | | | | | | | | | This change simply moves the i2c.c shim to i2c-npcx7.c. BRANCH=none BUG=none TEST=builds with zmake for volteer Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ic410787dcf2693dda71681f739c0b74cd47770da Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2532964 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* Add chip-specific shim along with i2c moduleYuval Peress2020-11-082-0/+49
This change accomplishes 2 things: 1. It refactors the zephyr/shim directory to structure around chip specific compilation. In this example, we're focusing on npcx7m6fb which is used in volteer but others can be added easily. 2. It shims the common/i2c_master.c by providing an alternate implementation of i2c_xfer_unlocked that calls down to the Zephyr API i2c_write_read instead of the chip specific i2c_xfer_no_retry or chip_i2c_xfer_with_notify. The shim layer is made possible by the addition of zephyr/shim/include/i2c/i2c.h which adds a functions that needs to be implemented per chip (npcx7 family in this case) and allows us to map the current port int which is defined in chip/${CHIP}/registers.h (chip/npcx/registers-npcx7.h in our case). This function (i2c_get_device_for_port) maps the platform/ec port int to a const struct device * which is needed in the Zephyr I2C APIs. BRANCH=none BUG=b:171302975 TEST=clean_build.sh projects/experimental/volteer/ and make BOARD=eve Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I210f4758337bf384d0d6f103eef8b89126887d11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2504285 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>