summaryrefslogtreecommitdiff
path: root/zephyr/subsys
Commit message (Expand)AuthorAgeFilesLines
* ap_pwrseq: console command to enable debug modeRajesh Kumar2022-10-042-0/+47
* Update license boilerplate text in source code filesMike Frysinger2022-09-1225-25/+25
* config: rename HOSTCMD_ESPI_* to HOST_INTERFACE_ESPI_*Michał Barnaś2022-09-092-6/+6
* ap_power: Refresh virtual wire signals when channel readyAndrew McRae2022-09-061-25/+41
* gpio: Use alternative if gpio_pin_get_config not supportedAndrew McRae2022-08-231-7/+13
* Revert "zephyr: ap_pwrseq: Handle low battery charge"Peter Marheine2022-08-222-13/+0
* ap_power: Check for GPIO_GET_CONFIG optionAndrew McRae2022-08-221-1/+1
* zephyr: ap_pwrseq: Add S0IX error recovery supportRajesh Kumar2022-08-127-3/+286
* zephyr: ap_pwrseq: Handle low battery chargeBernardo Perez Priego2022-07-262-0/+13
* ap_pwrseq: Block power sequence thread when idleBernardo Perez Priego2022-07-263-4/+26
* pwrseq: gpio: Use output state for GPIO get on outputsAndrew McRae2022-07-182-0/+25
* ap_pwrseq: set VCCST_PWRGD_OD low early in power down sequenceDeepti Deshatty2022-07-181-1/+7
* ap_pwrseq: Send an INITIALIZED event when the pwrseq code is readyAndrew McRae2022-07-151-1/+6
* ap_pwrseq: add an explicit "uninitialized" statePeter Marheine2022-07-152-1/+14
* ap_pwrseq: Use common ESPI init and callbackAndrew McRae2022-07-131-11/+11
* ap_pwrseq: all_sys_pwrgd_timeout handlingDeepti Deshatty2022-07-131-1/+2
* zephyr/subsys/ap_pwrseq/include/x86_power_signals.h: Format with clang-formatJack Rosenthal2022-07-061-57/+38
* zephyr/subsys/ap_pwrseq/include/power_signals.h: Format with clang-formatJack Rosenthal2022-07-011-15/+15
* zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c: Format with clang-formatJack Rosenthal2022-07-011-2/+2
* zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c: Format with c...Jack Rosenthal2022-07-011-35/+30
* zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_command.c: Format with...Jack Rosenthal2022-07-011-2/+1
* zephyr/subsys/ap_pwrseq/include/signal_gpio.h: Format with clang-formatJack Rosenthal2022-07-011-5/+5
* zephyr/subsys/ap_pwrseq/signal_gpio.c: Format with clang-formatJack Rosenthal2022-07-011-19/+17
* zephyr/subsys/ap_pwrseq/power_signals.c: Format with clang-formatJack Rosenthal2022-07-011-34/+30
* zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h: Forma...Jack Rosenthal2022-07-011-2/+2
* zephyr/subsys/ap_pwrseq/power_host_sleep.c: Format with clang-formatJack Rosenthal2022-07-011-13/+14
* zephyr/subsys/ap_pwrseq/signal_vw.c: Format with clang-formatJack Rosenthal2022-07-011-29/+25
* zephyr/subsys/ap_pwrseq/ap_events.c: Format with clang-formatJack Rosenthal2022-06-301-1/+2
* zephyr/subsys/ap_pwrseq/x86_non_dsx_chipset_power_state.c: Format with clang-...Jack Rosenthal2022-06-301-2/+1
* zephyr/subsys/ap_pwrseq/x86_non_dsx_adlp_pwrseq_sm.c: Format with clang-formatJack Rosenthal2022-06-291-6/+5
* zephyr/subsys/ap_pwrseq/include/ap_power_override_functions.h: Format with cl...Jack Rosenthal2022-06-291-2/+2
* zephyr/subsys/ap_pwrseq/signal_adc.c: Format with clang-formatJack Rosenthal2022-06-291-61/+41
* zephyr/subsys/ap_pwrseq/include/ap_power_host_sleep.h: Format with clang-formatJack Rosenthal2022-06-291-2/+2
* zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_console.c: Format with clan...Jack Rosenthal2022-06-291-15/+11
* zephyr: MTL power sequencingLi Feng2022-06-291-5/+2
* zephyr/subsys/ap_pwrseq/include/signal_adc.h: Format with clang-formatJack Rosenthal2022-06-281-5/+5
* zephyr/subsys/ap_pwrseq/ap_power_interface.c: Format with clang-formatJack Rosenthal2022-06-281-10/+5
* zephyr/subsys/ap_pwrseq/include/signal_vw.h: Format with clang-formatJack Rosenthal2022-06-281-5/+5
* ap_pwrseq: Refactor exit-hardoff handlingAndrew McRae2022-06-245-36/+82
* ap_pwrseq: eSPI: Use eSPI channel ready callbackAndrew McRae2022-06-222-12/+14
* ap_pwrseq: s5 inactivity timeout handlingDeepti Deshatty2022-06-211-6/+10
* ap_pwrseq: Rework check of initial AP stateAndrew McRae2022-06-202-20/+66
* ap_pwrseq: Add some extra debug detail for initAndrew McRae2022-06-201-8/+12
* ap_pwrseq: Initialise the ADC buffer for signal initAndrew McRae2022-06-201-1/+1
* ap_pwrseq: Use correct polled power signalsAndrew McRae2022-06-141-1/+1
* zephyr: MTL driving PCH_PWROK from ECLi Feng2022-06-141-14/+19
* zephyr: fix last missing zephyr/ include pathsFabio Baltieri2022-05-161-2/+2
* ap_pwrseq: use the public API to implement console shutdownPeter Marheine2022-05-131-1/+1
* zephyr: Support MTL chipset in AP power sequencingLi Feng2022-05-126-104/+192
* zephyr: check power rails is platform specificLi Feng2022-05-122-11/+10
View Lorry Controller Status