From 41f8e65766df34f701417e4b234bc863c3e1f072 Mon Sep 17 00:00:00 2001 From: Patryk Duda Date: Thu, 6 Apr 2023 12:55:39 +0200 Subject: rollback: Move CONFIG_SHA256 outside of add_entropy() This patch introduces no functional changes. BUG=b:277029648 BRANCH=none TEST=make BOARD=bloonchipper TEST=./test/run_device_tests.py -b bloonchipper -t rollback.* Test "rollback_region0": PASSED Test "rollback_region1": PASSED Test "rollback_entropy": PASSED Change-Id: I4c826439a988dd66890837c2e8398049c0706de2 Signed-off-by: Patryk Duda Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4408868 Commit-Queue: Patryk Duda Tested-by: Patryk Duda Reviewed-by: Daisuke Nojiri --- common/rollback.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/common/rollback.c b/common/rollback.c index 203a4cf6ec..23ac9df1d4 100644 --- a/common/rollback.c +++ b/common/rollback.c @@ -192,11 +192,11 @@ static int get_rollback_erase_size_bytes(int region) } #ifdef CONFIG_ROLLBACK_SECRET_SIZE +#ifdef CONFIG_SHA256 static int add_entropy(uint8_t *dst, const uint8_t *src, const uint8_t *add, unsigned int add_len) { int ret = 0; -#ifdef CONFIG_SHA256 BUILD_ASSERT(SHA256_DIGEST_SIZE == CONFIG_ROLLBACK_SECRET_SIZE); struct sha256_ctx ctx; uint8_t *hash; @@ -223,11 +223,11 @@ static int add_entropy(uint8_t *dst, const uint8_t *src, const uint8_t *add, failed: #endif always_memset(&ctx, 0, sizeof(ctx)); -#else -#error "Adding entropy to secret in rollback region requires SHA256." -#endif return ret; } +#else +#error "Adding entropy to secret in rollback region requires SHA256." +#endif /* CONFIG_SHA256 */ #endif /* CONFIG_ROLLBACK_SECRET_SIZE */ /** -- cgit v1.2.1 From 48cde011ac52a82e5c34d8b50a17c1ae63deaa45 Mon Sep 17 00:00:00 2001 From: Madhurima Paruchuri Date: Wed, 15 Mar 2023 18:53:13 +0000 Subject: retimer: Add driver for ANX7452 retimer BUG=b:267589042 BRANCH=None TEST=./twister -s drivers/drivers.anx7452 -c --coverage Change-Id: I99be488d82a58a5d38a2afcef0966b9c3236074d Signed-off-by: Madhurima Paruchuri Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4226575 Reviewed-by: Keith Short Reviewed-by: Fabio Baltieri --- driver/build.mk | 1 + driver/retimer/anx7452.c | 164 +++++++++++++++++++++ driver/retimer/anx7452.h | 76 ++++++++++ include/config.h | 1 + include/driver/retimer/anx7452_public.h | 26 ++++ zephyr/CMakeLists.txt | 2 + zephyr/Kconfig.retimer | 12 +- zephyr/dts/bindings/usbc/mux/analogix,anx7452.yaml | 19 +++ zephyr/shim/include/config_chip.h | 5 + zephyr/shim/include/usbc/anx7452_usb_mux.h | 41 ++++++ zephyr/shim/include/usbc/usb_muxes.h | 2 + zephyr/shim/src/CMakeLists.txt | 1 + zephyr/shim/src/anx7452_usb_mux.c | 14 ++ 13 files changed, 363 insertions(+), 1 deletion(-) create mode 100644 driver/retimer/anx7452.c create mode 100644 driver/retimer/anx7452.h create mode 100644 include/driver/retimer/anx7452_public.h create mode 100644 zephyr/dts/bindings/usbc/mux/analogix,anx7452.yaml create mode 100644 zephyr/shim/include/usbc/anx7452_usb_mux.h create mode 100644 zephyr/shim/src/anx7452_usb_mux.c diff --git a/driver/build.mk b/driver/build.mk index 3d3871e7ec..da10cf3cbe 100644 --- a/driver/build.mk +++ b/driver/build.mk @@ -185,6 +185,7 @@ driver-$(CONFIG_USB_PD_TCPM_STM32GX)+=tcpm/stm32gx.o # Type-C Retimer drivers driver-$(CONFIG_USBC_RETIMER_ANX7483)+=retimer/anx7483.o +driver-$(CONFIG_USBC_RETIMER_ANX7452)+=retimer/anx7452.o driver-$(CONFIG_USBC_RETIMER_INTEL_BB)+=retimer/bb_retimer.o driver-$(CONFIG_USBC_RETIMER_KB800X)+=retimer/kb800x.o driver-$(CONFIG_USBC_RETIMER_NB7V904M)+=retimer/nb7v904m.o diff --git a/driver/retimer/anx7452.c b/driver/retimer/anx7452.c new file mode 100644 index 0000000000..4693c0d5bb --- /dev/null +++ b/driver/retimer/anx7452.c @@ -0,0 +1,164 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * ANX7452: Active redriver with linear equalisation + */ + +#include "anx7452.h" +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "gpio.h" +#include "i2c.h" +#include "retimer/anx7452_public.h" +#include "timer.h" +#include "usb_mux.h" +#include "util.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +static int anx7452_read(const struct usb_mux *me, uint8_t reg, int *val) +{ + return i2c_read8(me->i2c_port, me->i2c_addr_flags, reg, val); +} + +static int anx7452_write(const struct usb_mux *me, uint8_t reg, uint8_t val) +{ + return i2c_write8(me->i2c_port, me->i2c_addr_flags, reg, val); +} + +static int anx7452_ctltop_update(const struct usb_mux *me, uint8_t reg, + uint8_t mask, uint8_t val) +{ + int reg_val = 0; + int rv; + + RETURN_ERROR(i2c_read8(me->i2c_port, ANX7452_I2C_ADDR_CTLTOP_FLAGS, reg, + ®_val)); + reg_val = (reg_val & ~mask) | (val & mask); + rv = i2c_write8(me->i2c_port, ANX7452_I2C_ADDR_CTLTOP_FLAGS, reg, + reg_val); + if (rv) { + CPRINTS("ANX7452: Failed to write to ctltop register %x rv:%d", + reg, rv); + return EC_ERROR_TIMEOUT; + } + return EC_SUCCESS; +} + +static int anx7452_ctltop_update_all(const struct usb_mux *me, uint8_t cfg0_val, + uint8_t cfg1_val, uint8_t cfg2_val) +{ + RETURN_ERROR(anx7452_ctltop_update(me, ANX7452_CTLTOP_CFG0_REG, + ANX7452_CTLTOP_CFG0_REG_BIT_MASK, + cfg0_val)); + RETURN_ERROR(anx7452_ctltop_update(me, ANX7452_CTLTOP_CFG1_REG, + ANX7452_CTLTOP_CFG1_REG_BIT_MASK, + cfg1_val)); + RETURN_ERROR(anx7452_ctltop_update(me, ANX7452_CTLTOP_CFG2_REG, + ANX7452_CTLTOP_CFG2_REG_BIT_MASK, + cfg2_val)); + + return EC_SUCCESS; +} + +static int anx7452_init(const struct usb_mux *me) +{ + int usb_enable; + timestamp_t start; + int val; + int rv; + + usb_enable = anx7452_controls[me->usb_port].usb_enable_gpio; + gpio_set_level(usb_enable, 1); + + /* Keep reading control register until mux wakes up or times out */ + start = get_time(); + do { + rv = anx7452_read(me, ANX7452_TOP_STATUS_REG, &val); + if (!rv) + break; + usleep(ANX7452_I2C_WAKE_RETRY_DELAY_US); + } while (time_since32(start) < ANX7452_I2C_WAKE_TIMEOUT_MS * MSEC); + if (rv) { + CPRINTS("ANX7452: Failed to wake mux rv:%d", rv); + return EC_ERROR_TIMEOUT; + } + + /* Configure for i2c control */ + val = ANX7452_TOP_REG_EN; + RETURN_ERROR(anx7452_write(me, ANX7452_TOP_STATUS_REG, val)); + + return EC_SUCCESS; +} + +static int anx7452_set(const struct usb_mux *me, mux_state_t mux_state, + bool *ack_required) +{ + int cfg0_val = 0; + int cfg1_val = 0; + int cfg2_val = 0; + + /* This driver does not use host command ACKs */ + *ack_required = false; + + /* Apply CC polarity settings */ + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) { + cfg0_val |= ANX7452_CTLTOP_CFG0_FLIP_EN; + } + + /* Apply DP enable settings */ + if (mux_state & USB_PD_MUX_DP_ENABLED) { + cfg1_val |= ANX7452_CTLTOP_CFG1_DP_EN; + } + + /* Apply USB3 enable settings */ + if (mux_state & USB_PD_MUX_USB_ENABLED) { + cfg0_val |= ANX7452_CTLTOP_CFG0_USB3_EN; + } + + /* Apply USB4 enable settings */ + if (mux_state & USB_PD_MUX_USB4_ENABLED) { + cfg2_val |= ANX7452_CTLTOP_CFG2_USB4_EN; + } + + /* Apply TBT compatible enable settings */ + if (mux_state & USB_PD_MUX_TBT_COMPAT_ENABLED) { + cfg2_val |= ANX7452_CTLTOP_CFG2_TBT_EN; + } + + return anx7452_ctltop_update_all(me, cfg0_val, cfg1_val, cfg2_val); +} + +static int anx7452_get(const struct usb_mux *me, mux_state_t *mux_state) +{ + int reg = 0; + + *mux_state = 0; + RETURN_ERROR(anx7452_read(me, ANX7452_TOP_STATUS_REG, ®)); + if (reg & ANX7452_TOP_FLIP_INFO) { + *mux_state |= USB_PD_MUX_POLARITY_INVERTED; + } + if (reg & ANX7452_TOP_DP_INFO) { + *mux_state |= USB_PD_MUX_DP_ENABLED; + } + if (reg & ANX7452_TOP_TBT_INFO) { + *mux_state |= USB_PD_MUX_TBT_COMPAT_ENABLED; + } + if (reg & ANX7452_TOP_USB3_INFO) { + *mux_state |= USB_PD_MUX_USB_ENABLED; + } + if (reg & ANX7452_TOP_USB4_INFO) { + *mux_state |= USB_PD_MUX_USB4_ENABLED; + } + + return EC_SUCCESS; +} + +const struct usb_mux_driver anx7452_usb_retimer_driver = { + .init = anx7452_init, + .set = anx7452_set, + .get = anx7452_get, +}; diff --git a/driver/retimer/anx7452.h b/driver/retimer/anx7452.h new file mode 100644 index 0000000000..e0a3878500 --- /dev/null +++ b/driver/retimer/anx7452.h @@ -0,0 +1,76 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * ANX7452: 2-Lane USB4 Retimer MUX driver + */ + +#ifndef __CROS_EC_USB_RETIMER_ANX7452_H +#define __CROS_EC_USB_RETIMER_ANX7452_H + +/* + * Programming guide specifies it may be as much as 30-50 ms after chip power on + * before it's ready for i2c + */ +#define ANX7452_I2C_WAKE_TIMEOUT_MS 30 +#define ANX7452_I2C_WAKE_RETRY_DELAY_US 3000 + +/* + * CTLTOP I2C address (7 bit) + */ +#define ANX7452_I2C_ADDR_CTLTOP_FLAGS 0x20 + +/* + * TOP Status register + * + * 7 EN (0: Config info from pins, 1: Config info from registers) + * 6 Reserved + * 5 SWAP (0: host side, 1: device side) + * 4 FLIP info (Read only use) + * 3 USB4 info (Read only use) + * 2 TBT info (Read only use) + * 1 DP info (Read only use) + * 0 USB3 info (Read only use) + */ +#define ANX7452_TOP_STATUS_REG 0xF8 +#define ANX7452_TOP_REG_EN BIT(7) +#define ANX7452_TOP_SWAP_EN BIT(5) +#define ANX7452_TOP_FLIP_INFO BIT(4) +#define ANX7452_TOP_USB4_INFO BIT(3) +#define ANX7452_TOP_TBT_INFO BIT(2) +#define ANX7452_TOP_DP_INFO BIT(1) +#define ANX7452_TOP_USB3_INFO BIT(0) + +/* + * CTLTOP - 0 register + * + * 5 USB3 info (To set Bit 0 of TOP Status register indirectly) + * 1 FLIP info (To set BIT 4 of TOP Status register indirectly) + */ +#define ANX7452_CTLTOP_CFG0_REG 0x04 +#define ANX7452_CTLTOP_CFG0_USB3_EN BIT(5) +#define ANX7452_CTLTOP_CFG0_FLIP_EN BIT(1) +#define ANX7452_CTLTOP_CFG0_REG_BIT_MASK \ + (ANX7452_CTLTOP_CFG0_USB3_EN | ANX7452_CTLTOP_CFG0_FLIP_EN) + +/* + * CTLTOP - 1 register + * + * 0 DP info (To set Bit 1 of TOP Status register indirectly) + */ +#define ANX7452_CTLTOP_CFG1_REG 0x05 +#define ANX7452_CTLTOP_CFG1_DP_EN BIT(0) +#define ANX7452_CTLTOP_CFG1_REG_BIT_MASK ANX7452_CTLTOP_CFG1_DP_EN + +/* + * CTLTOP - 2 register + * + * 7 USB4 info (To set Bit 3 of TOP Status register indirectly) + * 0 TBT info (To set BIT 2 of TOP Status register indirectly) + */ +#define ANX7452_CTLTOP_CFG2_REG 0x06 +#define ANX7452_CTLTOP_CFG2_USB4_EN BIT(7) +#define ANX7452_CTLTOP_CFG2_TBT_EN BIT(0) +#define ANX7452_CTLTOP_CFG2_REG_BIT_MASK \ + (ANX7452_CTLTOP_CFG2_USB4_EN | ANX7452_CTLTOP_CFG2_TBT_EN) +#endif /* __CROS_EC_USB_RETIMER_ANX7452_H */ diff --git a/include/config.h b/include/config.h index cc95bed7f6..96c79a2d93 100644 --- a/include/config.h +++ b/include/config.h @@ -4981,6 +4981,7 @@ * Type-C retimer drivers to be used. */ #undef CONFIG_USBC_RETIMER_ANX7483 +#undef CONFIG_USBC_RETIMER_ANX7452 #undef CONFIG_USBC_RETIMER_INTEL_BB #undef CONFIG_USBC_RETIMER_KB800X #undef CONFIG_USBC_RETIMER_NB7V904M diff --git a/include/driver/retimer/anx7452_public.h b/include/driver/retimer/anx7452_public.h new file mode 100644 index 0000000000..ffd8497836 --- /dev/null +++ b/include/driver/retimer/anx7452_public.h @@ -0,0 +1,26 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * ANX7452: Active redriver + * + * Public functions, definitions, and structures. + */ + +#ifndef __CROS_EC_USB_RETIMER_ANX7452_PUBLIC_H +#define __CROS_EC_USB_RETIMER_ANX7452_PUBLIC_H + +#include "usb_mux.h" + +extern const struct usb_mux_driver anx7452_usb_retimer_driver; + +/* Retimer driver hardware specific controls */ +struct anx7452_control { + /* USB enable */ + const enum gpio_signal usb_enable_gpio; + /* DP enable */ + const enum gpio_signal dp_enable_gpio; +}; +extern const struct anx7452_control anx7452_controls[]; + +#endif /* __CROS_EC_USB_RETIMER_ANX7452_PUBLIC_H */ diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 7b77bcf115..63dc674b05 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -454,6 +454,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_FW_UPDATE "${PLATFORM_EC}/common/usbc/usb_retimer_fw_update.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483 "${PLATFORM_EC}/driver/retimer/anx7483.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7452 + "${PLATFORM_EC}/driver/retimer/anx7452.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB "${PLATFORM_EC}/driver/retimer/bb_retimer.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB diff --git a/zephyr/Kconfig.retimer b/zephyr/Kconfig.retimer index ea16f2bd3c..70ee06499e 100644 --- a/zephyr/Kconfig.retimer +++ b/zephyr/Kconfig.retimer @@ -133,4 +133,14 @@ config PLATFORM_EC_USBC_RETIMER_PS8811 The PS8811 is a one-port bidirectional USB 3.1 Gen 2 retimer that integrates the UniEye equalizer and a retimer to re-condition USB 3.1 signals for long media link applications. It supports USB 3.1 Gen 2 - with operation speed up to 10Gbps as well as Gen 1 operation at 5Gbps. \ No newline at end of file + with operation speed up to 10Gbps as well as Gen 1 operation at 5Gbps. + +config PLATFORM_EC_USBC_RETIMER_ANX7452 + bool "Support Analogix ANX7452 Active Retimer" + default y + depends on DT_HAS_ANALOGIX_ANX7452_ENABLED + help + ANX7452 is a 2-lane USB4 Re-timer MUX capable of switching the USB4 + fabric protocol to support a single USB Type-C™ (USB-C™) port. ANX7452 + can be also configured to a DisplayPort (DP)2.0 Re-timer which + supports up to 4-lane UHBR20. diff --git a/zephyr/dts/bindings/usbc/mux/analogix,anx7452.yaml b/zephyr/dts/bindings/usbc/mux/analogix,anx7452.yaml new file mode 100644 index 0000000000..3e36f92286 --- /dev/null +++ b/zephyr/dts/bindings/usbc/mux/analogix,anx7452.yaml @@ -0,0 +1,19 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: | + Analogix re-timing MUX + +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] + +compatible: "analogix,anx7452" + +properties: + usb-en-pin: + type: phandle + required: true + + dp-en-pin: + type: phandle + required: false diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 4b00a952c5..567e42a715 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -1832,6 +1832,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_USBC_RETIMER_ANX7483 #endif +#undef CONFIG_USBC_RETIMER_ANX7452 +#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7452 +#define CONFIG_USBC_RETIMER_ANX7452 +#endif + #undef CONFIG_USBC_RETIMER_PS8811 #ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_PS8811 #define CONFIG_USBC_RETIMER_PS8811 diff --git a/zephyr/shim/include/usbc/anx7452_usb_mux.h b/zephyr/shim/include/usbc/anx7452_usb_mux.h new file mode 100644 index 0000000000..1b3cdbcc8e --- /dev/null +++ b/zephyr/shim/include/usbc/anx7452_usb_mux.h @@ -0,0 +1,41 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_SHIM_ANX7452_USB_MUX_H +#define __ZEPHYR_SHIM_ANX7452_USB_MUX_H + +#include "driver/retimer/anx7452_public.h" + +#define ANX7452_USB_MUX_COMPAT analogix_anx7452 + +#define ANX7452_USB_EN_GPIO(mux_id) GPIO_SIGNAL(DT_PHANDLE(mux_id, usb_en_pin)) + +#define ANX7452_DP_EN_GPIO(mux_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(mux_id, dp_en_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(mux_id, dp_en_pin))), \ + (GPIO_UNIMPLEMENTED)) + +#define ANX7452_CONTROLS_CONFIG(mux_id) \ + { \ + .usb_enable_gpio = ANX7452_USB_EN_GPIO(mux_id), \ + .dp_enable_gpio = ANX7452_DP_EN_GPIO(mux_id), \ + } + +#define USB_MUX_ANX7452_CONTROL_ARRAY(mux_id) \ + [USB_MUX_PORT(mux_id)] = ANX7452_CONTROLS_CONFIG(mux_id), + +#define USB_MUX_ANX7452_CONTROLS_ARRAY \ + DT_FOREACH_STATUS_OKAY(ANX7452_USB_MUX_COMPAT, \ + USB_MUX_ANX7452_CONTROL_ARRAY) + +#define USB_MUX_CONFIG_ANX7452(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &anx7452_usb_retimer_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ + } + +#endif /* __ZEPHYR_SHIM_ANX7452_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/usb_muxes.h b/zephyr/shim/include/usbc/usb_muxes.h index f08d897ba3..1aa46249df 100644 --- a/zephyr/shim/include/usbc/usb_muxes.h +++ b/zephyr/shim/include/usbc/usb_muxes.h @@ -9,6 +9,7 @@ #include "usb_mux.h" #include "usbc/amd_fp6_usb_mux.h" #include "usbc/anx7447_usb_mux.h" +#include "usbc/anx7452_usb_mux.h" #include "usbc/anx7483_usb_mux.h" #include "usbc/bb_retimer_usb_mux.h" #include "usbc/it5205_usb_mux.h" @@ -30,6 +31,7 @@ #define USB_MUX_DRIVERS \ (AMD_FP6_USB_MUX_COMPAT, USB_MUX_CONFIG_AMD_FP6), \ (ANX7447_USB_MUX_COMPAT, USB_MUX_CONFIG_ANX7447), \ + (ANX7452_USB_MUX_COMPAT, USB_MUX_CONFIG_ANX7452), \ (ANX7483_USB_MUX_COMPAT, USB_MUX_CONFIG_ANX7483), \ (BB_RETIMER_USB_MUX_COMPAT, USB_MUX_CONFIG_BB_RETIMER), \ (IT5205_USB_MUX_COMPAT, USB_MUX_CONFIG_IT5205), \ diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index 5d74b04102..17932540e4 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -19,6 +19,7 @@ endif() zephyr_library_sources_ifdef(no_libgcc libgcc_${ARCH}.S) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7452 anx7452_usb_mux.c) zephyr_library_sources_ifdef(CONFIG_NAMED_ADC_CHANNELS adc.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY battery.c) diff --git a/zephyr/shim/src/anx7452_usb_mux.c b/zephyr/shim/src/anx7452_usb_mux.c new file mode 100644 index 0000000000..a2ceef5a3a --- /dev/null +++ b/zephyr/shim/src/anx7452_usb_mux.c @@ -0,0 +1,14 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +#include +#include + +const struct anx7452_control anx7452_controls[] = { + USB_MUX_ANX7452_CONTROLS_ARRAY +}; -- cgit v1.2.1 From ca4eb6b6aea1c24c01923bb38a67065960d15ad4 Mon Sep 17 00:00:00 2001 From: Madhurima Paruchuri Date: Wed, 15 Mar 2023 18:54:35 +0000 Subject: retimer: Add emulator and unit tests for ANX7452 retimer driver BUG=b:267589042 BRANCH=none TEST=./twister -s drivers/drivers.anx7452 -c --coverage Change-Id: I7b4dcef7e667cd69ecb39f6dda7a6c8570177f40 Signed-off-by: Madhurima Paruchuri Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4303379 Reviewed-by: Fabio Baltieri --- zephyr/emul/CMakeLists.txt | 1 + zephyr/emul/Kconfig | 11 ++ zephyr/emul/emul_anx7452.c | 262 ++++++++++++++++++++++++++ zephyr/include/emul/emul_anx7452.h | 81 ++++++++ zephyr/test/drivers/CMakeLists.txt | 1 + zephyr/test/drivers/Kconfig | 6 + zephyr/test/drivers/anx7452/CMakeLists.txt | 6 + zephyr/test/drivers/anx7452/prj.conf | 3 + zephyr/test/drivers/anx7452/src/anx7452.c | 288 +++++++++++++++++++++++++++++ zephyr/test/drivers/anx7452/usbc.dts | 32 ++++ zephyr/test/drivers/testcase.yaml | 9 + 11 files changed, 700 insertions(+) create mode 100644 zephyr/emul/emul_anx7452.c create mode 100644 zephyr/include/emul/emul_anx7452.h create mode 100644 zephyr/test/drivers/anx7452/CMakeLists.txt create mode 100644 zephyr/test/drivers/anx7452/prj.conf create mode 100644 zephyr/test/drivers/anx7452/src/anx7452.c create mode 100644 zephyr/test/drivers/anx7452/usbc.dts diff --git a/zephyr/emul/CMakeLists.txt b/zephyr/emul/CMakeLists.txt index 523e1e98b0..58eef44627 100644 --- a/zephyr/emul/CMakeLists.txt +++ b/zephyr/emul/CMakeLists.txt @@ -7,6 +7,7 @@ add_subdirectory("tcpc") cros_ec_library_include_directories(include) +zephyr_library_sources_ifdef(CONFIG_EMUL_ANX7452 emul_anx7452.c) zephyr_library_sources_ifdef(CONFIG_EMUL_BB_RETIMER emul_bb_retimer.c) zephyr_library_sources_ifdef(CONFIG_EMUL_BC12_DETECT_PI3USB9201 emul_pi3usb9201.c) zephyr_library_sources_ifdef(CONFIG_EMUL_BMA255 emul_bma255.c) diff --git a/zephyr/emul/Kconfig b/zephyr/emul/Kconfig index b160e430b2..ecdbfb426c 100644 --- a/zephyr/emul/Kconfig +++ b/zephyr/emul/Kconfig @@ -190,6 +190,17 @@ config EMUL_PCT2075 Enable the PCT2075 temperature sensor emulator. It uses emulated I2C bus. Emulator API is available in zephyr/include/emul/emul_pct2075.h. +config EMUL_ANX7452 + bool "ANX7452 retimer emulator" + default y + depends on ZTEST && DT_HAS_ANALOGIX_ANX7452_ENABLED + select EMUL_COMMON_I2C + help + Enable the ANX7452(Analogix) retimer emulator. This driver use + emulated I2C bus. It is used to test anx7452 driver. It supports + reads and writes to all emulator registers. Emulators API is + available in zephyr/include/emul/emul_anx7452.h + config EMUL_PS8743 bool "PS8743 emulator" default y diff --git a/zephyr/emul/emul_anx7452.c b/zephyr/emul/emul_anx7452.c new file mode 100644 index 0000000000..f9854d4081 --- /dev/null +++ b/zephyr/emul/emul_anx7452.c @@ -0,0 +1,262 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/retimer/anx7452.h" +#include "emul/emul_anx7452.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_stub_device.h" + +#include +#include +#include +#include +#include + +#define DT_DRV_COMPAT analogix_anx7452 + +#define LOG_LEVEL CONFIG_I2C_LOG_LEVEL +LOG_MODULE_REGISTER(emul_anx7452); + +/** Run-time data used by the emulator */ +struct anx7452_emul_data { + /** Common I2C data */ + struct i2c_common_emul_data top_data; + struct i2c_common_emul_data ctltop_data; + + /** Configuration information */ + const struct anx7452_emul_cfg *cfg; + + /** Current state of all emulated ANX7452 retimer registers */ + uint8_t top_reg; + + uint8_t ctltop_cfg0_reg; + + uint8_t ctltop_cfg1_reg; + + uint8_t ctltop_cfg2_reg; +}; + +/** Constant configuration of the emulator */ +struct anx7452_emul_cfg { + const struct i2c_common_emul_cfg top_cfg; + const struct i2c_common_emul_cfg ctltop_cfg; +}; + +/* Workhorse for mapping i2c reg to internal emulator data access */ +static uint8_t *anx7452_emul_get_reg_ptr(struct anx7452_emul_data *data, + int reg) +{ + switch (reg) { + case ANX7452_TOP_STATUS_REG: + return &(data->top_reg); + case ANX7452_CTLTOP_CFG0_REG: + return &(data->ctltop_cfg0_reg); + case ANX7452_CTLTOP_CFG1_REG: + return &(data->ctltop_cfg1_reg); + case ANX7452_CTLTOP_CFG2_REG: + return &(data->ctltop_cfg2_reg); + default: + __ASSERT(false, "Unimplemented Register Access Error on 0x%x", + reg); + /* Statement never reached, required for compiler warnings */ + return NULL; + } +} + +/** Check description in emul_anx7452.h */ +void anx7452_emul_set_reg(const struct emul *emul, int reg, uint8_t val) +{ + struct anx7452_emul_data *data = emul->data; + + uint8_t *reg_to_write = anx7452_emul_get_reg_ptr(data, reg); + *reg_to_write = val; +} + +/** Check description in emul_anx7452.h */ +uint8_t anx7452_emul_get_reg(const struct emul *emul, int reg) +{ + struct anx7452_emul_data *data = emul->data; + uint8_t *reg_to_read = anx7452_emul_get_reg_ptr(data, reg); + + return *reg_to_read; +} + +/** Check description in emul_anx7452.h */ +void anx7452_emul_reset(const struct emul *emul) +{ + struct anx7452_emul_data *data; + + data = emul->data; + + data->top_reg = 0xFF; + + data->ctltop_cfg0_reg = 0x00; + + data->ctltop_cfg1_reg = 0x00; + + data->ctltop_cfg2_reg = 0x00; +} + +static int anx7452_emul_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + struct anx7452_emul_data *data = emul->data; + + uint8_t *reg_to_write = anx7452_emul_get_reg_ptr(data, reg); + *reg_to_write = val; + + return 0; +} + +static int anx7452_emul_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) +{ + struct anx7452_emul_data *data = emul->data; + uint8_t *reg_to_read = anx7452_emul_get_reg_ptr(data, reg); + + *val = *reg_to_read; + + return 0; +} + +/** + * Emulate an I2C transfer for ANX7452 + * + * This handles simple reads and writes + * + * @param emul I2C emulation information + * @param msgs List of messages to process + * @param num_msgs Number of messages to process + * @param addr Address of the I2C target device + * + * @retval 0 If successful + * @retval -EIO General input / output error + */ +static int anx7452_emul_transfer(const struct emul *emul, struct i2c_msg *msgs, + int num_msgs, int addr) +{ + const struct anx7452_emul_cfg *cfg; + struct anx7452_emul_data *data; + struct i2c_common_emul_data *common_data; + + data = emul->data; + cfg = emul->cfg; + + if (addr == cfg->top_cfg.addr) { + const struct i2c_common_emul_cfg *common_cfg = &cfg->top_cfg; + + common_data = &data->top_data; + return i2c_common_emul_transfer_workhorse( + emul, common_data, common_cfg, msgs, num_msgs, addr); + } else if (addr == cfg->ctltop_cfg.addr) { + const struct i2c_common_emul_cfg *common_cfg = &cfg->ctltop_cfg; + + common_data = &data->ctltop_data; + return i2c_common_emul_transfer_workhorse( + emul, common_data, common_cfg, msgs, num_msgs, addr); + } + + LOG_ERR("Cannot map address %02x", addr); + return -EIO; +} + +/* Device instantiation */ + +static struct i2c_emul_api anx7452_emul_api = { + .transfer = anx7452_emul_transfer, +}; + +/* Device instantiation */ + +/** + * @brief Set up a new ANX7452 retimer emulator + * + * This should be called for each ANX7452 retimer device that needs to be + * emulated. It registers it with the I2C emulation controller. + * + * @param emul Emulation information + * @param parent Device to emulate + * + * @return 0 indicating success (always) + */ +static int anx7452_emul_init(const struct emul *emul, + const struct device *parent) +{ + const struct anx7452_emul_cfg *cfg; + struct anx7452_emul_data *data; + int ret = 0; + + data = emul->data; + cfg = emul->cfg; + + data->top_data.emul.api = &anx7452_emul_api; + data->top_data.emul.addr = cfg->top_cfg.addr; + data->top_data.emul.target = emul; + data->top_data.i2c = parent; + data->top_data.cfg = &cfg->top_cfg; + i2c_common_emul_init(&data->top_data); + + data->ctltop_data.emul.api = &anx7452_emul_api; + data->ctltop_data.emul.addr = cfg->ctltop_cfg.addr; + data->ctltop_data.emul.target = emul; + data->ctltop_data.i2c = parent; + data->ctltop_data.cfg = &cfg->ctltop_cfg; + i2c_common_emul_init(&data->ctltop_data); + + ret |= i2c_emul_register(parent, &data->top_data.emul); + ret |= i2c_emul_register(parent, &data->ctltop_data.emul); + + anx7452_emul_reset(emul); + + return ret; +} + +#define ANX7452_EMUL(n) \ + static struct anx7452_emul_data anx7452_emul_data_##n = { \ + .top_data = { \ + .write_byte = anx7452_emul_write_byte, \ + .read_byte = anx7452_emul_read_byte, \ + }, \ + .ctltop_data = { \ + .write_byte = anx7452_emul_write_byte, \ + .read_byte = anx7452_emul_read_byte, \ + }, \ + }; \ + static const struct anx7452_emul_cfg anx7452_emul_cfg_##n = { \ + .top_cfg = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &anx7452_emul_data_##n.top_data, \ + .addr = DT_INST_REG_ADDR(n), \ + }, \ + .ctltop_cfg = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &anx7452_emul_data_##n.ctltop_data, \ + .addr = ANX7452_I2C_ADDR_CTLTOP_FLAGS, \ + }, \ + }; \ + EMUL_DT_INST_DEFINE(n, anx7452_emul_init, &anx7452_emul_data_##n, \ + &anx7452_emul_cfg_##n, &anx7452_emul_api, NULL) + +DT_INST_FOREACH_STATUS_OKAY(ANX7452_EMUL); + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_anx7452_get_i2c_common_data(const struct emul *emul, + enum anx7452_emul_port port) +{ + struct anx7452_emul_data *data; + + data = emul->data; + + switch (port) { + case TOP_EMUL_PORT: + return &data->top_data; + case CTLTOP_EMUL_PORT: + return &data->ctltop_data; + default: + return NULL; + } +} diff --git a/zephyr/include/emul/emul_anx7452.h b/zephyr/include/emul/emul_anx7452.h new file mode 100644 index 0000000000..455958f664 --- /dev/null +++ b/zephyr/include/emul/emul_anx7452.h @@ -0,0 +1,81 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Backend API for ANX7452 retimer emulator + */ + +#ifndef __EMUL_ANX7452_H +#define __EMUL_ANX7452_H + +#include +#include +#include + +/** Types of "hidden" I2C devices */ +enum anx7452_emul_port { + TOP_EMUL_PORT, + CTLTOP_EMUL_PORT, +}; + +/** + * @brief ANX7452 retimer emulator backend API + * @defgroup anx7452_emul ANX7452 retimer emulator + * @{ + * + * ANX7452 retimer emulator supports access to all its registers using I2C + * messages. Application may alter emulator state: + * + * - call @ref anx7452_emul_set_reg and @ref anx7452_emul_get_reg to set and get + * value of ANX7452 retimers registers + * - call anx7452_emul_set_err_* to change emulator behaviour on inadvisable + * driver behaviour + * - call functions from emul_common_i2c.h to setup custom handlers for I2C + * messages + */ + +/** + * @brief Set value of given register of ANX7452 retimer + * + * @param emul Pointer to ANX7452 retimer emulator + * @param reg Register address which value will be changed + * @param val New value of the register + */ +void anx7452_emul_set_reg(const struct emul *emul, int reg, uint8_t val); + +/** + * @brief Get value of given register of ANX7452 retimer + * + * @param emul Pointer to ANX7452 retimer emulator + * @param reg Register address + * + * @return Value of the register + */ +uint8_t anx7452_emul_get_reg(const struct emul *emul, int reg); + +/** + * @brief Reset the anx7452 emulator + * + * @param emul The emulator to reset + */ +void anx7452_emul_reset(const struct emul *emul); + +/** + * @brief Returns pointer to i2c_common_emul_data for given emul + * + * @param emul Pointer to anx7452 retimer emulator + * @return Pointer to i2c_common_emul_data for emul argument + */ +struct i2c_common_emul_data * +emul_anx7452_get_i2c_common_data(const struct emul *emul, + enum anx7452_emul_port port); + +/** + * @} + */ + +#endif /* __EMUL_ANX7452 */ diff --git a/zephyr/test/drivers/CMakeLists.txt b/zephyr/test/drivers/CMakeLists.txt index 2d7fc8a56b..2b2688ce4d 100644 --- a/zephyr/test/drivers/CMakeLists.txt +++ b/zephyr/test/drivers/CMakeLists.txt @@ -73,6 +73,7 @@ add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_LED_COMMON led_common) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_PS8XXX ps8xxx) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_GPIO_UNHOOK gpio_unhook) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_HOST_COMMAND_MEMORY_DUMP host_command_memory_dump) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_ANX7452 anx7452) get_target_property(TEST_SOURCES_NEW app SOURCES) diff --git a/zephyr/test/drivers/Kconfig b/zephyr/test/drivers/Kconfig index 256e086bd4..726859068f 100644 --- a/zephyr/test/drivers/Kconfig +++ b/zephyr/test/drivers/Kconfig @@ -236,4 +236,10 @@ config LINK_TEST_SUITE_LED_COMMON config LINK_TEST_SUITE_HOST_COMMAND_MEMORY_DUMP bool "Link and test memory dump host commands tests" +config LINK_TEST_SUITE_ANX7452 + bool "Link and test the anx7452 tests" + help + Include the test suite of ANX7452 retimer in the binary. The tests + use I2C emulation. + source "Kconfig.zephyr" diff --git a/zephyr/test/drivers/anx7452/CMakeLists.txt b/zephyr/test/drivers/anx7452/CMakeLists.txt new file mode 100644 index 0000000000..a61fa0a1c6 --- /dev/null +++ b/zephyr/test/drivers/anx7452/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Add source files +target_sources(app PRIVATE src/anx7452.c) diff --git a/zephyr/test/drivers/anx7452/prj.conf b/zephyr/test/drivers/anx7452/prj.conf new file mode 100644 index 0000000000..96bb372274 --- /dev/null +++ b/zephyr/test/drivers/anx7452/prj.conf @@ -0,0 +1,3 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. diff --git a/zephyr/test/drivers/anx7452/src/anx7452.c b/zephyr/test/drivers/anx7452/src/anx7452.c new file mode 100644 index 0000000000..f456dea845 --- /dev/null +++ b/zephyr/test/drivers/anx7452/src/anx7452.c @@ -0,0 +1,288 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "driver/retimer/anx7452.h" +#include "driver/retimer/anx7452_public.h" +#include "emul/emul_anx7452.h" +#include "emul/emul_common_i2c.h" +#include "i2c.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" +#include "timer.h" +#include "usb_mux.h" + +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_USB_C1_USB_EN_PATH NAMED_GPIOS_GPIO_NODE(usb_c1_ls_en) +#define GPIO_USB_C1_USB_EN_PORT DT_GPIO_PIN(GPIO_USB_C1_USB_EN_PATH, gpios) +#define GPIO_USB_C1_DP_EN_PATH NAMED_GPIOS_GPIO_NODE(usb_c1_rt_rst_odl) +#define GPIO_USB_C1_DP_EN_PORT DT_GPIO_PIN(GPIO_USB_C1_DP_EN_PATH, gpios) + +#define ANX7452_NODE DT_NODELABEL(usb_c1_anx7452_emul) +#define EMUL EMUL_DT_GET(ANX7452_NODE) +#define COMMON_DATA(port) emul_anx7452_get_i2c_common_data(EMUL, port) + +ZTEST(anx7452, test_anx7452_init) +{ + const struct device *gpio_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_USB_C1_USB_EN_PATH, gpios)); + + zassert_not_null(gpio_dev, "Cannot get GPIO device"); + + /* Test successful init */ + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_TOP_STATUS_REG), 0xFF, + NULL); + zassert_equal( + EC_SUCCESS, + anx7452_usb_retimer_driver.init(usb_muxes[USBC_PORT_C1].mux), + NULL); + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_TOP_STATUS_REG), + ANX7452_TOP_REG_EN, NULL); + zassert_equal(1, + gpio_emul_output_get(gpio_dev, GPIO_USB_C1_USB_EN_PORT), + NULL); + + /* Setup emulator fail on write */ + i2c_common_emul_set_write_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + ANX7452_TOP_STATUS_REG); + /* With reg read fail, init should fail and pins should be unset */ + zassert_equal( + EC_ERROR_INVAL, + anx7452_usb_retimer_driver.init(usb_muxes[USBC_PORT_C1].mux), + NULL); + zassert_equal(1, + gpio_emul_output_get(gpio_dev, GPIO_USB_C1_USB_EN_PORT), + NULL); + + /* Do not fail on write */ + i2c_common_emul_set_write_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + /* Setup emulator fail on read */ + i2c_common_emul_set_read_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + ANX7452_TOP_STATUS_REG); + /* With reg read fail, init should fail and pins should be unset */ + zassert_equal( + EC_ERROR_TIMEOUT, + anx7452_usb_retimer_driver.init(usb_muxes[USBC_PORT_C1].mux), + NULL); + zassert_equal(1, + gpio_emul_output_get(gpio_dev, GPIO_USB_C1_USB_EN_PORT), + NULL); + + /* Do not fail on read */ + i2c_common_emul_set_read_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + /* Setup emulator fail on read */ + i2c_common_emul_set_read_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + ANX7452_TOP_STATUS_REG); + const uint32_t start_ms = k_uptime_get(); + /* With reg read fail, init should fail and pins should be unset */ + zassert_equal( + EC_ERROR_TIMEOUT, + anx7452_usb_retimer_driver.init(usb_muxes[USBC_PORT_C1].mux), + NULL); + const uint32_t end_ms = k_uptime_get(); + /* With timeout caused by read fail, the time took should be greater + * than or equal to configured timeout value + */ + zassert_true((end_ms - start_ms) >= ANX7452_I2C_WAKE_TIMEOUT_MS, NULL); + zassert_equal(1, + gpio_emul_output_get(gpio_dev, GPIO_USB_C1_USB_EN_PORT), + NULL); +} + +ZTEST(anx7452, test_anx7452_get) +{ + mux_state_t mux_state = 0; + + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.get( + usb_muxes[USBC_PORT_C1].mux, &mux_state)); + + anx7452_emul_set_reg(EMUL, ANX7452_TOP_STATUS_REG, + ANX7452_TOP_REG_EN | ANX7452_TOP_FLIP_INFO); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.get( + usb_muxes[USBC_PORT_C1].mux, &mux_state)); + zassert_equal(mux_state, USB_PD_MUX_POLARITY_INVERTED); + + anx7452_emul_set_reg(EMUL, ANX7452_TOP_STATUS_REG, + ANX7452_TOP_REG_EN | ANX7452_TOP_DP_INFO); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.get( + usb_muxes[USBC_PORT_C1].mux, &mux_state)); + zassert_equal(mux_state, USB_PD_MUX_DP_ENABLED); + + anx7452_emul_set_reg(EMUL, ANX7452_TOP_STATUS_REG, + ANX7452_TOP_REG_EN | ANX7452_TOP_TBT_INFO); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.get( + usb_muxes[USBC_PORT_C1].mux, &mux_state)); + zassert_equal(mux_state, USB_PD_MUX_TBT_COMPAT_ENABLED); + + anx7452_emul_set_reg(EMUL, ANX7452_TOP_STATUS_REG, + ANX7452_TOP_REG_EN | ANX7452_TOP_USB3_INFO); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.get( + usb_muxes[USBC_PORT_C1].mux, &mux_state)); + zassert_equal(mux_state, USB_PD_MUX_USB_ENABLED); + + anx7452_emul_set_reg(EMUL, ANX7452_TOP_STATUS_REG, + ANX7452_TOP_REG_EN | ANX7452_TOP_USB4_INFO); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.get( + usb_muxes[USBC_PORT_C1].mux, &mux_state)); + zassert_equal(mux_state, USB_PD_MUX_USB4_ENABLED); + + i2c_common_emul_set_read_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + ANX7452_TOP_STATUS_REG); + zassert_equal(EC_ERROR_INVAL, + anx7452_usb_retimer_driver.get( + usb_muxes[USBC_PORT_C1].mux, &mux_state)); +} + +ZTEST(anx7452, test_anx7452_set) +{ + mux_state_t mux_state = 0; + bool ack_required; + + zassert_equal(EC_SUCCESS, anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + mux_state, &ack_required)); + zassert_equal(ack_required, false); + + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG0_REG), 0); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_POLARITY_INVERTED, &ack_required)); + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG0_REG), + ANX7452_CTLTOP_CFG0_FLIP_EN); + + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_USB_ENABLED, &ack_required)); + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG0_REG), + ANX7452_CTLTOP_CFG0_USB3_EN); + + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG1_REG), 0); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_DP_ENABLED, &ack_required)); + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG1_REG), + ANX7452_CTLTOP_CFG1_DP_EN); + + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG2_REG), 0); + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_USB4_ENABLED, &ack_required)); + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG2_REG), + ANX7452_CTLTOP_CFG2_USB4_EN); + + zassert_equal(EC_SUCCESS, + anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, &ack_required)); + zassert_equal(anx7452_emul_get_reg(EMUL, ANX7452_CTLTOP_CFG2_REG), + ANX7452_CTLTOP_CFG2_TBT_EN); + + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + ANX7452_CTLTOP_CFG0_REG); + zassert_equal(EC_ERROR_INVAL, anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + mux_state, &ack_required)); + + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + ANX7452_CTLTOP_CFG1_REG); + zassert_equal(EC_ERROR_INVAL, anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + mux_state, &ack_required)); + + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + ANX7452_CTLTOP_CFG2_REG); + zassert_equal(EC_ERROR_INVAL, anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + mux_state, &ack_required)); + + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + ANX7452_CTLTOP_CFG0_REG); + zassert_equal(EC_ERROR_TIMEOUT, anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + mux_state, &ack_required)); + + i2c_common_emul_set_write_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + ANX7452_CTLTOP_CFG1_REG); + zassert_equal(EC_ERROR_TIMEOUT, anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + mux_state, &ack_required)); + + i2c_common_emul_set_write_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + ANX7452_CTLTOP_CFG2_REG); + zassert_equal(EC_ERROR_TIMEOUT, anx7452_usb_retimer_driver.set( + usb_muxes[USBC_PORT_C1].mux, + mux_state, &ack_required)); +} + +static inline void reset_anx7452_state(void) +{ + i2c_common_emul_set_write_func(COMMON_DATA(TOP_EMUL_PORT), NULL, NULL); + i2c_common_emul_set_read_func(COMMON_DATA(TOP_EMUL_PORT), NULL, NULL); + i2c_common_emul_set_write_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(COMMON_DATA(TOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + + i2c_common_emul_set_write_func(COMMON_DATA(CTLTOP_EMUL_PORT), NULL, + NULL); + i2c_common_emul_set_read_func(COMMON_DATA(CTLTOP_EMUL_PORT), NULL, + NULL); + i2c_common_emul_set_write_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(COMMON_DATA(CTLTOP_EMUL_PORT), + I2C_COMMON_EMUL_NO_FAIL_REG); + + anx7452_emul_reset(EMUL); +} + +static void anx7452_before(void *state) +{ + ARG_UNUSED(state); + reset_anx7452_state(); +} + +static void anx7452_after(void *state) +{ + ARG_UNUSED(state); + reset_anx7452_state(); +} + +ZTEST_SUITE(anx7452, drivers_predicate_post_main, NULL, anx7452_before, + anx7452_after, NULL); diff --git a/zephyr/test/drivers/anx7452/usbc.dts b/zephyr/test/drivers/anx7452/usbc.dts new file mode 100644 index 0000000000..3441cf842f --- /dev/null +++ b/zephyr/test/drivers/anx7452/usbc.dts @@ -0,0 +1,32 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include + +/ { + usbc { + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c1_anx7452_emul>; + }; + }; + }; + +}; +&i2c3 { + status = "okay"; + + /delete-node/ bbretimer@42; + + usb_c1_anx7452_emul: anx7452@10 { + compatible = "analogix,anx7452"; + reg = <0x10>; + usb-en-pin = <&usb_c1_ls_en>; + dp-en-pin = <&usb_c1_rt_rst_odl>; + }; +}; diff --git a/zephyr/test/drivers/testcase.yaml b/zephyr/test/drivers/testcase.yaml index d4c6fc7e75..dbae8be1e2 100644 --- a/zephyr/test/drivers/testcase.yaml +++ b/zephyr/test/drivers/testcase.yaml @@ -462,3 +462,12 @@ tests: - CONFIG_LINK_TEST_SUITE_HOST_COMMAND_MEMORY_DUMP=y - CONFIG_PLATFORM_EC_HOST_COMMAND_MEMORY_DUMP=y - CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y + drivers.anx7452: + extra_conf_files: + - prj.conf + - anx7452/prj.conf + extra_dtc_overlay_files: + - boards/native_posix.overlay + - anx7452/usbc.dts + extra_configs: + - CONFIG_LINK_TEST_SUITE_ANX7452=y -- cgit v1.2.1 From e06fe77101c2cea6f0ed51e108c39315c3729971 Mon Sep 17 00:00:00 2001 From: Madhurima Paruchuri Date: Tue, 11 Apr 2023 14:54:01 +0000 Subject: binman: Add binman nodelabel and use it BRANCH=none BUG=b:272272649 TEST=build rex with cbi_flash overlap and check zephyr.dts Change-Id: I2316fd922bd05b3e9ed0a29456b1d9ff99dd3ffb Signed-off-by: Madhurima Paruchuri Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4415257 Reviewed-by: Wai-Hong Tam --- zephyr/boards/arm/npcx9/npcx9m7f.dts | 62 +++++++++++++++---------------- zephyr/include/cros/binman.dtsi | 2 +- zephyr/include/cros/cbi_flash.dtsi | 22 +++++------ zephyr/include/cros/ite/it8xxx2.dtsi | 41 ++++++++++---------- zephyr/program/nissa/yaviks/overlay.dtsi | 28 +++++++------- zephyr/program/nissa/yavilla/overlay.dtsi | 28 +++++++------- 6 files changed, 90 insertions(+), 93 deletions(-) diff --git a/zephyr/boards/arm/npcx9/npcx9m7f.dts b/zephyr/boards/arm/npcx9/npcx9m7f.dts index 0083f2da6f..2f02cb9887 100644 --- a/zephyr/boards/arm/npcx9/npcx9m7f.dts +++ b/zephyr/boards/arm/npcx9/npcx9m7f.dts @@ -9,39 +9,37 @@ #include #include "npcx9.dtsi" -/ { - /* - * The NPCX9m7F includes 384 kB of code RAM, and 1 MB flash. Padding - * is added to make the image the same size as the internal flash. This - * is required to support the flashrom tool which requires an image that - * matches the full internal flash size. - */ - binman { - wp-ro { - /* - * wp-ro must match a block protect region supported by - * by the internal flash device. In practice, that's - * 512 KiB starting at address 0. - */ - offset = <0x0>; - size = <0x80000>; - }; - ec-rw { - offset = <0x80000>; - size = <0x50000>; - rw-fw { - rw-fwid { - /* Fix the lcoation of the FWID to the - * last 32 bytes of the flash. This - * ensures the RW entries in the FMAP - * stored in the RO section of flash - * are always correct. - */ - offset = <(0x50000 - 32)>; - }; +/* + * The NPCX9m7F includes 384 kB of code RAM, and 1 MB flash. Padding + * is added to make the image the same size as the internal flash. This + * is required to support the flashrom tool which requires an image that + * matches the full internal flash size. + */ +&binman { + wp-ro { + /* + * wp-ro must match a block protect region supported by + * by the internal flash device. In practice, that's + * 512 KiB starting at address 0. + */ + offset = <0x0>; + size = <0x80000>; + }; + ec-rw { + offset = <0x80000>; + size = <0x50000>; + rw-fw { + rw-fwid { + /* Fix the lcoation of the FWID to the + * last 32 bytes of the flash. This + * ensures the RW entries in the FMAP + * stored in the RO section of flash + * are always correct. + */ + offset = <(0x50000 - 32)>; }; }; - pad-byte = <0xff>; - pad-after = <0x30000>; }; + pad-byte = <0xff>; + pad-after = <0x30000>; }; diff --git a/zephyr/include/cros/binman.dtsi b/zephyr/include/cros/binman.dtsi index 1ba7a3bde6..7fc0ebaf9a 100644 --- a/zephyr/include/cros/binman.dtsi +++ b/zephyr/include/cros/binman.dtsi @@ -6,7 +6,7 @@ / { #address-cells = <1>; #size-cells = <1>; - binman { + binman: binman { filename = "ec.bin"; pad-byte = <0x1d>; wp-ro { diff --git a/zephyr/include/cros/cbi_flash.dtsi b/zephyr/include/cros/cbi_flash.dtsi index adb4f43cde..136977a6f1 100644 --- a/zephyr/include/cros/cbi_flash.dtsi +++ b/zephyr/include/cros/cbi_flash.dtsi @@ -3,18 +3,16 @@ * found in the LICENSE file. */ -/ { - binman { - wp-ro { - ec-ro { - cbi_flash: cbi { - compatible = "cros-ec,flash-layout"; - type = "fill"; - offset = <0x40000>; - size = <0>; - fill-byte = [ff]; - preserve; - }; +&binman { + wp-ro { + ec-ro { + cbi_flash: cbi { + compatible = "cros-ec,flash-layout"; + type = "fill"; + offset = <0x40000>; + size = <0>; + fill-byte = [ff]; + preserve; }; }; }; diff --git a/zephyr/include/cros/ite/it8xxx2.dtsi b/zephyr/include/cros/ite/it8xxx2.dtsi index 983bf46663..4117bb894d 100644 --- a/zephyr/include/cros/ite/it8xxx2.dtsi +++ b/zephyr/include/cros/ite/it8xxx2.dtsi @@ -72,27 +72,28 @@ }; /* it8xxx2 has 1MB of flash. currently, we use 768KB from flash. */ - binman { - wp-ro { - offset = <0x0>; - size = <0x60000>; - }; - ec-rw { - offset = <0x60000>; - size = <0x60000>; - rw-fw { - rw-fwid { - /* Fix the lcoation of the FWID to the - * last 32 bytes of the flash. This - * ensures the RW entries in the FMAP - * stored in the RO section of flash - * are always correct. - */ - offset = <(0x60000 - 32)>; - }; +}; + +&binman { + wp-ro { + offset = <0x0>; + size = <0x60000>; + }; + ec-rw { + offset = <0x60000>; + size = <0x60000>; + rw-fw { + rw-fwid { + /* Fix the lcoation of the FWID to the + * last 32 bytes of the flash. This + * ensures the RW entries in the FMAP + * stored in the RO section of flash + * are always correct. + */ + offset = <(0x60000 - 32)>; }; }; - pad-byte = <0xff>; - pad-after = <0x40000>; }; + pad-byte = <0xff>; + pad-after = <0x40000>; }; diff --git a/zephyr/program/nissa/yaviks/overlay.dtsi b/zephyr/program/nissa/yaviks/overlay.dtsi index 663b538953..a93b02c51c 100644 --- a/zephyr/program/nissa/yaviks/overlay.dtsi +++ b/zephyr/program/nissa/yaviks/overlay.dtsi @@ -213,24 +213,24 @@ }; }; }; +}; - binman { - ec-rw { - size = <0x50000>; - rw-fw { - rw-fwid { - /* Fix the lcoation of the FWID to the - * last 32 bytes of the flash. This - * ensures the RW entries in the FMAP - * stored in the RO section of flash - * are always correct. - */ - offset = <(0x50000 - 32)>; - }; +&binman { + ec-rw { + size = <0x50000>; + rw-fw { + rw-fwid { + /* Fix the lcoation of the FWID to the + * last 32 bytes of the flash. This + * ensures the RW entries in the FMAP + * stored in the RO section of flash + * are always correct. + */ + offset = <(0x50000 - 32)>; }; }; - pad-after = <0x50000>; }; + pad-after = <0x50000>; }; &thermistor_3V3_51K1_47K_4050B { diff --git a/zephyr/program/nissa/yavilla/overlay.dtsi b/zephyr/program/nissa/yavilla/overlay.dtsi index 663b538953..a93b02c51c 100644 --- a/zephyr/program/nissa/yavilla/overlay.dtsi +++ b/zephyr/program/nissa/yavilla/overlay.dtsi @@ -213,24 +213,24 @@ }; }; }; +}; - binman { - ec-rw { - size = <0x50000>; - rw-fw { - rw-fwid { - /* Fix the lcoation of the FWID to the - * last 32 bytes of the flash. This - * ensures the RW entries in the FMAP - * stored in the RO section of flash - * are always correct. - */ - offset = <(0x50000 - 32)>; - }; +&binman { + ec-rw { + size = <0x50000>; + rw-fw { + rw-fwid { + /* Fix the lcoation of the FWID to the + * last 32 bytes of the flash. This + * ensures the RW entries in the FMAP + * stored in the RO section of flash + * are always correct. + */ + offset = <(0x50000 - 32)>; }; }; - pad-after = <0x50000>; }; + pad-after = <0x50000>; }; &thermistor_3V3_51K1_47K_4050B { -- cgit v1.2.1 From d2d6f12754db9634996a4171edb51c1c642e3cfa Mon Sep 17 00:00:00 2001 From: Al Semjonovs Date: Mon, 10 Apr 2023 11:57:05 -0600 Subject: presubmit: Validate test_ prefix is present for ZTEST Fail presubmit when 'test_' prefix is missing for new ZTESTs BUG=None BRANCH=NONE TEST=Preupload check with ZTEST(foo, test_good) ZTEST(foo, missing_prefix1) ZTEST_F(foo, missing_prefix2) ZTEST_USER(foo , missing_prefix3) ZTEST_USER_F(foo , missing_prefix4) Change-Id: I0f223852159151d4fe7895e70b6c0548a44e1f45 Signed-off-by: Al Semjonovs Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4411762 Reviewed-by: Aaron Massey --- util/presubmit_check.sh | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/util/presubmit_check.sh b/util/presubmit_check.sh index 0fcd4a3319..b6ffa80a35 100755 --- a/util/presubmit_check.sh +++ b/util/presubmit_check.sh @@ -19,3 +19,11 @@ if git diff --no-ext-diff "${upstream_branch}" HEAD | echo "error: CPRINTS strings should not include newline characters" >&2 exit 1 fi + +# Check for missing 'test_' prefix from ZTEST definitions +if git diff --no-ext-diff "${upstream_branch}" HEAD | + pcregrep -M "^\+(ZTEST|ZTEST_F|ZTEST_USER|ZTEST_USER_F)\(\w+,[\n\+|\s]*\w+\)" | + pcregrep -vM "\(\w+,[\n\+]*\s*test_\w+\)"; then + echo "error: 'test_' prefix missing from test function name" >&2 + exit 1 +fi -- cgit v1.2.1 From 405c611c07fac37ec12299b308437c44f66058c9 Mon Sep 17 00:00:00 2001 From: Madhurima Paruchuri Date: Thu, 16 Mar 2023 16:04:12 +0000 Subject: rex: db: retimer: Configure ANX7452 daughter board Add ANX7452 retimer configuration Add SYV682 PPC configuration Add RT1716 TCPC configuration Update the CBI lookup for DB type method with ANX7452 DB type BRANCH=none BUG=b:267589042 TEST=./twister -T zephyr/test/rex -c Change-Id: I8ecfb731fc4a18bc7ae718a483b5bc4d3f9ec6a1 Signed-off-by: Madhurima Paruchuri Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4345598 Reviewed-by: Fabio Baltieri --- zephyr/program/rex/program.conf | 2 +- zephyr/program/rex/rex.dtsi | 25 +++++++++++++++++++++++++ zephyr/program/rex/rex/src/usb_mux_config.c | 8 ++++++++ zephyr/program/rex/usbc.dtsi | 6 ++++++ zephyr/test/rex/src/usb_mux_config.c | 17 +++++++++++++++++ 5 files changed, 57 insertions(+), 1 deletion(-) diff --git a/zephyr/program/rex/program.conf b/zephyr/program/rex/program.conf index 1e19f687de..75351088fe 100644 --- a/zephyr/program/rex/program.conf +++ b/zephyr/program/rex/program.conf @@ -96,7 +96,7 @@ CONFIG_PLATFORM_EC_USB_PD_DATA_RESET_MSG=y CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y CONFIG_PLATFORM_EC_USB_PID=0x504D -#USB Mux +# USB Mux CONFIG_PLATFORM_EC_USB_MUX_TASK=y # External power diff --git a/zephyr/program/rex/rex.dtsi b/zephyr/program/rex/rex.dtsi index 28f719d356..83d10b95d1 100644 --- a/zephyr/program/rex/rex.dtsi +++ b/zephyr/program/rex/rex.dtsi @@ -253,6 +253,17 @@ */ rst-gpios = <&gpio7 4 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>; }; + + rt1716_tcpc_port1: rt1716@4e { + compatible = "richtek,rt1715-tcpc"; + reg = <0x4e>; + /* a duplicate of the <&gpio_usb_c1_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; + is-alt; + }; }; &i2c5_0 { @@ -282,6 +293,20 @@ status = "okay"; reg = <0x72>; }; + + ppc_port1_syv: ppc_syv@40 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x40>; + frs_en_gpio = <&gpio_usb_c1_frs_en>; + is-alt; + }; + + usb_c1_anx7452_retimer: usb-c1-anx7452-retimer@10{ + compatible = "analogix,anx7452"; + reg = <0x10>; + usb-en-pin = <&gpio_usb_c1_rt_rst_r_odl>; + }; }; &i2c7_0 { diff --git a/zephyr/program/rex/rex/src/usb_mux_config.c b/zephyr/program/rex/rex/src/usb_mux_config.c index a549235f3c..a3d2d4ab0c 100644 --- a/zephyr/program/rex/rex/src/usb_mux_config.c +++ b/zephyr/program/rex/rex/src/usb_mux_config.c @@ -11,6 +11,8 @@ #include "hooks.h" #include "ioexpander.h" #include "usb_mux.h" +#include "usbc/ppc.h" +#include "usbc/tcpci.h" #include "usbc/usb_muxes.h" #include @@ -47,5 +49,11 @@ static void setup_mux(void) if (val == FW_USB_DB_USB3) { LOG_INF("USB DB: Setting USB3 mux"); } + if (val == FW_USB_DB_USB4_ANX7452) { + LOG_INF("USB DB: Setting ANX7452 mux"); + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_anx7452_port1); + TCPC_ENABLE_ALTERNATE_BY_NODELABEL(1, rt1716_tcpc_port1); + PPC_ENABLE_ALTERNATE_BY_NODELABEL(1, ppc_port1_syv); + } } DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); diff --git a/zephyr/program/rex/usbc.dtsi b/zephyr/program/rex/usbc.dtsi index 84ae79fae6..e4565092ee 100644 --- a/zephyr/program/rex/usbc.dtsi +++ b/zephyr/program/rex/usbc.dtsi @@ -37,6 +37,12 @@ compatible = "cros-ec,usb-mux-chain"; usb-muxes = <&virtual_mux_c1 &tcpci_mux_c1>; }; + usb_mux_chain_anx7452_port1: usb-mux-chain-1-anx7452 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c1_anx7452_retimer + &virtual_mux_c1>; + alternative-chain; + }; }; port1-muxes { tcpci_mux_c1: tcpci-mux-c1 { diff --git a/zephyr/test/rex/src/usb_mux_config.c b/zephyr/test/rex/src/usb_mux_config.c index fe4e69feb8..6e85fffe4b 100644 --- a/zephyr/test/rex/src/usb_mux_config.c +++ b/zephyr/test/rex/src/usb_mux_config.c @@ -22,6 +22,13 @@ int mock_cros_cbi_get_fw_config(enum cbi_fw_config_field_id field_id, return 0; } +int mock_cros_cbi_get_fw_config_anx7452(enum cbi_fw_config_field_id field_id, + uint32_t *value) +{ + *value = FW_USB_DB_USB4_ANX7452; + return 0; +} + int mock_cros_cbi_get_fw_config_no_usb_db(enum cbi_fw_config_field_id field_id, uint32_t *value) { @@ -51,6 +58,16 @@ ZTEST_USER(usb_mux_config, test_setup_mux) zassert_equal(1, cros_cbi_get_fw_config_fake.call_count); } +ZTEST_USER(usb_mux_config, test_setup_mux_anx7452) +{ + cros_cbi_get_fw_config_fake.custom_fake = + mock_cros_cbi_get_fw_config_anx7452; + + hook_notify(HOOK_INIT); + + zassert_equal(1, cros_cbi_get_fw_config_fake.call_count); +} + ZTEST_USER(usb_mux_config, test_setup_mux_no_usb_db) { cros_cbi_get_fw_config_fake.custom_fake = -- cgit v1.2.1 From 7bc2e12e1ee125bd124ef4de463cb2764e91e14c Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Fri, 7 Apr 2023 15:28:13 -0700 Subject: ISL9241: Fix ACProchot reg <-> mA conversion This CL fixes expressions used to convert ACProchot register values to/from the current. There is no functionality change because the register happens to use identical conversion. That is, 128 mA <-> 0x80, for example. BUG=b:277280318 BRANCH=None TEST=./twister --toolchain host -T zephyr/test/drivers -s drivers.isl9241 Signed-off-by: Daisuke Nojiri Change-Id: I7c2d6c8b1819c5031306de4ea421193828359290 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409985 Commit-Queue: Paul Fagerburg Reviewed-by: Paul Fagerburg --- driver/charger/isl9241.c | 21 ++++----------------- driver/charger/isl9241.h | 13 +++++++++++++ zephyr/test/drivers/isl9241/src/isl9241.c | 4 ++-- 3 files changed, 19 insertions(+), 19 deletions(-) diff --git a/driver/charger/isl9241.c b/driver/charger/isl9241.c index 5f3566095c..266150f2eb 100644 --- a/driver/charger/isl9241.c +++ b/driver/charger/isl9241.c @@ -28,19 +28,6 @@ #error "ISL9241 is a NVDC charger, please enable CONFIG_CHARGER_NARROW_VDC." #endif -/* Sense resistor default values in milli Ohm */ -#define ISL9241_DEFAULT_RS1 20 /* Input current sense resistor */ -#define ISL9241_DEFAULT_RS2 10 /* Battery charge current sense resistor */ - -#define BOARD_RS1 CONFIG_CHARGER_SENSE_RESISTOR_AC -#define BOARD_RS2 CONFIG_CHARGER_SENSE_RESISTOR - -#define BC_REG_TO_CURRENT(REG) (((REG)*ISL9241_DEFAULT_RS2) / BOARD_RS2) -#define BC_CURRENT_TO_REG(CUR) (((CUR)*BOARD_RS2) / ISL9241_DEFAULT_RS2) - -#define AC_REG_TO_CURRENT(REG) (((REG)*ISL9241_DEFAULT_RS1) / BOARD_RS1) -#define AC_CURRENT_TO_REG(CUR) (((CUR)*BOARD_RS1) / ISL9241_DEFAULT_RS1) - /* Console output macros */ #define CPRINTS(format, args...) cprints(CC_CHARGER, "ISL9241 " format, ##args) @@ -491,10 +478,10 @@ int isl9241_set_ac_prochot(int chgnum, int ma) * This routine should ensure these bits are not set * before writing the register. */ - if (ma > AC_REG_TO_CURRENT(ISL9241_AC_PROCHOT_CURRENT_MAX)) - reg = ISL9241_AC_PROCHOT_CURRENT_MAX; - else if (ma < AC_REG_TO_CURRENT(ISL9241_AC_PROCHOT_CURRENT_MIN)) - reg = ISL9241_AC_PROCHOT_CURRENT_MIN; + if (ma > ISL9241_AC_PROCHOT_CURRENT_MAX) + reg = AC_CURRENT_TO_REG(ISL9241_AC_PROCHOT_CURRENT_MAX); + else if (ma < ISL9241_AC_PROCHOT_CURRENT_MIN) + reg = AC_CURRENT_TO_REG(ISL9241_AC_PROCHOT_CURRENT_MIN); else reg = AC_CURRENT_TO_REG(ma); diff --git a/driver/charger/isl9241.h b/driver/charger/isl9241.h index c3f843f380..b068d48faa 100644 --- a/driver/charger/isl9241.h +++ b/driver/charger/isl9241.h @@ -169,4 +169,17 @@ */ #define ISL9241_BYPASS_VSYS_TIMEOUT_MS 500 +/* Sense resistor default values in milli Ohm */ +#define ISL9241_DEFAULT_RS1 20 /* Input current sense resistor */ +#define ISL9241_DEFAULT_RS2 10 /* Battery charge current sense resistor */ + +#define BOARD_RS1 CONFIG_CHARGER_SENSE_RESISTOR_AC +#define BOARD_RS2 CONFIG_CHARGER_SENSE_RESISTOR + +#define BC_REG_TO_CURRENT(REG) (((REG)*ISL9241_DEFAULT_RS2) / BOARD_RS2) +#define BC_CURRENT_TO_REG(CUR) (((CUR)*BOARD_RS2) / ISL9241_DEFAULT_RS2) + +#define AC_REG_TO_CURRENT(REG) (((REG)*ISL9241_DEFAULT_RS1) / BOARD_RS1) +#define AC_CURRENT_TO_REG(CUR) (((CUR)*BOARD_RS1) / ISL9241_DEFAULT_RS1) + #endif /* __CROS_EC_ISL9241_H */ diff --git a/zephyr/test/drivers/isl9241/src/isl9241.c b/zephyr/test/drivers/isl9241/src/isl9241.c index d84d11a454..57f7169919 100644 --- a/zephyr/test/drivers/isl9241/src/isl9241.c +++ b/zephyr/test/drivers/isl9241/src/isl9241.c @@ -191,7 +191,7 @@ ZTEST_F(isl9241_driver, test_ac_prochot) ISL9241_REG_AC_PROCHOT)); zassert_equal(isl9241_emul_peek(fixture->isl9241_emul, ISL9241_REG_AC_PROCHOT), - ISL9241_AC_PROCHOT_CURRENT_MAX); + AC_CURRENT_TO_REG(ISL9241_AC_PROCHOT_CURRENT_MAX)); cur = (ISL9241_AC_PROCHOT_CURRENT_MIN - 100) * scale; printf("cur %d ", cur); @@ -200,7 +200,7 @@ ZTEST_F(isl9241_driver, test_ac_prochot) ISL9241_REG_AC_PROCHOT)); zassert_equal(isl9241_emul_peek(fixture->isl9241_emul, ISL9241_REG_AC_PROCHOT), - ISL9241_AC_PROCHOT_CURRENT_MIN); + AC_CURRENT_TO_REG(ISL9241_AC_PROCHOT_CURRENT_MIN)); } ZTEST_F(isl9241_driver, test_dc_prochot) -- cgit v1.2.1 From d14883b6fd881ff821d88e670d1c4ead4479f983 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Fri, 7 Apr 2023 15:28:13 -0700 Subject: RAA489110: Add RAA489110 driver RAA489110 is an EPR capable version of ISL9241. BUG=b:277280318 BRANCH=None TEST=make BOARD=hades TEST=./twister --toolchain host -T zephyr/test/drivers -s drivers.isl9241 Signed-off-by: Daisuke Nojiri Change-Id: I15eb1f652027f157ccb6b3a2d509531bef0c7c6c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409986 Reviewed-by: Paul Fagerburg Commit-Queue: Paul Fagerburg --- driver/build.mk | 1 + driver/charger/isl9241.c | 39 ++++++++++++++++++++------------- driver/charger/isl9241.h | 12 +++++++++- include/config.h | 13 ++++++----- include/driver/charger/isl9241_public.h | 4 ++++ zephyr/Kconfig.charger | 10 +++++++++ zephyr/shim/include/config_chip.h | 5 +++++ 7 files changed, 63 insertions(+), 21 deletions(-) diff --git a/driver/build.mk b/driver/build.mk index da10cf3cbe..ba8078b11e 100644 --- a/driver/build.mk +++ b/driver/build.mk @@ -76,6 +76,7 @@ driver-$(CONFIG_CHARGER_ISL9238C)+=charger/isl923x.o driver-$(CONFIG_CHARGER_ISL9241)+=charger/isl9241.o driver-$(CONFIG_CHARGER_MT6370)+=charger/rt946x.o driver-$(CONFIG_CHARGER_RAA489000)+=charger/isl923x.o +driver-$(CONFIG_CHARGER_RAA489110)+=charger/isl9241.o driver-$(CONFIG_CHARGER_RT9466)+=charger/rt946x.o driver-$(CONFIG_CHARGER_RT9467)+=charger/rt946x.o driver-$(CONFIG_CHARGER_RT9490)+=charger/rt9490.o diff --git a/driver/charger/isl9241.c b/driver/charger/isl9241.c index 266150f2eb..2bb3d75f28 100644 --- a/driver/charger/isl9241.c +++ b/driver/charger/isl9241.c @@ -2,7 +2,7 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * - * Renesas (Intersil) ISL-9241 battery charger driver. + * Renesas (Intersil) ISL-9241 (and RAA489110) battery charger driver. */ /* TODO(b/175881324) */ @@ -474,9 +474,9 @@ int isl9241_set_ac_prochot(int chgnum, int ma) uint16_t reg; /* - * The register reserves bits [6:0] and bits [15:13]. - * This routine should ensure these bits are not set - * before writing the register. + * The register reserves bits [6:0] ([4:0] for rsa489110) and bits + * [15:13]. This routine should ensure these bits are not set before + * writing the register. */ if (ma > ISL9241_AC_PROCHOT_CURRENT_MAX) reg = AC_CURRENT_TO_REG(ISL9241_AC_PROCHOT_CURRENT_MAX); @@ -497,9 +497,9 @@ int isl9241_set_dc_prochot(int chgnum, int ma) int rv; /* - * The register reserves bits [7:0] and bits [15:14]. - * This routine should ensure these bits are not set - * before writing the register. + * The register reserves bits [7:0] ([5:0] for RAA489110) and bits + * [15:14]. This routine should ensure these bits are not set before + * writing the register. */ if (ma > ISL9241_DC_PROCHOT_CURRENT_MAX) ma = ISL9241_DC_PROCHOT_CURRENT_MAX; @@ -725,6 +725,19 @@ static bool isl9241_is_in_chrg(int chgnum) return trickle_charge_enabled || fast_charge_enabled; } +static enum ec_error_list +isl9241_update_force_buck_mode(int chgnum, enum mask_update_action action) +{ + if (IS_ENABLED(CONFIG_CHARGER_ISL9241)) + return isl9241_update(chgnum, ISL9241_REG_CONTROL4, + ISL9241_CONTROL4_FORCE_BUCK_MODE, action); + else + /* CONFIG_CHARGER_RAA489110 */ + return isl9241_update(chgnum, ISL9241_REG_CONTROL0, + RAA489110_CONTROL0_EN_FORCE_BUCK_MODE, + action); +} + /* * Transition from Bypass to BAT. */ @@ -736,8 +749,7 @@ static enum ec_error_list isl9241_bypass_to_bat(int chgnum) mutex_lock(&control3_mutex_isl9241); /* 1: Disable force forward buck/reverse boost. */ - isl9241_update(chgnum, ISL9241_REG_CONTROL4, - ISL9241_CONTROL4_FORCE_BUCK_MODE, MASK_CLR); + isl9241_update_force_buck_mode(chgnum, MASK_CLR); /* * 2: Turn off BYPSG, turn on NGATE, disable charge pump 100%, disable @@ -774,8 +786,7 @@ static enum ec_error_list isl9241_bypass_chrg_to_bat(int chgnum) mutex_lock(&control3_mutex_isl9241); /* 1: Disable force forward buck/reverse boost. */ - isl9241_update(chgnum, ISL9241_REG_CONTROL4, - ISL9241_CONTROL4_FORCE_BUCK_MODE, MASK_CLR); + isl9241_update_force_buck_mode(chgnum, MASK_CLR); /* 2: Disable fast charge. */ isl9241_write(chgnum, ISL9241_REG_CHG_CURRENT_LIMIT, 0); /* 3: Disable trickle charge. */ @@ -915,8 +926,7 @@ static enum ec_error_list isl9241_nvdc_to_bypass(int chgnum) /* 17: Read diode emulation active bit. */ /* 18: Disable 10mA discharge on CSOP. */ /* 19*: Force forward buck/reverse boost mode. */ - isl9241_update(chgnum, ISL9241_REG_CONTROL4, - ISL9241_CONTROL4_FORCE_BUCK_MODE, MASK_SET); + isl9241_update_force_buck_mode(chgnum, MASK_SET); if (!isl9241_is_ac_present(chgnum)) { /* @@ -972,8 +982,7 @@ static enum ec_error_list isl9241_bypass_to_nvdc(int chgnum) /* 1*: Reduce system load below ACLIM. */ /* 3*: Disable force forward buck/reverse boost. */ - rv = isl9241_update(chgnum, ISL9241_REG_CONTROL4, - ISL9241_CONTROL4_FORCE_BUCK_MODE, MASK_CLR); + rv = isl9241_update_force_buck_mode(chgnum, MASK_CLR); if (rv) return rv; diff --git a/driver/charger/isl9241.h b/driver/charger/isl9241.h index b068d48faa..4e766a9886 100644 --- a/driver/charger/isl9241.h +++ b/driver/charger/isl9241.h @@ -2,7 +2,7 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * - * Renesas (Intersil) ISL-9241 battery charger driver header. + * Renesas (Intersil) ISL-9241 (and RAA489110) battery charger driver header. */ #ifndef __CROS_EC_ISL9241_H @@ -45,6 +45,7 @@ #define ISL9241_CONTROL0_INPUT_VTG_REGULATION BIT(2) #define ISL9241_CONTROL0_EN_VIN_VOUT_COMP BIT(5) #define ISL9241_CONTROL0_EN_CHARGE_PUMPS BIT(6) +#define RAA489110_CONTROL0_EN_FORCE_BUCK_MODE BIT(10) #define ISL9241_CONTROL0_EN_BYPASS_GATE BIT(11) #define ISL9241_CONTROL0_NGATE_OFF BIT(12) @@ -105,7 +106,11 @@ #define ISL9241_REG_OTG_VOLTAGE 0x49 #define ISL9241_REG_OTG_CURRENT 0x4A +#ifdef CONFIG_CHARGER_RAA489110 +#define ISL9241_MV_TO_ACOK_REFERENCE(mv) (((mv) / 144) << 6) +#else /* CONFIG_CHARGER_ISL9241 */ #define ISL9241_MV_TO_ACOK_REFERENCE(mv) (((mv) / 96) << 6) +#endif /* VIN Voltage (ADP Min Voltage) (default 4.096V) */ #define ISL9241_REG_VIN_VOLTAGE 0x4B @@ -129,6 +134,7 @@ #define ISL9241_INFORMATION2_ACOK_PIN BIT(14) #define ISL9241_REG_CONTROL4 0x4E +/* ISL9241 only */ #define ISL9241_CONTROL4_FORCE_BUCK_MODE BIT(10) /* 11: Rsense (Rs1:Rs2) ratio for PSYS (0 - 2:1, 1 - 1:1) */ #define ISL9241_CONTROL4_PSYS_RSENSE_RATIO BIT(11) @@ -153,7 +159,11 @@ #define ISL9241_REG_DEVICE_ID 0xFF #define ISL9241_VIN_ADC_BIT_OFFSET 6 +#ifdef CONFIG_CHARGER_RAA489110 +#define ISL9241_VIN_ADC_STEP_MV 144 +#else /* CONFIG_CHARGER_ISL9241 */ #define ISL9241_VIN_ADC_STEP_MV 96 +#endif #define ISL9241_ADC_POLLING_TIME_US 400 diff --git a/include/config.h b/include/config.h index 96c79a2d93..b0a809af7f 100644 --- a/include/config.h +++ b/include/config.h @@ -950,6 +950,7 @@ #undef CONFIG_CHARGER_ISL9241 #undef CONFIG_CHARGER_MT6370 #undef CONFIG_CHARGER_RAA489000 +#undef CONFIG_CHARGER_RAA489110 #undef CONFIG_CHARGER_RT9466 #undef CONFIG_CHARGER_RT9467 #undef CONFIG_CHARGER_RT9490 @@ -6308,10 +6309,11 @@ * Define CONFIG_USB_PD_VBUS_MEASURE_CHARGER if the charger on the board * supports VBUS measurement. */ -#if defined(CONFIG_CHARGER_BD9995X) || defined(CONFIG_CHARGER_RT9466) || \ - defined(CONFIG_CHARGER_RT9467) || defined(CONFIG_CHARGER_RT9490) || \ - defined(CONFIG_CHARGER_MT6370) || defined(CONFIG_CHARGER_BQ25710) || \ - defined(CONFIG_CHARGER_BQ25720) || defined(CONFIG_CHARGER_ISL9241) +#if defined(CONFIG_CHARGER_BD9995X) || defined(CONFIG_CHARGER_RT9466) || \ + defined(CONFIG_CHARGER_RT9467) || defined(CONFIG_CHARGER_RT9490) || \ + defined(CONFIG_CHARGER_MT6370) || defined(CONFIG_CHARGER_BQ25710) || \ + defined(CONFIG_CHARGER_BQ25720) || defined(CONFIG_CHARGER_ISL9241) || \ + defined(CONFIG_CHARGER_RAA489110) #define CONFIG_USB_PD_VBUS_MEASURE_CHARGER #ifdef CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT @@ -6353,7 +6355,8 @@ #if defined(CONFIG_CHARGER_ISL9237) || defined(CONFIG_CHARGER_ISL9238) || \ defined(CONFIG_CHARGER_ISL9238C) || defined(CONFIG_CHARGER_ISL9241) || \ defined(CONFIG_CHARGER_RAA489000) || defined(CONFIG_CHARGER_SM5803) || \ - defined(CONFIG_CHARGER_BQ25710) || defined(CONFIG_CHARGER_BQ25720) + defined(CONFIG_CHARGER_BQ25710) || defined(CONFIG_CHARGER_BQ25720) || \ + defined(CONFIG_CHARGER_RAA489110) #define CONFIG_CHARGER_NARROW_VDC #endif diff --git a/include/driver/charger/isl9241_public.h b/include/driver/charger/isl9241_public.h index be586f39c3..cccce15bd7 100644 --- a/include/driver/charger/isl9241_public.h +++ b/include/driver/charger/isl9241_public.h @@ -33,7 +33,11 @@ int isl9241_set_ac_prochot(int chgnum, int ma); */ int isl9241_set_dc_prochot(int chgnum, int ma); +#ifdef CONFIG_CHARGER_RAA489110 +#define ISL9241_AC_PROCHOT_CURRENT_MIN 32 /* mA */ +#else /* CONFIG_CHARGER_ISL9241 */ #define ISL9241_AC_PROCHOT_CURRENT_MIN 128 /* mA */ +#endif #define ISL9241_AC_PROCHOT_CURRENT_MAX 6400 /* mA */ #define ISL9241_DC_PROCHOT_CURRENT_MIN 256 /* mA */ #define ISL9241_DC_PROCHOT_CURRENT_MAX 12800 /* mA */ diff --git a/zephyr/Kconfig.charger b/zephyr/Kconfig.charger index b340bd7da2..7c50f9fe31 100644 --- a/zephyr/Kconfig.charger +++ b/zephyr/Kconfig.charger @@ -137,6 +137,16 @@ config PLATFORM_EC_CHARGER_ISL9241 control. It supports an input voltage range of 3.9-23.4V and output of 3.9-18.3V. It provides an I2C interface for configuration. +config PLATFORM_EC_CHARGER_RAA489110 + bool "Use the RAA489110 charger" + depends on PLATFORM_EC_I2C + # Hardware based charge ramp is broken in the ISL9241 (b/169350714) + # Probably also broken for RAA489110. + select PLATFORM_EC_CHARGER_CHGRAMP_BROKEN + help + Enables a driver for the RAA489110 VCD Battery Charger. This is a + EPR capable version of ISL9241. + if PLATFORM_EC_CHARGER_ISL9241 config PLATFORM_EC_ISL9241_SWITCHING_FREQ diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 567e42a715..0ea6bcd187 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -312,6 +312,11 @@ #define CONFIG_CHARGER_ISL9241 #endif +#undef CONFIG_CHARGER_RAA489110 +#ifdef CONFIG_PLATFORM_EC_CHARGER_RAA489110 +#define CONFIG_CHARGER_RAA489110 +#endif + #undef CONFIG_OCPC #ifdef CONFIG_PLATFORM_EC_OCPC #define CONFIG_OCPC -- cgit v1.2.1 From d1a831463f7f8aab5efb7b46c4e4ba508ee323ec Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Fri, 7 Apr 2023 15:28:13 -0700 Subject: Hades: Replace ISL9241 with RAA489110 RAA489110 is an EPR capable version of ISL9241. BUG=b:277280318 BRANCH=None TEST=make BOARD=hades Signed-off-by: Daisuke Nojiri Change-Id: Ie26fff93c56b472833a186fbd1c0d24e166d3710 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409987 Reviewed-by: Tarun Tuli --- board/hades/board.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/hades/board.h b/board/hades/board.h index 612507fb74..cb6463c86d 100644 --- a/board/hades/board.h +++ b/board/hades/board.h @@ -136,7 +136,7 @@ /* Charger defines */ #define CONFIG_CHARGER_BYPASS_MODE -#define CONFIG_CHARGER_ISL9241 +#define CONFIG_CHARGER_RAA489110 #define CONFIG_CHARGER_SENSE_RESISTOR 10 #define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 /* Round down 7700 max current to multiple of 128mA for ISL9241 AC prochot. */ -- cgit v1.2.1 From 57ed659cb9abdb659ee472cdd1c1f1069a3e2b6d Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Mon, 12 Dec 2022 17:27:50 -0800 Subject: USB-PD: Update EC_CMD_TYPEC_STATUS for EPR Currently, EC_CMD_TYPEC_STATUS can carry up to 7 PDOs. With EPR, the max number of PDOs is 11. This patch adds version 1 of the command with the new response struct which has 11 slots for source caps and sink caps. BRANCH=None BUG=b:257320026 TEST=Tested v0 on Vell. v1 will be tested when time comes. Signed-off-by: Daisuke Nojiri Change-Id: I694b5897de7faee8e492c7cdc196ff94dd9c8fb4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4294392 Reviewed-by: Keith Short --- common/usbc/usb_pd_host.c | 100 ++++++++++++++++++++++++++++++++-------------- include/ec_commands.h | 54 ++++++++++++++++++++++++- 2 files changed, 123 insertions(+), 31 deletions(-) diff --git a/common/usbc/usb_pd_host.c b/common/usbc/usb_pd_host.c index 5f57393bb2..06da8a711c 100644 --- a/common/usbc/usb_pd_host.c +++ b/common/usbc/usb_pd_host.c @@ -178,40 +178,67 @@ static enum ec_status hc_typec_control(struct host_cmd_handler_args *args) } DECLARE_HOST_COMMAND(EC_CMD_TYPEC_CONTROL, hc_typec_control, EC_VER_MASK(0)); +/* + * Validate ec_response_typec_status_v0's binary compatibility with + * ec_response_typec_status, which is being deprecated. + */ +BUILD_ASSERT(offsetof(struct ec_response_typec_status_v0, + typec_status.sop_prime_revision) == + offsetof(struct ec_response_typec_status, sop_prime_revision)); +BUILD_ASSERT(offsetof(struct ec_response_typec_status_v0, source_cap_pdos) == + offsetof(struct ec_response_typec_status, source_cap_pdos)); +BUILD_ASSERT(sizeof(struct ec_response_typec_status_v0) == + sizeof(struct ec_response_typec_status)); + +/* + * Validate ec_response_typec_status_v0's binary compatibility with + * ec_response_typec_status_v1 with respect to typec_status. + */ +BUILD_ASSERT(offsetof(struct ec_response_typec_status_v0, + typec_status.pd_enabled) == + offsetof(struct ec_response_typec_status_v1, + typec_status.pd_enabled)); +BUILD_ASSERT(offsetof(struct ec_response_typec_status_v0, + typec_status.sop_prime_revision) == + offsetof(struct ec_response_typec_status_v1, + typec_status.sop_prime_revision)); + static enum ec_status hc_typec_status(struct host_cmd_handler_args *args) { const struct ec_params_typec_status *p = args->params; - struct ec_response_typec_status *r = args->response; + struct ec_response_typec_status_v1 *r1 = args->response; + struct ec_response_typec_status_v0 *r0 = args->response; + struct cros_ec_typec_status *cs = &r1->typec_status; const char *tc_state_name; if (p->port >= board_get_usb_pd_port_count()) return EC_RES_INVALID_PARAM; - if (args->response_max < sizeof(*r)) - return EC_RES_RESPONSE_TOO_BIG; + args->response_size = args->version == 0 ? sizeof(*r0) : sizeof(*r1); - args->response_size = sizeof(*r); + if (args->response_max < args->response_size) + return EC_RES_RESPONSE_TOO_BIG; - r->pd_enabled = pd_comm_is_enabled(p->port); - r->dev_connected = pd_is_connected(p->port); - r->sop_connected = pd_capable(p->port); + cs->pd_enabled = pd_comm_is_enabled(p->port); + cs->dev_connected = pd_is_connected(p->port); + cs->sop_connected = pd_capable(p->port); - r->power_role = pd_get_power_role(p->port); - r->data_role = pd_get_data_role(p->port); - r->vconn_role = pd_get_vconn_state(p->port) ? PD_ROLE_VCONN_SRC : - PD_ROLE_VCONN_OFF; - r->polarity = pd_get_polarity(p->port); - r->cc_state = pd_get_task_cc_state(p->port); - r->dp_pin = get_dp_pin_mode(p->port); - r->mux_state = usb_mux_get(p->port); + cs->power_role = pd_get_power_role(p->port); + cs->data_role = pd_get_data_role(p->port); + cs->vconn_role = pd_get_vconn_state(p->port) ? PD_ROLE_VCONN_SRC : + PD_ROLE_VCONN_OFF; + cs->polarity = pd_get_polarity(p->port); + cs->cc_state = pd_get_task_cc_state(p->port); + cs->dp_pin = get_dp_pin_mode(p->port); + cs->mux_state = usb_mux_get(p->port); tc_state_name = pd_get_task_state_name(p->port); - strzcpy(r->tc_state, tc_state_name, sizeof(r->tc_state)); + strzcpy(cs->tc_state, tc_state_name, sizeof(cs->tc_state)); - r->events = pd_get_events(p->port); + cs->events = pd_get_events(p->port); if (pd_get_partner_rmdo(p->port).major_rev != 0) { - r->sop_revision = + cs->sop_revision = PD_STATUS_RMDO_REV_SET_MAJOR( pd_get_partner_rmdo(p->port).major_rev) | PD_STATUS_RMDO_REV_SET_MINOR( @@ -220,28 +247,41 @@ static enum ec_status hc_typec_status(struct host_cmd_handler_args *args) pd_get_partner_rmdo(p->port).major_ver) | PD_STATUS_RMDO_VER_SET_MINOR( pd_get_partner_rmdo(p->port).minor_ver); - } else if (r->sop_connected) { - r->sop_revision = PD_STATUS_REV_SET_MAJOR( + } else if (cs->sop_connected) { + cs->sop_revision = PD_STATUS_REV_SET_MAJOR( pd_get_rev(p->port, TCPCI_MSG_SOP)); } else { - r->sop_revision = 0; + cs->sop_revision = 0; } - r->sop_prime_revision = + cs->sop_prime_revision = pd_get_identity_discovery(p->port, TCPCI_MSG_SOP_PRIME) == PD_DISC_COMPLETE ? PD_STATUS_REV_SET_MAJOR( pd_get_rev(p->port, TCPCI_MSG_SOP_PRIME)) : 0; - r->source_cap_count = pd_get_src_cap_cnt(p->port); - memcpy(r->source_cap_pdos, pd_get_src_caps(p->port), - r->source_cap_count * sizeof(uint32_t)); - - r->sink_cap_count = pd_get_snk_cap_cnt(p->port); - memcpy(r->sink_cap_pdos, pd_get_snk_caps(p->port), - r->sink_cap_count * sizeof(uint32_t)); + if (args->version == 0) { + cs->source_cap_count = MIN(pd_get_src_cap_cnt(p->port), + ARRAY_SIZE(r0->source_cap_pdos)); + memcpy(r0->source_cap_pdos, pd_get_src_caps(p->port), + cs->source_cap_count * sizeof(uint32_t)); + cs->sink_cap_count = MIN(pd_get_snk_cap_cnt(p->port), + ARRAY_SIZE(r0->sink_cap_pdos)); + memcpy(r0->sink_cap_pdos, pd_get_snk_caps(p->port), + cs->sink_cap_count * sizeof(uint32_t)); + } else { + cs->source_cap_count = MIN(pd_get_src_cap_cnt(p->port), + ARRAY_SIZE(r1->source_cap_pdos)); + memcpy(r1->source_cap_pdos, pd_get_src_caps(p->port), + cs->source_cap_count * sizeof(uint32_t)); + cs->sink_cap_count = MIN(pd_get_snk_cap_cnt(p->port), + ARRAY_SIZE(r1->sink_cap_pdos)); + memcpy(r1->sink_cap_pdos, pd_get_snk_caps(p->port), + cs->sink_cap_count * sizeof(uint32_t)); + } return EC_RES_SUCCESS; } -DECLARE_HOST_COMMAND(EC_CMD_TYPEC_STATUS, hc_typec_status, EC_VER_MASK(0)); +DECLARE_HOST_COMMAND(EC_CMD_TYPEC_STATUS, hc_typec_status, + EC_VER_MASK(0) | EC_VER_MASK(1)); diff --git a/include/ec_commands.h b/include/ec_commands.h index a74543bd93..ecf499eb84 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -7029,7 +7029,12 @@ struct ec_params_typec_status { uint8_t port; } __ec_align1; -struct ec_response_typec_status { +/* + * ec_response_typec_status is deprecated. Use ec_response_typec_status_v1. + * If you need to support old ECs who speak only v0, use + * ec_response_typec_status_v0 instead. They're binary-compatible. + */ +struct ec_response_typec_status /* DEPRECATED */ { uint8_t pd_enabled; /* PD communication enabled - bool */ uint8_t dev_connected; /* Device connected - bool */ uint8_t sop_connected; /* Device is SOP PD capable - bool */ @@ -7068,6 +7073,53 @@ struct ec_response_typec_status { uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ } __ec_align1; +struct cros_ec_typec_status { + uint8_t pd_enabled; /* PD communication enabled - bool */ + uint8_t dev_connected; /* Device connected - bool */ + uint8_t sop_connected; /* Device is SOP PD capable - bool */ + uint8_t source_cap_count; /* Number of Source Cap PDOs */ + + uint8_t power_role; /* enum pd_power_role */ + uint8_t data_role; /* enum pd_data_role */ + uint8_t vconn_role; /* enum pd_vconn_role */ + uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ + + uint8_t polarity; /* enum tcpc_cc_polarity */ + uint8_t cc_state; /* enum pd_cc_states */ + uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ + uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ + + char tc_state[32]; /* TC state name */ + + uint32_t events; /* PD_STATUS_EVENT bitmask */ + + /* + * BCD PD revisions for partners + * + * The format has the PD major revision in the upper nibble, and the PD + * minor revision in the next nibble. The following two nibbles hold the + * major and minor specification version. If a partner does not support + * the Revision message, only the major revision will be given. + * ex. PD Revision 3.2 Version 1.9 would map to 0x3219 + * + * PD revision/version will be 0 if no PD device is connected. + */ + uint16_t sop_revision; + uint16_t sop_prime_revision; +} __ec_align1; + +struct ec_response_typec_status_v0 { + struct cros_ec_typec_status typec_status; + uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ + uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ +} __ec_align1; + +struct ec_response_typec_status_v1 { + struct cros_ec_typec_status typec_status; + uint32_t source_cap_pdos[11]; /* Max 11 PDOs can be present */ + uint32_t sink_cap_pdos[11]; /* Max 11 PDOs can be present */ +} __ec_align1; + /** * Get the number of peripheral charge ports */ -- cgit v1.2.1 From 0db21802fa4aed6f753c4cae029d88cec4fcbffc Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Fri, 7 Apr 2023 16:34:49 -0700 Subject: Hades: Swap GPU_ACOFF and BJ_ADP_PRESENT This CL swaps GPU_ACOFF and BJ_ADP_PRESENT to reflect the latest schematics. BUG=b:272815831 BRANCH=None TEST=make BOARD=hades Signed-off-by: Daisuke Nojiri Change-Id: Ic5194a252daaf25f438a96ebcec808a351ad1d3a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409991 Commit-Queue: Tarun Tuli Reviewed-by: Tarun Tuli --- board/hades/gpio.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/hades/gpio.inc b/board/hades/gpio.inc index c35ecebbdf..d2b10fce5d 100644 --- a/board/hades/gpio.inc +++ b/board/hades/gpio.inc @@ -26,7 +26,7 @@ GPIO_INT(PG_PP3300_S5_OD, PIN(B, 4), GPIO_INT_BOTH | GPIO_PULL_UP GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) GPIO_INT(USB_C2_TCPC_INT_ODL, PIN(A, 7), GPIO_INT_FALLING, tcpc_alert_event) GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(BJ_ADP_PRESENT_ODL, PIN(5, 6), GPIO_INT_BOTH | GPIO_PULL_UP, bj_present_interrupt) +GPIO_INT(BJ_ADP_PRESENT_ODL, PIN(9, 5), GPIO_INT_BOTH | GPIO_PULL_UP, bj_present_interrupt) GPIO_INT(GPU_OVERT_ODL, PIN(5, 0), GPIO_INT_BOTH, gpu_overt_interrupt) /* USED GPIOs: */ @@ -69,7 +69,7 @@ GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) GPIO(EN_USB_A_LOW_POWER, PIN(9, 3), GPIO_OUT_LOW) GPIO(PG_PP3300_S5_EC_SEQ_OD, PIN(B, 5), GPIO_OUT_LOW) GPIO(USB_C2_FRS_EN, PIN(D, 4), GPIO_OUT_LOW) -GPIO(NVIDIA_GPU_ACOFF_ODL, PIN(9, 5), GPIO_ODR_HIGH) +GPIO(NVIDIA_GPU_ACOFF_ODL, PIN(5, 6), GPIO_ODR_HIGH) GPIO(LED_2_L, PIN(C, 3), GPIO_OUT_LOW) GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_LOW) -- cgit v1.2.1 From 21ca2ee8b0532847cc9e1975a5154608693f3b20 Mon Sep 17 00:00:00 2001 From: David Huang Date: Tue, 28 Mar 2023 08:49:04 +0800 Subject: constitution: Modify fan frequency Modify fan freq to 25kHz and remove PWM_CONFIG_DSLEEP. BUG=b:277842788 BRANCH=none TEST=Check fan work success. Change-Id: I3b9631b1b3fe9b1d0dffc8ca83be64ed54ffebc4 Signed-off-by: David Huang Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4413768 Reviewed-by: Boris Mittelberg --- board/constitution/pwm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/constitution/pwm.c b/board/constitution/pwm.c index c242714d65..6558587bf9 100644 --- a/board/constitution/pwm.c +++ b/board/constitution/pwm.c @@ -14,8 +14,8 @@ const struct pwm_t pwm_channels[] = { .flags = PWM_CONFIG_DSLEEP, .freq = 2000 }, [PWM_CH_FAN] = { .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_DSLEEP, - .freq = 1000 }, + .flags = PWM_CONFIG_OPEN_DRAIN, + .freq = 25000 }, [PWM_CH_LED_RED] = { .channel = 2, .flags = PWM_CONFIG_DSLEEP, .freq = 2000 }, -- cgit v1.2.1 From d18304f13839491f818e6b7293467d514d94389d Mon Sep 17 00:00:00 2001 From: Siyu Qin Date: Wed, 12 Apr 2023 17:53:13 +0800 Subject: voltorb: remove debug options and features for FW QUAL Remove debug options and features for FW QUAL for voltorb. BUG=b:277391808 BRANCH=corsola TEST=zmake build voltorb Change-Id: I803180340c391a8cf56d9008b5b447c5eced4d44 Signed-off-by: Siyu Qin Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4416484 Reviewed-by: Knox Chiou Reviewed-by: Mike Lee Reviewed-by: Chen-Tsung Hsieh Reviewed-by: Eric Yilun Lin Commit-Queue: Chen-Tsung Hsieh --- zephyr/program/corsola/voltorb/project.conf | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/zephyr/program/corsola/voltorb/project.conf b/zephyr/program/corsola/voltorb/project.conf index 53e619098a..3cb4f46e06 100644 --- a/zephyr/program/corsola/voltorb/project.conf +++ b/zephyr/program/corsola/voltorb/project.conf @@ -41,3 +41,10 @@ CONFIG_PLATFORM_EC_EXTPOWER_DEBOUNCE_MS=800 # Battery config CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV=15000 + +# Remove debug options and features for FW QUAL +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=n +CONFIG_PLATFORM_EC_CMD_POWERINDEBUG=n +CONFIG_LOG=n +CONFIG_LOG_MODE_MINIMAL=n +CONFIG_SHELL_MINIMAL=y -- cgit v1.2.1 From fd4151fe81b041c480db9c265fb24e84aa6ef4dc Mon Sep 17 00:00:00 2001 From: Ting Shen Date: Wed, 12 Apr 2023 16:35:24 +0800 Subject: zephyr: Kconfig: add FLASH_PSTATE_BANK / FLASH_PSTATE_LOCKED BUG=b:277557274 TEST=1. `zmake compare-builds --all` This change should not affect existing boards 2. write protect works on roach BRANCH=none Change-Id: I697215c1990c7d12cd81e9b50b940485934da1bb Signed-off-by: Ting Shen Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4415812 Reviewed-by: Eric Yilun Lin Commit-Queue: Ting Shen Tested-by: Ting Shen --- util/config_allowed.txt | 2 -- zephyr/Kconfig.flash | 24 ++++++++++++++++++++++++ zephyr/shim/include/config_chip.h | 10 ++++++++++ 3 files changed, 34 insertions(+), 2 deletions(-) diff --git a/util/config_allowed.txt b/util/config_allowed.txt index d952250e8f..0a5d140b80 100644 --- a/util/config_allowed.txt +++ b/util/config_allowed.txt @@ -393,8 +393,6 @@ CONFIG_FLASH_MULTIPLE_REGION CONFIG_FLASH_PHYSICAL CONFIG_FLASH_PROTECT_NEXT_BOOT CONFIG_FLASH_PROTECT_RW -CONFIG_FLASH_PSTATE_BANK -CONFIG_FLASH_PSTATE_LOCKED CONFIG_FLASH_READOUT_PROTECTION CONFIG_FLASH_READOUT_PROTECTION_AS_PSTATE CONFIG_FLASH_REGION_TYPE_COUNT diff --git a/zephyr/Kconfig.flash b/zephyr/Kconfig.flash index 8f3c77499a..44c4b0617f 100644 --- a/zephyr/Kconfig.flash +++ b/zephyr/Kconfig.flash @@ -120,6 +120,30 @@ config PLATFORM_EC_FLASH_PSTATE defined, write protect state is maintained solely by the physical flash driver. +if PLATFORM_EC_FLASH_PSTATE + +config PLATFORM_EC_FLASH_PSTATE_BANK + bool "Store the pstate data in its own dedicated bank of flash" + default y + help + Store the pstate data in its own dedicated bank of flash. This allows + disabling the protect-RO-at-boot flag without rewriting the RO + firmware, but costs a bank of flash. + + If this is not defined, the pstate data is stored inside the RO + firmware image itself. This is more space-efficient, but the only way + to clear the flag once it's set is to rewrite the RO firmware (after + removing the WP screw, of course). + +config PLATFORM_EC_FLASH_PSTATE_LOCKED + bool "Lock the pstate by default" + depends on !PLATFORM_EC_FLASH_PSTATE_BANK + help + Lock the pstate by default, Currently only supported when + PLATFORM_EC_FLASH_PSTATE_BANK is not defined. + +endif # PLATFORM_EC_FLASH_PSTATE + config PLATFORM_EC_USE_ZEPHYR_FLASH_PAGE_LAYOUT bool "Use Zephyr flash page layout API to get sector information" default y if SOC_FAMILY_STM32 diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 0ea6bcd187..2659ac66ce 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -585,6 +585,8 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #undef CONFIG_INTERNAL_STORAGE #undef CONFIG_MAPPED_STORAGE #undef CONFIG_FLASH_PSTATE +#undef CONFIG_FLASH_PSTATE_BANK +#undef CONFIG_FLASH_PSTATE_LOCKED #ifdef CONFIG_PLATFORM_EC_FLASH_CROS #ifdef CONFIG_BOARD_NATIVE_POSIX @@ -620,6 +622,14 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_FLASH_PSTATE #endif +#ifdef CONFIG_PLATFORM_EC_FLASH_PSTATE_BANK +#define CONFIG_FLASH_PSTATE_BANK +#endif + +#ifdef CONFIG_PLATFORM_EC_FLASH_PSTATE_LOCKED +#define CONFIG_FLASH_PSTATE_LOCKED +#endif + #undef CONFIG_CMD_FLASH #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH #define CONFIG_CMD_FLASH -- cgit v1.2.1