From 0ab1da604a87341eda9495d33b3a9fb877b1a99d Mon Sep 17 00:00:00 2001
From: Denis Brockus <dbrockus@google.com>
Date: Fri, 23 Apr 2021 10:11:59 -0600
Subject: zephyr: it8xxx.dtsi: Add include/cros/ite/it8xxx2.dtsi

BUG=b:185202623
BRANCH=none
TEST=none

Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Id9933dd5027d9059af3aa030f678421ee232ba9f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848432
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
---
 zephyr/include/cros/ite/it8xxx2.dtsi | 65 ++++++++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 zephyr/include/cros/ite/it8xxx2.dtsi

diff --git a/zephyr/include/cros/ite/it8xxx2.dtsi b/zephyr/include/cros/ite/it8xxx2.dtsi
new file mode 100644
index 0000000000..9072b36424
--- /dev/null
+++ b/zephyr/include/cros/ite/it8xxx2.dtsi
@@ -0,0 +1,65 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	named-bbram-regions {
+		compatible = "named-bbram-regions";
+
+		scratchpad {
+			offset = <0x08>;
+			size = <0x04>;
+		};
+		saved-reset-flags {
+			offset = <0x00>;
+			size = <0x04>;
+		};
+		wake {
+			offset = <0x08>;
+			size = <0x04>;
+		};
+		pd0 {
+			offset = <0x04>;
+			size = <0x01>;
+		};
+		pd1 {
+			offset = <0x05>;
+			size = <0x01>;
+		};
+		try_slot {
+			offset = <0x0e>;
+			size = <0x01>;
+		};
+		pd2 {
+			offset = <0x06>;
+			size = <0x01>;
+		};
+	};
+
+	soc {
+		bbram: bb-ram@f02200 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "ite,it8xxx2-cros-bbram";
+			status = "okay";
+			reg = <0x00f02200 0xbf>;
+			reg-names = "memory";
+			label = "BBRAM";
+		};
+
+		shi: shi@f03a00 {
+			compatible = "ite,it8xxx2-cros-shi";
+			reg = <0x00f03a00 0x30>;
+			label = "SHI";
+			interrupts = <171 0>;
+			interrupt-parent = <&intc>;
+		};
+
+		fiu0: flash-controller@80000000 {
+			compatible = "ite,it8xxx2-cros-flash";
+			reg = <0x80000000 0x80000>;
+			label = "FLASH";
+		};
+	};
+};
-- 
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