From 0b8f5a3a6ca9722e4c7bc931577b08616e31d72a Mon Sep 17 00:00:00 2001 From: Randall Spangler Date: Mon, 10 Jun 2013 11:04:01 -0700 Subject: Define watchdog_reload() to nothing if not CONFIG_WATCHDOG Currently, we need to have #ifdefs everywhere watchdog_reload() is called. With this fix we don't. Also don't bother including unused hardware timer watchdog code if the watchdog isn't defined. No change when CONFIG_WATCHDOG is defined (which it is for all normal builds). BUG=chrome-os-partner:20056 BRANCH=none TEST=build all platforms with CONFIG_WATCHDOG commented out in config.h Change-Id: Id3ce33af1a497eda127a4892e13651d9d2534d92 Signed-off-by: Randall Spangler Reviewed-on: https://gerrit.chromium.org/gerrit/58094 Reviewed-by: Simon Glass --- chip/lm4/flash.c | 16 ++++++++-------- chip/stm32/flash-stm32f100.c | 8 +++----- chip/stm32/flash-stm32l15x.c | 4 ---- chip/stm32/hwtimer.c | 5 +++-- include/watchdog.h | 4 ++++ 5 files changed, 18 insertions(+), 19 deletions(-) diff --git a/chip/lm4/flash.c b/chip/lm4/flash.c index c7781c88f1..d2d670c8ef 100644 --- a/chip/lm4/flash.c +++ b/chip/lm4/flash.c @@ -63,11 +63,11 @@ static int write_buffer(void) /* Start write operation at page boundary */ LM4_FLASH_FMC2 = 0xa4420001; -#ifdef CONFIG_WATCHDOG - /* Reload the watchdog timer, so that writing a large amount of flash - * doesn't cause a watchdog reset. */ + /* + * Reload the watchdog timer, so that writing a large amount of flash + * doesn't cause a watchdog reset. + */ watchdog_reload(); -#endif /* Wait for write to complete */ for (t = 0; LM4_FLASH_FMC2 & 0x01; t += 10) { @@ -138,12 +138,12 @@ int flash_physical_erase(int offset, int size) LM4_FLASH_FMA = offset; -#ifdef CONFIG_WATCHDOG - /* Reload the watchdog timer, so that erasing many flash pages + /* + * Reload the watchdog timer, so that erasing many flash pages * doesn't cause a watchdog reset. May not need this now that - * we're using msleep() below. */ + * we're using msleep() below. + */ watchdog_reload(); -#endif /* Start erase */ LM4_FLASH_FMC = 0xa4420002; diff --git a/chip/stm32/flash-stm32f100.c b/chip/stm32/flash-stm32f100.c index ff6e01e8e0..c0f5ae4cd3 100644 --- a/chip/stm32/flash-stm32f100.c +++ b/chip/stm32/flash-stm32f100.c @@ -234,12 +234,12 @@ int flash_physical_write(int offset, int size, const char *data) STM32_FLASH_CR |= PG; for ( ; size > 0; size -= sizeof(uint16_t)) { -#ifdef CONFIG_WATCHDOG - /* Reload the watchdog timer to avoid watchdog reset when doing + /* + * Reload the watchdog timer to avoid watchdog reset when doing * long writing with interrupt disabled. */ watchdog_reload(); -#endif + /* wait to be ready */ for (i = 0; (STM32_FLASH_SR & 1) && (i < FLASH_TIMEOUT_LOOP) ; i++) @@ -303,13 +303,11 @@ int flash_physical_erase(int offset, int size) /* set STRT bit : start erase */ STM32_FLASH_CR |= STRT; -#ifdef CONFIG_WATCHDOG /* * Reload the watchdog timer to avoid watchdog reset during a * long erase operation. */ watchdog_reload(); -#endif deadline.val = get_time().val + FLASH_TIMEOUT_US; /* Wait for erase to complete */ diff --git a/chip/stm32/flash-stm32l15x.c b/chip/stm32/flash-stm32l15x.c index 51453d4198..a5394497d1 100644 --- a/chip/stm32/flash-stm32l15x.c +++ b/chip/stm32/flash-stm32l15x.c @@ -192,13 +192,11 @@ int flash_physical_write(int offset, int size, const char *data) word_mode = 1; while (size > 0) { -#ifdef CONFIG_WATCHDOG /* * Reload the watchdog timer to avoid watchdog reset when doing * long writing with interrupt disabled. */ watchdog_reload(); -#endif if (word_mode) { /* Word write */ @@ -269,13 +267,11 @@ int flash_physical_erase(int offset, int size) /* Start erase */ *address = 0x00000000; -#ifdef CONFIG_WATCHDOG /* * Reload the watchdog timer to avoid watchdog reset during * multi-page erase operations. */ watchdog_reload(); -#endif deadline.val = get_time().val + FLASH_TIMEOUT_US; /* Wait for erase to complete */ diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c index 691ee23d33..0231bab5fb 100644 --- a/chip/stm32/hwtimer.c +++ b/chip/stm32/hwtimer.c @@ -189,7 +189,7 @@ int __hw_clock_source_init(uint32_t start_t) * doesn't appear to exist in either variant, and TIM9 cannot be triggered as a * slave from TIM4. We could perhaps use TIM9 as our fast counter on STM32L. */ -#ifndef CHIP_VARIANT_stm32l15x +#if defined(CONFIG_WATCHDOG) && !defined(CHIP_VARIANT_stm32l15x) void watchdog_check(uint32_t excep_lr, uint32_t excep_sp) { @@ -271,4 +271,5 @@ void hwtimer_reset_watchdog(void) timer->cnt = timer->arr; } -#endif + +#endif /* defined(CONFIG_WATCHDOG) && !defined(CHIP_VARIANT_stm32l15x) */ diff --git a/include/watchdog.h b/include/watchdog.h index ca88094e6a..02c603ca40 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -32,6 +32,10 @@ int watchdog_init(void); void watchdog_trace(uint32_t excep_lr, uint32_t excep_sp); /* Reload the watchdog counter */ +#ifdef CONFIG_WATCHDOG void watchdog_reload(void); +#else +static inline void watchdog_reload(void) { } +#endif #endif /* __CROS_EC_WATCHDOG_H */ -- cgit v1.2.1