From 8407b1602e28a2e1eed233b972cca8499eba430d Mon Sep 17 00:00:00 2001 From: Daniel Coggin Date: Mon, 11 Apr 2022 15:07:42 -0700 Subject: brask: Minimum power on requirement Set CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON to 45w and correct two typos. BUG=b:197475210 BRANCH=None TEST=make BOARD=brask, flashed, 18w USB-C PD flashes red LED Change-Id: Iec17ffc4276daa4cbe8623119a99b7e44923acd6 Signed-off-by: Daniel Coggin Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3582371 Reviewed-by: Zhuohao Lee --- baseboard/brask/baseboard.h | 7 +------ board/brask/board.c | 4 ++-- 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h index 66a10c7197..dd7be91500 100644 --- a/baseboard/brask/baseboard.h +++ b/baseboard/brask/baseboard.h @@ -59,12 +59,7 @@ /* Support Barrel Jack */ #undef CONFIG_DEDICATED_CHARGE_PORT_COUNT #define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 -/* - * TODO(b/197475210): Don't allow the system to boot to S0 when - * the power is lower than CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON - * since there is no battery. - */ -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 30000 +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 45000 /* Chipset config */ #define CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540 diff --git a/board/brask/board.c b/board/brask/board.c index 022ce8f43c..304fe58ce6 100644 --- a/board/brask/board.c +++ b/board/brask/board.c @@ -158,11 +158,11 @@ static void update_5v_usage(void) base_5v_power_s5 += PWR_S5_FRONT_HIGH - PWR_S5_FRONT_LOW; if (!gpio_get_level(GPIO_USB_A2_OC_ODL)) { - front_ports++; + rear_ports++; base_5v_power_s5 += PWR_S5_REAR_LOW; } if (!gpio_get_level(GPIO_USB_A3_OC_ODL)) { - front_ports++; + rear_ports++; base_5v_power_s5 += PWR_S5_REAR_LOW; } /* -- cgit v1.2.1 From 13dcf77e8380871a95dd6ce4352748121088bfdb Mon Sep 17 00:00:00 2001 From: Andrew McRae Date: Wed, 13 Apr 2022 13:02:27 +1000 Subject: ap_pwrseq: Initialise power signal mask at start. Initialise the power signals mask at start-up. BUG=b:229031487 TEST=zmake build nivviks BRANCH=none Signed-off-by: Andrew McRae Change-Id: Iee4d4bf23e7e496ef86b97a24429c4003ee225c6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3583908 Reviewed-by: Kangheui Won Reviewed-by: Li1 Feng --- zephyr/subsys/ap_pwrseq/power_signals.c | 68 ++++++++++++++-------- zephyr/subsys/ap_pwrseq/signal_adc.c | 4 ++ zephyr/subsys/ap_pwrseq/signal_gpio.c | 7 ++- zephyr/subsys/ap_pwrseq/signal_vw.c | 30 ++++++++-- .../x86_non_dsx_common_pwrseq_sm_handler.c | 4 ++ 5 files changed, 83 insertions(+), 30 deletions(-) diff --git a/zephyr/subsys/ap_pwrseq/power_signals.c b/zephyr/subsys/ap_pwrseq/power_signals.c index c463e8e82e..7df7b3ef00 100644 --- a/zephyr/subsys/ap_pwrseq/power_signals.c +++ b/zephyr/subsys/ap_pwrseq/power_signals.c @@ -86,16 +86,18 @@ DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_external, PWR_SIGNAL_POLLED) }; /* - * Bitmask of power signals updated via interrupt. + * Bitmasks of power signals. A previous copy is held so that + * logging of changes can occur if the signal is in the debug mask. */ -static atomic_t interrupt_power_signals; +static atomic_t power_signals, prev_power_signals; -static power_signal_mask_t output_signals; static power_signal_mask_t debug_signals; void power_set_debug(power_signal_mask_t debug) { debug_signals = debug; + /* Copy the current values */ + atomic_set(&prev_power_signals, atomic_get(&power_signals)); } power_signal_mask_t power_get_debug(void) @@ -103,12 +105,19 @@ power_signal_mask_t power_get_debug(void) return debug_signals; } -static inline void check_debug(power_signal_mask_t mask, - enum power_signal signal, - int value) +static inline void check_debug(enum power_signal signal) { - if (debug_signals & mask) { - LOG_INF("%s -> %d", power_signal_name(signal), value); + /* + * Only check for debug display if the logging level requires it. + */ + if ((CONFIG_AP_PWRSEQ_LOG_LEVEL >= LOG_LEVEL_INF) && + (debug_signals & POWER_SIGNAL_MASK(signal))) { + bool value = atomic_test_bit(&power_signals, signal); + + if (value != atomic_test_bit(&prev_power_signals, signal)) { + LOG_INF("%s -> %d", power_signal_name(signal), value); + atomic_set_bit_to(&prev_power_signals, signal, value); + } } } @@ -121,14 +130,13 @@ power_signal_mask_t power_get_signals(void) mask |= POWER_SIGNAL_MASK(polled_signals[i]); } } - return mask | output_signals | - atomic_get(&interrupt_power_signals); + return mask | atomic_get(&power_signals); } void power_signal_interrupt(enum power_signal signal, int value) { - atomic_set_bit_to(&interrupt_power_signals, signal, value); - check_debug(POWER_SIGNAL_MASK(signal), signal, value); + atomic_set_bit_to(&power_signals, signal, value); + check_debug(signal); } int power_wait_mask_signals_timeout(power_signal_mask_t mask, @@ -209,19 +217,11 @@ int power_signal_set(enum power_signal signal, int value) #endif } /* - * Output succeeded, update output mask. + * Output succeeded, update mask. */ if (ret == 0) { - power_signal_mask_t mask = POWER_SIGNAL_MASK(signal); - power_signal_mask_t old = output_signals; - - if (value) - output_signals |= mask; - else - output_signals &= ~mask; - if (old != output_signals) { - check_debug(mask, signal, value); - } + atomic_set_bit_to(&power_signals, signal, value); + check_debug(signal); } return ret; } @@ -295,4 +295,26 @@ void power_signal_init(void) if (IS_ENABLED(HAS_ADC_SIGNALS)) { power_signal_adc_init(); } + /* + * Initialise the mask with the current values. + * This includes the outputs as well. + */ + for (int i = 0; i < POWER_SIGNAL_COUNT; i++) { + if (power_signal_get(i) == 1) { + atomic_set_bit(&power_signals, i); + } + } + /* + * Some signals are polled (such as the board external signals), + * so clear these values from the initial state so they + * don't get OR'ed in later on. + */ + for (int i = 0; i < ARRAY_SIZE(polled_signals); i++) { + atomic_clear_bit(&power_signals, i); + } + /* + * Save the current state so that new changes can be + * checked against the debug mask. + */ + atomic_set(&prev_power_signals, atomic_get(&power_signals)); } diff --git a/zephyr/subsys/ap_pwrseq/signal_adc.c b/zephyr/subsys/ap_pwrseq/signal_adc.c index 9898c8e4bd..17038ba2ea 100644 --- a/zephyr/subsys/ap_pwrseq/signal_adc.c +++ b/zephyr/subsys/ap_pwrseq/signal_adc.c @@ -175,6 +175,10 @@ void power_signal_adc_init(void) /* Set high and low trigger callbacks */ sensor_trigger_set(config[i].dev_trig_high, &trig, high_cb[i]); sensor_trigger_set(config[i].dev_trig_low, &trig, low_cb[i]); + /* + * TODO: Get current value and initialise adc_state. + * + */ power_signal_adc_enable(i); } } diff --git a/zephyr/subsys/ap_pwrseq/signal_gpio.c b/zephyr/subsys/ap_pwrseq/signal_gpio.c index b4888f8cff..e28df96e6b 100644 --- a/zephyr/subsys/ap_pwrseq/signal_gpio.c +++ b/zephyr/subsys/ap_pwrseq/signal_gpio.c @@ -6,7 +6,7 @@ #include #include #include -#include "system.h" +#include "sysjump.h" #define MY_COMPAT intel_ap_pwrseq_gpio @@ -121,8 +121,11 @@ void power_signal_gpio_init(void) /* * If there has been a sysjump, do not set the output * to the deasserted state. + * We can't use system_jumped_late() since that is not + * initialised at this point. */ - gpio_flags_t out_flags = system_jumped_late() ? + struct jump_data *jdata = get_jump_data(); + gpio_flags_t out_flags = (jdata && jdata->magic == JUMP_DATA_MAGIC) ? GPIO_OUTPUT : GPIO_OUTPUT_INACTIVE; for (int i = 0; i < ARRAY_SIZE(gpio_config); i++) { diff --git a/zephyr/subsys/ap_pwrseq/signal_vw.c b/zephyr/subsys/ap_pwrseq/signal_vw.c index b0abe4fe13..2e0d6a7ae5 100644 --- a/zephyr/subsys/ap_pwrseq/signal_vw.c +++ b/zephyr/subsys/ap_pwrseq/signal_vw.c @@ -44,7 +44,7 @@ static bool signal_data[ARRAY_SIZE(vw_config)]; * notification is sent that the signals are ready. */ static uint8_t espi_mask; -static bool espi_not_valid; +static bool espi_valid; BUILD_ASSERT(ARRAY_SIZE(vw_config) <= 8); static void espi_handler(const struct device *dev, @@ -66,7 +66,7 @@ static void espi_handler(const struct device *dev, */ notify_espi_ready(false); espi_mask = 0; - espi_not_valid = true; + espi_valid = false; break; case ESPI_BUS_EVENT_VWIRE_RECEIVED: @@ -77,7 +77,7 @@ static void espi_handler(const struct device *dev, : !!event.evt_data; signal_data[i] = value; - if (espi_not_valid) { + if (!espi_valid) { espi_mask |= BIT(i); } power_signal_interrupt(vw_config[i].signal, @@ -88,9 +88,9 @@ static void espi_handler(const struct device *dev, * When all the signals have been updated, notify that * the ESPI signals are valid. */ - if (espi_not_valid && + if (!espi_valid && espi_mask == BIT_MASK(ARRAY_SIZE(vw_config))) { - espi_not_valid = false; + espi_valid = true; LOG_DBG("ESPI signals valid"); /* * TODO(b/222946923): Convert to generalised @@ -138,6 +138,26 @@ void power_signal_vw_init(void) ESPI_BUS_RESET | ESPI_BUS_EVENT_VWIRE_RECEIVED); espi_add_callback(espi_dev, &espi_cb); + /* + * Check whether the bus is ready, and if so, + * initialise the current values of the signals. + */ + if (espi_get_channel_status(espi_dev, ESPI_CHANNEL_VWIRE)) { + espi_valid = true; + + for (int i = 0; i < ARRAY_SIZE(vw_config); i++) { + uint8_t vw_value; + + if (espi_receive_vwire(espi_dev, + vw_config[i].espi_signal, + &vw_value) == 0) { + signal_data[i] = vw_config[i].invert + ? !vw_value + : !!vw_value; + } + } + notify_espi_ready(true); + } } #endif /* HAS_VW_SIGNALS */ diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c index 34c3d5df18..69069d0bf4 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c @@ -526,4 +526,8 @@ static int pwrseq_init(const struct device *dev) return 0; } +/* + * The initialisation must occur after system I/O initialisation that + * the signals depend upon, such as GPIO, ADC etc. + */ SYS_INIT(pwrseq_init, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY); -- cgit v1.2.1 From ae8296fafea54c049c73346200b4785de6a8e148 Mon Sep 17 00:00:00 2001 From: Li Feng Date: Wed, 13 Apr 2022 16:55:21 -0700 Subject: ap_pwrseq: S0ix: update function call. While CL:3563507 was merged, it didn't catch name changes made in CL:3583099. This patch uses the modified function names. power_signal_enable_interrupt --> power_signal_enable power_signal_disable_interrupt --> power_signal_disable BUG=b:216667527 b:203446865 b:225996183 BRANCH=None TEST=build nivviks and nereid with s0ix enabled Signed-off-by: Li Feng Change-Id: I3230ac822d7369e82c23d81d7e5a9087229945f0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3585890 Reviewed-by: Vijay P Hiremath Reviewed-by: Andrew McRae Commit-Queue: Andrew McRae --- zephyr/subsys/ap_pwrseq/power_host_sleep.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/zephyr/subsys/ap_pwrseq/power_host_sleep.c b/zephyr/subsys/ap_pwrseq/power_host_sleep.c index 13e6aba765..2e7df63c51 100644 --- a/zephyr/subsys/ap_pwrseq/power_host_sleep.c +++ b/zephyr/subsys/ap_pwrseq/power_host_sleep.c @@ -203,7 +203,7 @@ void ap_power_chipset_handle_host_sleep_event( * notification needs to be sent to listeners. */ ap_power_sleep_set_notify(AP_POWER_SLEEP_SUSPEND); - power_signal_enable_interrupt(PWR_SLP_S0); + power_signal_enable(PWR_SLP_S0); } else if (state == HOST_SLEEP_EVENT_S0IX_RESUME) { /* @@ -212,7 +212,7 @@ void ap_power_chipset_handle_host_sleep_event( */ ap_power_sleep_set_notify(AP_POWER_SLEEP_RESUME); power_s0ix_resume_restore_masks(); - power_signal_disable_interrupt(PWR_SLP_S0); + power_signal_disable(PWR_SLP_S0); /* * If the sleep signal timed out and never transitioned, then @@ -223,7 +223,7 @@ void ap_power_chipset_handle_host_sleep_event( power_update_wake_mask(); } else if (state == HOST_SLEEP_EVENT_DEFAULT_RESET) { - power_signal_disable_interrupt(PWR_SLP_S0); + power_signal_disable(PWR_SLP_S0); } #endif /* CONFIG_AP_PWRSEQ_S0IX */ } -- cgit v1.2.1 From 37d45dd56cbf7f0b9d54b2012eab7c218d4f19b1 Mon Sep 17 00:00:00 2001 From: Yu-An Chen Date: Mon, 11 Apr 2022 13:45:31 +0800 Subject: kano: Support 28w cpu fan table Add a new fw_config field to support different fan tables for two cpu sku. BUG=b:228775653 BRANCH=brya TEST=Thermal team verified thermal policy is expected. Signed-off-by: Yu-An Chen Change-Id: Ic01addaecd9f8ad80396b7f2d041654c18a12678 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3577507 Reviewed-by: David Wu Reviewed-by: YH Lin Reviewed-by: caveh jalali Commit-Queue: caveh jalali --- board/kano/fans.c | 6 +++--- board/kano/fw_config.c | 6 ++++++ board/kano/fw_config.h | 16 +++++++++++++++- board/kano/sensors.c | 41 ++++++++++++++++++++++++++++++++++++++++- 4 files changed, 64 insertions(+), 5 deletions(-) diff --git a/board/kano/fans.c b/board/kano/fans.c index de6557215c..b652ec90da 100644 --- a/board/kano/fans.c +++ b/board/kano/fans.c @@ -37,9 +37,9 @@ static const struct fan_conf fan_conf_0 = { * Set minimum at around 30% PWM. */ static const struct fan_rpm fan_rpm_0 = { - .rpm_min = 3000, - .rpm_start = 3000, - .rpm_max = 6200, + .rpm_min = 2400, + .rpm_start = 2400, + .rpm_max = 6000, }; const struct fan_t fans[FAN_CH_COUNT] = { diff --git a/board/kano/fw_config.c b/board/kano/fw_config.c index a13dadeb5d..e6e5ba28bb 100644 --- a/board/kano/fw_config.c +++ b/board/kano/fw_config.c @@ -20,6 +20,7 @@ BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t)); */ static const union kano_cbi_fw_config fw_config_defaults = { .kb_bl = KEYBOARD_BACKLIGHT_ENABLED, + .thermal_solution = THERMAL_SOLUTION_15W, }; /**************************************************************************** @@ -53,3 +54,8 @@ bool ec_cfg_has_kblight(void) { return (fw_config.kb_bl == KEYBOARD_BACKLIGHT_ENABLED); } + +enum ec_cfg_thermal_solution_type ec_cfg_thermal_solution(void) +{ + return fw_config.thermal_solution; +} diff --git a/board/kano/fw_config.h b/board/kano/fw_config.h index 8402b5568d..88573bdd33 100644 --- a/board/kano/fw_config.h +++ b/board/kano/fw_config.h @@ -19,12 +19,19 @@ enum ec_cfg_keyboard_backlight_type { KEYBOARD_BACKLIGHT_ENABLED = 1 }; +enum ec_cfg_thermal_solution_type { + THERMAL_SOLUTION_15W = 0, + THERMAL_SOLUTION_28W = 1 +}; + union kano_cbi_fw_config { struct { enum ec_cfg_keyboard_backlight_type kb_bl : 1; uint32_t audio : 3; uint32_t ufc : 2; - uint32_t reserved_1 : 26; + uint32_t stylus : 1; + enum ec_cfg_thermal_solution_type thermal_solution : 1; + uint32_t reserved_1 : 24; }; uint32_t raw_value; }; @@ -44,4 +51,11 @@ union kano_cbi_fw_config get_fw_config(void); */ bool ec_cfg_has_kblight(void); +/** + * Read the thermal solution config. + * + * @return thermal solution config. + */ +enum ec_cfg_thermal_solution_type ec_cfg_thermal_solution(void); + #endif /* __BOARD_KANO_FW_CONFIG_H_ */ diff --git a/board/kano/sensors.c b/board/kano/sensors.c index fd7d0f01ad..e3e2f9d920 100644 --- a/board/kano/sensors.c +++ b/board/kano/sensors.c @@ -12,6 +12,7 @@ #include "driver/accelgyro_icm426xx.h" #include "driver/accelgyro_icm_common.h" #include "driver/accel_kionix.h" +#include "fw_config.h" #include "gpio.h" #include "hooks.h" #include "motion_sense.h" @@ -354,11 +355,29 @@ __maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; .temp_host_release = { \ [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ }, \ - .temp_fan_off = C_TO_K(25), \ + .temp_fan_off = C_TO_K(37), \ .temp_fan_max = C_TO_K(90), \ } __maybe_unused static const struct ec_thermal_config thermal_fan = THERMAL_FAN; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_FAN_28W \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + }, \ + .temp_fan_off = C_TO_K(37), \ + .temp_fan_max = C_TO_K(62), \ + } +__maybe_unused static const struct ec_thermal_config thermal_fan_28w = + THERMAL_FAN_28W; + /* * Set value to zero to disable charger thermal control. */ @@ -387,3 +406,23 @@ struct ec_thermal_config thermal_params[] = { [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); + +static void setup_thermal(void) +{ + unsigned int table = ec_cfg_thermal_solution(); + /* Configure Fan */ + switch (table) { + /* 28w CPU fan table */ + case THERMAL_SOLUTION_28W: + cprints(CC_THERMAL, "Fan table set to 28w CPU scheme"); + thermal_params[TEMP_SENSOR_2_FAN] = thermal_fan_28w; + break; + /* Default fan table */ + case THERMAL_SOLUTION_15W: + default: + cprints(CC_THERMAL, "Fan table set to 15w CPU scheme"); + break; + } +} +/* setup_thermal should be called before HOOK_INIT/HOOK_PRIO_DEFAULT */ +DECLARE_HOOK(HOOK_INIT, setup_thermal, HOOK_PRIO_DEFAULT - 1); -- cgit v1.2.1 From 88a19dd1b569d6c96db2bc0214eeb2f86c86f5de Mon Sep 17 00:00:00 2001 From: Devin Lu Date: Mon, 28 Mar 2022 11:55:20 +0800 Subject: anahera: Tune USBA retimer EQ revision 2 Tune USBA retimer EQ for USB A0, USB A1 port. BUG=b:203837657 BRANCH=none TEST=i2cxfer to read setting is correct. Signed-off-by: Devin Lu Change-Id: Ib29f17b8b54a9ea8a4915a5c889b589bf7e62c53 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3555329 Reviewed-by: caveh jalali --- board/anahera/usbc_config.c | 49 +++++++++++++++++++++++++++++++++++++++------ driver/retimer/ps8811.h | 19 ++++++++++++++++++ 2 files changed, 62 insertions(+), 6 deletions(-) diff --git a/board/anahera/usbc_config.c b/board/anahera/usbc_config.c index 247cc50dd3..2c0cd85a67 100644 --- a/board/anahera/usbc_config.c +++ b/board/anahera/usbc_config.c @@ -317,11 +317,11 @@ const struct usb_mux usba_ps8811[] = { }; BUILD_ASSERT(ARRAY_SIZE(usba_ps8811) == USBA_PORT_COUNT); -const static struct ps8811_reg_val equalizer_table[] = { +const static struct ps8811_reg_val equalizer_wwan_table[] = { { /* Set channel A EQ setting */ .reg = PS8811_REG1_USB_AEQ_LEVEL, - .val = (PS8811_AEQ_I2C_LEVEL_UP_10P5DB << + .val = (PS8811_AEQ_I2C_LEVEL_UP_13DB << PS8811_AEQ_I2C_LEVEL_UP_SHIFT) | (PS8811_AEQ_PIN_LEVEL_UP_18DB << PS8811_AEQ_PIN_LEVEL_UP_SHIFT), @@ -351,7 +351,18 @@ const static struct ps8811_reg_val equalizer_table[] = { }, }; -#define NUM_EQ_ARRAY ARRAY_SIZE(equalizer_table) +#define NUM_EQ_WWAN_ARRAY ARRAY_SIZE(equalizer_wwan_table) + +const static struct ps8811_reg_val equalizer_wlan_table[] = { + { + /* Set 50ohm adjust for B channel */ + .reg = PS8811_REG1_50OHM_ADJUST_CHAN_B, + .val = (PS8811_50OHM_ADJUST_CHAN_B_MINUS_9PCT << + PS8811_50OHM_ADJUST_CHAN_B_SHIFT), + }, +}; + +#define NUM_EQ_WLAN_ARRAY ARRAY_SIZE(equalizer_wlan_table) static int usba_retimer_init(int port) { @@ -380,10 +391,36 @@ static int usba_retimer_init(int port) PS8811_CHAN_A_SWING_MASK, 0x2 << PS8811_CHAN_A_SWING_SHIFT); - for (i = 0; i < NUM_EQ_ARRAY; i++) + /* Set channel B output PS level */ + rv |= ps8811_i2c_field_update( + me, PS8811_REG_PAGE1, + PS8811_REG1_USB_CHAN_B_DE_PS_LSB, + PS8811_CHAN_B_DE_PS_LSB_MASK, 0x06); + + /* Set channel B output DE level */ + rv |= ps8811_i2c_field_update( + me, PS8811_REG_PAGE1, + PS8811_REG1_USB_CHAN_B_DE_PS_MSB, + PS8811_CHAN_B_DE_PS_MSB_MASK, 0x16); + + + for (i = 0; i < NUM_EQ_WWAN_ARRAY; i++) + rv |= ps8811_i2c_write(me, PS8811_REG_PAGE1, + equalizer_wwan_table[i].reg, + equalizer_wwan_table[i].val); + } else { + /* Set channel A output swing */ + rv = ps8811_i2c_field_update( + me, PS8811_REG_PAGE1, + PS8811_REG1_USB_CHAN_A_SWING, + PS8811_CHAN_A_SWING_MASK, + 0x2 << PS8811_CHAN_A_SWING_SHIFT); + + + for (i = 0; i < NUM_EQ_WLAN_ARRAY; i++) rv |= ps8811_i2c_write(me, PS8811_REG_PAGE1, - equalizer_table[i].reg, - equalizer_table[i].val); + equalizer_wlan_table[i].reg, + equalizer_wlan_table[i].val); } break; } diff --git a/driver/retimer/ps8811.h b/driver/retimer/ps8811.h index a0ab50e5d7..5721f31eae 100644 --- a/driver/retimer/ps8811.h +++ b/driver/retimer/ps8811.h @@ -138,6 +138,25 @@ #define PS8811_CHAN_A_SWING_MASK GENMASK(6, 4) #define PS8811_CHAN_A_SWING_SHIFT 4 +#define PS8811_REG1_50OHM_ADJUST_CHAN_B 0x73 +#define PS8811_50OHM_ADJUST_CHAN_B_CONFIG_MASK GENMASK(3, 1) +#define PS8811_50OHM_ADJUST_CHAN_B_SHIFT 1 +#define PS8811_50OHM_ADJUST_CHAN_B_DEFAULT 0x00 +#define PS8811_50OHM_ADJUST_CHAN_B_MINUS_6PCT 0x01 +#define PS8811_50OHM_ADJUST_CHAN_B_MINUS_9PCT 0x02 +#define PS8811_50OHM_ADJUST_CHAN_B_MINUS_14PCT 0x03 +#define PS8811_50OHM_ADJUST_CHAN_B_PLUS_7PCT 0x04 +#define PS8811_50OHM_ADJUST_CHAN_B_PLUS_11PCT 0x05 +#define PS8811_50OHM_ADJUST_CHAN_B_PLUS_20PCT 0x06 + +#define PS8811_BDE_PIN_MID_LEVEL_1P5DB 0x01 +#define PS8811_BDE_PIN_MID_LEVEL_2DB 0x02 +#define PS8811_BDE_PIN_MID_LEVEL_3DB 0x03 +#define PS8811_BDE_PIN_MID_LEVEL_3P5DB 0x04 +#define PS8811_BDE_PIN_MID_LEVEL_4P5DB 0x05 +#define PS8811_BDE_PIN_MID_LEVEL_6DB 0x06 +#define PS8811_BDE_PIN_MID_LEVEL_7P5DB 0x07 + #define PS8811_REG1_USB_CHAN_B_SWING 0xA4 #define PS8811_CHAN_B_SWING_MASK GENMASK(2, 0) #define PS8811_CHAN_B_SWING_SHIFT 0 -- cgit v1.2.1 From b7f91ecd3583b2e8ec6404cf40469621daaac129 Mon Sep 17 00:00:00 2001 From: alvishsu Date: Mon, 11 Apr 2022 15:21:35 +0800 Subject: krabby: Force RT9490 switching frequency in 1MHz Reduce switching loss to get 10% higher current rating BUG=b:215294785 TEST=measure max charing current BRANCH=none Signed-off-by: Alvis Hsu Change-Id: Icf2a07e7dc7e438745f4fda3f55247176a47d375 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3581822 Reviewed-by: Ting Shen Commit-Queue: Ting Shen --- driver/charger/rt9490.c | 6 ++++++ driver/charger/rt9490.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/driver/charger/rt9490.c b/driver/charger/rt9490.c index e3eee4ebad..ade7049d65 100644 --- a/driver/charger/rt9490.c +++ b/driver/charger/rt9490.c @@ -338,6 +338,12 @@ static int rt9490_init_setting(int chgnum) RETURN_ERROR(rt9490_set_bit(chgnum, RT9490_REG_CHG_IRQ_MASK5, RT9490_CHG_IRQ_MASK5_ALL)); + /* Reduce SW freq from 1.5MHz to 1MHz + * for 10% higher current rating b/215294785 + */ + RETURN_ERROR(rt9490_set_bit(chgnum, RT9490_REG_ADD_CTRL1, + RT9490_PWM_1MHZ_EN)); + return EC_SUCCESS; } diff --git a/driver/charger/rt9490.h b/driver/charger/rt9490.h index a6ace8c1eb..28900b20e8 100644 --- a/driver/charger/rt9490.h +++ b/driver/charger/rt9490.h @@ -238,6 +238,9 @@ struct rt9490_init_setting { #define RT9490_AUTO_MIVR BIT(2) #define RT9490_JEITA_COLD_HOT BIT(0) +/* ADD CTRL1 */ +#define RT9490_PWM_1MHZ_EN BIT(4) + extern const struct charger_drv rt9490_drv; extern const struct bc12_drv rt9490_bc12_drv; -- cgit v1.2.1 From 7280191680ecd336449b4fcea1f955aa51d6a73c Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Thu, 7 Apr 2022 15:13:55 +0000 Subject: pinmap: drop named-pwm generation code All current Zephyr projects code have been converted to use the Zephyr PWM APIs, named-pwm structures are not needed anymore. BRANCH=none BUG=b:217741090 TEST=go test ./... Signed-off-by: Fabio Baltieri Change-Id: I509c5e205d0157abfc301b414492d3fd3ed606c8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3575155 Reviewed-by: Yuval Peress Reviewed-by: Andrew McRae --- util/pinmap/README.md | 12 +++++------- util/pinmap/chips/it81302.go | 18 ------------------ util/pinmap/chips/npcx993.go | 18 ------------------ util/pinmap/chips/npcx993_test.go | 10 ---------- util/pinmap/pm/chip.go | 5 ----- util/pinmap/pm/chip_test.go | 5 ----- util/pinmap/pm/generate.go | 27 --------------------------- util/pinmap/pm/generate_test.go | 27 +-------------------------- util/pinmap/pm/pins.go | 3 --- util/pinmap/readers/csv/csv.go | 10 +++------- util/pinmap/readers/csv/csv_test.go | 5 ----- util/pinmap/readers/csv/testdata/data.csv | 2 -- 12 files changed, 9 insertions(+), 133 deletions(-) diff --git a/util/pinmap/README.md b/util/pinmap/README.md index 0246ed47cd..7ac924e09a 100644 --- a/util/pinmap/README.md +++ b/util/pinmap/README.md @@ -5,13 +5,13 @@ This program reads a CSV (comma separated values) file and generates Zephyr Device Tree entries for GPIOs and other configuration. -A basic Device Tree configuration is generated for I2C buses, ADC pins, GPIO pins -and PWM pins, with labels and nodes generated for each of the signals in the +A basic Device Tree configuration is generated for I2C buses, ADC pins and GPIO +pins with labels and nodes generated for each of the signals in the spreadsheet. -A separate overlay Device Tree file can be used to modify the generated DTS -to allow specific properties and parameters to be set e.g bus speeds for I2C, conversion parameters -for ADCs, frequencies for PWM etc. +A separate overlay Device Tree file can be used to modify the generated DTS to +allow specific properties and parameters to be set e.g bus speeds for I2C, +conversion parameters for ADCs etc. ## Building @@ -70,8 +70,6 @@ generate the GPIO or other configuration flags in the DTS. | Type Name | Description | | ----------- | ----------- | | `ADC` | An analogue to digital converter signal | -| `PWM` | A pulse width modulator signal | -| `PWM_INVERT` | A pulse width modulator signal with inverted output | | `I2C_CLOCK` | The clock signal for an I2C bus | | `I2C_DATA` | The data signal for an I2C bus (ignored) | | `INPUT` | A GPIO input signal | diff --git a/util/pinmap/chips/it81302.go b/util/pinmap/chips/it81302.go index e7c8cf697d..6e593a2c5e 100644 --- a/util/pinmap/chips/it81302.go +++ b/util/pinmap/chips/it81302.go @@ -228,21 +228,3 @@ func (c *It81302) I2c(p string) string { return "" } } - -// Pwm returns the configuration of this pin as a PWM. -func (c *It81302) Pwm(p string) string { - s, ok := it81302_pins[p] - if ok { - // Found the pin, now find the PWM name. - for _, ss := range strings.Split(s, "/") { - if strings.HasPrefix(ss, "PWM") && len(ss) > 3 { - pwm := fmt.Sprintf("pwm%s", ss[3:]) - c.okay = append(c.okay, pwm) - return fmt.Sprintf("%s %s", pwm, ss[3:]) - } - } - return "" - } else { - return "" - } -} diff --git a/util/pinmap/chips/npcx993.go b/util/pinmap/chips/npcx993.go index 58ee312d20..7a865c115d 100644 --- a/util/pinmap/chips/npcx993.go +++ b/util/pinmap/chips/npcx993.go @@ -228,21 +228,3 @@ func (c *Npcx993) I2c(p string) string { return "" } } - -// Pwm returns the PWM config associated with this pin. -func (c *Npcx993) Pwm(p string) string { - s, ok := npcx993_pins[p] - if ok { - // Found the pin, now find the PWM name. - for _, ss := range strings.Split(s, ",") { - if strings.HasPrefix(ss, "PWM") && len(ss) > 3 { - ch := ss[3:] - c.okay = append(c.okay, fmt.Sprintf("pwm%s", ch)) - return fmt.Sprintf("pwm%s %s", ch, ch) - } - } - return "" - } else { - return "" - } -} diff --git a/util/pinmap/chips/npcx993_test.go b/util/pinmap/chips/npcx993_test.go index fbed838804..6ed4bf2357 100644 --- a/util/pinmap/chips/npcx993_test.go +++ b/util/pinmap/chips/npcx993_test.go @@ -33,9 +33,6 @@ func TestMissing(t *testing.T) { if gc != "" { t.Errorf("Expected empty string, got %s %d for Gpio()", gc, gp) } - if n.Pwm(none) != "" { - t.Errorf("Expected empty string, got %s for Pwm()", n.Pwm(none)) - } if n.I2c(none) != "" { t.Errorf("Expected empty string, got %s for I2c()", n.I2c(none)) } @@ -52,16 +49,9 @@ func TestMulti(t *testing.T) { if gc != "gpioe" || gp != 0 { t.Errorf("Expected \"gpioe 0\", got %s %d for Gpio()", gc, gp) } - if n.Pwm(pin) != "" { - t.Errorf("Expected empty string, got %s for Pwm()", n.Pwm(pin)) - } if n.I2c(pin) != "" { t.Errorf("Expected empty string, got %s for I2c()", n.I2c(pin)) } - pin = "L9" - if n.Pwm(pin) != "pwm4 4" { - t.Errorf("Expected \"pwm4 4\", got %s for Pwm()", n.Pwm(pin)) - } pin = "F8" if n.I2c(pin) != "i2c3_0" { t.Errorf("Expected \"i2c3_0\", got %s for I2c()", n.I2c(pin)) diff --git a/util/pinmap/pm/chip.go b/util/pinmap/pm/chip.go index bb9d783c60..a940e7c5fe 100644 --- a/util/pinmap/pm/chip.go +++ b/util/pinmap/pm/chip.go @@ -36,11 +36,6 @@ type Chip interface { * the I2C clock pin of the 2 wire bus. */ I2c(pin string) string - /* - * Pwm will return a DTS reference to the appropriate PWM - * that is connected to this pin. - */ - Pwm(pin string) string } // chipList contains a list of registered chips. diff --git a/util/pinmap/pm/chip_test.go b/util/pinmap/pm/chip_test.go index ac65695755..0bfe601093 100644 --- a/util/pinmap/pm/chip_test.go +++ b/util/pinmap/pm/chip_test.go @@ -20,7 +20,6 @@ type testChip struct { gc string gp int i2c string - pwm string } func (c *testChip) Name() string { @@ -43,10 +42,6 @@ func (c *testChip) I2c(pin string) string { return c.i2c } -func (c *testChip) Pwm(pin string) string { - return c.pwm -} - func TestName(t *testing.T) { n1 := "Test1" n2 := "Test2" diff --git a/util/pinmap/pm/generate.go b/util/pinmap/pm/generate.go index afa23ed7c5..835206ad7b 100644 --- a/util/pinmap/pm/generate.go +++ b/util/pinmap/pm/generate.go @@ -46,7 +46,6 @@ func Generate(out io.Writer, pins *Pins, chip Chip, names bool) { gpioConfig(out, pin, chip, lineNameMap) }) pinConfig(out, "named-i2c-ports", pins.I2c, chip, sortI2c, i2cConfig) - pinConfig(out, "named-pwms", pins.Pwm, chip, sortSignal, pwmConfig) fmt.Fprintf(out, "};\n") // Retrieve the enabled nodes, sort, de-dup and // generate overlays. @@ -159,32 +158,6 @@ func i2cConfig(out io.Writer, pin *Pin, chip Chip) { fmt.Fprintf(out, "\t\t};\n") } -// pwmConfig is the handler for PWM pins. -func pwmConfig(out io.Writer, pin *Pin, chip Chip) { - var inv string - switch pin.PinType { - default: - fmt.Printf("Unknown PWM type (%d) for pin %s, ignored\n", pin.PinType, pin.Pin) - return - case PWM: - inv = "0" - case PWM_INVERT: - inv = "1" - } - c := chip.Pwm(pin.Pin) - if len(c) == 0 { - fmt.Printf("No matching PWM for pin %s, ignored\n", pin.Pin) - return - } - lc := strings.ToLower(pin.Signal) - fmt.Fprintf(out, "\t\tpwm_%s: %s {\n", lc, lc) - fmt.Fprintf(out, "\t\t\tpwms = <&%s %s>;\n", c, inv) - if len(pin.Enum) > 0 { - fmt.Fprintf(out, "\t\t\tenum-name = \"%s\";\n", pin.Enum) - } - fmt.Fprintf(out, "\t\t};\n") -} - // generateEnabledNodes generates a "status = okay" // property for the list of nodes passed. func generateEnabledNodes(out io.Writer, nodes []string) { diff --git a/util/pinmap/pm/generate_test.go b/util/pinmap/pm/generate_test.go index 0a6eaca99d..3903180b1b 100644 --- a/util/pinmap/pm/generate_test.go +++ b/util/pinmap/pm/generate_test.go @@ -23,7 +23,7 @@ func (c *genChip) Name() string { } func (c *genChip) EnabledNodes() []string { - return []string{"adc0", "i2c0", "i2c1", "i2c2", "pwm1"} + return []string{"adc0", "i2c0", "i2c1", "i2c2"} } func (c *genChip) Adc(pin string) string { @@ -47,10 +47,6 @@ func (c *genChip) I2c(pin string) string { panic(fmt.Sprintf("Unknown I2C: %s", pin)) } -func (c *genChip) Pwm(pin string) string { - return "pwm1" -} - func TestGenerate(t *testing.T) { pins := &pm.Pins{ Adc: []*pm.Pin{ @@ -67,10 +63,6 @@ func TestGenerate(t *testing.T) { &pm.Pin{pm.InputPU, "G7", "EC_IN_3", "ENUM_IN_3"}, &pm.Pin{pm.InputPD, "H8", "EC_IN_4", "ENUM_IN_4"}, }, - Pwm: []*pm.Pin{ - &pm.Pin{pm.PWM, "E5", "EC_LED_1", "ENUM_LED_1"}, - &pm.Pin{pm.PWM_INVERT, "F6", "EC_LED_2", "ENUM_LED_2"}, - }, } var out bytes.Buffer pm.Generate(&out, pins, &genChip{}, true) @@ -136,19 +128,6 @@ func TestGenerate(t *testing.T) { enum-name = "ENUM_I2C_2"; }; }; - - named-pwms { - compatible = "named-pwms"; - - pwm_ec_led_1: ec_led_1 { - pwms = <&pwm1 0>; - enum-name = "ENUM_LED_1"; - }; - pwm_ec_led_2: ec_led_2 { - pwms = <&pwm1 1>; - enum-name = "ENUM_LED_2"; - }; - }; }; &adc0 { @@ -167,10 +146,6 @@ func TestGenerate(t *testing.T) { status = "okay"; }; -&pwm1 { - status = "okay"; -}; - &gpioC { gpio-line-names = "", diff --git a/util/pinmap/pm/pins.go b/util/pinmap/pm/pins.go index ea9282ab5d..cb749eb166 100644 --- a/util/pinmap/pm/pins.go +++ b/util/pinmap/pm/pins.go @@ -7,8 +7,6 @@ package pm // Pin types enum constants const ( ADC = iota - PWM - PWM_INVERT I2C Input InputL @@ -34,5 +32,4 @@ type Pins struct { Adc []*Pin // Analogue to digital converters I2c []*Pin // I2C busses Gpio []*Pin // GPIO pins - Pwm []*Pin // Pwm pins } diff --git a/util/pinmap/readers/csv/csv.go b/util/pinmap/readers/csv/csv.go index 3f541f5da6..562b5c6383 100644 --- a/util/pinmap/readers/csv/csv.go +++ b/util/pinmap/readers/csv/csv.go @@ -82,20 +82,16 @@ func (r *CSVReader) Read(columnKey, filepath string) (*pm.Pins, error) { p := new(pm.Pin) switch row[ptype] { default: - fmt.Printf("%s:%d: Unknown signal type (%s) - ignored", filepath, i+1, row[ptype]) + fmt.Printf("%s:%d: Unknown signal type (%s) - ignored\n", filepath, i+1, row[ptype]) continue case "OTHER": + case "PWM": + case "PWM_INVERT": // Skipped continue case "ADC": p.PinType = pm.ADC pins.Adc = append(pins.Adc, p) - case "PWM": - p.PinType = pm.PWM - pins.Pwm = append(pins.Pwm, p) - case "PWM_INVERT": - p.PinType = pm.PWM_INVERT - pins.Pwm = append(pins.Pwm, p) case "I2C_DATA": // Only the clock pin is used for the config continue diff --git a/util/pinmap/readers/csv/csv_test.go b/util/pinmap/readers/csv/csv_test.go index 639ec4f8fe..c0a79ba784 100644 --- a/util/pinmap/readers/csv/csv_test.go +++ b/util/pinmap/readers/csv/csv_test.go @@ -38,15 +38,10 @@ func TestName(t *testing.T) { &pm.Pin{pm.OutputODL, "F6", "EC_GPIO_3", ""}, &pm.Pin{pm.InputPU, "K10", "EC_GPIO_4", ""}, }, - Pwm: []*pm.Pin{ - &pm.Pin{pm.PWM, "C3", "EC_PWM_1", "FAN_1"}, - &pm.Pin{pm.PWM_INVERT, "J9", "EC_PWM_2", "LED_1"}, - }, } check(t, "ADc", exp.Adc, pins.Adc) check(t, "I2c", exp.I2c, pins.I2c) check(t, "Gpio", exp.Gpio, pins.Gpio) - check(t, "Pwm", exp.Pwm, pins.Pwm) } func check(t *testing.T, name string, exp, got []*pm.Pin) { diff --git a/util/pinmap/readers/csv/testdata/data.csv b/util/pinmap/readers/csv/testdata/data.csv index 6c7ac5ace9..8f1be84801 100644 --- a/util/pinmap/readers/csv/testdata/data.csv +++ b/util/pinmap/readers/csv/testdata/data.csv @@ -1,8 +1,6 @@ Signal Name,MyCHIP,Type,Enum EC_ADC_1,A1,ADC,ENUM_ADC_1 EC_IGNORED_1,B2,OTHER, -EC_PWM_1,C3,PWM,FAN_1 -EC_PWM_2,J9,PWM_INVERT,LED_1 EC_GPIO_1,D4,INPUT,GPIO1 EC_GPIO_2,E5,OUTPUT,GPIO2 EC_GPIO_3,F6,OUTPUT_ODL, -- cgit v1.2.1 From 78b5c132cfbac962931ba43b363008ec27892812 Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Thu, 7 Apr 2022 16:41:00 +0000 Subject: zephyr: update nissa generated files Update nereid_generated.dts and nivviks_generated.dts. $ pinmap --force -chip=NPCX993 --column J \ -output ./zephyr/projects/nissa/nivviks_generated.dts ~/nissa.csv $ pinmap --force -chip=IT81302 --column L \ -output ./zephyr/projects/nissa/nereid_generated.dts ~/nissa.csv And move the &pwmX enable and setup nodes next to the respective references. BRANCH=none BUG=b:217741090 TEST=cq dry run Signed-off-by: Fabio Baltieri Change-Id: I1dd379d19739dab24f04b388509c7fab01212896 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3575156 Reviewed-by: Wai-Hong Tam --- zephyr/projects/nissa/nereid_generated.dts | 33 ----------------------------- zephyr/projects/nissa/nereid_keyboard.dts | 5 +++++ zephyr/projects/nissa/nereid_overlay.dts | 33 ----------------------------- zephyr/projects/nissa/nereid_pwm_leds.dts | 15 +++++++++++++ zephyr/projects/nissa/nivviks_generated.dts | 33 ----------------------------- zephyr/projects/nissa/nivviks_keyboard.dts | 4 ++++ zephyr/projects/nissa/nivviks_overlay.dts | 31 --------------------------- zephyr/projects/nissa/nivviks_pwm_leds.dts | 17 +++++++++++++++ 8 files changed, 41 insertions(+), 130 deletions(-) diff --git a/zephyr/projects/nissa/nereid_generated.dts b/zephyr/projects/nissa/nereid_generated.dts index 2f772a3530..d31fabad92 100644 --- a/zephyr/projects/nissa/nereid_generated.dts +++ b/zephyr/projects/nissa/nereid_generated.dts @@ -238,23 +238,6 @@ enum-name = "I2C_PORT_USB_C0_TCPC"; }; }; - - named-pwms { - compatible = "named-pwms"; - - pwm_pwm_kb_bl: pwm_kb_bl { - pwms = <&pwm0 0 0>; - }; - pwm_pwm_led_1_odl: pwm_led_1_odl { - pwms = <&pwm1 1 1>; - }; - pwm_pwm_led_2_odl: pwm_led_2_odl { - pwms = <&pwm2 2 1>; - }; - pwm_pwm_led_3_odl: pwm_led_3_odl { - pwms = <&pwm3 3 1>; - }; - }; }; &adc0 { @@ -280,19 +263,3 @@ &i2c5 { status = "okay"; }; - -&pwm0 { - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm3 { - status = "okay"; -}; diff --git a/zephyr/projects/nissa/nereid_keyboard.dts b/zephyr/projects/nissa/nereid_keyboard.dts index 8767d23828..a020a92ba9 100644 --- a/zephyr/projects/nissa/nereid_keyboard.dts +++ b/zephyr/projects/nissa/nereid_keyboard.dts @@ -10,3 +10,8 @@ frequency = <10000>; }; }; + +&pwm0 { + status = "okay"; + prescaler-cx = ; +}; diff --git a/zephyr/projects/nissa/nereid_overlay.dts b/zephyr/projects/nissa/nereid_overlay.dts index 08b796d0fe..a23c070359 100644 --- a/zephyr/projects/nissa/nereid_overlay.dts +++ b/zephyr/projects/nissa/nereid_overlay.dts @@ -264,36 +264,3 @@ label = "I2C_USB_C0_TCPC"; clock-frequency = ; }; - -/* PWM config */ -&pwm0 { - prescaler-cx = ; -}; - -&pwm1 { - prescaler-cx = ; -}; - -&pwm2 { - prescaler-cx = ; -}; - -&pwm3 { - prescaler-cx = ; -}; - -&pwm_pwm_kb_bl { - frequency = <10000>; -}; - -&pwm_pwm_led_1_odl { - frequency = <324>; -}; - -&pwm_pwm_led_2_odl { - frequency = <324>; -}; - -&pwm_pwm_led_3_odl { - frequency = <324>; -}; diff --git a/zephyr/projects/nissa/nereid_pwm_leds.dts b/zephyr/projects/nissa/nereid_pwm_leds.dts index a25e4487c0..7cd2df01b0 100644 --- a/zephyr/projects/nissa/nereid_pwm_leds.dts +++ b/zephyr/projects/nissa/nereid_pwm_leds.dts @@ -38,3 +38,18 @@ }; }; }; + +&pwm1 { + status = "okay"; + prescaler-cx = ; +}; + +&pwm2 { + status = "okay"; + prescaler-cx = ; +}; + +&pwm3 { + status = "okay"; + prescaler-cx = ; +}; diff --git a/zephyr/projects/nissa/nivviks_generated.dts b/zephyr/projects/nissa/nivviks_generated.dts index ad8d2de0d1..7b3c83886f 100644 --- a/zephyr/projects/nissa/nivviks_generated.dts +++ b/zephyr/projects/nissa/nivviks_generated.dts @@ -227,23 +227,6 @@ enum-name = "I2C_PORT_BATTERY"; }; }; - - named-pwms { - compatible = "named-pwms"; - - pwm_pwm_kb_bl: pwm_kb_bl { - pwms = <&pwm6 6 0>; - }; - pwm_pwm_led_1_odl: pwm_led_1_odl { - pwms = <&pwm2 2 1>; - }; - pwm_pwm_led_2_odl: pwm_led_2_odl { - pwms = <&pwm0 0 1>; - }; - pwm_pwm_led_3_odl: pwm_led_3_odl { - pwms = <&pwm1 1 1>; - }; - }; }; &adc0 { @@ -289,19 +272,3 @@ &i2c_ctrl7 { status = "okay"; }; - -&pwm0 { - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm6 { - status = "okay"; -}; diff --git a/zephyr/projects/nissa/nivviks_keyboard.dts b/zephyr/projects/nissa/nivviks_keyboard.dts index bb3dd9067e..b1b4b5af8b 100644 --- a/zephyr/projects/nissa/nivviks_keyboard.dts +++ b/zephyr/projects/nissa/nivviks_keyboard.dts @@ -10,3 +10,7 @@ frequency = <10000>; }; }; + +&pwm6 { + status = "okay"; +}; diff --git a/zephyr/projects/nissa/nivviks_overlay.dts b/zephyr/projects/nissa/nivviks_overlay.dts index 63c857cf6d..ad335f80e1 100644 --- a/zephyr/projects/nissa/nivviks_overlay.dts +++ b/zephyr/projects/nissa/nivviks_overlay.dts @@ -287,37 +287,6 @@ clock-frequency = ; }; -/* PWM frequencies */ - -&pwm_pwm_kb_bl { - frequency = <10000>; -}; - -&pwm_pwm_led_1_odl { - frequency = <324>; -}; - -&pwm_pwm_led_2_odl { - frequency = <324>; -}; - -&pwm_pwm_led_3_odl { - frequency = <324>; -}; - -/* Enable LEDs to work while CPU suspended */ -&pwm0 { - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; -}; - -&pwm1 { - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; -}; - -&pwm2 { - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; -}; - &pwm5 { status = "okay"; drive-open-drain; diff --git a/zephyr/projects/nissa/nivviks_pwm_leds.dts b/zephyr/projects/nissa/nivviks_pwm_leds.dts index de76880cbe..36a5a5b461 100644 --- a/zephyr/projects/nissa/nivviks_pwm_leds.dts +++ b/zephyr/projects/nissa/nivviks_pwm_leds.dts @@ -38,3 +38,20 @@ }; }; }; + +/* Enable LEDs to work while CPU suspended */ + +&pwm0 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; +}; + +&pwm1 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; +}; + +&pwm2 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; +}; -- cgit v1.2.1 From 82a02ccb826edbb8ecb6b9f2eb93accf198a3a98 Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Fri, 8 Apr 2022 16:14:06 +0000 Subject: zephyr: shim: drop the shim PWM code Drop the shim PWM code, all drivers of Zephyr enable projects are now using the Zephyr PWM APIs. The pwm.c file only contains the PWM host command now, so rename the corresponding Kconfig option and file to reflect that. BRANCH=none BUG=b:217741090 TEST=cq dry run TEST=build and run on brya Signed-off-by: Fabio Baltieri Change-Id: I3837a81be98c4c2a9c2f7ceea24e05fe7940c7d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3578701 Reviewed-by: Abe Levkoy --- include/led_pwm.h | 1 - util/config_allowed.txt | 1 + zephyr/Kconfig | 10 +- zephyr/Kconfig.keyboard | 1 + zephyr/dts/bindings/pwm/named-pwms.yaml | 18 -- zephyr/shim/include/board.h | 4 - zephyr/shim/include/config_chip.h | 5 - zephyr/shim/include/pwm/pwm.h | 26 --- zephyr/shim/src/CMakeLists.txt | 2 +- zephyr/shim/src/pwm.c | 295 -------------------------------- zephyr/shim/src/pwm_hc.c | 117 +++++++++++++ 11 files changed, 124 insertions(+), 356 deletions(-) delete mode 100644 zephyr/dts/bindings/pwm/named-pwms.yaml delete mode 100644 zephyr/shim/include/pwm/pwm.h delete mode 100644 zephyr/shim/src/pwm.c create mode 100644 zephyr/shim/src/pwm_hc.c diff --git a/include/led_pwm.h b/include/led_pwm.h index d0295b8061..7f286130e7 100644 --- a/include/led_pwm.h +++ b/include/led_pwm.h @@ -9,7 +9,6 @@ #include "ec_commands.h" #ifdef CONFIG_ZEPHYR -#include "pwm/pwm.h" #include "drivers/pwm.h" #endif diff --git a/util/config_allowed.txt b/util/config_allowed.txt index e00ce907fd..6714872fa4 100644 --- a/util/config_allowed.txt +++ b/util/config_allowed.txt @@ -728,6 +728,7 @@ CONFIG_PROGRAM_MEMORY_BASE_LOAD CONFIG_PS2 CONFIG_PSTORE CONFIG_PVD +CONFIG_PWM CONFIG_PWM_INPUT_LFCLK CONFIG_PWR_STATE_DISCHARGE_FULL CONFIG_RAM_BANKS diff --git a/zephyr/Kconfig b/zephyr/Kconfig index 8b727e6aca..cbcb0bee4b 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -543,17 +543,15 @@ config PLATFORM_EC_POWER_BUTTON This requires a GPIO named GPIO_POWER_BUTTON_L in gpio_map.h. -config PLATFORM_EC_PWM +config PLATFORM_EC_PWM_HC bool - default y if PWM help - Enable the PWM (Pulse Width Modulation) module. This module is used to - support variable brightness LEDs, backlight controls, and - variable-speed fans. + Enable the PWM (Pulse Width Modulation) host command support. This + implements EC_CMD_PWM_SET_DUTY and EC_CMD_PWM_GET_DUTY. config PLATFORM_EC_PWM_DISPLIGHT bool "PWM display backlight" - depends on PLATFORM_EC_PWM + select PLATFORM_EC_PWM_HC help Enables display backlight controlled by a PWM signal connected directly to the EC chipset. The board devicetree file must define a diff --git a/zephyr/Kconfig.keyboard b/zephyr/Kconfig.keyboard index 8c0a60a620..41805be43b 100644 --- a/zephyr/Kconfig.keyboard +++ b/zephyr/Kconfig.keyboard @@ -189,6 +189,7 @@ choice config PLATFORM_EC_PWM_KBLIGHT bool "PWM keyboard backlight" + select PLATFORM_EC_PWM_HC help Enables a PWM-controlled keyboard backlight controlled by a PWM signal connected directly to the EC chipset. The board devicetree file must diff --git a/zephyr/dts/bindings/pwm/named-pwms.yaml b/zephyr/dts/bindings/pwm/named-pwms.yaml deleted file mode 100644 index 3e5c1c789f..0000000000 --- a/zephyr/dts/bindings/pwm/named-pwms.yaml +++ /dev/null @@ -1,18 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: PWM KEYS parent node - -compatible: "named-pwms" - -child-binding: - description: Named PWMs child node - properties: - pwms: - type: phandle-array - required: true - frequency: - required: true - type: int - description: PWM frequency, in Hz diff --git a/zephyr/shim/include/board.h b/zephyr/shim/include/board.h index 74caadfeef..39d80a3495 100644 --- a/zephyr/shim/include/board.h +++ b/zephyr/shim/include/board.h @@ -25,10 +25,6 @@ #include "i2c/i2c.h" #endif -#ifdef CONFIG_PWM -#include "pwm/pwm.h" -#endif - /* Include board specific sensor configuration if motionsense is enabled */ #ifdef CONFIG_MOTIONSENSE #include "motionsense_sensors_defs.h" diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 5f865c3fa7..4b84447aa5 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -871,11 +871,6 @@ extern struct jump_data mock_jump_data; #define CONFIG_FAKE_SHMEM #endif -#undef CONFIG_PWM -#ifdef CONFIG_PLATFORM_EC_PWM -#define CONFIG_PWM -#endif - #undef CONFIG_CMD_S5_TIMEOUT #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_S5_TIMEOUT #define CONFIG_CMD_S5_TIMEOUT diff --git a/zephyr/shim/include/pwm/pwm.h b/zephyr/shim/include/pwm/pwm.h deleted file mode 100644 index 1bf4685837..0000000000 --- a/zephyr/shim/include/pwm/pwm.h +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef ZEPHYR_SHIM_INCLUDE_PWM_PWM_H_ -#define ZEPHYR_SHIM_INCLUDE_PWM_PWM_H_ - -#include -#include - -#if DT_NODE_EXISTS(DT_PATH(named_pwms)) - -#define PWM_CHANNEL(id) DT_CAT(PWM_, id) -#define PWM_CHANNEL_WITH_COMMA(id) PWM_CHANNEL(id), - -enum pwm_channel { - DT_FOREACH_CHILD(DT_PATH(named_pwms), PWM_CHANNEL_WITH_COMMA) - PWM_CH_COUNT, -}; - -#define NAMED_PWM(name) PWM_CHANNEL(DT_PATH(named_pwms, name)) - -#endif /* named_pwms */ - -#endif /* ZEPHYR_SHIM_INCLUDE_PWM_PWM_H_ */ diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index bc9729abae..23aacc177f 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -43,7 +43,7 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MKBP_EVENT mkbp_event.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MOTIONSENSE motionsense_sensors.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PANIC panic.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PWM pwm.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PWM_HC pwm_hc.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_PWM pwm_led.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_RTC rtc.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_SWITCHCAP_GPIO diff --git a/zephyr/shim/src/pwm.c b/zephyr/shim/src/pwm.c deleted file mode 100644 index 5f76878b12..0000000000 --- a/zephyr/shim/src/pwm.c +++ /dev/null @@ -1,295 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include -#include -#include -#include - -#include "common.h" -#include "console.h" -#include "drivers/cros_displight.h" -#include "ec_commands.h" -#include "host_command.h" -#include "pwm.h" -#include "keyboard_backlight.h" -#include "util.h" - -#include "pwm/pwm.h" - -LOG_MODULE_REGISTER(pwm_shim, LOG_LEVEL_ERR); - -#define PWM_RAW_TO_PERCENT(v) \ - DIV_ROUND_NEAREST((uint32_t)(v) * 100, UINT16_MAX) -#define PWM_PERCENT_TO_RAW(v) ((uint32_t)(v) * UINT16_MAX / 100) - -/* TODO(b/217741090): drop the PWM shim code once all callers have been - * converted. - */ -#if DT_HAS_COMPAT_STATUS_OKAY(named_pwms) - -/* - * Initialize the device bindings in pwm_channels. - * This macro is called from within DT_FOREACH_CHILD - */ -#define INIT_DEV_BINDING(id) { \ - pwm_configs[PWM_CHANNEL(id)].name = DT_NODE_FULL_NAME(id); \ - pwm_configs[PWM_CHANNEL(id)].dev = DEVICE_DT_GET( \ - DT_PHANDLE(id, pwms)); \ - pwm_configs[PWM_CHANNEL(id)].pin = DT_PWMS_CHANNEL(id); \ - pwm_configs[PWM_CHANNEL(id)].flags = DT_PWMS_FLAGS(id); \ - pwm_configs[PWM_CHANNEL(id)].freq = DT_PROP(id, frequency); \ - } - -struct pwm_config { - /* Name */ - const char *name; - /* PWM pin */ - uint32_t pin; - /* PWM channel flags. See dt-bindings/pwm/pwm.h */ - pwm_flags_t flags; - /* PWM operating frequency. Configured by the devicetree */ - uint32_t freq; - - /* PWM period in microseconds. Automatically set to 1/frequency */ - uint32_t period_us; - /* PWM pulse in microseconds. Set by pwm_set_raw_duty */ - uint32_t pulse_us; - /* Saves whether the PWM channel is currently enabled */ - bool enabled; - - /* Runtime device for PWM */ - const struct device *dev; -}; - -static struct pwm_config pwm_configs[PWM_CH_COUNT]; - -static int init_pwms(const struct device *unused) -{ - struct pwm_config *pwm; - int rv = 0; - - ARG_UNUSED(unused); - - /* Initialize PWM data from the device tree */ - DT_FOREACH_CHILD(DT_PATH(named_pwms), INIT_DEV_BINDING) - - /* Read the PWM operating frequency, set by the chip driver */ - for (size_t i = 0; i < PWM_CH_COUNT; ++i) { - pwm = &pwm_configs[i]; - - if (pwm->dev == NULL) { - LOG_ERR("Not found (%s)", pwm->name); - rv = -ENODEV; - continue; - } - - /* - * TODO - check that devicetree frequency is less than 1/2 - * max frequency from the chip driver. - */ - pwm->period_us = USEC_PER_SEC / pwm->freq; - } - - return rv; -} -#if CONFIG_PLATFORM_EC_PWM_INIT_PRIORITY <= CONFIG_KERNEL_INIT_PRIORITY_DEVICE -#error "PWM init priority must be > KERNEL_INIT_PRIORITY_DEVICE" -#endif -SYS_INIT(init_pwms, PRE_KERNEL_1, CONFIG_PLATFORM_EC_PWM_INIT_PRIORITY); - -static struct pwm_config* pwm_lookup(enum pwm_channel ch) -{ - __ASSERT(ch < ARRAY_SIZE(pwm_configs), "Invalid PWM channel %d", ch); - - return &pwm_configs[ch]; -} - -void pwm_enable(enum pwm_channel ch, int enabled) -{ - struct pwm_config *pwm; - uint32_t pulse_us; - int rv; - - pwm = pwm_lookup(ch); - pwm->enabled = enabled; - - /* - * The Zephyr API doesn't provide explicit enable and disable - * commands. However, setting the pulse width to zero disables - * the PWM. - */ - if (enabled) - pulse_us = pwm->pulse_us; - else - pulse_us = 0; - - rv = pwm_pin_set_usec(pwm->dev, pwm->pin, pwm->period_us, pulse_us, - pwm->flags); - - if (rv) - LOG_ERR("pwm_pin_set_usec() failed %s (%d)", pwm->name, rv); -} - -int pwm_get_enabled(enum pwm_channel ch) -{ - struct pwm_config *pwm; - - pwm = pwm_lookup(ch); - return pwm->enabled; -} - -void pwm_set_raw_duty(enum pwm_channel ch, uint16_t duty) -{ - struct pwm_config *pwm; - int rv; - - pwm = pwm_lookup(ch); - - pwm->pulse_us = - DIV_ROUND_NEAREST(pwm->period_us * duty, EC_PWM_MAX_DUTY); - - LOG_DBG("PWM %s set raw duty (0x%04x), pulse %d", pwm->name, duty, - pwm->pulse_us); - - rv = pwm_pin_set_usec(pwm->dev, pwm->pin, pwm->period_us, pwm->pulse_us, - pwm->flags); - - if (rv) - LOG_ERR("pwm_pin_set_usec() failed %s (%d)", pwm->name, rv); -} - -uint16_t pwm_get_raw_duty(enum pwm_channel ch) -{ - struct pwm_config *pwm; - - pwm = pwm_lookup(ch); - - return DIV_ROUND_NEAREST(pwm->pulse_us * EC_PWM_MAX_DUTY, - pwm->period_us); -} - -void pwm_set_duty(enum pwm_channel ch, int percent) -{ - struct pwm_config *pwm; - int rv; - - pwm = pwm_lookup(ch); - - pwm->pulse_us = DIV_ROUND_NEAREST(pwm->period_us * percent, 100); - - LOG_DBG("PWM %s set percent (%d), pulse %d", pwm->name, percent, - pwm->pulse_us); - - rv = pwm_pin_set_usec(pwm->dev, pwm->pin, pwm->period_us, pwm->pulse_us, - pwm->flags); - - if (rv) - LOG_ERR("pwm_pin_set_usec() failed %s (%d)", pwm->name, rv); -} - -int pwm_get_duty(enum pwm_channel ch) -{ - struct pwm_config *pwm; - - pwm = pwm_lookup(ch); - - return DIV_ROUND_NEAREST(pwm->pulse_us * 100, pwm->period_us); -} - -#endif /* DT_HAS_COMPAT_STATUS_OKAY(named_pwm) */ - -#define HAS_PWM_GENERIC_CHANNEL(compat) \ - DT_NODE_HAS_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(compat), \ - generic_pwm_channel) - -#define PWM_GENERIC_CHANNEL_ID(compat) \ - DT_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(compat), \ - generic_pwm_channel) - -#ifdef CONFIG_PWM_KBLIGHT -static bool pwm_is_kblight(int type, int index) -{ - if (type == EC_PWM_TYPE_KB_LIGHT) - return true; - -#if HAS_PWM_GENERIC_CHANNEL(cros_ec_kblight_pwm) - if (type == EC_PWM_TYPE_GENERIC && - index == PWM_GENERIC_CHANNEL_ID(cros_ec_kblight_pwm)) - return true; -#endif /* HAS_PWM_GENERIC_CHANNEL(cros_ec_kblight_pwm) */ - - return false; -} -#endif /* CONFIG_PWM_KBLIGHT */ - -#ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT -static bool pwm_is_displight(int type, int index) -{ - if (type == EC_PWM_TYPE_DISPLAY_LIGHT) - return true; - -#if HAS_PWM_GENERIC_CHANNEL(cros_ec_displight) - if (type == EC_PWM_TYPE_GENERIC && - index == PWM_GENERIC_CHANNEL_ID(cros_ec_displight)) - return true; -#endif /* HAS_PWM_GENERIC_CHANNEL(cros_ec_displight) */ - - return false; -} -#endif /* CONFIG_PLATFORM_EC_PWM_DISPLIGHT */ - - -static enum ec_status host_command_pwm_set_duty( - struct host_cmd_handler_args *args) -{ - __maybe_unused const struct ec_params_pwm_set_duty *p = args->params; - -#ifdef CONFIG_PLATFORM_EC_PWM_KBLIGHT - if (pwm_is_kblight(p->pwm_type, p->index)) { - kblight_set(PWM_RAW_TO_PERCENT(p->duty)); - kblight_enable(p->duty > 0); - return EC_RES_SUCCESS; - } -#endif -#ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT - if (pwm_is_displight(p->pwm_type, p->index)) { - displight_set(PWM_RAW_TO_PERCENT(p->duty)); - return EC_RES_SUCCESS; - } -#endif - - return EC_RES_INVALID_PARAM; -} -DECLARE_HOST_COMMAND(EC_CMD_PWM_SET_DUTY, - host_command_pwm_set_duty, - EC_VER_MASK(0)); - -static enum ec_status host_command_pwm_get_duty( - struct host_cmd_handler_args *args) -{ - __maybe_unused const struct ec_params_pwm_get_duty *p = args->params; - __maybe_unused struct ec_response_pwm_get_duty *r = args->response; - -#ifdef CONFIG_PLATFORM_EC_PWM_KBLIGHT - if (pwm_is_kblight(p->pwm_type, p->index)) { - r->duty = PWM_PERCENT_TO_RAW(kblight_get()); - args->response_size = sizeof(*r); - return EC_RES_SUCCESS; - } -#endif -#ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT - if (pwm_is_displight(p->pwm_type, p->index)) { - r->duty = PWM_PERCENT_TO_RAW(displight_get()); - args->response_size = sizeof(*r); - return EC_RES_SUCCESS; - } -#endif - - return EC_RES_INVALID_PARAM; -} -DECLARE_HOST_COMMAND(EC_CMD_PWM_GET_DUTY, - host_command_pwm_get_duty, - EC_VER_MASK(0)); diff --git a/zephyr/shim/src/pwm_hc.c b/zephyr/shim/src/pwm_hc.c new file mode 100644 index 0000000000..3aaba20bc4 --- /dev/null +++ b/zephyr/shim/src/pwm_hc.c @@ -0,0 +1,117 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include +#include +#include +#include + +#include "common.h" +#include "console.h" +#include "drivers/cros_displight.h" +#include "ec_commands.h" +#include "host_command.h" +#include "pwm.h" +#include "keyboard_backlight.h" +#include "util.h" + +LOG_MODULE_REGISTER(pwm_shim, LOG_LEVEL_ERR); + +#define PWM_RAW_TO_PERCENT(v) \ + DIV_ROUND_NEAREST((uint32_t)(v) * 100, UINT16_MAX) +#define PWM_PERCENT_TO_RAW(v) ((uint32_t)(v) * UINT16_MAX / 100) + +#define HAS_PWM_GENERIC_CHANNEL(compat) \ + DT_NODE_HAS_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(compat), \ + generic_pwm_channel) + +#define PWM_GENERIC_CHANNEL_ID(compat) \ + DT_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(compat), \ + generic_pwm_channel) + +#ifdef CONFIG_PWM_KBLIGHT +static bool pwm_is_kblight(int type, int index) +{ + if (type == EC_PWM_TYPE_KB_LIGHT) + return true; + +#if HAS_PWM_GENERIC_CHANNEL(cros_ec_kblight_pwm) + if (type == EC_PWM_TYPE_GENERIC && + index == PWM_GENERIC_CHANNEL_ID(cros_ec_kblight_pwm)) + return true; +#endif /* HAS_PWM_GENERIC_CHANNEL(cros_ec_kblight_pwm) */ + + return false; +} +#endif /* CONFIG_PWM_KBLIGHT */ + +#ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT +static bool pwm_is_displight(int type, int index) +{ + if (type == EC_PWM_TYPE_DISPLAY_LIGHT) + return true; + +#if HAS_PWM_GENERIC_CHANNEL(cros_ec_displight) + if (type == EC_PWM_TYPE_GENERIC && + index == PWM_GENERIC_CHANNEL_ID(cros_ec_displight)) + return true; +#endif /* HAS_PWM_GENERIC_CHANNEL(cros_ec_displight) */ + + return false; +} +#endif /* CONFIG_PLATFORM_EC_PWM_DISPLIGHT */ + + +static enum ec_status host_command_pwm_set_duty( + struct host_cmd_handler_args *args) +{ + __maybe_unused const struct ec_params_pwm_set_duty *p = args->params; + +#ifdef CONFIG_PLATFORM_EC_PWM_KBLIGHT + if (pwm_is_kblight(p->pwm_type, p->index)) { + kblight_set(PWM_RAW_TO_PERCENT(p->duty)); + kblight_enable(p->duty > 0); + return EC_RES_SUCCESS; + } +#endif +#ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT + if (pwm_is_displight(p->pwm_type, p->index)) { + displight_set(PWM_RAW_TO_PERCENT(p->duty)); + return EC_RES_SUCCESS; + } +#endif + + return EC_RES_INVALID_PARAM; +} +DECLARE_HOST_COMMAND(EC_CMD_PWM_SET_DUTY, + host_command_pwm_set_duty, + EC_VER_MASK(0)); + +static enum ec_status host_command_pwm_get_duty( + struct host_cmd_handler_args *args) +{ + __maybe_unused const struct ec_params_pwm_get_duty *p = args->params; + __maybe_unused struct ec_response_pwm_get_duty *r = args->response; + +#ifdef CONFIG_PLATFORM_EC_PWM_KBLIGHT + if (pwm_is_kblight(p->pwm_type, p->index)) { + r->duty = PWM_PERCENT_TO_RAW(kblight_get()); + args->response_size = sizeof(*r); + return EC_RES_SUCCESS; + } +#endif +#ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT + if (pwm_is_displight(p->pwm_type, p->index)) { + r->duty = PWM_PERCENT_TO_RAW(displight_get()); + args->response_size = sizeof(*r); + return EC_RES_SUCCESS; + } +#endif + + return EC_RES_INVALID_PARAM; +} +DECLARE_HOST_COMMAND(EC_CMD_PWM_GET_DUTY, + host_command_pwm_get_duty, + EC_VER_MASK(0)); -- cgit v1.2.1 From d1c5c1c0d5b74bb011a9f76d3a89d90ea3373275 Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Fri, 8 Apr 2022 17:15:44 +0000 Subject: docs: zephyr: drop stale PWM description The CONFIG_PLATFORM_EC_PWM is not used anymore, drop it from the zephyr_pwm doc page. BRANCH=none BUG=b:217741090 TEST=check the doc on gerrit Signed-off-by: Fabio Baltieri Change-Id: I0c272275ae406e832d10412a4c0f15fa7239afbf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3578702 Reviewed-by: Aaron Massey --- docs/zephyr/zephyr_pwm.md | 1 - 1 file changed, 1 deletion(-) diff --git a/docs/zephyr/zephyr_pwm.md b/docs/zephyr/zephyr_pwm.md index 8c050e8d2e..95144f406e 100644 --- a/docs/zephyr/zephyr_pwm.md +++ b/docs/zephyr/zephyr_pwm.md @@ -12,7 +12,6 @@ Kconfig Option | Default | Documentation :------------- | :------ | :------------ `CONFIG_PWM` | n | [PWM (Pulse Width Modulation) Drivers] `CONFIG_PWM_` | n | Platform specific PWM driver -`CONFIG_PLATFORM_EC_PWM` | y if `CONFIG_PWM=y` | [PWM (Pulse Width Modulation) module] Kconfig sub-option | Default | Documentation :----------------- | :------ | :------------ -- cgit v1.2.1 From 4efe01202e6c8e5681c953732ebf3ada539c8804 Mon Sep 17 00:00:00 2001 From: Michael5 Chen1 Date: Wed, 13 Apr 2022 13:25:54 +0800 Subject: virtual_battery: Return manufacturer data Add battery command manufacturer data BUG=b:228360450 BRANCH=kukui TEST=make buildall Run command "ectool i2cxfer 2 0x0b 0x05 0x23" on damu Signed-off-by: Michael5 Chen1 Change-Id: Iab93801e28b0d6f32cb257c19573e6dfbdc3c3bb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3583910 Reviewed-by: Ting Shen --- common/virtual_battery.c | 13 +++++++++++++ driver/battery/smart.c | 5 +++++ include/battery.h | 9 +++++++++ 3 files changed, 27 insertions(+) diff --git a/common/virtual_battery.c b/common/virtual_battery.c index db7e34ced6..33e014d68e 100644 --- a/common/virtual_battery.c +++ b/common/virtual_battery.c @@ -187,6 +187,9 @@ int virtual_battery_operation(const uint8_t *batt_cmd_head, { int val; int year, month, day; +#ifdef CONFIG_BATTERY_SMART + char str[32]; +#endif /* * We cache battery operational mode locally for both read and write * commands. If MODE_CAPACITY bit is set, battery capacity will be @@ -382,6 +385,16 @@ int virtual_battery_operation(const uint8_t *batt_cmd_head, } memcpy(dest, &val, bounded_read_len); break; +#ifdef CONFIG_BATTERY_SMART + case SB_MANUFACTURER_DATA: + if (read_len > ARRAY_SIZE(str)) + return EC_ERROR_INVAL; + /* This may cause an i2c transaction */ + if (battery_manufacturer_data(str, ARRAY_SIZE(str))) + return EC_ERROR_INVAL; + memcpy(dest, &str, read_len); + break; +#endif case SB_MANUFACTURER_ACCESS: /* No manuf. access reg access allowed over VB interface */ return EC_ERROR_INVAL; diff --git a/driver/battery/smart.c b/driver/battery/smart.c index 72cf545afe..91058150fa 100644 --- a/driver/battery/smart.c +++ b/driver/battery/smart.c @@ -321,6 +321,11 @@ test_mockable int battery_device_chemistry(char *dest, int size) return sb_read_string(SB_DEVICE_CHEMISTRY, dest, size); } +int battery_manufacturer_data(char *data, int size) +{ + return sb_read_string(SB_MANUFACTURER_DATA, data, size); +} + int battery_get_avg_current(void) { int current; diff --git a/include/battery.h b/include/battery.h index 27e678c0ba..2bf6e7bb06 100644 --- a/include/battery.h +++ b/include/battery.h @@ -394,6 +394,15 @@ int battery_device_chemistry(char *dest, int size); */ int battery_manufacturer_date(int *year, int *month, int *day); +/** + * Read battery manufacturer data. + * + * @param dest Destination buffer. + * @param size Length of destination buffer. + * @return non-zero if error. + */ +int battery_manufacturer_data(char *data, int size); + /** * Report the absolute difference between the highest and lowest cell voltage in * the battery pack, in millivolts. On error or unimplemented, returns '0'. -- cgit v1.2.1 From 4918a48edcd006020e39c398dd1e61c6970d8390 Mon Sep 17 00:00:00 2001 From: Andrew McRae Date: Thu, 14 Apr 2022 14:08:07 +1000 Subject: zephyr: ap_pwrseq: Use signal get return value for validity Instead of separately signalling the virtual wire signal validity, return an error (-EINVAL) when power_signal_get() is called for an invalid virtual wire signal. BUG=b:222946923 TEST=zmake testall BRANCH=none Signed-off-by: Andrew McRae Change-Id: I8dfac2e689ef4828a9071bf8ba2d0048cc5bac0b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3583699 Reviewed-by: Kangheui Won Reviewed-by: Li1 Feng --- zephyr/subsys/ap_pwrseq/include/signal_vw.h | 7 --- .../subsys/ap_pwrseq/include/x86_common_pwrseq.h | 3 -- .../subsys/ap_pwrseq/include/x86_power_signals.h | 10 ---- zephyr/subsys/ap_pwrseq/signal_vw.c | 63 ++++++++-------------- .../x86_non_dsx_common_pwrseq_sm_handler.c | 28 ++++------ 5 files changed, 33 insertions(+), 78 deletions(-) diff --git a/zephyr/subsys/ap_pwrseq/include/signal_vw.h b/zephyr/subsys/ap_pwrseq/include/signal_vw.h index bb05d15a71..d005daaa40 100644 --- a/zephyr/subsys/ap_pwrseq/include/signal_vw.h +++ b/zephyr/subsys/ap_pwrseq/include/signal_vw.h @@ -45,11 +45,4 @@ int power_signal_vw_get(enum pwr_sig_vw vw); */ void power_signal_vw_init(void); -/** - * @brief External notification when the bus is ready or not. - * - * @param ready true When signals are valid, false when bus is not ready. - */ -void notify_espi_ready(bool ready); - #endif /* __AP_PWRSEQ_SIGNAL_VW_H__ */ diff --git a/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h b/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h index 6eee6ce140..9b6c60b53c 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h @@ -18,9 +18,6 @@ struct pwrseq_context { enum power_states_ndsx power_state; /* Indicate should exit G3 power state or not */ bool want_g3_exit; -#if defined(PWRSEQ_REQUIRE_ESPI) - bool espi_ready; -#endif }; diff --git a/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h b/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h index 8ec4770e99..1832c4877c 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h @@ -24,16 +24,6 @@ #define IN_ALL_S0_VALUE IN_PGOOD_ALL_CORE #define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED -#if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3) || \ - defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4) || \ - defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5) -/* - * Set if ESPI signals are required, so need to check - * whether ESPI is ready or not - */ -#define PWRSEQ_REQUIRE_ESPI -#endif - #else #warning("Input power signals state flags not defined"); #endif diff --git a/zephyr/subsys/ap_pwrseq/signal_vw.c b/zephyr/subsys/ap_pwrseq/signal_vw.c index 2e0d6a7ae5..a42be8ae85 100644 --- a/zephyr/subsys/ap_pwrseq/signal_vw.c +++ b/zephyr/subsys/ap_pwrseq/signal_vw.c @@ -3,6 +3,7 @@ * found in the LICENSE file. */ +#include #include #include @@ -34,18 +35,20 @@ const static struct vw_config vw_config[] = { DT_FOREACH_STATUS_OKAY(MY_COMPAT, INIT_ESPI_SIGNAL) }; -static bool signal_data[ARRAY_SIZE(vw_config)]; +/* + * Current signal value. + */ +static atomic_t signal_data; +/* + * Mask of valid signals. If the bus is reset, this is cleared, + * and when a signal is updated the associated bit is set to indicate + * the signal is valid. + */ +static atomic_t signal_valid; #define espi_dev DEVICE_DT_GET(DT_CHOSEN(intel_ap_pwrseq_espi)) -/* - * Mask of updated signals. If the bus is reset, this is cleared, - * and it is only when all the signals have been updated that - * notification is sent that the signals are ready. - */ -static uint8_t espi_mask; -static bool espi_valid; -BUILD_ASSERT(ARRAY_SIZE(vw_config) <= 8); +BUILD_ASSERT(ARRAY_SIZE(vw_config) <= (sizeof(atomic_t) * 8)); static void espi_handler(const struct device *dev, struct espi_callback *cb, @@ -61,53 +64,35 @@ static void espi_handler(const struct device *dev, case ESPI_BUS_RESET: /* - * Notify that the bus isn't ready, and clear - * the signal mask. + * Clear the signal valid mask. */ - notify_espi_ready(false); - espi_mask = 0; - espi_valid = false; + atomic_clear(&signal_valid); break; case ESPI_BUS_EVENT_VWIRE_RECEIVED: for (int i = 0; i < ARRAY_SIZE(vw_config); i++) { if (event.evt_details == vw_config[i].espi_signal) { - int value = vw_config[i].invert + bool value = vw_config[i].invert ? !event.evt_data : !!event.evt_data; - signal_data[i] = value; - if (!espi_valid) { - espi_mask |= BIT(i); - } + atomic_set_bit_to(&signal_data, i, value); + atomic_set_bit(&signal_valid, i); power_signal_interrupt(vw_config[i].signal, value); } } - /* - * When all the signals have been updated, notify that - * the ESPI signals are valid. - */ - if (!espi_valid && - espi_mask == BIT_MASK(ARRAY_SIZE(vw_config))) { - espi_valid = true; - LOG_DBG("ESPI signals valid"); - /* - * TODO(b/222946923): Convert to generalised - * callback pattern. - */ - notify_espi_ready(true); - } break; } } int power_signal_vw_get(enum pwr_sig_vw vw) { - if (vw < 0 || vw >= ARRAY_SIZE(vw_config)) { + if (vw < 0 || vw >= ARRAY_SIZE(vw_config) || + !atomic_test_bit(&signal_valid, vw)) { return -EINVAL; } - return signal_data[vw]; + return atomic_test_bit(&signal_data, vw); } void power_signal_vw_init(void) @@ -143,20 +128,18 @@ void power_signal_vw_init(void) * initialise the current values of the signals. */ if (espi_get_channel_status(espi_dev, ESPI_CHANNEL_VWIRE)) { - espi_valid = true; - for (int i = 0; i < ARRAY_SIZE(vw_config); i++) { uint8_t vw_value; if (espi_receive_vwire(espi_dev, vw_config[i].espi_signal, &vw_value) == 0) { - signal_data[i] = vw_config[i].invert + atomic_set_bit_to(&signal_data, i, + vw_config[i].invert ? !vw_value - : !!vw_value; + : !!vw_value); } } - notify_espi_ready(true); } } diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c index 69069d0bf4..c18fa68cc3 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c @@ -42,34 +42,26 @@ const char pwrsm_dbg[][25] = { #endif }; -#ifdef PWRSEQ_REQUIRE_ESPI - -void notify_espi_ready(bool ready) -{ - pwrseq_ctx.espi_ready = ready; -} -#endif - /* * Returns true if all signals in mask are valid. + * This is only done for virtual wire signals. */ static inline bool signals_valid(power_signal_mask_t signals) { -#ifdef PWRSEQ_REQUIRE_ESPI - if (!pwrseq_ctx.espi_ready) { #if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3) - if (signals & POWER_SIGNAL_MASK(PWR_SLP_S3)) - return false; + if ((signals & POWER_SIGNAL_MASK(PWR_SLP_S3)) && + power_signal_get(PWR_SLP_S3) < 0) + return false; #endif #if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4) - if (signals & POWER_SIGNAL_MASK(PWR_SLP_S3)) - return false; + if ((signals & POWER_SIGNAL_MASK(PWR_SLP_S4)) && + power_signal_get(PWR_SLP_S4) < 0) + return false; #endif #if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5) - if (signals & POWER_SIGNAL_MASK(PWR_SLP_S3)) - return false; -#endif - } + if ((signals & POWER_SIGNAL_MASK(PWR_SLP_S5)) && + power_signal_get(PWR_SLP_S4) < 0) + return false; #endif return true; } -- cgit v1.2.1 From 5fff42cef206613886f8cb1bfe8ded23e63b73fd Mon Sep 17 00:00:00 2001 From: Ting Shen Date: Thu, 7 Apr 2022 18:20:22 +0800 Subject: rt1739: add es2 workaround Add a workaround to fix the incorrect CCD_MODE_ODL behavior on RT1739 ES2. BUG=b:228403166 TEST=manually BRANCH=none Signed-off-by: Ting Shen Change-Id: I0a2702e9cb5bcb9146246b0bf3fd0ab3f9631b25 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3575706 Reviewed-by: Eric Yilun Lin Commit-Queue: Ting Shen Tested-by: Ting Shen --- driver/ppc/rt1739.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/driver/ppc/rt1739.c b/driver/ppc/rt1739.c index b407924432..a99ec91b5c 100644 --- a/driver/ppc/rt1739.c +++ b/driver/ppc/rt1739.c @@ -183,6 +183,14 @@ static int rt1739_workaround(int port) case RT1739_DEVICE_ID_ES2: CPRINTS("RT1739 ES2"); + /* enter hidden mode */ + RETURN_ERROR(write_reg(port, 0xF1, 0x62)); + RETURN_ERROR(write_reg(port, 0xF0, 0x86)); + /* turn off SWENB output */ + RETURN_ERROR(write_reg(port, 0xE0, 0x07)); + /* leave hidden mode */ + RETURN_ERROR(write_reg(port, 0xF1, 0)); + RETURN_ERROR(write_reg(port, 0xF0, 0)); break; default: -- cgit v1.2.1 From 98493ee98c32a837cbfcf9b5e6416b82e8a4f4eb Mon Sep 17 00:00:00 2001 From: Scott Chao Date: Wed, 13 Apr 2022 15:21:13 +0800 Subject: crota: remove type-c port 2 to avoid confusion - Remove all type-c port 2. - Move C2 to C1. - Modify ec.tasklist, TCPC C0 and C1 share one interrupt pin. BUG=b:219176652 BRANCH=none TEST=make -j BOARD=crota Signed-off-by: Scott Chao Change-Id: I1e67cc0943bc7090e66b71ed977534923a0c197d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3583918 Reviewed-by: caveh jalali --- board/crota/board.h | 13 ++++---- board/crota/ec.tasklist | 5 +-- board/crota/gpio.inc | 29 ++++++++-------- board/crota/i2c.c | 22 ++++++------- board/crota/usbc_config.c | 84 +++++++++++++++++++++++------------------------ board/crota/usbc_config.h | 2 +- 6 files changed, 74 insertions(+), 81 deletions(-) diff --git a/board/crota/board.h b/board/crota/board.h index 7df9426e5c..d13689971e 100644 --- a/board/crota/board.h +++ b/board/crota/board.h @@ -157,16 +157,16 @@ #define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0_C2_TCPC NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C0_C1_TCPC NPCX_I2C_PORT1_0 #define I2C_PORT_USB_C1_TCPC NPCX_I2C_PORT4_1 -#define I2C_PORT_USB_C0_C2_PPC NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C0_C1_PPC NPCX_I2C_PORT2_0 #define I2C_PORT_USB_C1_PPC NPCX_I2C_PORT6_1 -#define I2C_PORT_USB_C0_C2_BC12 NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C0_C1_BC12 NPCX_I2C_PORT2_0 #define I2C_PORT_USB_C1_BC12 NPCX_I2C_PORT6_1 -#define I2C_PORT_USB_C0_C2_MUX NPCX_I2C_PORT3_0 +#define I2C_PORT_USB_C0_C1_MUX NPCX_I2C_PORT3_0 #define I2C_PORT_USB_C1_MUX NPCX_I2C_PORT6_1 #define I2C_PORT_BATTERY NPCX_I2C_PORT5_0 @@ -177,12 +177,11 @@ #define I2C_ADDR_EEPROM_FLAGS 0x50 #define I2C_ADDR_MP2964_FLAGS 0x20 - /* * see b/174768555#comment22 */ #define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x56 -#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x57 +#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x57 /* Enabling Thunderbolt-compatible mode */ #define CONFIG_USB_PD_TBT_COMPAT_MODE @@ -249,7 +248,7 @@ enum sensor_id { enum ioex_port { IOEX_C0_NCT38XX = 0, - IOEX_C2_NCT38XX, + IOEX_C1_NCT38XX, IOEX_PORT_COUNT }; diff --git a/board/crota/ec.tasklist b/board/crota/ec.tasklist index a049ba3bfa..296654d39d 100644 --- a/board/crota/ec.tasklist +++ b/board/crota/ec.tasklist @@ -15,7 +15,6 @@ TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ @@ -27,6 +26,4 @@ TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C2, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), BASEBOARD_PD_INT_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) + TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(1) | BIT(0)), BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/crota/gpio.inc b/board/crota/gpio.inc index 9742a33b90..eccf10a36c 100644 --- a/board/crota/gpio.inc +++ b/board/crota/gpio.inc @@ -25,12 +25,12 @@ GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_ GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_FALLING, bc12_interrupt) -GPIO_INT(USB_C0_C2_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C0_C1_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, ppc_interrupt) GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_interrupt) -GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) -GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(USB_C2_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt) +GPIO_INT(USB_C1_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C1_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C1_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt) /* USED GPIOs: */ GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) @@ -46,12 +46,12 @@ GPIO(EC_I2C_MISC_SCL_R, PIN(B, 3), GPIO_INPUT) GPIO(EC_I2C_MISC_SDA_R, PIN(B, 2), GPIO_INPUT) GPIO(EC_I2C_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(EC_I2C_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C_USB_C0_C2_PPC_BC_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C_USB_C0_C2_PPC_BC_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C_USB_C0_C2_RT_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C_USB_C0_C2_RT_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C_USB_C0_C2_TCPC_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C_USB_C0_C2_TCPC_SDA, PIN(8, 7), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C1_PPC_BC_SCL, PIN(9, 2), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C1_PPC_BC_SDA, PIN(9, 1), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C1_RT_SCL, PIN(D, 1), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C1_RT_SDA, PIN(D, 0), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C1_TCPC_SCL, PIN(9, 0), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C1_TCPC_SDA, PIN(8, 7), GPIO_INPUT) GPIO(EC_KB_BL_EN_L, PIN(8, 6), GPIO_OUT_HIGH) GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT) GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) @@ -67,7 +67,7 @@ GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW) GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) -GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) +GPIO(USB_C0_C1_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) /* UART alternate functions */ @@ -138,7 +138,6 @@ IOEX(USB_C0_OC_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_ODR_HIGH) IOEX(USB_C0_FRS_EN, EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_LOW) IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_ODR_LOW) -IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) -IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 3), GPIO_ODR_HIGH) -IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH) -IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_LOW) +IOEX(USB_C1_RT_RST_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 2), GPIO_ODR_LOW) +IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 4), GPIO_ODR_HIGH) +IOEX(USB_C1_FRS_EN, EXPIN(IOEX_C1_NCT38XX, 0, 6), GPIO_LOW) diff --git a/board/crota/i2c.c b/board/crota/i2c.c index 6feaa309a9..1fc1126282 100644 --- a/board/crota/i2c.c +++ b/board/crota/i2c.c @@ -24,26 +24,26 @@ const struct i2c_port_t i2c_ports[] = { { /* I2C1 */ .name = "tcpc0,2", - .port = I2C_PORT_USB_C0_C2_TCPC, + .port = I2C_PORT_USB_C0_C1_TCPC, .kbps = 1000, - .scl = GPIO_EC_I2C_USB_C0_C2_TCPC_SCL, - .sda = GPIO_EC_I2C_USB_C0_C2_TCPC_SDA, + .scl = GPIO_EC_I2C_USB_C0_C1_TCPC_SCL, + .sda = GPIO_EC_I2C_USB_C0_C1_TCPC_SDA, }, { /* I2C2 */ .name = "ppc0,2", - .port = I2C_PORT_USB_C0_C2_PPC, + .port = I2C_PORT_USB_C0_C1_PPC, .kbps = 1000, - .scl = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SCL, - .sda = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SDA, + .scl = GPIO_EC_I2C_USB_C0_C1_PPC_BC_SCL, + .sda = GPIO_EC_I2C_USB_C0_C1_PPC_BC_SDA, }, { /* I2C3 */ .name = "retimer0,2", - .port = I2C_PORT_USB_C0_C2_MUX, + .port = I2C_PORT_USB_C0_C1_MUX, .kbps = 1000, - .scl = GPIO_EC_I2C_USB_C0_C2_RT_SCL, - .sda = GPIO_EC_I2C_USB_C0_C2_RT_SDA, + .scl = GPIO_EC_I2C_USB_C0_C1_RT_SCL, + .sda = GPIO_EC_I2C_USB_C0_C1_RT_SDA, }, { /* I2C5 */ @@ -75,7 +75,7 @@ static void set_board_legacy_i2c_speeds(void) ccprints("setting USB DB I2C buses to 400 kHz\n"); - i2c_set_freq(I2C_PORT_USB_C0_C2_TCPC, I2C_FREQ_400KHZ); - i2c_set_freq(I2C_PORT_USB_C0_C2_PPC, I2C_FREQ_400KHZ); + i2c_set_freq(I2C_PORT_USB_C0_C1_TCPC, I2C_FREQ_400KHZ); + i2c_set_freq(I2C_PORT_USB_C0_C1_PPC, I2C_FREQ_400KHZ); } DECLARE_HOOK(HOOK_INIT, set_board_legacy_i2c_speeds, HOOK_PRIO_INIT_I2C - 1); diff --git a/board/crota/usbc_config.c b/board/crota/usbc_config.c index 80db6295bb..a6a1e0f01c 100644 --- a/board/crota/usbc_config.c +++ b/board/crota/usbc_config.c @@ -42,9 +42,7 @@ #ifdef CONFIG_ZEPHYR enum ioex_port { IOEX_C0_NCT38XX = 0, - IOEX_C2_NCT38XX, - IOEX_ID_1_C0_NCT38XX, - IOEX_ID_1_C2_NCT38XX, + IOEX_C1_NCT38XX, IOEX_PORT_COUNT }; #endif /* CONFIG_ZEPHYR */ @@ -54,17 +52,17 @@ const struct tcpc_config_t tcpc_config[] = { [USBC_PORT_C0] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { - .port = I2C_PORT_USB_C0_C2_TCPC, + .port = I2C_PORT_USB_C0_C1_TCPC, .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, }, .drv = &nct38xx_tcpm_drv, .flags = TCPC_FLAGS_TCPCI_REV2_0 | TCPC_FLAGS_NO_DEBUG_ACC_CONTROL, }, - [USBC_PORT_C2] = { + [USBC_PORT_C1] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { - .port = I2C_PORT_USB_C0_C2_TCPC, + .port = I2C_PORT_USB_C0_C1_TCPC, .addr_flags = NCT38XX_I2C_ADDR1_4_FLAGS, }, .drv = &nct38xx_tcpm_drv, @@ -87,12 +85,12 @@ BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); /* USBC PPC configuration */ struct ppc_config_t ppc_chips[] = { [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0_C2_PPC, + .i2c_port = I2C_PORT_USB_C0_C1_PPC, .i2c_addr_flags = SYV682X_ADDR0_FLAGS, .drv = &syv682x_drv, }, - [USBC_PORT_C2] = { - .i2c_port = I2C_PORT_USB_C0_C2_PPC, + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_USB_C0_C1_PPC, .i2c_addr_flags = SYV682X_ADDR2_FLAGS, .drv = &syv682x_drv, }, @@ -107,8 +105,8 @@ static const struct usb_mux usbc0_tcss_usb_mux = { .driver = &virtual_usb_mux_driver, .hpd_update = &virtual_hpd_update, }; -static const struct usb_mux usbc2_tcss_usb_mux = { - .usb_port = USBC_PORT_C2, +static const struct usb_mux usbc1_tcss_usb_mux = { + .usb_port = USBC_PORT_C1, .driver = &virtual_usb_mux_driver, .hpd_update = &virtual_hpd_update, }; @@ -117,17 +115,17 @@ const struct usb_mux usb_muxes[] = { .usb_port = USBC_PORT_C0, .driver = &bb_usb_retimer, .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_C0_C2_MUX, + .i2c_port = I2C_PORT_USB_C0_C1_MUX, .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, .next_mux = &usbc0_tcss_usb_mux, }, - [USBC_PORT_C2] = { - .usb_port = USBC_PORT_C2, + [USBC_PORT_C1] = { + .usb_port = USBC_PORT_C1, .driver = &bb_usb_retimer, .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_C0_C2_MUX, - .i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR, - .next_mux = &usbc2_tcss_usb_mux, + .i2c_port = I2C_PORT_USB_C0_C1_MUX, + .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc1_tcss_usb_mux, }, }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); @@ -136,18 +134,18 @@ BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); /* BC1.2 charger detect configuration */ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0_C2_BC12, + .i2c_port = I2C_PORT_USB_C0_C1_BC12, .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, }, - [USBC_PORT_C2] = { - .i2c_port = I2C_PORT_USB_C0_C2_BC12, + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_USB_C0_C1_BC12, .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS, }, }; BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); /* - * USB C0 and C2 uses burnside bridge chips and have their reset + * USB C0 and C1 uses burnside bridge chips and have their reset * controlled by their respective TCPC chips acting as GPIO expanders. * * ioex_init() is normally called before we take the TCPCs out of @@ -157,14 +155,14 @@ BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); struct ioexpander_config_t ioex_config[] = { [IOEX_C0_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_host_port = I2C_PORT_USB_C0_C1_TCPC, .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, .drv = &nct38xx_ioexpander_drv, .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, }, - [IOEX_C2_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, - .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, + [IOEX_C1_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C1_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR1_4_FLAGS, .drv = &nct38xx_ioexpander_drv, .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, }, @@ -223,8 +221,8 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) if (me->usb_port == USBC_PORT_C0) { rst_signal = IOEX_USB_C0_RT_RST_ODL; - } else if (me->usb_port == USBC_PORT_C2) { - rst_signal = IOEX_USB_C2_RT_RST_ODL; + } else if (me->usb_port == USBC_PORT_C1) { + rst_signal = IOEX_USB_C1_RT_RST_ODL; } else { return EC_ERROR_INVAL; } @@ -258,7 +256,7 @@ void board_reset_pd_mcu(void) { enum gpio_signal tcpc_rst; - tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL; + tcpc_rst = GPIO_USB_C0_C1_TCPC_RST_ODL; gpio_set_level(tcpc_rst, 0); @@ -283,23 +281,23 @@ static void board_tcpc_init(void) /* * These IO expander pins are implemented using the - * C0/C2 TCPC, so they must be set up after the TCPC has + * C0/C1 TCPC, so they must be set up after the TCPC has * been taken out of reset. */ ioex_init(IOEX_C0_NCT38XX); - ioex_init(IOEX_C2_NCT38XX); + ioex_init(IOEX_C1_NCT38XX); /* Enable PPC interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C0_C1_TCPC_INT_ODL); #ifndef CONFIG_ZEPHYR /* Enable BC1.2 interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); #endif /* !CONFIG_ZEPHYR */ } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); @@ -308,8 +306,8 @@ uint16_t tcpc_get_alert_status(void) { uint16_t status = 0; - if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0) - status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2; + if (gpio_get_level(GPIO_USB_C0_C1_TCPC_INT_ODL) == 0) + status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_1; return status; } @@ -318,15 +316,15 @@ int ppc_get_alert_status(int port) { if (port == USBC_PORT_C0) return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else if (port == USBC_PORT_C2) - return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0; + else if (port == USBC_PORT_C1) + return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; return 0; } void tcpc_alert_event(enum gpio_signal signal) { switch (signal) { - case GPIO_USB_C0_C2_TCPC_INT_ODL: + case GPIO_USB_C0_C1_TCPC_INT_ODL: schedule_deferred_pd_interrupt(USBC_PORT_C0); break; default: @@ -340,8 +338,8 @@ void bc12_interrupt(enum gpio_signal signal) case GPIO_USB_C0_BC12_INT_ODL: task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); break; - case GPIO_USB_C2_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P2, USB_CHG_EVENT_BC12); + case GPIO_USB_C1_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); break; default: break; @@ -354,8 +352,8 @@ void ppc_interrupt(enum gpio_signal signal) case GPIO_USB_C0_PPC_INT_ODL: syv682x_interrupt(USBC_PORT_C0); break; - case GPIO_USB_C2_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C2); + case GPIO_USB_C1_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C1); break; default: break; @@ -376,7 +374,7 @@ __override bool board_is_dts_port(int port) __override bool board_is_tbt_usb4_port(int port) { - if (port == USBC_PORT_C0 || port == USBC_PORT_C2) + if (port == USBC_PORT_C0 || port == USBC_PORT_C1) return true; return false; diff --git a/board/crota/usbc_config.h b/board/crota/usbc_config.h index 2c21d83f0c..55134ce79e 100644 --- a/board/crota/usbc_config.h +++ b/board/crota/usbc_config.h @@ -14,7 +14,7 @@ enum usbc_port { USBC_PORT_C0 = 0, - USBC_PORT_C2, + USBC_PORT_C1, USBC_PORT_COUNT }; -- cgit v1.2.1 From cc64bd97f25244e7facc3f6bbfb12c7362f9f19c Mon Sep 17 00:00:00 2001 From: Andrew McRae Date: Thu, 14 Apr 2022 23:53:19 +1000 Subject: zephyr: ap_pwrseq: Fix reference to SLP_S5 Fix the reference to PWR_SLP_S5. BUG=b:203446068 TEST=zmake build nivviks BRANCH=none Signed-off-by: Andrew McRae Change-Id: I11f490872d567bf510d552ee0e9eb4dc2da2b7d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3586793 Reviewed-by: Al Semjonovs Commit-Queue: Al Semjonovs --- zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c index c18fa68cc3..bcc34bd32d 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c @@ -60,7 +60,7 @@ static inline bool signals_valid(power_signal_mask_t signals) #endif #if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5) if ((signals & POWER_SIGNAL_MASK(PWR_SLP_S5)) && - power_signal_get(PWR_SLP_S4) < 0) + power_signal_get(PWR_SLP_S5) < 0) return false; #endif return true; -- cgit v1.2.1 From 7c396b2737621c02e33ec0709638ab436ab247a1 Mon Sep 17 00:00:00 2001 From: Diana Z Date: Tue, 5 Apr 2022 10:21:48 -0600 Subject: Skyrim: Tune RSMRST wait time On cold boot, RSMRST may take longer to assert than during a warm boot. Lengthen the time we wait for this signal. BRANCH=None BUG=b:227296845 TEST=on skyrim, observe that T1a boot timing is met during cold boots Signed-off-by: Diana Z Change-Id: I55103b759e012838e631bb19b16a4703e81535ab Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3572183 Reviewed-by: Robert Zieba Commit-Queue: Robert Zieba --- zephyr/projects/skyrim/power_signals.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/zephyr/projects/skyrim/power_signals.c b/zephyr/projects/skyrim/power_signals.c index f36f2ae576..e85cea1f04 100644 --- a/zephyr/projects/skyrim/power_signals.c +++ b/zephyr/projects/skyrim/power_signals.c @@ -81,10 +81,10 @@ DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_POST_I2C); /** * b/227296844: On G3->S5, wait for RSMRST_L to be deasserted before asserting - * PCH_PWRBTN_L. This typically takes 32-35 ms in testing. Then wait an + * PCH_PWRBTN_L. This can be as long as ~65ms after cold boot. Then wait an * additional delay of T1a defined in the EDS before changing the power button. */ -#define RSMRST_WAIT_DELAY 40 +#define RSMRST_WAIT_DELAY 70 #define EDS_PWR_BTN_RSMRST_T1A_DELAY 16 void board_pwrbtn_to_pch(int level) { -- cgit v1.2.1 From 9f530cd97ef5a64e4712128051a17d5de8b43e53 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Tue, 12 Apr 2022 22:56:15 +0000 Subject: ectool: Read bInterfaceNumber correctly This patch makes find_interface_with_endpoint use bInterfaceNumber explicitly instead of the i iterator, which could be different from the discovered interface number if there is no interface at index 0. BUG=b:229012657 BRANCH=None TEST=Run 'ectool -d 18d1:5022 rgbkbd clear 0' on Vell. Signed-off-by: Daisuke Nojiri Change-Id: I43ccb1ad926b0f699eed22fb2567e6ae6f8e1eaa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3584920 Reviewed-by: Parth Malkan Reviewed-by: Zhuohao Lee --- util/comm-usb.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/util/comm-usb.c b/util/comm-usb.c index 3810af6ea8..9b362aa2f4 100644 --- a/util/comm-usb.c +++ b/util/comm-usb.c @@ -125,8 +125,9 @@ static int find_interface_with_endpoint(struct usb_endpoint *uep) ep = &iface->endpoint[k]; if (ep->bEndpointAddress == uep->ep_num) { uep->chunk_len = ep->wMaxPacketSize; + r = iface->bInterfaceNumber; libusb_free_config_descriptor(conf); - return i; + return r; } } } -- cgit v1.2.1 From 265691a2fe290e0fa54ecccba151a5c63dd73e47 Mon Sep 17 00:00:00 2001 From: Dawid Niedzwiecki Date: Thu, 14 Apr 2022 14:36:16 +0200 Subject: usbc: fix initializing pd timers In the pd_timer_init function, initialize timers related to the port passed as an argument, not timers for all ports. The bug could impact already started timers of other ports than the one being initialized. BUG=b:208435177 TEST=zmake testall & make buildall & run faft_pd and make sure there is no regression BRANCH=none Signed-off-by: Dawid Niedzwiecki Change-Id: Ide07cf2ac392b9ce679a70e8cbe9ce038d294073 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3586427 Reviewed-by: Boris Mittelberg Tested-by: Boris Mittelberg Reviewed-by: caveh jalali Commit-Queue: caveh jalali --- common/usbc/usb_pd_timer.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/common/usbc/usb_pd_timer.c b/common/usbc/usb_pd_timer.c index d215590371..a1859ac9e9 100644 --- a/common/usbc/usb_pd_timer.c +++ b/common/usbc/usb_pd_timer.c @@ -131,12 +131,11 @@ void pd_timer_init(int port) count[port] = 0; /* - * timer_active and timer_disabled are atomic_t global arrays. - * Set them to the initial state. + * Set timers to init state for "port". */ - for (int i = 0; i < ARRAY_SIZE(timer_active); i++) { - *(timer_active + i) = 0; - *(timer_disabled + i) = ~0; + for (int bit = 0; bit < PD_TIMER_COUNT; bit++) { + PD_CLR_ACTIVE(port, bit); + PD_SET_DISABLED(port, bit); } } -- cgit v1.2.1