From 6fdd5a2ebf2fdc5728ae4281e70bf73e3ef4eb6f Mon Sep 17 00:00:00 2001 From: Devin Lu Date: Wed, 20 Jan 2021 17:34:34 +0800 Subject: elemi: Change thermal and fan configuration This patch changes thermal halt/alert, fan maximum/off temperature point and fan minimum/maximum speed. BUG=b:177635236 BRANCH=firmware-volteer-13672.B-main TEST=Thermal team verified thermal policy is expected. Signed-off-by: Devin Lu Change-Id: I165dde7585aff055659187ab08511584c836cd4b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639432 Reviewed-by: Sumeet R Pawnikar Reviewed-by: Keith Short --- board/elemi/board.c | 57 +++++++++++++++++++++++------------------------------ 1 file changed, 25 insertions(+), 32 deletions(-) diff --git a/board/elemi/board.c b/board/elemi/board.c index b8971f8aa8..e8983019d6 100644 --- a/board/elemi/board.c +++ b/board/elemi/board.c @@ -77,17 +77,10 @@ const struct fan_conf fan_conf_0 = { .enable_gpio = GPIO_EN_PP5000_FAN, }; -/* - * Fan specs from datasheet: - * Max speed 5900 rpm (+/- 7%), minimum duty cycle 30%. - * Minimum speed not specified by RPM. Set minimum RPM to max speed (with - * margin) x 30%. - * 5900 x 1.07 x 0.30 = 1894, round up to 1900 - */ const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1900, - .rpm_start = 1900, - .rpm_max = 5900, + .rpm_min = 2500, + .rpm_start = 2500, + .rpm_max = 6500, }; const struct fan_t fans[FAN_CH_COUNT] = { @@ -107,43 +100,43 @@ const struct fan_t fans[FAN_CH_COUNT] = { */ const static struct ec_thermal_config thermal_cpu = { .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), + [EC_TEMP_THRESH_HALT] = C_TO_K(70), }, .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), + [EC_TEMP_THRESH_HIGH] = C_TO_K(58), }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), + .temp_fan_off = C_TO_K(40), + .temp_fan_max = C_TO_K(60), }; -/* - * Inductor limits - used for both charger and PP3300 regulator - * - * Need to use the lower of the charger IC, PP3300 regulator, and the inductors - * - * Charger max recommended temperature 100C, max absolute temperature 125C - * PP3300 regulator: operating range -40 C to 145 C - * - * Inductors: limit of 125c - * PCB: limit is 80c - */ -const static struct ec_thermal_config thermal_inductor = { +const static struct ec_thermal_config thermal_charger = { .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), [EC_TEMP_THRESH_HALT] = C_TO_K(80), }, .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), }, .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), + .temp_fan_max = C_TO_K(70), }; +const static struct ec_thermal_config thermal_regulator = { + .temp_host = { + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), + [EC_TEMP_THRESH_HALT] = C_TO_K(70), + }, + .temp_host_release = { + [EC_TEMP_THRESH_HIGH] = C_TO_K(58), + }, + .temp_fan_off = C_TO_K(40), + .temp_fan_max = C_TO_K(55), +}; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, + [TEMP_SENSOR_1_CHARGER] = thermal_charger, + [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_regulator, [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, [TEMP_SENSOR_4_FAN] = thermal_cpu, }; -- cgit v1.2.1 From 7ac3b8771f961d0e9bda31e68f37ad7b0ca9af6c Mon Sep 17 00:00:00 2001 From: Yu-An Chen Date: Tue, 19 Jan 2021 14:15:16 +0800 Subject: Metaknight: Add temp sensor to read temperature Add temp sensor for reading temperature. BUG=b:177854439 BRANCH=main TEST=In console input "temps" to check temperature. Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: Ifc9c3d5c2e93ddd8267353fa9fd31367e539c3d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637154 Reviewed-by: Henry Sun Commit-Queue: Henry Sun --- board/metaknight/board.c | 15 +++++++++++++++ board/metaknight/board.h | 12 ++++++++++++ 2 files changed, 27 insertions(+) diff --git a/board/metaknight/board.c b/board/metaknight/board.c index c93ebc52ad..975afbcaea 100644 --- a/board/metaknight/board.c +++ b/board/metaknight/board.c @@ -19,6 +19,8 @@ #include "driver/accel_kionix.h" #include "driver/accelgyro_bmi_common.h" #include "driver/accelgyro_lsm6dsm.h" +#include "driver/temp_sensor/thermistor.h" +#include "temp_sensor.h" #include "driver/bc12/pi3usb9201.h" #include "driver/charger/isl923x.h" #include "driver/retimer/nb7v904m.h" @@ -207,6 +209,19 @@ const struct adc_t adc_channels[] = { }; BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); +/* Thermistors */ +const struct temp_sensor_t temp_sensors[] = { + [TEMP_SENSOR_1] = {.name = "Memory", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_1}, + [TEMP_SENSOR_2] = {.name = "Ambient", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_2}, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + /* Enable HDMI any time the SoC is on */ static void hdmi_enable(void) { diff --git a/board/metaknight/board.h b/board/metaknight/board.h index ad37dc6604..2761f0346f 100644 --- a/board/metaknight/board.h +++ b/board/metaknight/board.h @@ -44,6 +44,12 @@ #define CONFIG_PWM #define NPCX7_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ +/* Temp sensor */ +#define CONFIG_TEMP_SENSOR +#define CONFIG_THERMISTOR_NCP15WB +#define CONFIG_STEINHART_HART_3V3_51K1_47K_4050B +#define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_EN_PP3300_A + /* USB */ #define CONFIG_BC12_DETECT_PI3USB9201 #define CONFIG_USBC_RETIMER_NB7V904M @@ -163,6 +169,12 @@ enum adc_channel { ADC_CH_COUNT }; +enum temp_sensor_id { + TEMP_SENSOR_1, + TEMP_SENSOR_2, + TEMP_SENSOR_COUNT +}; + enum sensor_id { LID_ACCEL, BASE_ACCEL, -- cgit v1.2.1 From 8b5963199b0a7da1274b8ce6296745e01ebba079 Mon Sep 17 00:00:00 2001 From: "yu-an.chen" Date: Wed, 13 Jan 2021 13:39:59 +0800 Subject: max14637: Switch should not be kept open when PD adapter is disconnected Root Cause: D+ and D- of PD adapter are shorted so chip would detect PD adapter as the DCP. As a result, chip would set USB 2 switch open based on product spec. Later on once USB 2.0 storage is attached, DUT can't recognize it because USB 2.0 data path is blocked by chip now before introducing this CL. Solution: Whenever adapter or USB client device is disconnected from a port of DUT, we re-trigger the bc12_detect() so chip will be off then on for detecting the status again. In this case, the D+/D- are NC so chip will detect it as the SDP and keep this status afterward. When USB 2.0 storage is connected later, bc12_detect will not be called again due to DUT is in source role. At this moment, USB switch is closed so USB 2.0 path is good. And there is no BC12 detecting cycle happened so we will not hit issue resolved in CL:*2364342 as well. When adapter is connected again, bc12_detect will be triggered for detecting DCP / SDP / CDP. BUG=b:177265749 BRANCH=octopus TEST=make buildall -j 8 TEST=check lsblk , usb2 device is exist after reproduce step Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I769e9f97daf86992259d8da0bbb38a1068bd8a5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626791 Tested-by: Yu-An Chen Reviewed-by: Marco Chen Commit-Queue: Marco Chen --- driver/bc12/max14637.c | 1 + 1 file changed, 1 insertion(+) diff --git a/driver/bc12/max14637.c b/driver/bc12/max14637.c index de0971132d..a2bbfd4fb7 100644 --- a/driver/bc12/max14637.c +++ b/driver/bc12/max14637.c @@ -144,6 +144,7 @@ static void detect_or_power_down_ic(const int port) } else { /* Let charge manager know there's no more charge available. */ charge_manager_update_charge(CHARGE_SUPPLIER_OTHER, port, NULL); + bc12_detect(port); #if defined(CONFIG_POWER_PP5000_CONTROL) && defined(HAS_TASK_CHIPSET) /* Issue a request to turn off the rail. */ power_5v_enable(task_get_current(), 0); -- cgit v1.2.1 From d032dc3c0eda33a3e0361e6f4794fc8e70e915ae Mon Sep 17 00:00:00 2001 From: "yu-an.chen" Date: Mon, 25 Jan 2021 08:45:56 +0800 Subject: octopus: set CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS to 100ms Set CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS to 100 ms BUG=b:177265749 BRANCH=octopus TEST=make buildall -j 8 Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I175b8df258c92b155857a0b41d930fe157420a31 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644781 Tested-by: Yu-An Chen Reviewed-by: Marco Chen Commit-Queue: Marco Chen Auto-Submit: Yu-An Chen --- baseboard/octopus/baseboard.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index 44868cc475..c342e48687 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -216,6 +216,8 @@ #define CONFIG_USB_PD_TCPM_MUX #define CONFIG_USB_PD_TCPM_TCPCI #define CONFIG_BC12_DETECT_MAX14637 +#undef CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS +#define CONFIG_BC12_MAX14637_DELAY_FROM_OFF_TO_ON_MS 100 #define CONFIG_HOSTCMD_PD_CONTROL #define CONFIG_CMD_PPC_DUMP -- cgit v1.2.1 From eb3d6b6b4f857f6525d1fa251ef22b8dc342f09d Mon Sep 17 00:00:00 2001 From: Rob Barnes Date: Fri, 22 Jan 2021 12:55:46 -0700 Subject: guybrush: Enable BOARD_RESET_AFTER_POWER_ON This was required on Zork. It's also needed on guybrush. BUG=None TEST=Build BRANCH=None Signed-off-by: Rob Barnes Change-Id: I7a81cd61cff2f39bf4d6a76da9fef5453c2e52dc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645074 Reviewed-by: Denis Brockus Reviewed-by: Diana Z --- baseboard/guybrush/baseboard.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/baseboard/guybrush/baseboard.h b/baseboard/guybrush/baseboard.h index 5fc1c28eca..f4998580ec 100644 --- a/baseboard/guybrush/baseboard.h +++ b/baseboard/guybrush/baseboard.h @@ -44,6 +44,13 @@ #define GPIO_PCH_SYS_PWROK GPIO_EC_SOC_PWR_GOOD #define GPIO_SYS_RESET_L GPIO_EC_SYS_RST_L #define GPIO_EN_PWR_A GPIO_EN_PWR_Z1 +/* + * On power-on, H1 releases the EC from reset but then quickly asserts and + * releases the reset a second time. This means the EC sees 2 resets: + * (1) power-on reset, (2) reset-pin reset. This config will + * allow the second reset to be treated as a power-on. + */ +#define CONFIG_BOARD_RESET_AFTER_POWER_ON /* Thermal Config */ #define CONFIG_ADC -- cgit v1.2.1 From 24c5daa48c94cdf6160ee111d346690817238413 Mon Sep 17 00:00:00 2001 From: Keith Short Date: Fri, 22 Jan 2021 08:04:56 -0700 Subject: tcpmv2: ensure the USB mux state is only changed in the PD task The USB mux code does not provide any mutex protection. In addition the virtual USB mux code must be run from the PD task to handle synchronization of the EC_CMD_USB_PD_MUX_ACK host command. Move the USB mux updates into the common power state handler for the type-C state machine. BUG=b:178186846 BRANCH=volteer TEST=make buildall TEST=Connect Gatkex to Voxel, execute EC reboot and verify assertion is fixed. Signed-off-by: Keith Short Change-Id: I0a18d0f5c51eedb4ecb0c275ea1235f7838246a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644843 Reviewed-by: Abe Levkoy Tested-by: Chiranjeevi Rapolu --- common/usbc/usb_tc_drp_acc_trysrc_sm.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/common/usbc/usb_tc_drp_acc_trysrc_sm.c b/common/usbc/usb_tc_drp_acc_trysrc_sm.c index f63fd5075f..293f5bf1fa 100644 --- a/common/usbc/usb_tc_drp_acc_trysrc_sm.c +++ b/common/usbc/usb_tc_drp_acc_trysrc_sm.c @@ -1734,14 +1734,13 @@ __maybe_unused static void handle_new_power_state(int port) * boots up */ dpm_set_mode_exit_request(port); - - /* - * The following function will disconnect both USB and - * DP mux, as the chipset is transitioning to OFF. - */ - set_usb_mux_with_current_data_role(port); } } + /* + * Set the USB mux according to the new power state. If the chipset + * is transitioning to OFF, this disconnects USB and DP mux. + */ + set_usb_mux_with_current_data_role(port); } #if defined(CONFIG_USB_PD_ALT_MODE) && !defined(CONFIG_USB_PD_ALT_MODE_DFP) @@ -3604,7 +3603,6 @@ static void pd_chipset_startup(void) int i; for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - set_usb_mux_with_current_data_role(i); pd_set_dual_role_and_event(i, pd_get_drp_state_in_suspend(), PD_EVENT_UPDATE_DUAL_ROLE -- cgit v1.2.1 From d289734a5c94de71b512df8b4736d406df9b6524 Mon Sep 17 00:00:00 2001 From: Ayushee Shah Date: Thu, 21 Jan 2021 10:48:29 -0800 Subject: TBT: Correct pdcable command This CL changes the revision field in the pdcable console command to check the PD revision instead of checking the VDM version. BUG=None BRANCH=None TEST=Able to get the 'Cable Rev' field as 3.0 for PD 3.0 cables Signed-off-by: Ayushee Shah Change-Id: I7e10b2e352bc78c23c8578361b577d04a9491e7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643576 Reviewed-by: Tanu Malhotra Reviewed-by: Keith Short --- common/usb_pd_console_cmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/usb_pd_console_cmd.c b/common/usb_pd_console_cmd.c index c1b263907a..1448424213 100644 --- a/common/usb_pd_console_cmd.c +++ b/common/usb_pd_console_cmd.c @@ -133,7 +133,7 @@ static int command_cable(int argc, char **argv) } ccprintf("%s\n", cable_type[ptype]); - cable_rev = pd_get_vdo_ver(port, TCPC_TX_SOP_PRIME); + cable_rev = pd_get_rev(port, TCPC_TX_SOP_PRIME); disc = pd_get_am_discovery(port, TCPC_TX_SOP_PRIME); cable_mode_resp.raw_value = pd_get_tbt_mode_vdo(port, TCPC_TX_SOP_PRIME); -- cgit v1.2.1 From c6baaa7c8201decf21362d55973c7176d300df95 Mon Sep 17 00:00:00 2001 From: Rob Barnes Date: Wed, 6 Jan 2021 09:03:59 -0700 Subject: guybrush: implement usb_pd_policy stubs Implement pd stubs in usb_pd_policy. Based on zork implementation. BUG=b:175400400 TEST=Build BRANCH=None Signed-off-by: Rob Barnes Change-Id: I4b87518bf758d3eb7245ad4eafd5a99dd824a150 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2613225 Reviewed-by: Diana Z --- baseboard/guybrush/usb_pd_policy.c | 46 +++++++++++++++++++++++++++++++++----- 1 file changed, 41 insertions(+), 5 deletions(-) diff --git a/baseboard/guybrush/usb_pd_policy.c b/baseboard/guybrush/usb_pd_policy.c index 213a457593..ac92a6e0ad 100644 --- a/baseboard/guybrush/usb_pd_policy.c +++ b/baseboard/guybrush/usb_pd_policy.c @@ -20,19 +20,55 @@ int pd_check_vconn_swap(int port) { - /* TODO */ - return 0; + /* + * Do not allow vconn swap 5V rail is off + * S5_PGOOD depends on PG_PP5000_S5 being asserted, + * so GPIO_S5_PGOOD is a reasonable proxy for PP5000_S5 + */ + return gpio_get_level(GPIO_S5_PGOOD); } void pd_power_supply_reset(int port) { - /* TODO */ + /* + * Don't need to shutoff VBus if we are not sourcing it + * TODO: Ensure Vbus sourcing is being disabled appropriately to + * avoid invalid TC states + */ + if (ppc_is_sourcing_vbus(port)) { + /* Disable VBUS. */ + ppc_vbus_source_enable(port, 0); + + /* Enable discharge if we were previously sourcing 5V */ + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) + pd_set_vbus_discharge(port, 1); + } + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); } int pd_set_power_supply_ready(int port) { - /* TODO */ - return 0; + int rv; + + /* Disable charging. */ + rv = ppc_vbus_sink_enable(port, 0); + if (rv) + return rv; + + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) + pd_set_vbus_discharge(port, 0); + + /* Provide Vbus. */ + rv = ppc_vbus_source_enable(port, 1); + if (rv) + return rv; + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; } int board_vbus_source_enabled(int port) -- cgit v1.2.1 From fbca51787502977287808d0a8d23fa3d480d8cd5 Mon Sep 17 00:00:00 2001 From: Vincent Palatin Date: Tue, 19 Jan 2021 12:58:41 +0000 Subject: pd: fix superspeed mux steering on UFP When the device has a USB superspeed UFP (which is uncommon, this is either servo v4.1 or a laptop port in SS device-mode), if we connect as a sink *before* trying PD communication, we should connect the SS mux without waiting for the partner PD comm capability as we might never be able to communicate with it over PD. Signed-off-by: Vincent Palatin BUG=b:150614702 BRANCH=servo TEST=use the sink mode enabled by 'cc pdsnk', connect to a USB-C Chromebook, try both video output on USB-C->mini-DP and USB 3.0. Change-Id: Iea0409fce2cb7aca089814ae406a7c05848dd8e4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637647 Tested-by: Vincent Palatin Reviewed-by: Diana Z Commit-Queue: Vincent Palatin --- common/mock/usb_tc_sm_mock.c | 5 +++++ common/usb_common.c | 3 ++- test/usb_typec_drp_acc_trysrc.c | 6 ++++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/common/mock/usb_tc_sm_mock.c b/common/mock/usb_tc_sm_mock.c index cb866a9268..6923e97f9d 100644 --- a/common/mock/usb_tc_sm_mock.c +++ b/common/mock/usb_tc_sm_mock.c @@ -172,6 +172,11 @@ bool pd_get_partner_dual_role_power(int port) return true; } +bool pd_capable(int port) +{ + return true; +} + void pd_set_suspend(int port, int suspend) { } diff --git a/common/usb_common.c b/common/usb_common.c index 37cd0886bd..81e9d2f24f 100644 --- a/common/usb_common.c +++ b/common/usb_common.c @@ -430,11 +430,12 @@ mux_state_t get_mux_mode_to_set(int port) return USB_PD_MUX_NONE; /* - * If the power role is sink and the partner device is not capable + * If the power role is sink and the PD partner device is not capable * of USB communication then disconnect. */ if (IS_ENABLED(CONFIG_USB_PD_DUAL_ROLE) && pd_get_power_role(port) == PD_ROLE_SINK && + pd_capable(port) && !pd_get_partner_usb_comm_capable(port)) return USB_PD_MUX_NONE; diff --git a/test/usb_typec_drp_acc_trysrc.c b/test/usb_typec_drp_acc_trysrc.c index f33c7079cf..3d329606ba 100644 --- a/test/usb_typec_drp_acc_trysrc.c +++ b/test/usb_typec_drp_acc_trysrc.c @@ -87,6 +87,12 @@ __maybe_unused static int test_mux_con_dis_as_snk(void) mock_tcpc.should_print_call = false; mock_usb_mux.num_set_calls = 0; + /* + * we expect a PD-capable partner to be able to check below + * whether it is data capable. + */ + tc_pd_connection(0, 1); + /* Update CC lines send state machine event to process */ mock_tcpc.cc1 = TYPEC_CC_VOLT_RP_3_0; mock_tcpc.cc2 = TYPEC_CC_VOLT_OPEN; -- cgit v1.2.1 From c109df3a44c7a7e3b0504812d89aa7b68c76da73 Mon Sep 17 00:00:00 2001 From: Wai-Hong Tam Date: Fri, 22 Jan 2021 16:05:14 -0800 Subject: Trogdor: Don't make pressing a key a wake source if no keyboard If the board doesn't have a task to scan keys, it doesn't have an internal keyboard. Don't make pressing a key (the event EC_MKBP_EVENT_KEY_MATRIX) a wake source in this case. BRANCH=Trogdor BUG=b:178231341 TEST=Checked the wakemask bit:0 EC_MKBP_EVENT_KEY_MATRIX is unset $ ectool mkbpwakemask get event MBKP event wake mask: 0x00000406 Change-Id: I5a8f208ad2727e135f7d8a756b697152af6cfcf0 Signed-off-by: Wai-Hong Tam Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645744 Reviewed-by: Douglas Anderson --- baseboard/trogdor/baseboard.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/baseboard/trogdor/baseboard.h b/baseboard/trogdor/baseboard.h index ec459287f1..a785671e8b 100644 --- a/baseboard/trogdor/baseboard.h +++ b/baseboard/trogdor/baseboard.h @@ -203,10 +203,16 @@ EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) /* And the MKBP events */ +#ifdef HAS_TASK_KEYSCAN #define CONFIG_MKBP_EVENT_WAKEUP_MASK \ (BIT(EC_MKBP_EVENT_KEY_MATRIX) | \ BIT(EC_MKBP_EVENT_HOST_EVENT) | \ BIT(EC_MKBP_EVENT_SENSOR_FIFO)) +#else +#define CONFIG_MKBP_EVENT_WAKEUP_MASK \ + (BIT(EC_MKBP_EVENT_HOST_EVENT) | \ + BIT(EC_MKBP_EVENT_SENSOR_FIFO)) +#endif #ifndef __ASSEMBLER__ -- cgit v1.2.1 From 0f7a6d893cd3ae751a587d763e8d01394b69255e Mon Sep 17 00:00:00 2001 From: Paul Fagerburg Date: Fri, 22 Jan 2021 18:37:45 -0700 Subject: zephyr: test: provide Kconfig defaults for tests When we're building a unit test, provide defaults for many of the hardware options that don't need to be included in a unit test, or have to be there for the linker's sake but aren't actually used. BUG=b:178220157 BRANCH=none TEST=`zmake testall` Signed-off-by: Paul Fagerburg Change-Id: Iaab2a3a3a8175e7e08099467947cf183b707cef6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645695 Commit-Queue: Paul Fagerburg Commit-Queue: Jack Rosenthal Tested-by: Paul Fagerburg Reviewed-by: Jack Rosenthal --- zephyr/Kconfig | 3 +++ zephyr/app/ec/Kconfig | 13 +++++++++++++ 2 files changed, 16 insertions(+) diff --git a/zephyr/Kconfig b/zephyr/Kconfig index a1d2d142e5..55f3b74c12 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -208,6 +208,7 @@ endif # PLATFORM_EC_FLASH menuconfig PLATFORM_EC_KEYBOARD bool "Keyboard support" select HAS_TASK_KEYSCAN + default n if ARCH_POSIX default y help Enable compilation of support for scanning a keyboard and providing @@ -275,6 +276,7 @@ config PLATFORM_EC_HOOKS config PLATFORM_EC_I2C bool "I2C shim" + default n if ARCH_POSIX default y help Enable compilation of the EC i2c module. Once enabled, it will be @@ -285,6 +287,7 @@ config PLATFORM_EC_I2C menuconfig PLATFORM_EC_HOSTCMD bool "Host commands" + default n if ARCH_POSIX default y if AP select HAS_TASK_HOSTCMD help diff --git a/zephyr/app/ec/Kconfig b/zephyr/app/ec/Kconfig index 22519a20fa..44f8690f64 100644 --- a/zephyr/app/ec/Kconfig +++ b/zephyr/app/ec/Kconfig @@ -42,51 +42,64 @@ config CROS_EC_ACTIVE_COPY When the active copy name is output to a console, this string will be displayed. +# When building for the host, we still need values for the various memory +# sizes, though they aren't actually used, so just set some reasonable-looking +# values and then ignore them. config CROS_EC_RAM_SIZE hex "The total available RAM size." + default 0x0000f800 if ARCH_POSIX help This value describes the total available RAM size for the chip. config CROS_EC_DATA_RAM_SIZE hex "The total available RAM size for data." + default 0x00010000 if ARCH_POSIX help This value describes the total available RAM size for data on the chip. config CROS_EC_RAM_BASE hex "Base address of RAM for the chip." + default 0x200c0000 if ARCH_POSIX help Base address of RAM for the chip. config CROS_EC_PROGRAM_MEMORY_BASE hex "The base address of the program memory region." + default 0x10090000 if ARCH_POSIX help This will be used (among other things) to calculate the current PC's offset within the program memory. config CROS_EC_RO_MEM_OFF hex "The RO region's offset." + default 0x0 if ARCH_POSIX help This will be used to determine if the current PC is in the RO section. config CROS_EC_RO_SIZE hex "The size of the RO region." + default 0xb000 if ARCH_POSIX help This will be used (along with SYSTEM_RO_MEM_OFF) to determine if the current PC is in the RO section. config CROS_EC_RW_MEM_OFF hex "The RW region's offset." + default 0xb000 if ARCH_POSIX help This will be used to determine if the current PC is in the RW section. config CROS_EC_RW_SIZE hex "The size of the RW region." + default 0x75000 if ARCH_POSIX help This will be used (along with SYSTEM_RW_MEM_OFF) to determine if the current PC is in the RW section. +# By default, a unit test doesn't need shimmed tasks. config SHIMMED_TASKS bool "Add support for shimming in platform/ec tasks as Zephyr threads" + default n if ARCH_POSIX help When this option is enabled, a shimmed_tasks.h header with the CROS_EC_TASK_LIST defined needs to be included for the project to -- cgit v1.2.1 From bfc29b475e280e442fed7a234d1b381f0dd70ec6 Mon Sep 17 00:00:00 2001 From: Paul Fagerburg Date: Fri, 22 Jan 2021 16:59:50 -0700 Subject: zephyr: test: update unit tests for zmake Many of the options in CMakeLists.txt and prj.conf are no longer necessary with zmake and Kconfig handling them automatically now. BUG=b:178220157 BRANCH=none TEST=`zmake testall` Signed-off-by: Paul Fagerburg Change-Id: I845f42c4b51214f28ab7771734232fec763c04f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645696 Commit-Queue: Paul Fagerburg Commit-Queue: Jack Rosenthal Tested-by: Paul Fagerburg Reviewed-by: Jack Rosenthal --- zephyr/test/accel_cal/prj.conf | 16 ---------------- zephyr/test/base32/CMakeLists.txt | 20 +++----------------- zephyr/test/base32/prj.conf | 2 ++ zephyr/test/crc/CMakeLists.txt | 9 +-------- zephyr/test/crc/prj.conf | 2 ++ zephyr/test/hooks/CMakeLists.txt | 20 -------------------- zephyr/test/hooks/prj.conf | 3 +++ zephyr/test/i2c/CMakeLists.txt | 30 +++++------------------------- zephyr/test/i2c/prj.conf | 4 ++++ zephyr/test/i2c/src/main.c | 3 --- zephyr/test/i2c_dts/CMakeLists.txt | 2 -- zephyr/test/system/CMakeLists.txt | 2 -- zephyr/test/system/prj.conf | 18 ------------------ zephyr/test/tasks/CMakeLists.txt | 24 +++++------------------- zephyr/test/tasks/prj.conf | 3 ++- 15 files changed, 27 insertions(+), 131 deletions(-) diff --git a/zephyr/test/accel_cal/prj.conf b/zephyr/test/accel_cal/prj.conf index 648eb63dd7..5efe3ec6b7 100644 --- a/zephyr/test/accel_cal/prj.conf +++ b/zephyr/test/accel_cal/prj.conf @@ -4,21 +4,5 @@ CONFIG_ZTEST=y CONFIG_HAS_TEST_TASKS=y -CONFIG_POLL=y - CONFIG_PLATFORM_EC=y -CONFIG_PLATFORM_EC_I2C=n -CONFIG_PLATFORM_EC_KEYBOARD=n -CONFIG_PLATFORM_EC_HOSTCMD=n -CONFIG_PLATFORM_EC_TIMER=n - CONFIG_CROS_EC=y -# Define necessary program memory locations. These are meaning less though -CONFIG_CROS_EC_PROGRAM_MEMORY_BASE=0x10090000 -CONFIG_CROS_EC_RAM_BASE=0x200c0000 -CONFIG_CROS_EC_DATA_RAM_SIZE=0x00010000 -CONFIG_CROS_EC_RAM_SIZE=0x0000f800 -CONFIG_CROS_EC_RO_MEM_OFF=0x0 -CONFIG_CROS_EC_RO_SIZE=0xb000 -CONFIG_CROS_EC_RW_MEM_OFF=0xb000 -CONFIG_CROS_EC_RW_SIZE=0x75000 diff --git a/zephyr/test/base32/CMakeLists.txt b/zephyr/test/base32/CMakeLists.txt index 6ae6f232a9..674ad0d244 100644 --- a/zephyr/test/base32/CMakeLists.txt +++ b/zephyr/test/base32/CMakeLists.txt @@ -1,23 +1,9 @@ -# SPDX-License-Identifier: Apache-2.0 +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -set(BOARD native_posix) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(base32) -# Need to ensure that we are including only zephyr definitions in include files -# We cannot set these via kconfig, since this unit test does not bring in the -# zephyr-chrome repository -zephyr_compile_definitions("CONFIG_ZEPHYR") - -# We need to include the EC include directory and this local test directory -# for the task defines -zephyr_include_directories( - "${PLATFORM_EC}/zephyr/shim/include" - "${PLATFORM_EC}/fuzz" - "${PLATFORM_EC}/test" - "${PLATFORM_EC}/include") - -# Include test file, test under test and console dependency target_sources(app PRIVATE "${PLATFORM_EC}/test/base32.c") -target_sources(app PRIVATE "${PLATFORM_EC}/common/base32.c") diff --git a/zephyr/test/base32/prj.conf b/zephyr/test/base32/prj.conf index 3940ec99eb..ec8c5035f5 100644 --- a/zephyr/test/base32/prj.conf +++ b/zephyr/test/base32/prj.conf @@ -3,3 +3,5 @@ # found in the LICENSE file. CONFIG_ZTEST=y +CONFIG_PLATFORM_EC=y +CONFIG_CROS_EC=y diff --git a/zephyr/test/crc/CMakeLists.txt b/zephyr/test/crc/CMakeLists.txt index 8c1a38b56a..0b46729578 100644 --- a/zephyr/test/crc/CMakeLists.txt +++ b/zephyr/test/crc/CMakeLists.txt @@ -1,17 +1,10 @@ # Copyright 2020 The Chromium OS Authors. All rights reserved. # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -# SPDX-License-Identifier: Apache-2.0 cmake_minimum_required(VERSION 3.13.1) -set(BOARD native_posix) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(tasks) - -# We need to include the EC include directory and this local test directory -# for the task defines -zephyr_include_directories("${PLATFORM_EC}/include") +project(crc) # Include the test source and the file under test target_sources(app PRIVATE main.c) -target_sources(app PRIVATE "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/crc.c") diff --git a/zephyr/test/crc/prj.conf b/zephyr/test/crc/prj.conf index 3940ec99eb..ec8c5035f5 100644 --- a/zephyr/test/crc/prj.conf +++ b/zephyr/test/crc/prj.conf @@ -3,3 +3,5 @@ # found in the LICENSE file. CONFIG_ZTEST=y +CONFIG_PLATFORM_EC=y +CONFIG_CROS_EC=y diff --git a/zephyr/test/hooks/CMakeLists.txt b/zephyr/test/hooks/CMakeLists.txt index 2236963762..81ff57d69d 100644 --- a/zephyr/test/hooks/CMakeLists.txt +++ b/zephyr/test/hooks/CMakeLists.txt @@ -3,27 +3,7 @@ # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -set(BOARD native_posix) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(hooks) -# Need to ensure that we are including only zephyr definitions in include files -# We cannot set these via kconfig, since this unit test does not bring in the -# zephyr-chrome repository -zephyr_compile_definitions("CONFIG_ZEPHYR") -zephyr_compile_definitions("CONFIG_PLATFORM_EC_HOOKS") - -# We need to include the EC include directory and this local test directory -# for the task defines -zephyr_include_directories( - "${PLATFORM_EC}/zephyr/shim/include" - "${PLATFORM_EC}/fuzz" - "${PLATFORM_EC}/test" - "${PLATFORM_EC}/include") - -# Include test file, test under test and console dependency target_sources(app PRIVATE hooks.c) -target_sources(app PRIVATE "${CMAKE_CURRENT_SOURCE_DIR}/../../../common/printf.c") -target_sources(app PRIVATE "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/hooks.c") -target_sources(app PRIVATE "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/console.c") -target_sources(app PRIVATE "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/util.c") diff --git a/zephyr/test/hooks/prj.conf b/zephyr/test/hooks/prj.conf index 3940ec99eb..c0c02e22ca 100644 --- a/zephyr/test/hooks/prj.conf +++ b/zephyr/test/hooks/prj.conf @@ -3,3 +3,6 @@ # found in the LICENSE file. CONFIG_ZTEST=y +CONFIG_PLATFORM_EC=y +CONFIG_PLATFORM_EC_HOOKS=y +CONFIG_CROS_EC=y diff --git a/zephyr/test/i2c/CMakeLists.txt b/zephyr/test/i2c/CMakeLists.txt index 4edbfb9006..214177013f 100644 --- a/zephyr/test/i2c/CMakeLists.txt +++ b/zephyr/test/i2c/CMakeLists.txt @@ -1,29 +1,9 @@ -# SPDX-License-Identifier: Apache-2.0 +# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -set(BOARD native_posix) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(base32) +project(i2c) -# Need to ensure that we are including only zephyr definitions in include files -# We cannot set these via kconfig, since this unit test does not bring in the -# zephyr-chrome repository -zephyr_compile_definitions("CONFIG_ZEPHYR") -zephyr_compile_definitions("CONFIG_PLATFORM_EC_I2C") - -# We need to include the EC include directory and this local test directory -# for the task defines -zephyr_include_directories( - "${PLATFORM_EC}/zephyr/shim/include" - "${PLATFORM_EC}/fuzz" - "${PLATFORM_EC}/test" - "${PLATFORM_EC}/include") - -# Include test file, test under test and console dependency -target_sources(app PRIVATE - src/main.c - "${PLATFORM_EC}/zephyr/shim/src/console.c" - "${PLATFORM_EC}/zephyr/shim/src/i2c.c" - "${PLATFORM_EC}/zephyr/shim/src/util.c" - "${PLATFORM_EC}/common/i2c_controller.c" - "${PLATFORM_EC}/common/printf.c") +target_sources(app PRIVATE src/main.c) diff --git a/zephyr/test/i2c/prj.conf b/zephyr/test/i2c/prj.conf index bbf4d93e8e..8023c0492b 100644 --- a/zephyr/test/i2c/prj.conf +++ b/zephyr/test/i2c/prj.conf @@ -13,6 +13,10 @@ CONFIG_EMUL_BMI160=y CONFIG_SENSOR=y CONFIG_BMI160_TRIGGER_NONE=y +CONFIG_PLATFORM_EC=y +CONFIG_PLATFORM_EC_I2C=y +CONFIG_CROS_EC=y + # TODO(b/173711210) figure out why SPI is required here when we're not using it. CONFIG_SPI=y CONFIG_SPI_EMUL=y diff --git a/zephyr/test/i2c/src/main.c b/zephyr/test/i2c/src/main.c index 6a6afe19fe..064ce78816 100644 --- a/zephyr/test/i2c/src/main.c +++ b/zephyr/test/i2c/src/main.c @@ -9,9 +9,6 @@ #include "common.h" #include "i2c/i2c.h" -/* Unused: required for shimming i2c. */ -uint32_t sleep_mask; - /* Unused: required for shimming i2c. */ void watchdog_reload(void) { diff --git a/zephyr/test/i2c_dts/CMakeLists.txt b/zephyr/test/i2c_dts/CMakeLists.txt index 1537267349..eea2834af1 100644 --- a/zephyr/test/i2c_dts/CMakeLists.txt +++ b/zephyr/test/i2c_dts/CMakeLists.txt @@ -3,8 +3,6 @@ # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -set(BOARD native_posix) - find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(i2c_test) diff --git a/zephyr/test/system/CMakeLists.txt b/zephyr/test/system/CMakeLists.txt index dda6be4a4b..2afa9d6301 100644 --- a/zephyr/test/system/CMakeLists.txt +++ b/zephyr/test/system/CMakeLists.txt @@ -3,8 +3,6 @@ # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) - -set(BOARD native_posix) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(system_test) diff --git a/zephyr/test/system/prj.conf b/zephyr/test/system/prj.conf index bcaca677c5..03357fa10f 100644 --- a/zephyr/test/system/prj.conf +++ b/zephyr/test/system/prj.conf @@ -1,22 +1,4 @@ CONFIG_ZTEST=y CONFIG_PLATFORM_EC=y -CONFIG_PLATFORM_EC_I2C=n CONFIG_CROS_EC=y CONFIG_LOG=y - -# Disable all other shimmed code. -CONFIG_SHIMMED_TASKS=n -CONFIG_PLATFORM_EC_I2C=n -CONFIG_PLATFORM_EC_KEYBOARD=n -CONFIG_PLATFORM_EC_HOSTCMD=n -CONFIG_PLATFORM_EC_TIMER=n - -CONFIG_CROS_EC_PROGRAM_MEMORY_BASE=0x10090000 -CONFIG_CROS_EC_RAM_BASE=0x200c0000 -CONFIG_CROS_EC_DATA_RAM_SIZE=0x00010000 -CONFIG_CROS_EC_RAM_SIZE=0x0000f800 - -CONFIG_CROS_EC_RO_MEM_OFF=0x0 -CONFIG_CROS_EC_RO_SIZE=0xb000 -CONFIG_CROS_EC_RW_MEM_OFF=0xb000 -CONFIG_CROS_EC_RW_SIZE=0x75000 diff --git a/zephyr/test/tasks/CMakeLists.txt b/zephyr/test/tasks/CMakeLists.txt index 174d3b6428..f5ea76e67e 100644 --- a/zephyr/test/tasks/CMakeLists.txt +++ b/zephyr/test/tasks/CMakeLists.txt @@ -1,28 +1,14 @@ # Copyright 2020 The Chromium OS Authors. All rights reserved. # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -# SPDX-License-Identifier: Apache-2.0 cmake_minimum_required(VERSION 3.13.1) -set(BOARD native_posix) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(tasks) -# Need to ensure that we are including only zephyr definitions in include files -# We cannot set these via kconfig, since this unit test does not bring in the -# zephyr-chrome repository -zephyr_compile_definitions("CONFIG_ZEPHYR") -zephyr_compile_definitions("CONFIG_SHIMMED_TASKS") +# Include the local test directory for shimmed_test_tasks.h +zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") -# We need to include the EC include directory and this local test directory -# for the task defines -zephyr_include_directories( - "${CMAKE_CURRENT_SOURCE_DIR}" - "${PLATFORM_EC}/zephyr/shim/include" - "${PLATFORM_EC}/fuzz" - "${PLATFORM_EC}/test" - "${PLATFORM_EC}/include") - -# Include the test source and the file under test -target_sources(app PRIVATE main.c) -target_sources(app PRIVATE "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/tasks.c") +target_sources(app PRIVATE + main.c + "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/tasks.c") \ No newline at end of file diff --git a/zephyr/test/tasks/prj.conf b/zephyr/test/tasks/prj.conf index d2cdafda60..77e8ab9b0c 100644 --- a/zephyr/test/tasks/prj.conf +++ b/zephyr/test/tasks/prj.conf @@ -4,4 +4,5 @@ CONFIG_ZTEST=y CONFIG_HAS_TEST_TASKS=y -CONFIG_POLL=y +CONFIG_PLATFORM_EC=y +CONFIG_CROS_EC=y -- cgit v1.2.1 From e9eefa1d997c24219f14f48675b95a5d89c5f4f3 Mon Sep 17 00:00:00 2001 From: Ayushee Shah Date: Thu, 21 Jan 2021 10:10:49 -0800 Subject: tcpmv2: Re-discover cable if the port parter is PD 2.0 If the cables has been queried with PD 3.0, but the port partner supports PD 2.0, re-discover the cable capabilities. BUG=b:178077239 BRANCH=None TEST=Tested with PD2.0 dock and PD3.0 cable, able to enter Thunderbolt mode. Signed-off-by: Ayushee Shah Change-Id: I559f57a64a525a7ee0ae8744f88ec347688fe880 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643580 Reviewed-by: Keith Short --- common/usbc/usb_pe_drp_sm.c | 35 +++++++++++++++++++++++------------ 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c index 893bdd4244..b9d969845c 100644 --- a/common/usbc/usb_pe_drp_sm.c +++ b/common/usbc/usb_pe_drp_sm.c @@ -826,6 +826,27 @@ static inline void send_ctrl_msg(int port, enum tcpm_transmit_type type, prl_send_ctrl_msg(port, type, msg); } +static void set_cable_rev(int port) +{ + /* + * If port partner runs PD 2.0, cable communication must + * also be PD 2.0 + */ + if (prl_get_rev(port, TCPC_TX_SOP) == PD_REV20) { + /* + * If the cable supports PD 3.0, but the port partner supports PD 2.0, + * redo the cable discover with PD 2.0 + */ + if (prl_get_rev(port, TCPC_TX_SOP_PRIME) == PD_REV30 && + pd_get_identity_discovery(port, TCPC_TX_SOP_PRIME) == + PD_DISC_COMPLETE) { + pd_set_identity_discovery(port, TCPC_TX_SOP_PRIME, + PD_DISC_NEEDED); + } + prl_set_rev(port, TCPC_TX_SOP_PRIME, PD_REV20); + } +} + /* Compile-time insurance to ensure this code does not call into prl directly */ #define prl_send_data_msg DO_NOT_USE #define prl_send_ext_data_msg DO_NOT_USE @@ -2187,12 +2208,7 @@ static void pe_src_send_capabilities_run(int port) prl_set_rev(port, TCPC_TX_SOP, MIN(PD_REVISION, PD_HEADER_REV(rx_emsg[port].header))); - /* - * If port partner runs PD 2.0, cable communication must - * also be PD 2.0 - */ - if (prl_get_rev(port, TCPC_TX_SOP) == PD_REV20) - prl_set_rev(port, TCPC_TX_SOP_PRIME, PD_REV20); + set_cable_rev(port); /* We are PD connected */ PE_SET_FLAG(port, PE_FLAGS_PD_CONNECTION); @@ -2991,12 +3007,7 @@ static void pe_snk_evaluate_capability_entry(int port) prl_set_rev(port, TCPC_TX_SOP, MIN(PD_REVISION, PD_HEADER_REV(rx_emsg[port].header))); - /* - * If port partner runs PD 2.0, cable communication must - * also be PD 2.0 - */ - if (prl_get_rev(port, TCPC_TX_SOP) == PD_REV20) - prl_set_rev(port, TCPC_TX_SOP_PRIME, PD_REV20); + set_cable_rev(port); pd_set_src_caps(port, num, pdo); -- cgit v1.2.1 From 3c5f55ace377e1c939be2397c4fe73a3b2ee4fb4 Mon Sep 17 00:00:00 2001 From: Jack Rosenthal Date: Mon, 25 Jan 2021 13:00:59 -0700 Subject: zephyr: provide a header for cpu.h Provide a minimal header for cpu.h, which is used by both panic_output.c and system.c. BUG=b:174481378,b:178011288 BRANCH=none TEST=compiles with panic_output.c Signed-off-by: Jack Rosenthal Change-Id: I16ca7350d58bc392d87a6f0bbf9d6080e607998d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647951 Reviewed-by: Yuval Peress --- zephyr/shim/include/cpu.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 zephyr/shim/include/cpu.h diff --git a/zephyr/shim/include/cpu.h b/zephyr/shim/include/cpu.h new file mode 100644 index 0000000000..617f644fa9 --- /dev/null +++ b/zephyr/shim/include/cpu.h @@ -0,0 +1,14 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_CPU_H +#define __CROS_EC_CPU_H + +/* Do nothing for Zephyr */ +static inline void cpu_init(void) +{ +} + +#endif /* __CROS_EC_CPU_H */ -- cgit v1.2.1 From b1d414b7799cddd11f7d02fdd7c23325e5d18ac1 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Thu, 21 Jan 2021 10:16:46 -0800 Subject: pchg: Initialize pchg chips on startup This patch makes pchg task disable the interrupt on shutdown and initialize pchg chips on start-up. Tested as follows: 1. Run dut-control power_state:on -> off -> on. 2. Run dut-control power_state:reset. Do 1 and 2 with and without a stylus attached and verify pchg task remains under control. BUG=b:176725734, b:173235954 BRANCH=trogdor TEST=CoachZ Signed-off-by: Daisuke Nojiri Change-Id: I0b1b5501975ad6c8a89041639d3fa90a71b4e9b5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643586 Reviewed-by: Vincent Palatin --- common/peripheral_charger.c | 85 ++++++++++++++++++++++++++++++++++++--------- 1 file changed, 69 insertions(+), 16 deletions(-) diff --git a/common/peripheral_charger.c b/common/peripheral_charger.c index 8e714e99c9..e907257452 100644 --- a/common/peripheral_charger.c +++ b/common/peripheral_charger.c @@ -4,6 +4,7 @@ */ #include "atomic.h" +#include "chipset.h" #include "common.h" #include "device_event.h" #include "hooks.h" @@ -69,20 +70,29 @@ static const char *_text_event(enum pchg_event event) return event_names[event]; } +static enum pchg_state pchg_initialize(struct pchg *ctx, enum pchg_state state) +{ + int rv = ctx->cfg->drv->init(ctx); + + if (rv == EC_SUCCESS) { + pchg_queue_event(ctx, PCHG_EVENT_ENABLE); + state = PCHG_STATE_INITIALIZED; + } else if (rv == EC_SUCCESS_IN_PROGRESS) { + state = PCHG_STATE_RESET; + } else { + CPRINTS("ERR: Failed to initialize"); + } + + return state; +} + static enum pchg_state pchg_state_reset(struct pchg *ctx) { enum pchg_state state = PCHG_STATE_RESET; - int rv; switch (ctx->event) { case PCHG_EVENT_INITIALIZE: - rv = ctx->cfg->drv->init(ctx); - if (rv == EC_SUCCESS) { - pchg_queue_event(ctx, PCHG_EVENT_ENABLE); - state = PCHG_STATE_INITIALIZED; - } else if (rv != EC_SUCCESS_IN_PROGRESS) { - CPRINTS("ERR: Failed to initialize"); - } + state = pchg_initialize(ctx, state); break; case PCHG_EVENT_INITIALIZED: pchg_queue_event(ctx, PCHG_EVENT_ENABLE); @@ -108,6 +118,9 @@ static enum pchg_state pchg_state_initialized(struct pchg *ctx) return state; switch (ctx->event) { + case PCHG_EVENT_INITIALIZE: + state = pchg_initialize(ctx, state); + break; case PCHG_EVENT_ENABLE: rv = ctx->cfg->drv->enable(ctx, true); if (rv == EC_SUCCESS) @@ -131,6 +144,9 @@ static enum pchg_state pchg_state_enabled(struct pchg *ctx) int rv; switch (ctx->event) { + case PCHG_EVENT_INITIALIZE: + state = pchg_initialize(ctx, state); + break; case PCHG_EVENT_DISABLE: ctx->error |= PCHG_ERROR_HOST; rv = ctx->cfg->drv->enable(ctx, false); @@ -161,6 +177,9 @@ static enum pchg_state pchg_state_detected(struct pchg *ctx) int rv; switch (ctx->event) { + case PCHG_EVENT_INITIALIZE: + state = pchg_initialize(ctx, state); + break; case PCHG_EVENT_DISABLE: ctx->error |= PCHG_ERROR_HOST; rv = ctx->cfg->drv->enable(ctx, false); @@ -194,6 +213,9 @@ static enum pchg_state pchg_state_charging(struct pchg *ctx) int rv; switch (ctx->event) { + case PCHG_EVENT_INITIALIZE: + state = pchg_initialize(ctx, state); + break; case PCHG_EVENT_DISABLE: ctx->error |= PCHG_ERROR_HOST; rv = ctx->cfg->drv->enable(ctx, false); @@ -277,7 +299,6 @@ static int pchg_run(struct pchg *ctx) CPRINTS("->%s", _text_state(ctx->state)); ctx->event = PCHG_EVENT_NONE; - CPRINTS("Done"); return 1; } @@ -297,23 +318,56 @@ void pchg_irq(enum gpio_signal signal) } } -void pchg_task(void *u) +static void pchg_startup(void) { struct pchg *ctx; int p; - int rv; - /* TODO: i2c is wedged for a while after reset. investigate. */ - msleep(500); + CPRINTS("%s", __func__); for (p = 0; p < pchg_count; p++) { ctx = &pchgs[p]; - ctx->state = PCHG_STATE_RESET; - queue_init(&ctx->events); pchg_queue_event(ctx, PCHG_EVENT_INITIALIZE); gpio_enable_interrupt(ctx->cfg->irq_pin); } + task_wake(TASK_ID_PCHG); +} +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, pchg_startup, HOOK_PRIO_DEFAULT); + +static void pchg_shutdown(void) +{ + struct pchg *ctx; + int p; + + CPRINTS("%s", __func__); + + for (p = 0; p < pchg_count; p++) { + ctx = &pchgs[0]; + gpio_disable_interrupt(ctx->cfg->irq_pin); + mutex_lock(&ctx->mtx); + queue_init(&ctx->events); + mutex_unlock(&ctx->mtx); + } +} +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, pchg_shutdown, HOOK_PRIO_DEFAULT); + +void pchg_task(void *u) +{ + struct pchg *ctx; + int p; + int rv; + + /* + * Without delay, after servo flash, ctn730 in RW always fails to write + * ENABLE_CMD (b:176824601). + */ + msleep(50); + + /* In case we arrive here after power-on (for late sysjump) */ + if (chipset_in_state(CHIPSET_STATE_ON)) + pchg_startup(); + while (true) { /* Process pending events for all ports. */ rv = 0; @@ -390,7 +444,6 @@ static int cc_pchg(int argc, char **argv) } if (!strcasecmp(argv[2], "init")) { - ctx->state = PCHG_STATE_RESET; pchg_queue_event(ctx, PCHG_EVENT_INITIALIZE); } else if (!strcasecmp(argv[2], "enable")) { pchg_queue_event(ctx, PCHG_EVENT_ENABLE); -- cgit v1.2.1 From 10a919e0124ac226f299c18b7819dcce7cead3a2 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Thu, 21 Jan 2021 10:16:46 -0800 Subject: ctn730: Print payload and handle download mode This patch makes ctn730 driver print payload and handle download mode. BUG=b:173235954 BRANCH=trogdor TEST=CoachZ Signed-off-by: Daisuke Nojiri Change-Id: I74626c726c18c30a039fc521e419688796db9c3b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2646124 Reviewed-by: Vincent Palatin --- driver/nfc/ctn730.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/driver/nfc/ctn730.c b/driver/nfc/ctn730.c index 1d60fb3f2e..5528b8c5ec 100644 --- a/driver/nfc/ctn730.c +++ b/driver/nfc/ctn730.c @@ -5,6 +5,7 @@ #include "common.h" #include "console.h" +#include "gpio.h" #include "i2c.h" #include "peripheral_charger.h" #include "timer.h" @@ -15,6 +16,9 @@ * Configuration */ +/* Print additional data */ +#define CTN730_DEBUG + /* * When ctn730 is asleep, I2C is ignored but can wake it up. I2C will be resent * after this delay. @@ -220,10 +224,9 @@ static int _i2c_read(int i2c_port, uint8_t *in, int in_len) static void _print_header(const struct ctn730_msg *msg) { - CPRINTS("%s_%s LEN=%d", + CPRINTS("%s_%s", _text_instruction(msg->instruction), - _text_message_type(msg->message_type), - msg->length); + _text_message_type(msg->message_type)); } static int _send_command(struct pchg *ctx, const struct ctn730_msg *cmd) @@ -307,6 +310,9 @@ static int _process_payload_response(struct pchg *ctx, struct ctn730_msg *res) if (rv) return rv; + if (IS_ENABLED(CTN730_DEBUG)) + CPRINTS("Payload: %ph", HEX_BUF(buf, len)); + switch (res->instruction) { case WLC_HOST_CTRL_RESET: if (len != WLC_HOST_CTRL_RESET_RSP_SIZE @@ -350,10 +356,15 @@ static int _process_payload_event(struct pchg *ctx, struct ctn730_msg *res) if (rv) return rv; + if (IS_ENABLED(CTN730_DEBUG)) + CPRINTS("Payload: %ph", HEX_BUF(buf, len)); + switch (res->instruction) { case WLC_HOST_CTRL_RESET: if (buf[0] == WLC_HOST_CTRL_RESET_EVT_NORMAL_MODE) ctx->event = PCHG_EVENT_INITIALIZED; + else if (buf[0] == WLC_HOST_CTRL_RESET_EVT_DOWNLOAD_MODE) + ctx->event = PCHG_EVENT_NONE; else return EC_ERROR_INVAL; break; -- cgit v1.2.1 From 8aefdfec0778835098bdde541b8d42d126aab052 Mon Sep 17 00:00:00 2001 From: Rob Barnes Date: Fri, 22 Jan 2021 14:08:18 -0700 Subject: guybrush: Configure keyboard Configure keyboard based on zork. Enable keyboard tasks. Enable pwm for keyboard backlight. BUG=b:178213641 BRANCH=None TEST=Build Signed-off-by: Rob Barnes Change-Id: Iae9d31c9849a3500dbd000829bd1439901a6d1b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645076 Reviewed-by: Diana Z --- baseboard/guybrush/base_ec.tasklist | 2 ++ baseboard/guybrush/baseboard.c | 49 ++++++++++++++++++++++++++++++++++++- baseboard/guybrush/baseboard.h | 25 ++++++++++++++++++- 3 files changed, 74 insertions(+), 2 deletions(-) diff --git a/baseboard/guybrush/base_ec.tasklist b/baseboard/guybrush/base_ec.tasklist index cb567355ef..434d4d54ed 100644 --- a/baseboard/guybrush/base_ec.tasklist +++ b/baseboard/guybrush/base_ec.tasklist @@ -14,8 +14,10 @@ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, TASK_STACK_SIZE) \ TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ diff --git a/baseboard/guybrush/baseboard.c b/baseboard/guybrush/baseboard.c index b166167761..be4eebe144 100644 --- a/baseboard/guybrush/baseboard.c +++ b/baseboard/guybrush/baseboard.c @@ -8,12 +8,14 @@ #include "adc.h" #include "adc_chip.h" #include "battery_fuel_gauge.h" -#include "chipset.h" #include "charge_manager.h" #include "charge_ramp.h" #include "charge_state.h" #include "charge_state_v2.h" #include "charger.h" +#include "chip/npcx/ps2_chip.h" +#include "chip/npcx/pwm_chip.h" +#include "chipset.h" #include "driver/ppc/aoz1380.h" #include "driver/ppc/nx20p348x.h" #include "driver/tcpm/nct38xx.h" @@ -23,9 +25,11 @@ #include "i2c.h" #include "ioexpander.h" #include "isl9241.h" +#include "keyboard_scan.h" #include "nct38xx.h" #include "pi3usb9201.h" #include "power.h" +#include "pwm.h" #include "temp_sensor.h" #include "thermal.h" #include "thermistor.h" @@ -403,6 +407,49 @@ struct ioexpander_config_t ioex_config[] = { BUILD_ASSERT(ARRAY_SIZE(ioex_config) == USBC_PORT_COUNT); BUILD_ASSERT(CONFIG_IO_EXPANDER_PORT_COUNT == USBC_PORT_COUNT); +/* Keyboard scan setting */ +struct keyboard_scan_config keyscan_config = { + /* + * F3 key scan cycle completed but scan input is not + * charging to logic high when EC start scan next + * column for "T" key, so we set .output_settle_us + * to 80us + */ + .output_settle_us = 80, + .debounce_down_us = 6 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 1500, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = SECOND, + .actual_key_mask = { + 0x3c, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, + 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ + }, +}; + +const struct pwm_t pwm_channels[] = { + [PWM_CH_FAN] = { + .channel = 0, + .flags = PWM_CONFIG_OPEN_DRAIN, + .freq = 25000, + }, + [PWM_CH_KBLIGHT] = { + .channel = 1, + .flags = PWM_CONFIG_DSLEEP, + .freq = 100, + }, + [PWM_CH_LED_CHRG] = { + .channel = 2, + .flags = PWM_CONFIG_DSLEEP, + .freq = 100, + }, + [PWM_CH_LED_FULL] = { + .channel = 3, + .flags = PWM_CONFIG_DSLEEP, + .freq = 100, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); int board_set_active_charge_port(int port) { diff --git a/baseboard/guybrush/baseboard.h b/baseboard/guybrush/baseboard.h index f4998580ec..adbf1d1228 100644 --- a/baseboard/guybrush/baseboard.h +++ b/baseboard/guybrush/baseboard.h @@ -66,13 +66,23 @@ #define GPIO_WP_L GPIO_EC_WP_L /* Host communication */ +#define CONFIG_HOSTCMD_ESPI +#define CONFIG_MKBP_EVENT +#define CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT +#define GPIO_EC_INT_L GPIO_EC_SOC_INT_L /* Chipset config */ #define CONFIG_CHIPSET_STONEY #define CONFIG_CHIPSET_CAN_THROTTLE #define CONFIG_CHIPSET_RESET_HOOK -/* Common Keyboard Defines */ +/* Keyboard Config */ +#define CONFIG_KEYBOARD_BACKLIGHT +#define CONFIG_KEYBOARD_BOARD_CONFIG +#define CONFIG_KEYBOARD_COL2_INVERTED +#define CONFIG_KEYBOARD_PROTOCOL_8042 +#define CONFIG_KEYBOARD_VIVALDI +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV /* Sensors */ #define CONFIG_TABLET_MODE @@ -216,6 +226,10 @@ /* Fan features */ +/* LED Config */ +#define CONFIG_PWM +#define CONFIG_PWM_KBLIGHT + #ifndef __ASSEMBLER__ #include "gpio_signal.h" @@ -271,6 +285,15 @@ enum battery_type { BATTERY_TYPE_COUNT, }; +/* PWM Channels */ +enum pwm_channel { + PWM_CH_FAN = 0, + PWM_CH_KBLIGHT, + PWM_CH_LED_CHRG, + PWM_CH_LED_FULL, + PWM_CH_COUNT +}; + /* Common definition for the USB PD interrupt handlers. */ void tcpc_alert_event(enum gpio_signal signal); void bc12_interrupt(enum gpio_signal signal); -- cgit v1.2.1 From 5305a5d619c78b8d249e196fa952ca0617859434 Mon Sep 17 00:00:00 2001 From: Jack Rosenthal Date: Mon, 25 Jan 2021 10:00:51 -0700 Subject: zephyr: volteer: move CONFIG_SHIMMED_TASKS This was in the board config, which is for hardware configuration. Project configuration needs to go in prj.conf. BUG=none BRANCH=none TEST=compile Signed-off-by: Jack Rosenthal Change-Id: I3c91ca93722b9bc112218ef911bd076e386a762c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647534 Reviewed-by: Patrick Georgi --- zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig | 2 -- zephyr/projects/volteer/prj.conf | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig b/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig index 84df5902a6..7670ba7228 100644 --- a/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig +++ b/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig @@ -52,5 +52,3 @@ CONFIG_CROS_EC_RW_MEM_OFF=0x40000 # (CONFIG_CROS_EC_FLASH_SIZE - CONFIG_CROS_EC_RW_MEM_OFF - # CONFIG_CROS_EC_RO_MEM_OFF) CONFIG_CROS_EC_RW_SIZE=0x40000 - -CONFIG_SHIMMED_TASKS=y diff --git a/zephyr/projects/volteer/prj.conf b/zephyr/projects/volteer/prj.conf index aeb44f5b64..1d7d885c82 100644 --- a/zephyr/projects/volteer/prj.conf +++ b/zephyr/projects/volteer/prj.conf @@ -13,6 +13,7 @@ CONFIG_ESPI=y CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y CONFIG_PLATFORM_EC=y +CONFIG_SHIMMED_TASKS=y CONFIG_I2C=y CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y CONFIG_PLATFORM_EC_KEYBOARD=y -- cgit v1.2.1 From 7ebc7659f157e2dc787660773bf12b5641993c6b Mon Sep 17 00:00:00 2001 From: Madhusudanarao Amara Date: Tue, 26 Jan 2021 00:12:43 +0530 Subject: usb_mux: Use atomic operations for updating the flag Atomic operations used in updating the LPM flag BUG=None BRANCH=None TEST=Disconnect typeC devices and then connect back, devices are detected Signed-off-by: Madhusudanarao Amara Change-Id: I6c3fa4b9c63436a16465012fe715ce28995ed179 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648145 Tested-by: Ayushee Shah Reviewed-by: Tanu Malhotra Reviewed-by: Keith Short Commit-Queue: Keith Short --- driver/usb_mux/usb_mux.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/driver/usb_mux/usb_mux.c b/driver/usb_mux/usb_mux.c index f9b33c9c01..22be81843d 100644 --- a/driver/usb_mux/usb_mux.c +++ b/driver/usb_mux/usb_mux.c @@ -5,6 +5,7 @@ /* USB mux high-level driver. */ +#include "atomic.h" #include "common.h" #include "console.h" #include "hooks.h" @@ -28,7 +29,7 @@ static int enable_debug_prints; * Flags will reset to 0 after sysjump; This works for current flags as LPM will * get reset in the init method which is called during PD task startup. */ -static uint8_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; +static uint32_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; #define USB_MUX_FLAG_IN_LPM BIT(0) /* Device is in low power mode. */ @@ -143,7 +144,7 @@ static void enter_low_power_mode(int port) * want know know that we tried to put the device in low power mode * so we can re-initialize the device on the next access. */ - flags[port] |= USB_MUX_FLAG_IN_LPM; + atomic_or(&flags[port], USB_MUX_FLAG_IN_LPM); /* Apply any low power customization if present */ configure_mux(port, USB_MUX_LOW_POWER, NULL); @@ -173,9 +174,9 @@ void usb_mux_init(int port) * as in LPM mode to try initialization again. */ if (rv == EC_ERROR_NOT_POWERED) - flags[port] |= USB_MUX_FLAG_IN_LPM; + atomic_or(&flags[port], USB_MUX_FLAG_IN_LPM); else - flags[port] &= ~USB_MUX_FLAG_IN_LPM; + atomic_clear_bits(&flags[port], USB_MUX_FLAG_IN_LPM); } /* -- cgit v1.2.1 From affbf150d56d16cbb881e239b78a38512152e777 Mon Sep 17 00:00:00 2001 From: Madhusudanarao Amara Date: Fri, 15 Jan 2021 22:21:15 +0530 Subject: usb_mux: Send missed disconnect mode in S3/S0ix If the Type-C devices are connected in S0 and when DUT enters S3/S0ix, if the type-C devices are disconnected and re-connected, Kernel won't receive the disconnected state from EC once DUT boots to S0 as EC moves on and updates the new connected state to Kernel Mux driver. This leads to failure of Type-C device detection on resuming to S0 from S3/S0iX. To overcome this scenario, adding an explicit condition to send previous disconnect state to Kernel Mux driver once initial mux request is received upon resuming from S3/S0iX. Missing Disconnect mode Patch Details: Set disconnect latch flag for the init and disconnect requests For AP to EC PD command: EC_CMD_USB_PD_CONTROL -Check disconnect latch flag if it is true set pd.enabled = 0 For AP to EC mux command: EC_CMD_USB_PD_MUX_INFO -Check the disconnect latch flag if it is true then send disconnect mode -Reset the disconnect latch flag -Send host event EC_HOST_EVENT_USB_MUX for configuring the virtual mux with the latest Mux configuration BUG=b:176604380 BRANCH=None TEST=Type C devices in s0ix disconnect/connect or swapping across the ports scenarios tested Change-Id: Ic38d3632cb0fadb29393405e13ed3606a740c81e Signed-off-by: Madhusudanarao Amara Signed-off-by: Ayushee Shah Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2632551 Reviewed-by: Keith Short Commit-Queue: Keith Short --- common/usb_pd_host_cmd.c | 23 ++++++++++++++------- driver/usb_mux/usb_mux.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++- include/usb_mux.h | 18 ++++++++++++++++ 3 files changed, 86 insertions(+), 8 deletions(-) diff --git a/common/usb_pd_host_cmd.c b/common/usb_pd_host_cmd.c index c08332621b..7cb620c7ed 100644 --- a/common/usb_pd_host_cmd.c +++ b/common/usb_pd_host_cmd.c @@ -351,13 +351,22 @@ static enum ec_status hc_usb_pd_control(struct host_cmd_handler_args *args) break; case 1: case 2: - r_v2->enabled = - (pd_comm_is_enabled(p->port) ? - PD_CTRL_RESP_ENABLED_COMMS : 0) | - (pd_is_connected(p->port) ? - PD_CTRL_RESP_ENABLED_CONNECTED : 0) | - (pd_capable(p->port) ? - PD_CTRL_RESP_ENABLED_PD_CAPABLE : 0); + /* + * Set enabled to 0 if disconnect latch flag=true, needed this + * to configure Virtual mux in disconnect mode. + */ + if (IS_ENABLED(CONFIG_USB_MUX_VIRTUAL) && + usb_mux_get_disconnect_latch_flag(p->port)) { + r_v2->enabled = 0; + } else { + r_v2->enabled = + (pd_comm_is_enabled(p->port) ? + PD_CTRL_RESP_ENABLED_COMMS : 0) | + (pd_is_connected(p->port) ? + PD_CTRL_RESP_ENABLED_CONNECTED : 0) | + (pd_capable(p->port) ? + PD_CTRL_RESP_ENABLED_PD_CAPABLE : 0); + } r_v2->role = pd_get_role_flags(p->port); r_v2->polarity = pd_get_polarity(p->port); diff --git a/driver/usb_mux/usb_mux.c b/driver/usb_mux/usb_mux.c index 22be81843d..743b9a6203 100644 --- a/driver/usb_mux/usb_mux.c +++ b/driver/usb_mux/usb_mux.c @@ -31,7 +31,11 @@ static int enable_debug_prints; */ static uint32_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; -#define USB_MUX_FLAG_IN_LPM BIT(0) /* Device is in low power mode. */ +/* Device is in low power mode. */ +#define USB_MUX_FLAG_IN_LPM BIT(0) + +/* The following bit is used to configure virtual mux in disconnect mode */ +#define USB_MUX_FLAG_DISCONNECT_LATCH BIT(1) enum mux_config_type { USB_MUX_INIT, @@ -58,6 +62,11 @@ static int configure_mux(int port, *mux_state = USB_PD_MUX_NONE; } + if ((config == USB_MUX_SET_MODE && *mux_state == USB_PD_MUX_NONE) || + config == USB_MUX_INIT) { + usb_mux_set_disconnect_latch_flag(port, true); + } + /* * a MUX for a particular port can be a linked list chain of * MUXes. So when we change one, we traverse the whole list @@ -247,6 +256,35 @@ mux_state_t usb_mux_get(int port) return rv ? USB_PD_MUX_NONE : mux_state; } +/* Get USB MUX (virtual MUX) disconnect flag */ +bool usb_mux_get_disconnect_latch_flag(int port) +{ + bool rv = false; + + if (port >= board_get_usb_pd_port_count()) + return rv; + + if (!IS_ENABLED(CONFIG_USB_MUX_VIRTUAL)) + return rv; + + return !!(flags[port] & USB_MUX_FLAG_DISCONNECT_LATCH); +} + +/* Set USB MUX (virtual MUX) disconnect flag */ +void usb_mux_set_disconnect_latch_flag(int port, bool enable) +{ + if (port >= board_get_usb_pd_port_count()) + return; + + if (!IS_ENABLED(CONFIG_USB_MUX_VIRTUAL)) + return; + + if (enable) + atomic_or(&flags[port], USB_MUX_FLAG_DISCONNECT_LATCH); + else + atomic_clear_bits(&flags[port], USB_MUX_FLAG_DISCONNECT_LATCH); +} + void usb_mux_flip(int port) { mux_state_t mux_state; @@ -366,6 +404,19 @@ static enum ec_status hc_usb_pd_mux_info(struct host_cmd_handler_args *args) r->flags = mux_state; + /* + * Force disconnect mode if disconnect latch flag is set. + * Send host event for configuring the latest mux state + */ + if (IS_ENABLED(CONFIG_USB_MUX_VIRTUAL) && + usb_mux_get_disconnect_latch_flag(port)) { + r->flags = USB_PD_MUX_NONE; + usb_mux_set_disconnect_latch_flag(port, false); + args->response_size = sizeof(*r); + host_set_single_event(EC_HOST_EVENT_USB_MUX); + return EC_RES_SUCCESS; + } + /* Clear HPD IRQ event since we're about to inform host of it. */ if (IS_ENABLED(CONFIG_USB_MUX_VIRTUAL) && (r->flags & USB_PD_MUX_HPD_IRQ)) { diff --git a/include/usb_mux.h b/include/usb_mux.h index 251ae9d6ec..5ce198c73d 100644 --- a/include/usb_mux.h +++ b/include/usb_mux.h @@ -240,4 +240,22 @@ void usb_mux_flip(int port); */ void usb_mux_hpd_update(int port, int hpd_lvl, int hpd_irq); +/** + * Get the disconnect latch flag so that the Kernel Mux driver doesn't + * miss the unnoticed disconnection status. + * + * @param port port number. + * @return status of disconnect latch flag + */ +bool usb_mux_get_disconnect_latch_flag(int port); + +/** + * Set the disconnect latch flag if the Type-C devices are disconnected and + * the information is not yet updated to Kernel Mux driver. + * + * @param port port number + * @param enable whether to enable or disable the disconnect latch flag + */ +void usb_mux_set_disconnect_latch_flag(int port, bool enable); + #endif -- cgit v1.2.1 From e8faab25e6926460fbb6a0427b3d93edb2825b33 Mon Sep 17 00:00:00 2001 From: Evan Green Date: Tue, 19 Jan 2021 16:21:36 -0800 Subject: dedede: Add MKBP_EVENT to baseboard CtsSensorTestCases is failing on Drawcia because it requests 100 events from accelerometer and gyroscope but gets zero. We can read sensor events just fine, but they never seem to push to the kernel. Add CONFIG_MKBP_EVENT into the baseboard, and then clean up all the one-off variants that have added this themselves. Also, add some accel commands specific to drawcia for easier debugging. BUG=b:171939568 BRANCH=none TEST=Use amstan's script, which amounts to cat /dev/iio:deviceN Signed-off-by: Evan Green Change-Id: Ia796ec2f9a08d3628dcabb4b5fca425693af4099 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638636 Reviewed-by: Diana Z --- baseboard/dedede/baseboard.h | 4 ++++ board/drawcia/board.h | 3 +++ board/madoo/board.h | 3 --- board/magolor/board.h | 3 --- board/metaknight/board.h | 3 --- board/sasuke/board.h | 3 --- board/waddledoo/board.h | 3 --- 7 files changed, 7 insertions(+), 15 deletions(-) diff --git a/baseboard/dedede/baseboard.h b/baseboard/dedede/baseboard.h index 96cedeee2a..fe7fee1c08 100644 --- a/baseboard/dedede/baseboard.h +++ b/baseboard/dedede/baseboard.h @@ -146,6 +146,10 @@ /* LED */ #define CONFIG_LED_COMMON +/* Sensors */ +#define CONFIG_MKBP_EVENT +#define CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT + /* SoC */ #define CONFIG_BOARD_HAS_RTC_RESET #define CONFIG_CHIPSET_JASPERLAKE diff --git a/board/drawcia/board.h b/board/drawcia/board.h index 0808a21315..0479234318 100644 --- a/board/drawcia/board.h +++ b/board/drawcia/board.h @@ -40,6 +40,9 @@ /* Sensors without hardware FIFO are in forced mode */ #define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ACCEL) +#define CONFIG_CMD_ACCELS +#define CONFIG_CMD_ACCEL_INFO + #define CONFIG_ACCEL_INTERRUPTS /* Enable sensor fifo, must also define the _SIZE and _THRES */ #define CONFIG_ACCEL_FIFO diff --git a/board/madoo/board.h b/board/madoo/board.h index 020793f830..f18d2a0cfe 100644 --- a/board/madoo/board.h +++ b/board/madoo/board.h @@ -103,9 +103,6 @@ #define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_USE_GPIO - #define CONFIG_BATTERY_DEVICE_CHEMISTRY "LION" #define CONFIG_BATTERY_FUEL_GAUGE diff --git a/board/magolor/board.h b/board/magolor/board.h index cab934da2b..648d431be5 100644 --- a/board/magolor/board.h +++ b/board/magolor/board.h @@ -145,9 +145,6 @@ #define CONFIG_TABLET_MODE_SWITCH #define CONFIG_GMR_TABLET_MODE -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_USE_GPIO - /* Volume Button feature */ #define CONFIG_ADC_BUTTONS #define CONFIG_VOLUME_BUTTONS diff --git a/board/metaknight/board.h b/board/metaknight/board.h index 2761f0346f..25d402c10a 100644 --- a/board/metaknight/board.h +++ b/board/metaknight/board.h @@ -129,9 +129,6 @@ #define CONFIG_TABLET_MODE_SWITCH #define CONFIG_GMR_TABLET_MODE -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_USE_GPIO - /* Volume Button feature */ #define CONFIG_ADC_BUTTONS #define CONFIG_VOLUME_BUTTONS diff --git a/board/sasuke/board.h b/board/sasuke/board.h index b2a79a499c..54fc3292b0 100644 --- a/board/sasuke/board.h +++ b/board/sasuke/board.h @@ -122,9 +122,6 @@ #define GPIO_EC_I2C_SUB_USB_C1_SCL GPIO_EC_I2C_SUB_C1_SCL_HDMI_EN_ODL #define GPIO_EC_I2C_SUB_USB_C1_SDA GPIO_EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_USE_GPIO - #define CONFIG_MATH_UTIL #ifndef __ASSEMBLER__ diff --git a/board/waddledoo/board.h b/board/waddledoo/board.h index c286507638..d2c013dffd 100644 --- a/board/waddledoo/board.h +++ b/board/waddledoo/board.h @@ -139,9 +139,6 @@ #define CONFIG_TABLET_MODE_SWITCH #define CONFIG_GMR_TABLET_MODE -#define CONFIG_MKBP_EVENT -#define CONFIG_MKBP_USE_GPIO - #ifndef __ASSEMBLER__ #include "gpio_signal.h" -- cgit v1.2.1 From 7a09b754e826f453c0f0b9c3d2ec28f3fe2562af Mon Sep 17 00:00:00 2001 From: Paul Fagerburg Date: Mon, 25 Jan 2021 14:34:49 -0700 Subject: docs: add porting considerations for Ztest Add a new section to the Ztest documentation providing details of what sorts of EC unit tests are not good candidates for porting to Ztest. BUG=b:172240633, b:172240757 BRANCH=None TEST=N/A Signed-off-by: Paul Fagerburg Change-Id: I3010dfb338e8e9c835c55b10a79a2e4dce703f96 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648397 Tested-by: Paul Fagerburg Reviewed-by: Jack Rosenthal Commit-Queue: Paul Fagerburg --- docs/ztest.md | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/docs/ztest.md b/docs/ztest.md index 9c020c5d58..1dd4c91a0c 100644 --- a/docs/ztest.md +++ b/docs/ztest.md @@ -12,6 +12,35 @@ For examples of porting an EC unit test to the Ztest API, see: * [base32](https://crrev.com/c/2492527) and [improvements](https://crrev.com/c/2634401) * [accel_cal](https://crrev.com/c/2645198) +## Porting Considerations + +Not every EC unit test can be ported to Ztest. This section describes cases +that are not supported and cases where caveats apply. + +### EC Mocks Are Not Supported + +If a test has a `$TEST.mocklist` file associated with the unit test, it is +using the EC mocking framework, which is unsupported in the Ztest framework. +Ztest has its own mocking framework which the EC does not support. + +### Multiple Task Caveats + +The EC unit test framework starts a single task to call `run_test`, and this +task will then call the functions for the various test cases. Some unit tests +have multiple threads of execution, which is enabled by a `$TEST.tasklist` +file associated with the unit test. The test runner task has a task ID of +`TASK_ID_TEST_RUNNER`, which can be used as an argument to any of the task +functions. See for example the [`charge_ramp` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/test/charge_ramp.c#81) +and the [`host_command` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/test/host_command.c#32) + +When a unit test is ported to Ztest, `test_main` doesn't have a thread ID, so +`TASK_ID_TEST_RUNNER` is undefined. `charge_ramp` and `host_command` cannot +be ported at this time. `test_main` also cannot call any of the task functions +that must be called from a task, such as `task_wake`; these functions can pend +the calling task, but since `test_main` doesn't have a thread ID, the pend +will fail. See the [`mutex` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/test/mutex.c#116) +for an example. + ## Determine source files being tested Determine which C files the unit test requires by finding the test in -- cgit v1.2.1 From bde820f245ef2ac435e711630f4db8dfc41eb3fa Mon Sep 17 00:00:00 2001 From: Keith Short Date: Fri, 22 Jan 2021 08:04:56 -0700 Subject: tcpmv2: ensure the USB mux state is only changed in the PD task The USB mux code does not provide any mutex protection. In addition the virtual USB mux code must be run from the PD task to handle synchronization of the EC_CMD_USB_PD_MUX_ACK host command. Move the USB mux updates into the common power state handler for the type-C state machine. BUG=b:178186846 BRANCH=volteer TEST=make buildall TEST=Connect Gatkex to Voxel, execute EC reboot and verify assertion is fixed. Signed-off-by: Keith Short Change-Id: I0a18d0f5c51eedb4ecb0c275ea1235f7838246a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644843 Reviewed-by: Abe Levkoy Tested-by: Chiranjeevi Rapolu --- common/usbc/usb_tc_drp_acc_trysrc_sm.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/common/usbc/usb_tc_drp_acc_trysrc_sm.c b/common/usbc/usb_tc_drp_acc_trysrc_sm.c index f63fd5075f..293f5bf1fa 100644 --- a/common/usbc/usb_tc_drp_acc_trysrc_sm.c +++ b/common/usbc/usb_tc_drp_acc_trysrc_sm.c @@ -1734,14 +1734,13 @@ __maybe_unused static void handle_new_power_state(int port) * boots up */ dpm_set_mode_exit_request(port); - - /* - * The following function will disconnect both USB and - * DP mux, as the chipset is transitioning to OFF. - */ - set_usb_mux_with_current_data_role(port); } } + /* + * Set the USB mux according to the new power state. If the chipset + * is transitioning to OFF, this disconnects USB and DP mux. + */ + set_usb_mux_with_current_data_role(port); } #if defined(CONFIG_USB_PD_ALT_MODE) && !defined(CONFIG_USB_PD_ALT_MODE_DFP) @@ -3604,7 +3603,6 @@ static void pd_chipset_startup(void) int i; for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - set_usb_mux_with_current_data_role(i); pd_set_dual_role_and_event(i, pd_get_drp_state_in_suspend(), PD_EVENT_UPDATE_DUAL_ROLE -- cgit v1.2.1 From 67bf75c9be41359ded8224bd39b8b3cb5784d16d Mon Sep 17 00:00:00 2001 From: Ayushee Shah Date: Thu, 21 Jan 2021 10:10:49 -0800 Subject: tcpmv2: Re-discover cable if the port parter is PD 2.0 If the cables has been queried with PD 3.0, but the port partner supports PD 2.0, re-discover the cable capabilities. BUG=b:178077239 BRANCH=None TEST=Tested with PD2.0 dock and PD3.0 cable, able to enter Thunderbolt mode. Signed-off-by: Ayushee Shah Change-Id: I559f57a64a525a7ee0ae8744f88ec347688fe880 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643580 Reviewed-by: Keith Short --- common/usbc/usb_pe_drp_sm.c | 35 +++++++++++++++++++++++------------ 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c index 893bdd4244..b9d969845c 100644 --- a/common/usbc/usb_pe_drp_sm.c +++ b/common/usbc/usb_pe_drp_sm.c @@ -826,6 +826,27 @@ static inline void send_ctrl_msg(int port, enum tcpm_transmit_type type, prl_send_ctrl_msg(port, type, msg); } +static void set_cable_rev(int port) +{ + /* + * If port partner runs PD 2.0, cable communication must + * also be PD 2.0 + */ + if (prl_get_rev(port, TCPC_TX_SOP) == PD_REV20) { + /* + * If the cable supports PD 3.0, but the port partner supports PD 2.0, + * redo the cable discover with PD 2.0 + */ + if (prl_get_rev(port, TCPC_TX_SOP_PRIME) == PD_REV30 && + pd_get_identity_discovery(port, TCPC_TX_SOP_PRIME) == + PD_DISC_COMPLETE) { + pd_set_identity_discovery(port, TCPC_TX_SOP_PRIME, + PD_DISC_NEEDED); + } + prl_set_rev(port, TCPC_TX_SOP_PRIME, PD_REV20); + } +} + /* Compile-time insurance to ensure this code does not call into prl directly */ #define prl_send_data_msg DO_NOT_USE #define prl_send_ext_data_msg DO_NOT_USE @@ -2187,12 +2208,7 @@ static void pe_src_send_capabilities_run(int port) prl_set_rev(port, TCPC_TX_SOP, MIN(PD_REVISION, PD_HEADER_REV(rx_emsg[port].header))); - /* - * If port partner runs PD 2.0, cable communication must - * also be PD 2.0 - */ - if (prl_get_rev(port, TCPC_TX_SOP) == PD_REV20) - prl_set_rev(port, TCPC_TX_SOP_PRIME, PD_REV20); + set_cable_rev(port); /* We are PD connected */ PE_SET_FLAG(port, PE_FLAGS_PD_CONNECTION); @@ -2991,12 +3007,7 @@ static void pe_snk_evaluate_capability_entry(int port) prl_set_rev(port, TCPC_TX_SOP, MIN(PD_REVISION, PD_HEADER_REV(rx_emsg[port].header))); - /* - * If port partner runs PD 2.0, cable communication must - * also be PD 2.0 - */ - if (prl_get_rev(port, TCPC_TX_SOP) == PD_REV20) - prl_set_rev(port, TCPC_TX_SOP_PRIME, PD_REV20); + set_cable_rev(port); pd_set_src_caps(port, num, pdo); -- cgit v1.2.1 From 3f64cdcb6bb007529578173c17c0cf94cadf0b99 Mon Sep 17 00:00:00 2001 From: Madhusudanarao Amara Date: Tue, 26 Jan 2021 00:12:43 +0530 Subject: usb_mux: Use atomic operations for updating the flag Atomic operations used in updating the LPM flag BUG=None BRANCH=None TEST=Disconnect typeC devices and then connect back, devices are detected Signed-off-by: Madhusudanarao Amara Change-Id: I6c3fa4b9c63436a16465012fe715ce28995ed179 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648145 Tested-by: Ayushee Shah Reviewed-by: Tanu Malhotra Reviewed-by: Keith Short Commit-Queue: Keith Short --- driver/usb_mux/usb_mux.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/driver/usb_mux/usb_mux.c b/driver/usb_mux/usb_mux.c index f9b33c9c01..22be81843d 100644 --- a/driver/usb_mux/usb_mux.c +++ b/driver/usb_mux/usb_mux.c @@ -5,6 +5,7 @@ /* USB mux high-level driver. */ +#include "atomic.h" #include "common.h" #include "console.h" #include "hooks.h" @@ -28,7 +29,7 @@ static int enable_debug_prints; * Flags will reset to 0 after sysjump; This works for current flags as LPM will * get reset in the init method which is called during PD task startup. */ -static uint8_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; +static uint32_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; #define USB_MUX_FLAG_IN_LPM BIT(0) /* Device is in low power mode. */ @@ -143,7 +144,7 @@ static void enter_low_power_mode(int port) * want know know that we tried to put the device in low power mode * so we can re-initialize the device on the next access. */ - flags[port] |= USB_MUX_FLAG_IN_LPM; + atomic_or(&flags[port], USB_MUX_FLAG_IN_LPM); /* Apply any low power customization if present */ configure_mux(port, USB_MUX_LOW_POWER, NULL); @@ -173,9 +174,9 @@ void usb_mux_init(int port) * as in LPM mode to try initialization again. */ if (rv == EC_ERROR_NOT_POWERED) - flags[port] |= USB_MUX_FLAG_IN_LPM; + atomic_or(&flags[port], USB_MUX_FLAG_IN_LPM); else - flags[port] &= ~USB_MUX_FLAG_IN_LPM; + atomic_clear_bits(&flags[port], USB_MUX_FLAG_IN_LPM); } /* -- cgit v1.2.1 From 6bf5cfa646533f89674164a3dd1edb34589f089d Mon Sep 17 00:00:00 2001 From: Madhusudanarao Amara Date: Fri, 15 Jan 2021 22:21:15 +0530 Subject: usb_mux: Send missed disconnect mode in S3/S0ix If the Type-C devices are connected in S0 and when DUT enters S3/S0ix, if the type-C devices are disconnected and re-connected, Kernel won't receive the disconnected state from EC once DUT boots to S0 as EC moves on and updates the new connected state to Kernel Mux driver. This leads to failure of Type-C device detection on resuming to S0 from S3/S0iX. To overcome this scenario, adding an explicit condition to send previous disconnect state to Kernel Mux driver once initial mux request is received upon resuming from S3/S0iX. Missing Disconnect mode Patch Details: Set disconnect latch flag for the init and disconnect requests For AP to EC PD command: EC_CMD_USB_PD_CONTROL -Check disconnect latch flag if it is true set pd.enabled = 0 For AP to EC mux command: EC_CMD_USB_PD_MUX_INFO -Check the disconnect latch flag if it is true then send disconnect mode -Reset the disconnect latch flag -Send host event EC_HOST_EVENT_USB_MUX for configuring the virtual mux with the latest Mux configuration BUG=b:176604380 BRANCH=None TEST=Type C devices in s0ix disconnect/connect or swapping across the ports scenarios tested Change-Id: Ic38d3632cb0fadb29393405e13ed3606a740c81e Signed-off-by: Madhusudanarao Amara Signed-off-by: Ayushee Shah Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2632551 Reviewed-by: Keith Short Commit-Queue: Keith Short --- common/usb_pd_host_cmd.c | 23 ++++++++++++++------- driver/usb_mux/usb_mux.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++- include/usb_mux.h | 18 ++++++++++++++++ 3 files changed, 86 insertions(+), 8 deletions(-) diff --git a/common/usb_pd_host_cmd.c b/common/usb_pd_host_cmd.c index c08332621b..7cb620c7ed 100644 --- a/common/usb_pd_host_cmd.c +++ b/common/usb_pd_host_cmd.c @@ -351,13 +351,22 @@ static enum ec_status hc_usb_pd_control(struct host_cmd_handler_args *args) break; case 1: case 2: - r_v2->enabled = - (pd_comm_is_enabled(p->port) ? - PD_CTRL_RESP_ENABLED_COMMS : 0) | - (pd_is_connected(p->port) ? - PD_CTRL_RESP_ENABLED_CONNECTED : 0) | - (pd_capable(p->port) ? - PD_CTRL_RESP_ENABLED_PD_CAPABLE : 0); + /* + * Set enabled to 0 if disconnect latch flag=true, needed this + * to configure Virtual mux in disconnect mode. + */ + if (IS_ENABLED(CONFIG_USB_MUX_VIRTUAL) && + usb_mux_get_disconnect_latch_flag(p->port)) { + r_v2->enabled = 0; + } else { + r_v2->enabled = + (pd_comm_is_enabled(p->port) ? + PD_CTRL_RESP_ENABLED_COMMS : 0) | + (pd_is_connected(p->port) ? + PD_CTRL_RESP_ENABLED_CONNECTED : 0) | + (pd_capable(p->port) ? + PD_CTRL_RESP_ENABLED_PD_CAPABLE : 0); + } r_v2->role = pd_get_role_flags(p->port); r_v2->polarity = pd_get_polarity(p->port); diff --git a/driver/usb_mux/usb_mux.c b/driver/usb_mux/usb_mux.c index 22be81843d..743b9a6203 100644 --- a/driver/usb_mux/usb_mux.c +++ b/driver/usb_mux/usb_mux.c @@ -31,7 +31,11 @@ static int enable_debug_prints; */ static uint32_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; -#define USB_MUX_FLAG_IN_LPM BIT(0) /* Device is in low power mode. */ +/* Device is in low power mode. */ +#define USB_MUX_FLAG_IN_LPM BIT(0) + +/* The following bit is used to configure virtual mux in disconnect mode */ +#define USB_MUX_FLAG_DISCONNECT_LATCH BIT(1) enum mux_config_type { USB_MUX_INIT, @@ -58,6 +62,11 @@ static int configure_mux(int port, *mux_state = USB_PD_MUX_NONE; } + if ((config == USB_MUX_SET_MODE && *mux_state == USB_PD_MUX_NONE) || + config == USB_MUX_INIT) { + usb_mux_set_disconnect_latch_flag(port, true); + } + /* * a MUX for a particular port can be a linked list chain of * MUXes. So when we change one, we traverse the whole list @@ -247,6 +256,35 @@ mux_state_t usb_mux_get(int port) return rv ? USB_PD_MUX_NONE : mux_state; } +/* Get USB MUX (virtual MUX) disconnect flag */ +bool usb_mux_get_disconnect_latch_flag(int port) +{ + bool rv = false; + + if (port >= board_get_usb_pd_port_count()) + return rv; + + if (!IS_ENABLED(CONFIG_USB_MUX_VIRTUAL)) + return rv; + + return !!(flags[port] & USB_MUX_FLAG_DISCONNECT_LATCH); +} + +/* Set USB MUX (virtual MUX) disconnect flag */ +void usb_mux_set_disconnect_latch_flag(int port, bool enable) +{ + if (port >= board_get_usb_pd_port_count()) + return; + + if (!IS_ENABLED(CONFIG_USB_MUX_VIRTUAL)) + return; + + if (enable) + atomic_or(&flags[port], USB_MUX_FLAG_DISCONNECT_LATCH); + else + atomic_clear_bits(&flags[port], USB_MUX_FLAG_DISCONNECT_LATCH); +} + void usb_mux_flip(int port) { mux_state_t mux_state; @@ -366,6 +404,19 @@ static enum ec_status hc_usb_pd_mux_info(struct host_cmd_handler_args *args) r->flags = mux_state; + /* + * Force disconnect mode if disconnect latch flag is set. + * Send host event for configuring the latest mux state + */ + if (IS_ENABLED(CONFIG_USB_MUX_VIRTUAL) && + usb_mux_get_disconnect_latch_flag(port)) { + r->flags = USB_PD_MUX_NONE; + usb_mux_set_disconnect_latch_flag(port, false); + args->response_size = sizeof(*r); + host_set_single_event(EC_HOST_EVENT_USB_MUX); + return EC_RES_SUCCESS; + } + /* Clear HPD IRQ event since we're about to inform host of it. */ if (IS_ENABLED(CONFIG_USB_MUX_VIRTUAL) && (r->flags & USB_PD_MUX_HPD_IRQ)) { diff --git a/include/usb_mux.h b/include/usb_mux.h index 251ae9d6ec..5ce198c73d 100644 --- a/include/usb_mux.h +++ b/include/usb_mux.h @@ -240,4 +240,22 @@ void usb_mux_flip(int port); */ void usb_mux_hpd_update(int port, int hpd_lvl, int hpd_irq); +/** + * Get the disconnect latch flag so that the Kernel Mux driver doesn't + * miss the unnoticed disconnection status. + * + * @param port port number. + * @return status of disconnect latch flag + */ +bool usb_mux_get_disconnect_latch_flag(int port); + +/** + * Set the disconnect latch flag if the Type-C devices are disconnected and + * the information is not yet updated to Kernel Mux driver. + * + * @param port port number + * @param enable whether to enable or disable the disconnect latch flag + */ +void usb_mux_set_disconnect_latch_flag(int port, bool enable); + #endif -- cgit v1.2.1 From 09926c20ba6d6a09088ffef17316dbdcdc23e830 Mon Sep 17 00:00:00 2001 From: Michael5 Chen1 Date: Thu, 21 Jan 2021 17:52:45 +0800 Subject: woomax: Modify strength value of PS8818 for USB-C0 signal quality According the USB TX test result, modity ps8818 setting. BUG=b:175351902 BRANCH=zork TEST=manual Signed-off-by: Michael5 Chen1 Change-Id: I2a6892365b283f52c6accd8cb73facd1973dd68a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641715 Reviewed-by: Denis Brockus --- board/woomax/board.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/woomax/board.c b/board/woomax/board.c index eeae681ae7..aac0fea651 100644 --- a/board/woomax/board.c +++ b/board/woomax/board.c @@ -276,7 +276,7 @@ static int woomax_ps8818_mux_set(const struct usb_mux *me, PS8818_REG_PAGE1, PS8818_REG1_APTX1EQ_10G_LEVEL, PS8818_EQ_LEVEL_UP_MASK, - PS8818_EQ_LEVEL_UP_19DB); + PS8818_EQ_LEVEL_UP_18DB); if (rv) return rv; @@ -284,7 +284,7 @@ static int woomax_ps8818_mux_set(const struct usb_mux *me, PS8818_REG_PAGE1, PS8818_REG1_APTX2EQ_10G_LEVEL, PS8818_EQ_LEVEL_UP_MASK, - PS8818_EQ_LEVEL_UP_19DB); + PS8818_EQ_LEVEL_UP_18DB); if (rv) return rv; -- cgit v1.2.1 From 061ca8397644553bb34fea1174e1a49c89bced40 Mon Sep 17 00:00:00 2001 From: Yu-An Chen Date: Mon, 25 Jan 2021 11:13:48 +0800 Subject: Metaknight: Fix wrong words Fix wrong words. BUG=None BRANCH=main TEST=None Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I9af86d352d00403dd66012fdac2c639454ca1518 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644789 Reviewed-by: Diana Z --- board/metaknight/battery.c | 2 +- board/metaknight/board.c | 2 +- board/metaknight/board.h | 2 +- board/metaknight/gpio.inc | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/metaknight/battery.c b/board/metaknight/battery.c index 9edc99b811..943771ffa4 100644 --- a/board/metaknight/battery.c +++ b/board/metaknight/battery.c @@ -10,7 +10,7 @@ #include "common.h" /* - * Battery info for all waddledoo battery types. Note that the fields + * Battery info for all metaknight battery types. Note that the fields * start_charging_min/max and charging_min/max are not used for the charger. * The effective temperature limits are given by discharging_min/max_c. * diff --git a/board/metaknight/board.c b/board/metaknight/board.c index 975afbcaea..9b852a6ec2 100644 --- a/board/metaknight/board.c +++ b/board/metaknight/board.c @@ -3,7 +3,7 @@ * found in the LICENSE file. */ -/* Waddledoo board-specific configuration */ +/* metaknight board-specific configuration */ #include "adc_chip.h" #include "button.h" diff --git a/board/metaknight/board.h b/board/metaknight/board.h index 25d402c10a..1f7fcdaa98 100644 --- a/board/metaknight/board.h +++ b/board/metaknight/board.h @@ -3,7 +3,7 @@ * found in the LICENSE file. */ -/* Waddledoo board configuration */ +/* metaknight board configuration */ #ifndef __CROS_EC_BOARD_H #define __CROS_EC_BOARD_H diff --git a/board/metaknight/gpio.inc b/board/metaknight/gpio.inc index f0179018c3..8b8f84048d 100644 --- a/board/metaknight/gpio.inc +++ b/board/metaknight/gpio.inc @@ -99,7 +99,7 @@ GPIO(EN_USB_A0_VBUS, PIN(4, 1), GPIO_OUT_LOW) /* Enable A1 5V Charging */ GPIO(EN_USB_A1_VBUS, PIN(F, 2), GPIO_OUT_LOW) /* Enable A1 5V Charging */ /* - * Waddledoo doesn't have these physical pins coming to the EC but uses other + * metaknight doesn't have these physical pins coming to the EC but uses other * logic. */ UNIMPLEMENTED(AC_PRESENT) -- cgit v1.2.1 From e10667e305702d6ce6ca4fdcd380458fbc3456a5 Mon Sep 17 00:00:00 2001 From: Ben Chen Date: Mon, 11 Jan 2021 18:10:44 +0800 Subject: voxel: Enable CONFIG_KEYBOARD_VIVALDI This CL implements vivald function row config for voxel keyboard. BUG=b:177043612 BRANCH=main TEST=verify keycode is correct in `evtest` Change-Id: I02d59bf1ec9fac802f0b47f38bba1cd3915573b8 Signed-off-by: Ben Chen Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2620732 Reviewed-by: Keith Short Reviewed-by: YH Lin --- board/voxel/board.c | 43 +++++++++++++++++++++++++++++++++++++++++++ board/voxel/board.h | 6 ------ 2 files changed, 43 insertions(+), 6 deletions(-) diff --git a/board/voxel/board.c b/board/voxel/board.c index da0a5dbb40..bba00ead94 100644 --- a/board/voxel/board.c +++ b/board/voxel/board.c @@ -47,6 +47,49 @@ #define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +static const struct ec_response_keybd_config zbu_new_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, + TK_REFRESH, + TK_FULLSCREEN, + TK_OVERVIEW, + TK_SNAPSHOT, + TK_BRIGHTNESS_DOWN, + TK_BRIGHTNESS_UP, + TK_VOL_MUTE, + TK_VOL_DOWN, + TK_VOL_UP, + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +static const struct ec_response_keybd_config zbu_old_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_FORWARD, /* T2 */ + TK_REFRESH, /* T3 */ + TK_FULLSCREEN, /* T4 */ + TK_OVERVIEW, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override +const struct ec_response_keybd_config *board_vivaldi_keybd_config(void) +{ + if (get_board_id() > 2) + return &zbu_new_kb; + else + return &zbu_old_kb; +} + /* Keyboard scan setting */ struct keyboard_scan_config keyscan_config = { /* Increase from 50 us, because KSO_02 passes through the H1. */ diff --git a/board/voxel/board.h b/board/voxel/board.h index 6478644b18..6628be18b5 100644 --- a/board/voxel/board.h +++ b/board/voxel/board.h @@ -45,12 +45,6 @@ #define CONFIG_LED_ONOFF_STATES /* Keyboard features */ -/* - * Disable VOL up/down when tablet mode. - * TODO(b/170966461): Re-enable Vivaldi keyboard once - * 8042 and MKBP drivers can coexist. - */ -#undef CONFIG_KEYBOARD_VIVALDI /* Sensors */ /* BMI160 Base accel/gyro */ -- cgit v1.2.1 From 0ba6f7f8c8a5699b9a20280fed63f057e387dbfc Mon Sep 17 00:00:00 2001 From: Zick Wei Date: Thu, 21 Jan 2021 10:01:31 +0800 Subject: zork: add support SSFC This patch add support SSFC for zork, add support base sensor as below: SSFC_BASE_GYRO_BMI160 = 1, SSFC_BASE_GYRO_LSM6DSM = 2, SSFC_BASE_GYRO_ICM426XX = 3, BUG=b:173753906 BRANCH=zork TEST=make buildall Signed-off-by: Zick Wei Change-Id: I10749d819b852861ac5a32d69f2b872527633082 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641706 Reviewed-by: Edward Hill --- baseboard/zork/build.mk | 1 + baseboard/zork/cbi_ssfc.c | 31 +++++++++++++++++++++++++++++++ baseboard/zork/cbi_ssfc.h | 40 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 72 insertions(+) create mode 100644 baseboard/zork/cbi_ssfc.c create mode 100644 baseboard/zork/cbi_ssfc.h diff --git a/baseboard/zork/build.mk b/baseboard/zork/build.mk index 740252ac9a..e79d60cc91 100644 --- a/baseboard/zork/build.mk +++ b/baseboard/zork/build.mk @@ -8,6 +8,7 @@ baseboard-y=baseboard.o baseboard-y+=cbi_ec_fw_config.o +baseboard-y+=cbi_ssfc.o baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o baseboard-$(VARIANT_ZORK_TREMBYLE)+=variant_trembyle.o baseboard-$(VARIANT_ZORK_DALBOZ)+=variant_dalboz.o diff --git a/baseboard/zork/cbi_ssfc.c b/baseboard/zork/cbi_ssfc.c new file mode 100644 index 0000000000..cf1001e5c2 --- /dev/null +++ b/baseboard/zork/cbi_ssfc.c @@ -0,0 +1,31 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "cbi_ssfc.h" +#include "common.h" +#include "console.h" +#include "cros_board_info.h" +#include "hooks.h" + +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) + +/* Cache SSFC on init since we don't expect it to change in runtime */ +static union zork_cbi_ssfc cached_ssfc; +BUILD_ASSERT(sizeof(cached_ssfc) == sizeof(uint32_t)); + +static void cbi_ssfc_init(void) +{ + if (cbi_get_ssfc(&cached_ssfc.raw_value) != EC_SUCCESS) + /* Default to 0 when CBI isn't populated */ + cached_ssfc.raw_value = 0; + + CPRINTS("Read CBI SSFC : 0x%04X", cached_ssfc.raw_value); +} +DECLARE_HOOK(HOOK_INIT, cbi_ssfc_init, HOOK_PRIO_FIRST); + +enum ec_ssfc_base_gyro_sensor get_cbi_ssfc_base_sensor(void) +{ + return cached_ssfc.base_sensor; +} diff --git a/baseboard/zork/cbi_ssfc.h b/baseboard/zork/cbi_ssfc.h new file mode 100644 index 0000000000..de073847e7 --- /dev/null +++ b/baseboard/zork/cbi_ssfc.h @@ -0,0 +1,40 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef _ZORK_CBI_SSFC__H_ +#define _ZORK_CBI_SSFC__H_ + +#include "stdint.h" + +/**************************************************************************** + * Zork CBI Second Source Factory Cache + */ + +/* + * Base Sensor (Bits 0-2) + */ +enum ec_ssfc_base_gyro_sensor { + SSFC_BASE_GYRO_NONE = 0, + SSFC_BASE_GYRO_BMI160 = 1, + SSFC_BASE_GYRO_LSM6DSM = 2, + SSFC_BASE_GYRO_ICM426XX = 3, +}; + +union zork_cbi_ssfc { + struct { + enum ec_ssfc_base_gyro_sensor base_sensor : 3; + uint32_t reserved : 29; + }; + uint32_t raw_value; +}; + +/** + * Get the Base sensor type from SSFC_CONFIG. + * + * @return the Base sensor board type. + */ +enum ec_ssfc_base_gyro_sensor get_cbi_ssfc_base_sensor(void); + +#endif /* _ZORK_CBI_SSFC__H_ */ -- cgit v1.2.1 From 6bd8ba0808b90407d72d0b487624edb7d1701f01 Mon Sep 17 00:00:00 2001 From: David Huang Date: Tue, 19 Jan 2021 15:18:33 +0800 Subject: voema: Initialize the vivaldi keyboard. Initialize the vivaldi keyboard. BUG=b:177274193 BRANCH=main TEST=manual 1. Scan all key. 2. Check action key function. 3. Check ALT + Volup + H. 4. Check ALT + Volup + R. 5. Check Refresh (F2) + powerbutton (EC reboot). 6. Check ESC + Refresh + powerbutton. Signed-off-by: David Huang Change-Id: Ib949e96910130971b41c3dd6017ac9b6f7e08ff8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637155 Reviewed-by: Keith Short --- board/voema/board.c | 23 +++++++++++++++++++++++ board/voema/board.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/board/voema/board.c b/board/voema/board.c index 898732838d..f6dff264f6 100644 --- a/board/voema/board.c +++ b/board/voema/board.c @@ -60,6 +60,29 @@ struct keyboard_scan_config keyscan_config = { }, }; +static const struct ec_response_keybd_config voema_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config +*board_vivaldi_keybd_config(void) +{ + return &voema_kb; +} + /******************************************************************************/ /* * FW_CONFIG defaults for Volteer if the CBI data is not initialized. diff --git a/board/voema/board.h b/board/voema/board.h index 2f08c2dde1..10728d8383 100644 --- a/board/voema/board.h +++ b/board/voema/board.h @@ -28,6 +28,8 @@ #define CONFIG_LED_ONOFF_STATES /* Keyboard features */ +#define CONFIG_KEYBOARD_VIVALDI +#define CONFIG_KEYBOARD_REFRESH_ROW3 /* Sensors */ /* BMA253 accelerometer in base */ -- cgit v1.2.1 From 774e4bfab7119909e04ecec6c34b6cc85d979c22 Mon Sep 17 00:00:00 2001 From: Evan Green Date: Mon, 25 Jan 2021 14:35:55 -0800 Subject: drawcia: Set gyroscope translation matrix CTS tests are failing because sensor values from axis 1 and 2 are negated. When the test expects 360 degrees, -360 degrees gets reported. Set the standard base translation matrix to resolve this. BUG=b:175996778 TEST=Try CTS BRANCH=None Signed-off-by: Evan Green Change-Id: I9ede658cef042caf72b81d08e4c47de4c7b5e820 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648730 Tested-by: Kazuhiro Inaba Reviewed-by: Diana Z Reviewed-by: Kazuhiro Inaba Commit-Queue: Kazuhiro Inaba --- board/drawcia/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/drawcia/board.c b/board/drawcia/board.c index 6728eb1183..f160335e53 100644 --- a/board/drawcia/board.c +++ b/board/drawcia/board.c @@ -346,7 +346,7 @@ struct motion_sensor_t motion_sensors[] = { .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, .default_range = 1000 | ROUND_UP_FLAG, /* dps */ - .rot_standard_ref = NULL, + .rot_standard_ref = &base_standard_ref, .min_frequency = LSM6DSM_ODR_MIN_VAL, .max_frequency = LSM6DSM_ODR_MAX_VAL, }, -- cgit v1.2.1 From e40faf973d39a9d30d1333a482ee60943dcf8283 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Mon, 25 Jan 2021 21:51:49 +0100 Subject: zephyr: Use Chrome EC's libgcc implementation over the compiler's gcc's libgcc is built with a compile time notion of what an architecture's ABI will look like. If that happens to be wrong, you're out of luck. Instead, use our own implementation which, while written in assembly (and as such not as flexible as it could be) is processed with the right set of flags. BUG=b:178363068 BRANCH=none TEST=zephyr boots on kohaku when built with coreboot-sdk. Signed-off-by: Patrick Georgi Change-Id: I6d27bb48478081b6c2ff8927734492282e55e898 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2648666 Tested-by: Patrick Georgi Reviewed-by: Jack Rosenthal Commit-Queue: Patrick Georgi --- zephyr/cmake/toolchain/coreboot-sdk/target.cmake | 8 ++++++++ zephyr/shim/src/CMakeLists.txt | 2 ++ zephyr/shim/src/libgcc_arm.S | 11 +++++++++++ 3 files changed, 21 insertions(+) create mode 100644 zephyr/shim/src/libgcc_arm.S diff --git a/zephyr/cmake/toolchain/coreboot-sdk/target.cmake b/zephyr/cmake/toolchain/coreboot-sdk/target.cmake index cf3a6ec736..5f3d86459b 100644 --- a/zephyr/cmake/toolchain/coreboot-sdk/target.cmake +++ b/zephyr/cmake/toolchain/coreboot-sdk/target.cmake @@ -29,3 +29,11 @@ set(CMAKE_OBJCOPY "${CROSS_COMPILE}objcopy") set(CMAKE_OBJDUMP "${CROSS_COMPILE}objdump") set(CMAKE_RANLIB "${CROSS_COMPILE}ranlib") set(CMAKE_READELF "${CROSS_COMPILE}readelf") + +# On ARM, we don't use libgcc: It's built against a fixed target (e.g. +# used instruction set, ABI, ISA extensions) and doesn't adapt when +# compiler flags change any of these assumptions. Use our own mini-libgcc +# instead. +if("${ARCH}" STREQUAL "arm") + set(no_libgcc True) +endif() diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index e5101e8dbd..be283829cc 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -7,6 +7,8 @@ zephyr_sources(gpio.c) zephyr_sources(util.c) zephyr_sources(crc.c) +zephyr_sources_ifdef(no_libgcc libgcc_${ARCH}.S) + zephyr_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c) zephyr_sources_ifdef(CONFIG_PLATFORM_EC_FLASH flash.c) zephyr_sources_ifdef(CONFIG_PLATFORM_EC_HOOKS hooks.c) diff --git a/zephyr/shim/src/libgcc_arm.S b/zephyr/shim/src/libgcc_arm.S new file mode 100644 index 0000000000..ffdbefc675 --- /dev/null +++ b/zephyr/shim/src/libgcc_arm.S @@ -0,0 +1,11 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "../../third_party/libaeabi-cortexm0/core/cortex-m/ldivmod.S" +#include "../../third_party/libaeabi-cortexm0/core/cortex-m/uldivmod.S" + +exception_panic: + mov r0, #3 @ K_ERR_KERNEL_OOPS + b z_fatal_error -- cgit v1.2.1 From 7d268015237aa85dc75696ee037c7c871ee80915 Mon Sep 17 00:00:00 2001 From: Jack Rosenthal Date: Mon, 25 Jan 2021 10:11:32 -0700 Subject: zephyr: kohaku/volteer: unset prefer-zephyr-sdk coreboot-sdk is working now, this hack can go away. BUG=b:178363068 BRANCH=none TEST=compile without -t coreboot-sdk, run on device Signed-off-by: Jack Rosenthal Change-Id: Ifc5b05557ecf623e709bfd2b464648bd24197e1c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647536 Reviewed-by: Patrick Georgi Commit-Queue: Patrick Georgi Tested-by: Patrick Georgi --- zephyr/projects/kohaku/zmake.yaml | 18 +----------------- zephyr/projects/volteer/zmake.yaml | 18 +----------------- 2 files changed, 2 insertions(+), 34 deletions(-) diff --git a/zephyr/projects/kohaku/zmake.yaml b/zephyr/projects/kohaku/zmake.yaml index 95831a19f7..7477961500 100644 --- a/zephyr/projects/kohaku/zmake.yaml +++ b/zephyr/projects/kohaku/zmake.yaml @@ -5,6 +5,7 @@ board: kohaku supported-zephyr-versions: - v2.4 +toolchain: coreboot-sdk # Note: below output type is not correct, but good enough for # developing right now. We need to run ecst to pack the RO/RW binary @@ -14,20 +15,3 @@ supported-zephyr-versions: # build-singleimage/zephyr/zephyr_kohaku.bin instead until Zmake # grows a configuration option to handle ecst. output-type: raw - -# Note: coreboot-sdk toolchain will build, but may have runtime -# issues. This is set to "coreboot-sdk" so the automated CQ builder -# can use it for build tests. -# -# For compiling for a real device, you need to use the Zephyr SDK -# toolchain, which is not available in the chroot (and thus, to the CQ -# builder). Please follow -# https://docs.zephyrproject.org/latest/getting_started/installation_linux.html -# for instructions on installing the SDK. -# -# If you are building outside of the chroot on a gLinux machine, the -# arm-none-eabi-gcc toolchain seems to work fine. If you prefer this -# toolchain, you can pass --toolchain=arm-none-eabi to zmake -# configure, and that will work as well. -toolchain: coreboot-sdk -prefer-zephyr-sdk: true diff --git a/zephyr/projects/volteer/zmake.yaml b/zephyr/projects/volteer/zmake.yaml index b1251c2d08..914f8660e0 100644 --- a/zephyr/projects/volteer/zmake.yaml +++ b/zephyr/projects/volteer/zmake.yaml @@ -5,6 +5,7 @@ board: volteer supported-zephyr-versions: - v2.4 +toolchain: coreboot-sdk # Note: below output type is not correct, but good enough for # developing right now. We need to run ecst to pack the RO/RW binary @@ -14,20 +15,3 @@ supported-zephyr-versions: # build-singleimage/zephyr/zephyr_volteer.bin instead until Zmake # grows a configuration option to handle ecst. output-type: raw - -# Note: coreboot-sdk toolchain will build, but may have runtime -# issues. This is set to "coreboot-sdk" so the automated CQ builder -# can use it for build tests. -# -# For compiling for a real device, you need to use the Zephyr SDK -# toolchain, which is not available in the chroot (and thus, to the CQ -# builder). Please follow -# https://docs.zephyrproject.org/latest/getting_started/installation_linux.html -# for instructions on installing the SDK. -# -# If you are building outside of the chroot on a gLinux machine, the -# arm-none-eabi-gcc toolchain seems to work fine. If you prefer this -# toolchain, you can pass --toolchain=arm-none-eabi to zmake -# configure, and that will work as well. -toolchain: coreboot-sdk -prefer-zephyr-sdk: true -- cgit v1.2.1 From 1fff129e5ddfe20c2c1513835e06c4e4d8f57608 Mon Sep 17 00:00:00 2001 From: Jack Rosenthal Date: Mon, 25 Jan 2021 10:15:51 -0700 Subject: zmake: remove prefer-zephyr-sdk from project config No projects set this anymore. BUG=b:178363068 BRANCH=none TEST=zmake testall Signed-off-by: Jack Rosenthal Change-Id: Ib28017048695a5dbabaead83de49c85363fde665 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2647537 Reviewed-by: Patrick Georgi Commit-Queue: Patrick Georgi Tested-by: Patrick Georgi --- zephyr/zmake/zmake/project.py | 7 ------- zephyr/zmake/zmake/zmake.py | 15 --------------- 2 files changed, 22 deletions(-) diff --git a/zephyr/zmake/zmake/project.py b/zephyr/zmake/zmake/project.py index 7bb68a7018..db8e5a2e17 100644 --- a/zephyr/zmake/zmake/project.py +++ b/zephyr/zmake/zmake/project.py @@ -38,9 +38,6 @@ class ProjectConfig: 'toolchain': { 'type': 'string', }, - 'prefer-zephyr-sdk': { - 'type': 'boolean', - }, 'is-test': { 'type': 'boolean', }, @@ -69,10 +66,6 @@ class ProjectConfig: def toolchain(self): return self.config_dict['toolchain'] - @property - def zephyr_sdk_is_preferred(self): - return self.config_dict.get('prefer-zephyr-sdk', False) - @property def is_test(self): return self.config_dict.get('is-test', False) diff --git a/zephyr/zmake/zmake/zmake.py b/zephyr/zmake/zmake/zmake.py index 5a2e0d0105..2a9587ffe5 100644 --- a/zephyr/zmake/zmake/zmake.py +++ b/zephyr/zmake/zmake/zmake.py @@ -94,21 +94,6 @@ class Zmake: if not toolchain: toolchain = project.config.toolchain - if project.config.zephyr_sdk_is_preferred: - try: - toolchains.find_zephyr_sdk() - except OSError: - self.logger.warning( - 'Unable to find the Zephyr SDK, which is the preferred ' - 'toolchain for this project (however, unavailable in ' - 'the chroot by default). Using %r instead, which ' - 'will probably compile but may not actually work at ' - 'all. See go/zephyr-care for more info.', toolchain) - else: - self.logger.info( - 'Zephyr SDK is available. Using it instead of %r.', - toolchain) - toolchain = 'zephyr' toolchain_config = toolchains.get_toolchain(toolchain, module_paths) if not build_dir.exists(): -- cgit v1.2.1