From 193f3f3b8fd16f1204504ca4811a0dd0e56a54ff Mon Sep 17 00:00:00 2001 From: Eric Yilun Lin Date: Fri, 5 Feb 2021 13:44:26 +0800 Subject: baseboard/asurada: refactor to support baseboard build guidelines: 1. sensors are in the board, since this may changes most of the time 2. PPC/Charger/BC12/TCPC/PD are in the baseboard, this is unlikely changing 3. sub-board detection is in the baseboard 4. power signals, power sequence are in the baseboard 5. ADC/PWM this might change, but we keep them in the baseboard for now 6. it5205_sbu is not currently used for now, move it to baseboard 7. battery, led are kept in the board BUG=b:178439840 TEST=boot hayato to OS BRANCH=none Change-Id: I21bf5d1f7901a10c3538ad5646362f2b402652af Signed-off-by: Eric Yilun Lin Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2675328 Reviewed-by: Ting Shen --- baseboard/asurada/baseboard.c | 635 ++++++++++++++++++++++++++++++++++++++ baseboard/asurada/baseboard.h | 229 ++++++++++++++ baseboard/asurada/board_id.c | 107 +++++++ baseboard/asurada/build.mk | 10 + baseboard/asurada/it5205_sbu.c | 68 ++++ baseboard/asurada/it5205_sbu.h | 13 + baseboard/asurada/usb_pd_policy.c | 221 +++++++++++++ board/asurada/board.c | 570 ---------------------------------- board/asurada/board.h | 193 +----------- board/asurada/board_id.c | 107 ------- board/asurada/build.mk | 5 +- board/asurada/it5205_sbu.c | 68 ---- board/asurada/it5205_sbu.h | 13 - board/asurada/usb_pd_policy.c | 221 ------------- 14 files changed, 1289 insertions(+), 1171 deletions(-) create mode 100644 baseboard/asurada/baseboard.c create mode 100644 baseboard/asurada/baseboard.h create mode 100644 baseboard/asurada/board_id.c create mode 100644 baseboard/asurada/build.mk create mode 100644 baseboard/asurada/it5205_sbu.c create mode 100644 baseboard/asurada/it5205_sbu.h create mode 100644 baseboard/asurada/usb_pd_policy.c delete mode 100644 board/asurada/board_id.c delete mode 100644 board/asurada/it5205_sbu.c delete mode 100644 board/asurada/it5205_sbu.h delete mode 100644 board/asurada/usb_pd_policy.c diff --git a/baseboard/asurada/baseboard.c b/baseboard/asurada/baseboard.c new file mode 100644 index 0000000000..7bb3fbe1ae --- /dev/null +++ b/baseboard/asurada/baseboard.c @@ -0,0 +1,635 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Asurada baseboard-specific configuration */ + +#include "adc.h" +#include "adc_chip.h" +#include "button.h" +#include "charge_manager.h" +#include "charger.h" +#include "charger.h" +#include "charge_state.h" +#include "charge_state_v2.h" +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "driver/accelgyro_bmi_common.h" +#include "driver/accel_lis2dw12.h" +#include "driver/als_tcs3400.h" +#include "driver/bc12/mt6360.h" +#include "driver/bc12/pi3usb9201.h" +#include "driver/charger/isl923x.h" +#include "driver/charger/isl923x.h" +#include "driver/ppc/syv682x.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/temp_sensor/thermistor.h" +#include "driver/usb_mux/it5205.h" +#include "driver/usb_mux/ps8743.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "i2c.h" +#include "it5205_sbu.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "motion_sense.h" +#include "power_button.h" +#include "power.h" +#include "power.h" +#include "pwm_chip.h" +#include "pwm.h" +#include "regulator.h" +#include "spi.h" +#include "switch.h" +#include "tablet_mode.h" +#include "task.h" +#include "temp_sensor.h" +#include "timer.h" +#include "uart.h" +#include "usb_charge.h" +#include "usbc_ppc.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" + +static void bc12_interrupt(enum gpio_signal signal); +static void ppc_interrupt(enum gpio_signal signal); +static void x_ec_interrupt(enum gpio_signal signal); + +#include "gpio_list.h" + +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) + +static enum board_sub_board board_get_sub_board(void); + +/* Wake-up pins for hibernate */ +enum gpio_signal hibernate_wake_pins[] = { + GPIO_AC_PRESENT, + GPIO_LID_OPEN, + GPIO_POWER_BUTTON_L, +}; +int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +const struct charger_config_t chg_chips[] = { + { + .i2c_port = I2C_PORT_CHARGER, + .i2c_addr_flags = ISL923X_ADDR_FLAGS, + .drv = &isl923x_drv, + }, +}; + +__override void board_hibernate_late(void) +{ + /* + * Turn off PP5000_A. Required for devices without Z-state. + * Don't care for devices with Z-state. + */ + gpio_set_level(GPIO_EN_PP5000_A, 0); + + /* + * GPIO_EN_SLP_Z not implemented in rev0/1, + * fallback to usual hibernate process. + */ + if (board_get_version() <= 1) + return; + + isl9238c_hibernate(CHARGER_SOLO); + + gpio_set_level(GPIO_EN_SLP_Z, 1); + + /* should not reach here */ + __builtin_unreachable(); +} + +/* power signal list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + {GPIO_PMIC_EC_PWRGD, POWER_SIGNAL_ACTIVE_HIGH, "PMIC_PWR_GOOD"}, + {GPIO_AP_IN_SLEEP_L, POWER_SIGNAL_ACTIVE_LOW, "AP_IN_S3_L"}, + {GPIO_AP_EC_WATCHDOG_L, POWER_SIGNAL_ACTIVE_LOW, "AP_WDT_ASSERTED"}, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +/* Detect subboard */ +static void board_tcpc_init(void) +{ + gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); + /* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */ + gpio_enable_interrupt(GPIO_X_EC_GPIO2); + + /* If this is not a Type-C subboard, disable the task. */ + if (board_get_sub_board() != SUB_BOARD_TYPEC) + task_disable_task(TASK_ID_PD_C1); +} +/* Must be done after I2C and subboard */ +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); + +/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ +const struct adc_t adc_channels[] = { + /* Convert to mV (3000mV/1024). */ + {"VBUS", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, + {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, + {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, + /* AMON/BMON gain = 17.97 */ + {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, + CHIP_ADC_CH3}, + {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +/* PPC */ +struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .i2c_port = I2C_PORT_PPC0, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + .frs_en = GPIO_USB_C0_FRS_EN, + }, + { + .i2c_port = I2C_PORT_PPC1, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + .frs_en = GPIO_USB_C1_FRS_EN, + }, +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* BC12 */ +const struct mt6360_config_t mt6360_config = { + .i2c_port = 0, + .i2c_addr_flags = MT6360_PMU_I2C_ADDR_FLAGS, +}; + +const struct pi3usb9201_config_t + pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { + /* [0]: unused */ + [1] = { + .i2c_port = 4, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + } +}; + +struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { .drv = &mt6360_drv }, + { .drv = &pi3usb9201_drv }, +}; + +static void bc12_interrupt(enum gpio_signal signal) +{ + if (signal == GPIO_USB_C0_BC12_INT_ODL) + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); + else + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); +} + +static void board_sub_bc12_init(void) +{ + if (board_get_sub_board() == SUB_BOARD_TYPEC) + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); + else + /* If this is not a Type-C subboard, disable the task. */ + task_disable_task(TASK_ID_USB_CHG_P1); +} +/* Must be done after I2C and subboard */ +DECLARE_HOOK(HOOK_INIT, board_sub_bc12_init, HOOK_PRIO_INIT_I2C + 1); + +static void ppc_interrupt(enum gpio_signal signal) +{ + if (signal == GPIO_USB_C0_PPC_INT_ODL) + /* C0: PPC interrupt */ + syv682x_interrupt(0); +} + +/* PWM */ + +/* + * PWM channels. Must be in the exactly same order as in enum pwm_channel. + * There total three 16 bits clock prescaler registers for all pwm channels, + * so use the same frequency and prescaler register setting is required if + * number of pwm channel greater than three. + */ +const struct pwm_t pwm_channels[] = { + [PWM_CH_LED1] = { + .channel = 0, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, + [PWM_CH_LED2] = { + .channel = 1, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, + [PWM_CH_LED3] = { + .channel = 2, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + + +/* Sub-board */ + +static enum board_sub_board board_get_sub_board(void) +{ + static enum board_sub_board sub = SUB_BOARD_NONE; + + if (sub != SUB_BOARD_NONE) + return sub; + + /* HDMI board has external pull high. */ + if (gpio_get_level(GPIO_EC_X_GPIO3)) { + sub = SUB_BOARD_HDMI; + /* Only has 1 PPC with HDMI subboard */ + ppc_cnt = 1; + /* EC_X_GPIO1 */ + gpio_set_flags(GPIO_EN_HDMI_PWR, GPIO_OUT_HIGH); + /* X_EC_GPIO2 */ + gpio_set_flags(GPIO_PS185_EC_DP_HPD, GPIO_INT_BOTH); + /* EC_X_GPIO3 */ + gpio_set_flags(GPIO_PS185_PWRDN_ODL, GPIO_ODR_HIGH); + } else { + sub = SUB_BOARD_TYPEC; + /* EC_X_GPIO1 */ + gpio_set_flags(GPIO_USB_C1_FRS_EN, GPIO_OUT_LOW); + /* X_EC_GPIO2 */ + gpio_set_flags(GPIO_USB_C1_PPC_INT_ODL, + GPIO_INT_BOTH | GPIO_PULL_UP); + /* EC_X_GPIO3 */ + gpio_set_flags(GPIO_USB_C1_DP_IN_HPD, GPIO_OUT_LOW); + } + + CPRINTS("Detect %s SUB", sub == SUB_BOARD_HDMI ? "HDMI" : "TYPEC"); + return sub; +} + +static void sub_board_init(void) +{ + board_get_sub_board(); +} +DECLARE_HOOK(HOOK_INIT, sub_board_init, HOOK_PRIO_INIT_I2C - 1); + +__override uint8_t board_get_usb_pd_port_count(void) +{ + if (board_get_sub_board() == SUB_BOARD_TYPEC) + return CONFIG_USB_PD_PORT_MAX_COUNT; + else + return CONFIG_USB_PD_PORT_MAX_COUNT - 1; +} + +/* Called on AP S3 -> S0 transition */ +static void board_chipset_resume(void) +{ + gpio_set_level(GPIO_EC_BL_EN_OD, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); + +/* Called on AP S0 -> S3 transition */ +static void board_chipset_suspend(void) +{ + gpio_set_level(GPIO_EC_BL_EN_OD, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); + +/* USB-A */ +const int usb_port_enable[] = { + GPIO_EN_PP5000_USB_A0_VBUS, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); + +/* USB Mux */ + +void board_usb_mux_init(void) +{ + if (board_get_sub_board() == SUB_BOARD_TYPEC) + ps8743_tune_usb_eq(&usb_muxes[1], + PS8743_USB_EQ_TX_12_8_DB, + PS8743_USB_EQ_RX_12_8_DB); +} +DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); + +static int board_ps8743_mux_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + int rv = EC_SUCCESS; + int reg = 0; + + rv = ps8743_read(me, PS8743_REG_MODE, ®); + if (rv) + return rv; + + /* Disable FLIP pin, enable I2C control. */ + reg |= PS8743_MODE_FLIP_REG_CONTROL; + /* Disable CE_USB pin, enable I2C control. */ + reg |= PS8743_MODE_USB_REG_CONTROL; + /* Disable CE_DP pin, enable I2C control. */ + reg |= PS8743_MODE_DP_REG_CONTROL; + + /* + * DP specific config + * + * Enable/Disable IN_HPD on the DB. + */ + gpio_set_level(GPIO_USB_C1_DP_IN_HPD, + mux_state & USB_PD_MUX_DP_ENABLED); + + return ps8743_write(me, PS8743_REG_MODE, reg); +} + +const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .usb_port = 0, + .i2c_port = I2C_PORT_USB_MUX0, + .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS, + .driver = &it5205_usb_mux_driver, + }, + { + .usb_port = 1, + .i2c_port = I2C_PORT_USB_MUX1, + .i2c_addr_flags = PS8743_I2C_ADDR0_FLAG, + .driver = &ps8743_usb_mux_driver, + .board_set = &board_ps8743_mux_set, + }, +}; + +/* + * I2C channels (A, B, and C) are using the same timing registers (00h~07h) + * at default. + * In order to set frequency independently for each channels, + * We use timing registers 09h~0Bh, and the supported frequency will be: + * 50KHz, 100KHz, 400KHz, or 1MHz. + * I2C channels (D, E and F) can be set different frequency on different ports. + * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and + * the individual prescale register. + * The frequency of SMBus module is 24MHz on default. + * The allowed range of I2C(D/E/F) frequency is as following setting. + * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1) + * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8) + * Channel D has multi-function and can be used as UART interface. + * Channel F is reserved for EC debug. + */ + +/* I2C ports */ +const struct i2c_port_t i2c_ports[] = { + {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, + {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, + {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, + {"usb1", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +int board_allow_i2c_passthru(int port) +{ + return (port == I2C_PORT_VIRTUAL_BATTERY); +} + + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* TODO: check correct operation for Asurada */ +} + +/* TCPC */ +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it83xx_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it83xx_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, +}; + +const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) +{ + const static struct cc_para_t + cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + }; + + return &cc_parameter[port]; +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ + return 0; +} + +void board_reset_pd_mcu(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} + +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + /* + * We ignore the cc_pin and PPC vconn because polarity and PPC vconn + * should already be set correctly in the PPC driver via the pd + * state machine. + */ +} + +int board_set_active_charge_port(int port) +{ + int i; + int is_valid_port = port == 0 || (port == 1 && board_get_sub_board() == + SUB_BOARD_TYPEC); + + if (!is_valid_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + if (port == CHARGE_PORT_NONE) { + CPRINTS("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) + CPRINTS("Disabling C%d as sink failed.", i); + } + + return EC_SUCCESS; + } + + /* Check if the port is sourcing VBUS. */ + if (ppc_is_sourcing_vbus(port)) { + CPRINTF("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTS("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) + continue; + + if (ppc_vbus_sink_enable(i, 0)) + CPRINTS("C%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTS("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +/** + * Handle PS185 HPD changing state. + */ +int debounced_hpd; + +static void ps185_hdmi_hpd_deferred(void) +{ + const int new_hpd = gpio_get_level(GPIO_PS185_EC_DP_HPD); + + /* HPD status not changed, probably a glitch, just return. */ + if (debounced_hpd == new_hpd) + return; + + debounced_hpd = new_hpd; + + gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !debounced_hpd); + CPRINTS(debounced_hpd ? "HDMI plug" : "HDMI unplug"); +} +DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); + +#define PS185_HPD_DEBOUCE 250 + +static void hdmi_hpd_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(&ps185_hdmi_hpd_deferred_data, PS185_HPD_DEBOUCE); +} + +/* HDMI/TYPE-C function shared subboard interrupt */ +static void x_ec_interrupt(enum gpio_signal signal) +{ + int sub = board_get_sub_board(); + + if (sub == SUB_BOARD_TYPEC) + /* C1: PPC interrupt */ + syv682x_interrupt(1); + else if (sub == SUB_BOARD_HDMI) + hdmi_hpd_interrupt(signal); + else + CPRINTS("Undetected subboard interrupt."); +} + +int ppc_get_alert_status(int port) +{ + if (port == 0) + return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; + if (port == 1 && board_get_sub_board() == SUB_BOARD_TYPEC) + return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; + + return 0; +} +/* SD Card */ +int board_regulator_get_info(uint32_t index, char *name, + uint16_t *num_voltages, uint16_t *voltages_mv) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_get_info(id, name, num_voltages, + voltages_mv); +} + +int board_regulator_enable(uint32_t index, uint8_t enable) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_enable(id, enable); +} + +int board_regulator_is_enabled(uint32_t index, uint8_t *enabled) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_is_enabled(id, enabled); +} + +int board_regulator_set_voltage(uint32_t index, uint32_t min_mv, + uint32_t max_mv) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_set_voltage(id, min_mv, max_mv); +} + +int board_regulator_get_voltage(uint32_t index, uint32_t *voltage_mv) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_get_voltage(id, voltage_mv); +} + +/* Lid */ +#ifndef TEST_BUILD +/* This callback disables keyboard when convertibles are fully open */ +void lid_angle_peripheral_enable(int enable) +{ + int chipset_in_s0 = chipset_in_state(CHIPSET_STATE_ON); + + if (enable) { + keyboard_scan_enable(1, KB_SCAN_DISABLE_LID_ANGLE); + } else { + /* + * Ensure that the chipset is off before disabling the keyboard. + * When the chipset is on, the EC keeps the keyboard enabled and + * the AP decides whether to ignore input devices or not. + */ + if (!chipset_in_s0) + keyboard_scan_enable(0, KB_SCAN_DISABLE_LID_ANGLE); + } +} +#endif + +static void baseboard_init(void) +{ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); +} +DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT-1); diff --git a/baseboard/asurada/baseboard.h b/baseboard/asurada/baseboard.h new file mode 100644 index 0000000000..d16e9d97e4 --- /dev/null +++ b/baseboard/asurada/baseboard.h @@ -0,0 +1,229 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Asurada board configuration */ + +#ifndef __CROS_EC_BASEBOARD_H +#define __CROS_EC_BASEBOARD_H + +/* IT81202-bx config */ +/* + * NOTE: we need to make correct VCC voltage selection here if EC's VCC isn't + * connect to 1.8v on other versions. + */ +#define CONFIG_IT83XX_VCC_1P8V + +/* + * On power-on, H1 releases the EC from reset but then quickly asserts and + * releases the reset a second time. This means the EC sees 2 resets: + * (1) power-on reset, (2) reset-pin reset. This config will + * allow the second reset to be treated as a power-on. + */ +#define CONFIG_BOARD_RESET_AFTER_POWER_ON +#define CONFIG_BOARD_VERSION_CUSTOM +#define CONFIG_CHIPSET_MT8192 +#define CONFIG_EXTPOWER_GPIO +#define CONFIG_HIBERNATE_WAKE_PINS_DYNAMIC + +/* Chipset */ +#define CONFIG_CMD_AP_RESET_LOG +#define CONFIG_CMD_POWERINDEBUG +#define CONFIG_HOST_COMMAND_STATUS +#define CONFIG_LOW_POWER_IDLE +#define CONFIG_LOW_POWER_S0 +#define CONFIG_POWER_BUTTON +#define CONFIG_POWER_COMMON +#define CONFIG_PWM +#define CONFIG_VBOOT_HASH +#define CONFIG_VOLUME_BUTTONS +#define CONFIG_WP_ACTIVE_HIGH + +/* Battery */ +#define CONFIG_BATTERY_CUT_OFF +#define CONFIG_BATTERY_FUEL_GAUGE +#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_ODL +#define CONFIG_BATTERY_SMART + +/* BC12 */ +#define CONFIG_BC12_DETECT_MT6360 +#define CONFIG_BC12_DETECT_PI3USB9201 +#undef CONFIG_BC12_SINGLE_DRIVER +#define CONFIG_USB_CHARGER + +/* Charger */ +#define ADC_AMON_BMON ADC_CHARGER_AMON_R /* ADC name remap */ +#define ADC_PSYS ADC_CHARGER_PMON /* ADC name remap */ +#define CONFIG_CHARGE_MANAGER +#define CONFIG_CHARGER +#define CONFIG_CHARGE_RAMP_HW +#define CONFIG_CHARGER_DISCHARGE_ON_AC +#define CONFIG_CHARGER_INPUT_CURRENT 512 +#define CONFIG_CHARGER_ISL9238C +#define CONFIG_CHARGER_MAINTAIN_VBAT +#define CONFIG_CHARGER_OTG +#define CONFIG_CHARGER_PSYS +#define CONFIG_CHARGER_PSYS_READ +#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* BOARD_RS2 */ +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 /* BOARD_RS1 */ +#define CONFIG_CMD_CHARGER_ADC_AMON_BMON + +/* Keyboard */ +#define CONFIG_CMD_KEYBOARD +#define CONFIG_KEYBOARD_COL2_INVERTED +#define CONFIG_KEYBOARD_PROTOCOL_MKBP +#define CONFIG_MKBP_USE_GPIO + +/* I2C */ +#define CONFIG_I2C +#define CONFIG_I2C_CONTROLLER +#define CONFIG_I2C_PASSTHRU_RESTRICTED +#define CONFIG_I2C_VIRTUAL_BATTERY +#define I2C_PORT_CHARGER IT83XX_I2C_CH_A +#define I2C_PORT_BATTERY IT83XX_I2C_CH_A +#define I2C_PORT_ACCEL IT83XX_I2C_CH_B +#define I2C_PORT_PPC0 IT83XX_I2C_CH_C +#define I2C_PORT_PPC1 IT83XX_I2C_CH_E +#define I2C_PORT_USB_MUX0 IT83XX_I2C_CH_C +#define I2C_PORT_USB_MUX1 IT83XX_I2C_CH_E +#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY +#define CONFIG_SMBUS_PEC + +/* LED */ +#define CONFIG_LED_COMMON + +/* PD / USB-C / PPC */ +#define CONFIG_CMD_PPC_DUMP +#define CONFIG_HOSTCMD_PD_CONTROL +#define CONFIG_IT83XX_TUNE_CC_PHY +#define CONFIG_USBC_PPC +#define CONFIG_USBC_PPC_DEDICATED_INT +#define CONFIG_USBC_PPC_POLARITY +#define CONFIG_USBC_PPC_SYV682X +#define CONFIG_USBC_PPC_VCONN +#define CONFIG_USBC_SS_MUX +#define CONFIG_USBC_VCONN +#define CONFIG_USBC_VCONN_SWAP +#define CONFIG_USB_DRP_ACC_TRYSRC +#define CONFIG_USB_MUX_IT5205 /* C0 */ +#define CONFIG_USB_MUX_PS8743 /* C1 */ +#define CONFIG_USB_PD_ALT_MODE +#define CONFIG_USB_PD_ALT_MODE_DFP +#define CONFIG_USB_PD_DECODE_SOP +#define CONFIG_USB_PD_DISCHARGE +#define CONFIG_USB_PD_DISCHARGE_PPC +#define CONFIG_USB_PD_DP_HPD_GPIO +#define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 2 +#define CONFIG_USB_PD_LOGGING +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 +#define CONFIG_USB_PD_REV30 +#define CONFIG_USB_PD_TCPC_LOW_POWER +#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_TCPMV2 +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USB_PD_VBUS_DETECT_PPC +#define CONFIG_USB_PID 0x5566 /* TODO: update PID */ +#define CONFIG_USB_POWER_DELIVERY + +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + +/* USB-A */ +#define CONFIG_USB_PORT_POWER_DUMB +#define USB_PORT_COUNT USBA_PORT_COUNT + +/* UART */ +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 + +/* Sensor */ +#define CONFIG_CMD_ACCEL_INFO +#define CONFIG_CMD_ACCELS + +#define CONFIG_ACCEL_FIFO +#define CONFIG_ACCEL_FIFO_SIZE 256 +#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) +#define CONFIG_ACCEL_INTERRUPTS + +/* SPI / Host Command */ +#define CONFIG_SPI +#define CONFIG_SUPPRESSED_HOST_COMMANDS \ + EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_MOTION_SENSE_CMD, \ + EC_CMD_PD_GET_LOG_ENTRY + +/* MKBP */ +#define CONFIG_MKBP_EVENT + +#define CONFIG_KEYBOARD_PROTOCOL_MKBP +#define CONFIG_MKBP_USE_GPIO + +/* Voltage regulator control */ +#define CONFIG_HOSTCMD_REGULATOR + +/* Define the host events which are allowed to wakeup AP in S3. */ +#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | /* for DP */ \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) + +/* GPIO name remapping */ +#define GPIO_EN_HDMI_PWR GPIO_EC_X_GPIO1 +#define GPIO_USB_C1_FRS_EN GPIO_EC_X_GPIO1 +#define GPIO_USB_C1_PPC_INT_ODL GPIO_X_EC_GPIO2 +#define GPIO_PS185_EC_DP_HPD GPIO_X_EC_GPIO2 +#define GPIO_USB_C1_DP_IN_HPD GPIO_EC_X_GPIO3 +#define GPIO_PS185_PWRDN_ODL GPIO_EC_X_GPIO3 + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum adc_channel { + ADC_VBUS, /* ADC 0 */ + ADC_BOARD_ID_0, /* ADC 1 */ + ADC_BOARD_ID_1, /* ADC 2 */ + ADC_CHARGER_AMON_R, /* ADC 3 */ + ADC_CHARGER_PMON, /* ADC 6 */ + + /* Number of ADC channels */ + ADC_CH_COUNT, +}; + +enum pwm_channel { + PWM_CH_LED1, + PWM_CH_LED2, + PWM_CH_LED3, + PWM_CH_COUNT, +}; + +enum power_signal { + PMIC_PWR_GOOD, + AP_IN_S3_L, + AP_WDT_ASSERTED, + POWER_SIGNAL_COUNT, +}; + +enum board_sub_board { + SUB_BOARD_NONE = -1, + SUB_BOARD_TYPEC, + SUB_BOARD_HDMI, + + SUB_BOARD_COUNT, +}; + +int board_get_version(void); +void board_reset_pd_mcu(void); + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/asurada/board_id.c b/baseboard/asurada/board_id.c new file mode 100644 index 0000000000..78cc9455c4 --- /dev/null +++ b/baseboard/asurada/board_id.c @@ -0,0 +1,107 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "adc.h" +#include "common.h" +#include "console.h" +#include "gpio.h" +#include "hooks.h" +#include "timer.h" +#include "util.h" + +/** + * Conversion based on following table: + * + * ID | Rp | Rd | Voltage + * | kOhm | kOhm | mV + * ---+------+------+-------- + * 0 | 51.1 | 2.2 | 136.2 + * 1 | 51.1 | 6.81 | 388.1 + * 2 | 51.1 | 11 | 584.5 + * 3 | 57.6 | 18 | 785.7 + * 4 | 51.1 | 22 | 993.2 + * 5 | 51.1 | 30 | 1220.7 + * 6 | 51.1 | 39.2 | 1432.6 + * 7 | 56 | 56 | 1650.0 + * 8 | 47 | 61.9 | 1875.8 + * 9 | 47 | 80.6 | 2084.5 + * 10 | 56 | 124 | 2273.3 + * 11 | 51.1 | 150 | 2461.5 + * 12 | 47 | 200 | 2672.1 + * 13 | 47 | 330 | 2888.6 + * 14 | 47 | 680 | 3086.7 + */ +const static int voltage_map[] = { + 136, + 388, + 584, + 785, + 993, + 1220, + 1432, + 1650, + 1875, + 2084, + 2273, + 2461, + 2672, + 2888, + 3086, +}; + +const int threshold_mv = 100; + +/** + * Convert ADC value to board id using the voltage table above. + * + * @param ch ADC channel to read, usually ADC_BOARD_ID_0 or ADC_BOARD_ID_1. + * + * @return a non-negative board id, or negative value if error. + */ +static int adc_value_to_numeric_id(enum adc_channel ch) +{ + int mv; + + gpio_set_level(GPIO_EN_EC_ID_ODL, 0); + /* Wait to allow cap charge */ + msleep(10); + + mv = adc_read_channel(ch); + if (mv == ADC_READ_ERROR) + mv = adc_read_channel(ch); + + gpio_set_level(GPIO_EN_EC_ID_ODL, 1); + + if (mv == ADC_READ_ERROR) + return -EC_ERROR_UNKNOWN; + + for (int i = 0; i < ARRAY_SIZE(voltage_map); i++) { + if (IN_RANGE(mv, voltage_map[i] - threshold_mv, + voltage_map[i] + threshold_mv)) + return i; + } + + return -EC_ERROR_UNKNOWN; +} + +static int version = -1; + +/* b/163963220: Cache ADC value before board_hibernate_late() reads it */ +static void board_version_init(void) +{ + version = adc_value_to_numeric_id(ADC_BOARD_ID_0); + if (version < 0) { + ccprints("WARN:BOARD_ID_0"); + ccprints("Assuming board id = 0"); + + version = 0; + } +} +DECLARE_HOOK(HOOK_INIT, board_version_init, HOOK_PRIO_INIT_ADC + 1); + +int board_get_version(void) +{ + return version; +} diff --git a/baseboard/asurada/build.mk b/baseboard/asurada/build.mk new file mode 100644 index 0000000000..58e9934bc0 --- /dev/null +++ b/baseboard/asurada/build.mk @@ -0,0 +1,10 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Baseboard specific files build +# + +baseboard-y=baseboard.o board_id.o +baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/baseboard/asurada/it5205_sbu.c b/baseboard/asurada/it5205_sbu.c new file mode 100644 index 0000000000..9ee59a5cc3 --- /dev/null +++ b/baseboard/asurada/it5205_sbu.c @@ -0,0 +1,68 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * IT5205 Type-C SBU OVP handler + */ + +#include "console.h" +#include "hooks.h" +#include "it5205.h" +#include "stdbool.h" +#include "timer.h" +#include "usb_mux.h" + +#define CPRINTS(format, args...) cprints(CC_USB, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USB, format, ## args) + +#define OVP_RETRY_DELAY_US_MIN (100 * MSEC) + +static unsigned int ovp_retry_delay_us = OVP_RETRY_DELAY_US_MIN; + +static void reset_retry_delay(void) +{ + CPRINTS("IT5205 SBU OVP cleared"); + ovp_retry_delay_us = OVP_RETRY_DELAY_US_MIN; +} +DECLARE_DEFERRED(reset_retry_delay); + +static void reset_csbu(void) +{ + /* double the retry time up to 1 minute */ + ovp_retry_delay_us = MIN(ovp_retry_delay_us * 2, MINUTE); + /* and reset it if interrupt not triggered in a short period */ + hook_call_deferred(&reset_retry_delay_data, 500 * MSEC); + + /* re-enable sbu interrupt */ + it5205h_enable_csbu_switch(&usb_muxes[0], false); + it5205h_enable_csbu_switch(&usb_muxes[0], true); +} +DECLARE_DEFERRED(reset_csbu); + +static void it5205h_hook_ac_change(void) +{ + int reg; + + /* Check if the board has IT5205H, and read its ovp status */ + if (i2c_read8(I2C_PORT_USB_MUX0, IT5205H_SBU_I2C_ADDR_FLAGS, + IT5205H_REG_ISR, ®)) + return; + + /* + * Re-poll ovp status immediately if AC detached, because ovp will + * likely be recovered. + * + * Always perform the re-poll even when this hook is triggered by + * unrelated events. + */ + if (reg & IT5205H_ISR_CSBU_OVP) + hook_call_deferred(&reset_csbu_data, 0); +} +DECLARE_HOOK(HOOK_AC_CHANGE, it5205h_hook_ac_change, HOOK_PRIO_DEFAULT); + +void it5205h_sbu_interrupt(enum gpio_signal signal) +{ + CPRINTS("IT5205 SBU OVP triggered"); + hook_call_deferred(&reset_csbu_data, ovp_retry_delay_us); + hook_call_deferred(&reset_retry_delay_data, -1); +} diff --git a/baseboard/asurada/it5205_sbu.h b/baseboard/asurada/it5205_sbu.h new file mode 100644 index 0000000000..8dc59520dd --- /dev/null +++ b/baseboard/asurada/it5205_sbu.h @@ -0,0 +1,13 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * IT5205 Type-C SBU OVP handler + */ + +#ifndef __CROS_EC_ASURADA_IT5205_SBU_H +#define __CROS_EC_ASURADA_IT5205_SBU_H + +void it5205h_sbu_interrupt(enum gpio_signal signal); + +#endif /* __CROS_EC_ASURADA_IT5205_SBU_H */ diff --git a/baseboard/asurada/usb_pd_policy.c b/baseboard/asurada/usb_pd_policy.c new file mode 100644 index 0000000000..9e90eb95a3 --- /dev/null +++ b/baseboard/asurada/usb_pd_policy.c @@ -0,0 +1,221 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "charge_manager.h" +#include "chipset.h" +#include "timer.h" +#include "usb_dp_alt_mode.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usbc_ppc.h" + +#if CONFIG_USB_PD_3A_PORTS != 1 +#error Asurada reference must have at least one 3.0 A port +#endif + +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) + +/* The port that the aux channel is on. */ +static enum { + AUX_PORT_NONE = -1, + AUX_PORT_C0 = 0, + AUX_PORT_C1HDMI = 1, +} aux_port = AUX_PORT_NONE; + +int svdm_get_hpd_gpio(int port) +{ + /* HPD is low active, inverse the result */ + return !gpio_get_level(GPIO_EC_DPBRDG_HPD_ODL); +} + +void svdm_set_hpd_gpio(int port, int en) +{ + /* + * HPD is low active, inverse the en + * TODO: C0&C1 shares the same HPD, implement FCFS policy. + */ + gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !en); +} + +static void aux_switch_port(int port) +{ + if (port != AUX_PORT_NONE) + gpio_set_level_verbose(CC_USBPD, GPIO_DP_AUX_PATH_SEL, port); + aux_port = port; +} + +static void aux_display_disconnected(int port) +{ + /* Gets the other port. C0 -> C1, C1 -> C0. */ + int other_port = !port; + + /* If the current port is not the aux port, nothing needs to be done. */ + if (aux_port != port) + return; + + /* If the other port is connected to a external display, switch aux. */ + if (dp_status[other_port] & DP_FLAGS_DP_ON) + aux_switch_port(other_port); + else + aux_switch_port(AUX_PORT_NONE); +} + +__override int svdm_dp_attention(int port, uint32_t *payload) +{ + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); +#ifdef CONFIG_USB_PD_DP_HPD_GPIO + int cur_lvl = svdm_get_hpd_gpio(port); +#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ + + dp_status[port] = payload[1]; + + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && + (irq || lvl)) + /* + * Wake up the AP. IRQ or level high indicates a DP sink is now + * present. + */ + if (IS_ENABLED(CONFIG_MKBP_EVENT)) + pd_notify_dp_alt_mode_entry(port); + + /* Its initial DP status message prior to config */ + if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { + if (lvl) + dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; + return 1; + } + +#ifdef CONFIG_USB_PD_DP_HPD_GPIO + if (irq && !lvl) { + /* + * IRQ can only be generated when the level is high, because + * the IRQ is signaled by a short low pulse from the high level. + */ + CPRINTF("ERR:HPD:IRQ&LOW\n"); + return 0; /* nak */ + } + + if (irq && cur_lvl) { + uint64_t now = get_time().val; + /* wait for the minimum spacing between IRQ_HPD if needed */ + if (now < svdm_hpd_deadline[port]) + usleep(svdm_hpd_deadline[port] - now); + + /* generate IRQ_HPD pulse */ + svdm_set_hpd_gpio(port, 0); + /* + * b/171172053#comment14: since the HPD_DSTREAM_DEBOUNCE_IRQ is + * very short (500us), we can use udelay instead of usleep for + * more stable pulse period. + */ + udelay(HPD_DSTREAM_DEBOUNCE_IRQ); + svdm_set_hpd_gpio(port, 1); + } else { + svdm_set_hpd_gpio(port, lvl); + } + + /* + * Asurada can only output to 1 display port at a time. + * This implements FCFS policy by changing the aux channel. If a + * display is connected to the either port (says A), and the port A + * will be served until the display is disconnected from port A. + * It won't output to the other display which connects to port B. + */ + if (lvl && aux_port == AUX_PORT_NONE) + /* + * A display is connected, and no display was plugged on either + * port. + */ + aux_switch_port(port); + else if (!lvl) + aux_display_disconnected(port); + + + /* set the minimum time delay (2ms) for the next HPD IRQ */ + svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL; +#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ + + usb_mux_hpd_update(port, lvl, irq); + +#ifdef USB_PD_PORT_TCPC_MST + if (port == USB_PD_PORT_TCPC_MST) + baseboard_mst_enable_control(port, lvl); +#endif + + /* ack */ + return 1; +} + +__override void svdm_exit_dp_mode(int port) +{ +#ifdef CONFIG_USB_PD_DP_HPD_GPIO + svdm_set_hpd_gpio(port, 0); +#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ + usb_mux_hpd_update(port, 0, 0); + + aux_display_disconnected(port); + +#ifdef USB_PD_PORT_TCPC_MST + if (port == USB_PD_PORT_TCPC_MST) + baseboard_mst_enable_control(port, 0); +#endif +} + +int pd_snk_is_vbus_provided(int port) +{ + return ppc_is_vbus_present(port); +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + prev_en = ppc_is_sourcing_vbus(port); + + /* Disable VBUS. */ + ppc_vbus_source_enable(port, 0); + + /* Enable discharge if we were previously sourcing 5V */ + if (prev_en) + pd_set_vbus_discharge(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_check_vconn_swap(int port) +{ + /* Allow Vconn swap if AP is on. */ + return chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON); +} + +int pd_set_power_supply_ready(int port) +{ + int rv; + + /* Disable charging. */ + rv = ppc_vbus_sink_enable(port, 0); + if (rv) + return rv; + + pd_set_vbus_discharge(port, 0); + + /* Provide Vbus. */ + rv = ppc_vbus_source_enable(port, 1); + if (rv) + return rv; + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +int board_vbus_source_enabled(int port) +{ + return ppc_is_sourcing_vbus(port); +} + diff --git a/board/asurada/board.c b/board/asurada/board.c index 9459169b6c..f5c249ff97 100644 --- a/board/asurada/board.c +++ b/board/asurada/board.c @@ -6,7 +6,6 @@ #include "adc.h" #include "adc_chip.h" -#include "board/asurada/it5205_sbu.h" #include "button.h" #include "charge_manager.h" #include "charge_state_v2.h" @@ -52,584 +51,15 @@ #define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) #define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) -static void bc12_interrupt(enum gpio_signal signal); -static void ppc_interrupt(enum gpio_signal signal); -static void x_ec_interrupt(enum gpio_signal signal); - -#include "gpio_list.h" - -const struct charger_config_t chg_chips[] = { - { - .i2c_port = I2C_PORT_CHARGER, - .i2c_addr_flags = ISL923X_ADDR_FLAGS, - .drv = &isl923x_drv, - }, -}; - -/* - * PWM channels. Must be in the exactly same order as in enum pwm_channel. - * There total three 16 bits clock prescaler registers for all pwm channels, - * so use the same frequency and prescaler register setting is required if - * number of pwm channel greater than three. - */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED1] = { - .channel = 0, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4 - }, - [PWM_CH_LED2] = { - .channel = 1, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4 - }, - [PWM_CH_LED3] = { - .channel = 2, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ - .pcfsr_sel = PWM_PRESCALER_C4 - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/* Wake-up pins for hibernate */ -enum gpio_signal hibernate_wake_pins[] = { - GPIO_AC_PRESENT, - GPIO_LID_OPEN, - GPIO_POWER_BUTTON_L, -}; -int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -__override void board_hibernate_late(void) -{ - /* - * Turn off PP5000_A. Required for devices without Z-state. - * Don't care for devices with Z-state. - */ - gpio_set_level(GPIO_EN_PP5000_A, 0); - - /* - * GPIO_EN_SLP_Z not implemented in rev0/1, - * fallback to usual hibernate process. - */ - if (board_get_version() <= 1) - return; - - isl9238c_hibernate(CHARGER_SOLO); - - gpio_set_level(GPIO_EN_SLP_Z, 1); - - /* should not reach here */ - __builtin_unreachable(); -} - -/* power signal list. Must match order of enum power_signal. */ -const struct power_signal_info power_signal_list[] = { - {GPIO_PMIC_EC_PWRGD, POWER_SIGNAL_ACTIVE_HIGH, "PMIC_PWR_GOOD"}, - {GPIO_AP_IN_SLEEP_L, POWER_SIGNAL_ACTIVE_LOW, "AP_IN_S3_L"}, - {GPIO_AP_EC_WATCHDOG_L, POWER_SIGNAL_ACTIVE_LOW, "AP_WDT_ASSERTED"}, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - -/* Detect subboard */ -static enum board_sub_board board_get_sub_board(void); - /* Initialize board. */ static void board_init(void) { - gpio_enable_interrupt(GPIO_AC_PRESENT); - - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - /* Enable motion sensor interrupt */ gpio_enable_interrupt(GPIO_BASE_IMU_INT_L); gpio_enable_interrupt(GPIO_LID_ACCEL_INT_L); } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); -static void board_tcpc_init(void) -{ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - /* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */ - gpio_enable_interrupt(GPIO_X_EC_GPIO2); - - /* If this is not a Type-C subboard, disable the task. */ - if (board_get_sub_board() != SUB_BOARD_TYPEC) - task_disable_task(TASK_ID_PD_C1); -} -/* Must be done after I2C and subboard */ -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); - -/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ -const struct adc_t adc_channels[] = { - /* Convert to mV (3000mV/1024). */ - {"VBUS", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, - {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, - {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, - /* AMON/BMON gain = 17.97 */ - {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, - CHIP_ADC_CH3}, - {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* BC12 */ -const struct mt6360_config_t mt6360_config = { - .i2c_port = 0, - .i2c_addr_flags = MT6360_PMU_I2C_ADDR_FLAGS, -}; - -const struct pi3usb9201_config_t - pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - /* [0]: unused */ - [1] = { - .i2c_port = 4, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - } -}; - -struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { .drv = &mt6360_drv }, - { .drv = &pi3usb9201_drv }, -}; - -static void bc12_interrupt(enum gpio_signal signal) -{ - if (signal == GPIO_USB_C0_BC12_INT_ODL) - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); - else - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); -} - -static void board_sub_bc12_init(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); - else - /* If this is not a Type-C subboard, disable the task. */ - task_disable_task(TASK_ID_USB_CHG_P1); -} -/* Must be done after I2C and subboard */ -DECLARE_HOOK(HOOK_INIT, board_sub_bc12_init, HOOK_PRIO_INIT_I2C + 1); - -/* - * I2C channels (A, B, and C) are using the same timing registers (00h~07h) - * at default. - * In order to set frequency independently for each channels, - * We use timing registers 09h~0Bh, and the supported frequency will be: - * 50KHz, 100KHz, 400KHz, or 1MHz. - * I2C channels (D, E and F) can be set different frequency on different ports. - * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and - * the individual prescale register. - * The frequency of SMBus module is 24MHz on default. - * The allowed range of I2C(D/E/F) frequency is as following setting. - * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1) - * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8) - * Channel D has multi-function and can be used as UART interface. - * Channel F is reserved for EC debug. - */ - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"usb1", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -int board_allow_i2c_passthru(int port) -{ - return (port == I2C_PORT_VIRTUAL_BATTERY); -} - -/* PPC */ -struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .i2c_port = I2C_PORT_PPC0, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - .frs_en = GPIO_USB_C0_FRS_EN, - }, - { - .i2c_port = I2C_PORT_PPC1, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - .frs_en = GPIO_USB_C1_FRS_EN, - }, -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -static void ppc_interrupt(enum gpio_signal signal) -{ - if (signal == GPIO_USB_C0_PPC_INT_ODL) - /* C0: PPC interrupt */ - syv682x_interrupt(0); -} - -int debounced_hpd; - -/** - * Handle PS185 HPD changing state. - */ -static void ps185_hdmi_hpd_deferred(void) -{ - const int new_hpd = gpio_get_level(GPIO_PS185_EC_DP_HPD); - - /* HPD status not changed, probably a glitch, just return. */ - if (debounced_hpd == new_hpd) - return; - - debounced_hpd = new_hpd; - - gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !debounced_hpd); - CPRINTS(debounced_hpd ? "HDMI plug" : "HDMI unplug"); -} -DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); - -#define PS185_HPD_DEBOUCE 250 - -static void hdmi_hpd_interrupt(enum gpio_signal signal) -{ - hook_call_deferred(&ps185_hdmi_hpd_deferred_data, PS185_HPD_DEBOUCE); -} - -/* HDMI/TYPE-C function shared subboard interrupt */ -static void x_ec_interrupt(enum gpio_signal signal) -{ - int sub = board_get_sub_board(); - - if (sub == SUB_BOARD_TYPEC) - /* C1: PPC interrupt */ - syv682x_interrupt(1); - else if (sub == SUB_BOARD_HDMI) - hdmi_hpd_interrupt(signal); - else - CPRINTS("Undetected subboard interrupt."); -} - -int ppc_get_alert_status(int port) -{ - if (port == 0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - if (port == 1 && board_get_sub_board() == SUB_BOARD_TYPEC) - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; - - return 0; -} - -void board_overcurrent_event(int port, int is_overcurrented) -{ - /* TODO: check correct operation for Asurada */ -} - -/* TCPC */ -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it83xx_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, - { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it83xx_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, -}; - -const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) -{ - const static struct cc_para_t - cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - }; - - return &cc_parameter[port]; -} - -uint16_t tcpc_get_alert_status(void) -{ - /* - * C0 & C1: TCPC is embedded in the EC and processes interrupts in the - * chip code (it83xx/intc.c) - */ - return 0; -} - -void board_reset_pd_mcu(void) -{ - /* - * C0 & C1: TCPC is embedded in the EC and processes interrupts in the - * chip code (it83xx/intc.c) - */ -} - -/* USB-A */ -const int usb_port_enable[] = { - GPIO_EN_PP5000_USB_A0_VBUS, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); - -/* USB Mux */ -static int board_ps8743_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - int rv = EC_SUCCESS; - int reg = 0; - - rv = ps8743_read(me, PS8743_REG_MODE, ®); - if (rv) - return rv; - - /* Disable FLIP pin, enable I2C control. */ - reg |= PS8743_MODE_FLIP_REG_CONTROL; - /* Disable CE_USB pin, enable I2C control. */ - reg |= PS8743_MODE_USB_REG_CONTROL; - /* Disable CE_DP pin, enable I2C control. */ - reg |= PS8743_MODE_DP_REG_CONTROL; - - /* - * DP specific config - * - * Enable/Disable IN_HPD on the DB. - */ - gpio_set_level(GPIO_USB_C1_DP_IN_HPD, - mux_state & USB_PD_MUX_DP_ENABLED); - - return ps8743_write(me, PS8743_REG_MODE, reg); -} - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .i2c_port = I2C_PORT_USB_MUX0, - .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS, - .driver = &it5205_usb_mux_driver, - }, - { - .usb_port = 1, - .i2c_port = I2C_PORT_USB_MUX1, - .i2c_addr_flags = PS8743_I2C_ADDR0_FLAG, - .driver = &ps8743_usb_mux_driver, - .board_set = &board_ps8743_mux_set, - }, -}; - -void board_usb_mux_init(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) - ps8743_tune_usb_eq(&usb_muxes[1], - PS8743_USB_EQ_TX_12_8_DB, - PS8743_USB_EQ_RX_12_8_DB); -} -DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); - -int board_set_active_charge_port(int port) -{ - int i; - int is_valid_port = port == 0 || (port == 1 && board_get_sub_board() == - SUB_BOARD_TYPEC); - - if (!is_valid_port && port != CHARGE_PORT_NONE) - return EC_ERROR_INVAL; - - if (port == CHARGE_PORT_NONE) { - CPRINTS("Disabling all charger ports"); - - /* Disable all ports. */ - for (i = 0; i < ppc_cnt; i++) { - /* - * Do not return early if one fails otherwise we can - * get into a boot loop assertion failure. - */ - if (ppc_vbus_sink_enable(i, 0)) - CPRINTS("Disabling C%d as sink failed.", i); - } - - return EC_SUCCESS; - } - - /* Check if the port is sourcing VBUS. */ - if (ppc_is_sourcing_vbus(port)) { - CPRINTF("Skip enable C%d", port); - return EC_ERROR_INVAL; - } - - CPRINTS("New charge port: C%d", port); - - /* - * Turn off the other ports' sink path FETs, before enabling the - * requested charge port. - */ - for (i = 0; i < ppc_cnt; i++) { - if (i == port) - continue; - - if (ppc_vbus_sink_enable(i, 0)) - CPRINTS("C%d: sink path disable failed.", i); - } - - /* Enable requested charge port. */ - if (ppc_vbus_sink_enable(port, 1)) { - CPRINTS("C%d: sink path enable failed.", port); - return EC_ERROR_UNKNOWN; - } - - return EC_SUCCESS; -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit( - MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); -} - -void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) -{ - /* - * We ignore the cc_pin and PPC vconn because polarity and PPC vconn - * should already be set correctly in the PPC driver via the pd - * state machine. - */ -} - -/* Called on AP S3 -> S0 transition */ -static void board_chipset_resume(void) -{ - gpio_set_level(GPIO_EC_BL_EN_OD, 1); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); - -/* Called on AP S0 -> S3 transition */ -static void board_chipset_suspend(void) -{ - gpio_set_level(GPIO_EC_BL_EN_OD, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); - -/* Sub-board */ - -static enum board_sub_board board_get_sub_board(void) -{ - static enum board_sub_board sub = SUB_BOARD_NONE; - - if (sub != SUB_BOARD_NONE) - return sub; - - /* HDMI board has external pull high. */ - if (gpio_get_level(GPIO_EC_X_GPIO3)) { - sub = SUB_BOARD_HDMI; - /* Only has 1 PPC with HDMI subboard */ - ppc_cnt = 1; - /* EC_X_GPIO1 */ - gpio_set_flags(GPIO_EN_HDMI_PWR, GPIO_OUT_HIGH); - /* X_EC_GPIO2 */ - gpio_set_flags(GPIO_PS185_EC_DP_HPD, GPIO_INT_BOTH); - /* EC_X_GPIO3 */ - gpio_set_flags(GPIO_PS185_PWRDN_ODL, GPIO_ODR_HIGH); - } else { - sub = SUB_BOARD_TYPEC; - /* EC_X_GPIO1 */ - gpio_set_flags(GPIO_USB_C1_FRS_EN, GPIO_OUT_LOW); - /* X_EC_GPIO2 */ - gpio_set_flags(GPIO_USB_C1_PPC_INT_ODL, - GPIO_INT_BOTH | GPIO_PULL_UP); - /* EC_X_GPIO3 */ - gpio_set_flags(GPIO_USB_C1_DP_IN_HPD, GPIO_OUT_LOW); - } - - CPRINTS("Detect %s SUB", sub == SUB_BOARD_HDMI ? "HDMI" : "TYPEC"); - return sub; -} - -static void sub_board_init(void) -{ - board_get_sub_board(); -} -DECLARE_HOOK(HOOK_INIT, sub_board_init, HOOK_PRIO_INIT_I2C - 1); - -__override uint8_t board_get_usb_pd_port_count(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) - return CONFIG_USB_PD_PORT_MAX_COUNT; - else - return CONFIG_USB_PD_PORT_MAX_COUNT - 1; -} - -/* Lid */ -#ifndef TEST_BUILD -/* This callback disables keyboard when convertibles are fully open */ -void lid_angle_peripheral_enable(int enable) -{ - int chipset_in_s0 = chipset_in_state(CHIPSET_STATE_ON); - - if (enable) { - keyboard_scan_enable(1, KB_SCAN_DISABLE_LID_ANGLE); - } else { - /* - * Ensure that the chipset is off before disabling the keyboard. - * When the chipset is on, the EC keeps the keyboard enabled and - * the AP decides whether to ignore input devices or not. - */ - if (!chipset_in_s0) - keyboard_scan_enable(0, KB_SCAN_DISABLE_LID_ANGLE); - } -} -#endif - -/* SD Card */ -int board_regulator_get_info(uint32_t index, char *name, - uint16_t *num_voltages, uint16_t *voltages_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_info(id, name, num_voltages, - voltages_mv); -} - -int board_regulator_enable(uint32_t index, uint8_t enable) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_enable(id, enable); -} - -int board_regulator_is_enabled(uint32_t index, uint8_t *enabled) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_is_enabled(id, enabled); -} - -int board_regulator_set_voltage(uint32_t index, uint32_t min_mv, - uint32_t max_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_set_voltage(id, min_mv, max_mv); -} - -int board_regulator_get_voltage(uint32_t index, uint32_t *voltage_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_voltage(id, voltage_mv); -} - /* Sensor */ static struct mutex g_base_mutex; static struct mutex g_lid_mutex; diff --git a/board/asurada/board.h b/board/asurada/board.h index b0af44d571..b7ad4341fb 100644 --- a/board/asurada/board.h +++ b/board/asurada/board.h @@ -7,96 +7,26 @@ #ifndef __CROS_EC_BOARD_H #define __CROS_EC_BOARD_H +#include "baseboard.h" + /* Chipset config */ -#define CONFIG_BOARD_RESET_AFTER_POWER_ON #define CONFIG_BRINGUP -#define CONFIG_CHIPSET_MT8192 -#define CONFIG_CMD_AP_RESET_LOG -#define CONFIG_CMD_POWERINDEBUG -#define CONFIG_HIBERNATE_WAKE_PINS_DYNAMIC -#define CONFIG_POWER_COMMON /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED #define CONFIG_LTO -#define CONFIG_BOARD_VERSION_CUSTOM -#define CONFIG_EXTPOWER_GPIO -/* - * NOTE: we need to make correct VCC voltage selection here if EC's VCC isn't - * connect to 1.8v on other versions. - */ -#define CONFIG_IT83XX_VCC_1P8V /* * TODO: Remove this option once the VBAT no longer keeps high when * system's power isn't presented. */ #define CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_LOW_POWER_S0 -#define CONFIG_POWER_BUTTON -#define CONFIG_PWM -#define CONFIG_VBOOT_HASH -#define CONFIG_VOLUME_BUTTONS -#define CONFIG_WP_ACTIVE_HIGH - -/* Battery */ -#define CONFIG_BATTERY_CUT_OFF -#define CONFIG_BATTERY_FUEL_GAUGE -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_ODL -#define CONFIG_BATTERY_SMART /* BC12 */ -#define CONFIG_BC12_DETECT_MT6360 -#define CONFIG_BC12_DETECT_PI3USB9201 -#undef CONFIG_BC12_SINGLE_DRIVER /* TODO(b/159583342): remove after rev0 deprecated */ #define CONFIG_MT6360_BC12_GPIO -#define CONFIG_USB_CHARGER - -/* Charger */ -#define ADC_AMON_BMON ADC_CHARGER_AMON_R /* ADC name remap */ -#define ADC_PSYS ADC_CHARGER_PMON /* ADC name remap */ -#define CONFIG_CHARGER -#define CONFIG_CHARGER_DISCHARGE_ON_AC -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_ISL9238C -#define CONFIG_CHARGER_MAINTAIN_VBAT -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 /* BOARD_RS1 */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* BOARD_RS2 */ -#define CONFIG_CHARGER_OTG -#define CONFIG_CHARGER_PSYS -#define CONFIG_CHARGER_PSYS_READ -#define CONFIG_CHARGE_RAMP_HW -#define CONFIG_CHARGE_MANAGER -#define CONFIG_CMD_CHARGER_ADC_AMON_BMON - -/* Chipset */ -#define CONFIG_HOST_COMMAND_STATUS - -/* Keyboard */ -#define CONFIG_CMD_KEYBOARD -#define CONFIG_KEYBOARD_COL2_INVERTED -#define CONFIG_KEYBOARD_PROTOCOL_MKBP -#define CONFIG_MKBP_USE_GPIO - -/* I2C */ -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_I2C_PASSTHRU_RESTRICTED -#define CONFIG_I2C_VIRTUAL_BATTERY -#define I2C_PORT_CHARGER IT83XX_I2C_CH_A -#define I2C_PORT_BATTERY IT83XX_I2C_CH_A -#define I2C_PORT_ACCEL IT83XX_I2C_CH_B -#define I2C_PORT_PPC0 IT83XX_I2C_CH_C -#define I2C_PORT_PPC1 IT83XX_I2C_CH_E -#define I2C_PORT_USB_MUX0 IT83XX_I2C_CH_C -#define I2C_PORT_USB_MUX1 IT83XX_I2C_CH_E -#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY -#define CONFIG_SMBUS_PEC /* LED */ -#define CONFIG_LED_COMMON #ifdef BOARD_HAYATO #define CONFIG_LED_POWER_LED #define CONFIG_LED_ONOFF_STATES @@ -104,48 +34,7 @@ #endif /* PD / USB-C / PPC */ -#define CONFIG_CMD_PPC_DUMP -#define CONFIG_HOSTCMD_PD_CONTROL -#define CONFIG_USBC_PPC -#define CONFIG_USBC_PPC_DEDICATED_INT -#define CONFIG_USBC_PPC_POLARITY -#define CONFIG_USBC_PPC_SYV682X -#define CONFIG_USBC_PPC_VCONN -#define CONFIG_USBC_SS_MUX -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP -#define CONFIG_USB_DRP_ACC_TRYSRC -#define CONFIG_USB_MUX_IT5205 /* C0 */ -#define CONFIG_USB_MUX_PS8743 /* C1 */ -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP #define CONFIG_USB_PD_DEBUG_LEVEL 3 -#define CONFIG_USB_PD_DECODE_SOP -#define CONFIG_USB_PD_DISCHARGE -#define CONFIG_USB_PD_DISCHARGE_PPC -#define CONFIG_USB_PD_DP_HPD_GPIO -#define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_REV30 -#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 2 -#define CONFIG_USB_PD_LOGGING -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_TCPC_LOW_POWER -#define CONFIG_USB_PD_TCPMV2 -#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP -#define CONFIG_USB_PD_TCPM_TCPCI -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_PPC -#define CONFIG_USB_PID 0x5566 /* TODO: update PID */ -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_IT83XX_TUNE_CC_PHY - -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ /* Optional console commands */ #define CONFIG_CMD_FLASH @@ -158,10 +47,6 @@ #define CONFIG_TABLET_MODE_SWITCH #define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L -#define CONFIG_ACCEL_FIFO -#define CONFIG_ACCEL_FIFO_SIZE 256 -#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) -#define CONFIG_ACCEL_INTERRUPTS #define CONFIG_ACCELGYRO_BMI160 /* Base accel */ #define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) @@ -176,9 +61,6 @@ #define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL #define CONFIG_LID_ANGLE_UPDATE -#define CONFIG_CMD_ACCEL_INFO -#define CONFIG_CMD_ACCELS - #ifdef BOARD_ASURADA_REV0 #define CONFIG_ALS #define ALS_COUNT 1 @@ -196,43 +78,9 @@ /* SPI / Host Command */ #undef CONFIG_HOSTCMD_DEBUG_MODE #define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF -#define CONFIG_SPI -#define CONFIG_SUPPRESSED_HOST_COMMANDS \ - EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_MOTION_SENSE_CMD, \ - EC_CMD_PD_GET_LOG_ENTRY - -/* MKBP */ -#define CONFIG_MKBP_EVENT - -#define CONFIG_KEYBOARD_PROTOCOL_MKBP -#define CONFIG_MKBP_USE_GPIO - -/* Define the host events which are allowed to wakeup AP in S3. */ -#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ - (EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | /* for DP */ \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) - -/* UART */ -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 /* USB-A */ -#define CONFIG_USB_PORT_POWER_DUMB -#define USB_PORT_COUNT 1 - -/* GPIO name remapping */ -#define GPIO_EN_HDMI_PWR GPIO_EC_X_GPIO1 -#define GPIO_USB_C1_FRS_EN GPIO_EC_X_GPIO1 -#define GPIO_USB_C1_PPC_INT_ODL GPIO_X_EC_GPIO2 -#define GPIO_PS185_EC_DP_HPD GPIO_X_EC_GPIO2 -#define GPIO_USB_C1_DP_IN_HPD GPIO_EC_X_GPIO3 -#define GPIO_PS185_PWRDN_ODL GPIO_EC_X_GPIO3 - -/* Voltage regulator control */ -#define CONFIG_HOSTCMD_REGULATOR +#define USBA_PORT_COUNT 1 #ifndef __ASSEMBLER__ @@ -244,39 +92,6 @@ enum battery_type { BATTERY_TYPE_COUNT, }; -enum pwm_channel { - PWM_CH_LED1, - PWM_CH_LED2, - PWM_CH_LED3, - PWM_CH_COUNT, -}; - -enum adc_channel { - ADC_VBUS, /* ADC 0 */ - ADC_BOARD_ID_0, /* ADC 1 */ - ADC_BOARD_ID_1, /* ADC 2 */ - ADC_CHARGER_AMON_R, /* ADC 3 */ - ADC_CHARGER_PMON, /* ADC 6 */ - - /* Number of ADC channels */ - ADC_CH_COUNT, -}; - -enum power_signal { - PMIC_PWR_GOOD, - AP_IN_S3_L, - AP_WDT_ASSERTED, - POWER_SIGNAL_COUNT, -}; - -enum board_sub_board { - SUB_BOARD_NONE = -1, - SUB_BOARD_TYPEC, - SUB_BOARD_HDMI, - - SUB_BOARD_COUNT, -}; - enum sensor_id { BASE_ACCEL = 0, BASE_GYRO, @@ -288,8 +103,6 @@ enum sensor_id { SENSOR_COUNT, }; -void board_reset_pd_mcu(void); -int board_get_version(void); int board_accel_force_mode_mask(void); #endif /* !__ASSEMBLER__ */ diff --git a/board/asurada/board_id.c b/board/asurada/board_id.c deleted file mode 100644 index a2306c2211..0000000000 --- a/board/asurada/board_id.c +++ /dev/null @@ -1,107 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "adc.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "timer.h" -#include "util.h" - -/** - * Conversion based on following table: - * - * ID | Rp | Rd | Voltage - * | kOhm | kOhm | mV - * ---+------+------+-------- - * 0 | 51.1 | 2.2 | 136.2 - * 1 | 51.1 | 6.81 | 388.1 - * 2 | 51.1 | 11 | 584.5 - * 3 | 57.6 | 18 | 785.7 - * 4 | 51.1 | 22 | 993.2 - * 5 | 51.1 | 30 | 1220.7 - * 6 | 51.1 | 39.2 | 1432.6 - * 7 | 56 | 56 | 1650.0 - * 8 | 47 | 61.9 | 1875.8 - * 9 | 47 | 80.6 | 2084.5 - * 10 | 56 | 124 | 2273.3 - * 11 | 51.1 | 150 | 2461.5 - * 12 | 47 | 200 | 2672.1 - * 13 | 47 | 330 | 2888.6 - * 14 | 47 | 680 | 3086.7 - */ -const static int voltage_map[] = { - 136, - 388, - 584, - 785, - 993, - 1220, - 1432, - 1650, - 1875, - 2084, - 2273, - 2461, - 2672, - 2888, - 3086, -}; - -const int threshold_mv = 100; - -/** - * Convert ADC value to board id using the voltage table above. - * - * @param ch ADC channel to read, usually ADC_BOARD_ID_0 or ADC_BOARD_ID_1. - * - * @return a non-negative board id, or negative value if error. - */ -static int adc_value_to_numeric_id(enum adc_channel ch) -{ - int mv; - - gpio_set_level(GPIO_EN_EC_ID_ODL, 0); - /* Wait to allow cap charge */ - msleep(10); - - mv = adc_read_channel(ch); - if (mv == ADC_READ_ERROR) - mv = adc_read_channel(ch); - - gpio_set_level(GPIO_EN_EC_ID_ODL, 1); - - if (mv == ADC_READ_ERROR) - return -EC_ERROR_UNKNOWN; - - for (int i = 0; i < ARRAY_SIZE(voltage_map); i++) { - if (IN_RANGE(mv, voltage_map[i] - threshold_mv, - voltage_map[i] + threshold_mv)) - return i; - } - - return -EC_ERROR_UNKNOWN; -} - -static int version = -1; - -/* b/163963220: Cache ADC value before board_hibernate_late() reads it */ -static void board_version_init(void) -{ - version = adc_value_to_numeric_id(ADC_BOARD_ID_0); - if (version < 0) { - ccprints("WARNING: failed to read ADC_BOARD_ID_0"); - ccprints("Assuming board id = 0"); - - version = 0; - } -} -DECLARE_HOOK(HOOK_INIT, board_version_init, HOOK_PRIO_INIT_ADC + 1); - -int board_get_version(void) -{ - return version; -} diff --git a/board/asurada/build.mk b/board/asurada/build.mk index 9adf6b09a5..8ecba2f691 100644 --- a/board/asurada/build.mk +++ b/board/asurada/build.mk @@ -8,8 +8,9 @@ # the IC is ITE IT8xxx2 CHIP:=it83xx CHIP_FAMILY:=it8xxx2 -CHIP_VARIANT:=it81202ax_1024 +CHIP_VARIANT:=it81202bx_1024 +BASEBOARD:=asurada board-$(BOARD_HAYATO)=led_hayato.o board-$(BOARD_ASURADA)=led.o -board-y+=battery.o board.o board_id.o usb_pd_policy.o +board-y+=battery.o board.o diff --git a/board/asurada/it5205_sbu.c b/board/asurada/it5205_sbu.c deleted file mode 100644 index 9ee59a5cc3..0000000000 --- a/board/asurada/it5205_sbu.c +++ /dev/null @@ -1,68 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * IT5205 Type-C SBU OVP handler - */ - -#include "console.h" -#include "hooks.h" -#include "it5205.h" -#include "stdbool.h" -#include "timer.h" -#include "usb_mux.h" - -#define CPRINTS(format, args...) cprints(CC_USB, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USB, format, ## args) - -#define OVP_RETRY_DELAY_US_MIN (100 * MSEC) - -static unsigned int ovp_retry_delay_us = OVP_RETRY_DELAY_US_MIN; - -static void reset_retry_delay(void) -{ - CPRINTS("IT5205 SBU OVP cleared"); - ovp_retry_delay_us = OVP_RETRY_DELAY_US_MIN; -} -DECLARE_DEFERRED(reset_retry_delay); - -static void reset_csbu(void) -{ - /* double the retry time up to 1 minute */ - ovp_retry_delay_us = MIN(ovp_retry_delay_us * 2, MINUTE); - /* and reset it if interrupt not triggered in a short period */ - hook_call_deferred(&reset_retry_delay_data, 500 * MSEC); - - /* re-enable sbu interrupt */ - it5205h_enable_csbu_switch(&usb_muxes[0], false); - it5205h_enable_csbu_switch(&usb_muxes[0], true); -} -DECLARE_DEFERRED(reset_csbu); - -static void it5205h_hook_ac_change(void) -{ - int reg; - - /* Check if the board has IT5205H, and read its ovp status */ - if (i2c_read8(I2C_PORT_USB_MUX0, IT5205H_SBU_I2C_ADDR_FLAGS, - IT5205H_REG_ISR, ®)) - return; - - /* - * Re-poll ovp status immediately if AC detached, because ovp will - * likely be recovered. - * - * Always perform the re-poll even when this hook is triggered by - * unrelated events. - */ - if (reg & IT5205H_ISR_CSBU_OVP) - hook_call_deferred(&reset_csbu_data, 0); -} -DECLARE_HOOK(HOOK_AC_CHANGE, it5205h_hook_ac_change, HOOK_PRIO_DEFAULT); - -void it5205h_sbu_interrupt(enum gpio_signal signal) -{ - CPRINTS("IT5205 SBU OVP triggered"); - hook_call_deferred(&reset_csbu_data, ovp_retry_delay_us); - hook_call_deferred(&reset_retry_delay_data, -1); -} diff --git a/board/asurada/it5205_sbu.h b/board/asurada/it5205_sbu.h deleted file mode 100644 index 8dc59520dd..0000000000 --- a/board/asurada/it5205_sbu.h +++ /dev/null @@ -1,13 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * IT5205 Type-C SBU OVP handler - */ - -#ifndef __CROS_EC_ASURADA_IT5205_SBU_H -#define __CROS_EC_ASURADA_IT5205_SBU_H - -void it5205h_sbu_interrupt(enum gpio_signal signal); - -#endif /* __CROS_EC_ASURADA_IT5205_SBU_H */ diff --git a/board/asurada/usb_pd_policy.c b/board/asurada/usb_pd_policy.c deleted file mode 100644 index 9e90eb95a3..0000000000 --- a/board/asurada/usb_pd_policy.c +++ /dev/null @@ -1,221 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#include "charge_manager.h" -#include "chipset.h" -#include "timer.h" -#include "usb_dp_alt_mode.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usbc_ppc.h" - -#if CONFIG_USB_PD_3A_PORTS != 1 -#error Asurada reference must have at least one 3.0 A port -#endif - -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) - -/* The port that the aux channel is on. */ -static enum { - AUX_PORT_NONE = -1, - AUX_PORT_C0 = 0, - AUX_PORT_C1HDMI = 1, -} aux_port = AUX_PORT_NONE; - -int svdm_get_hpd_gpio(int port) -{ - /* HPD is low active, inverse the result */ - return !gpio_get_level(GPIO_EC_DPBRDG_HPD_ODL); -} - -void svdm_set_hpd_gpio(int port, int en) -{ - /* - * HPD is low active, inverse the en - * TODO: C0&C1 shares the same HPD, implement FCFS policy. - */ - gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !en); -} - -static void aux_switch_port(int port) -{ - if (port != AUX_PORT_NONE) - gpio_set_level_verbose(CC_USBPD, GPIO_DP_AUX_PATH_SEL, port); - aux_port = port; -} - -static void aux_display_disconnected(int port) -{ - /* Gets the other port. C0 -> C1, C1 -> C0. */ - int other_port = !port; - - /* If the current port is not the aux port, nothing needs to be done. */ - if (aux_port != port) - return; - - /* If the other port is connected to a external display, switch aux. */ - if (dp_status[other_port] & DP_FLAGS_DP_ON) - aux_switch_port(other_port); - else - aux_switch_port(AUX_PORT_NONE); -} - -__override int svdm_dp_attention(int port, uint32_t *payload) -{ - int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); - int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - int cur_lvl = svdm_get_hpd_gpio(port); -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - - dp_status[port] = payload[1]; - - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - (irq || lvl)) - /* - * Wake up the AP. IRQ or level high indicates a DP sink is now - * present. - */ - if (IS_ENABLED(CONFIG_MKBP_EVENT)) - pd_notify_dp_alt_mode_entry(port); - - /* Its initial DP status message prior to config */ - if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { - if (lvl) - dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; - return 1; - } - -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - if (irq && !lvl) { - /* - * IRQ can only be generated when the level is high, because - * the IRQ is signaled by a short low pulse from the high level. - */ - CPRINTF("ERR:HPD:IRQ&LOW\n"); - return 0; /* nak */ - } - - if (irq && cur_lvl) { - uint64_t now = get_time().val; - /* wait for the minimum spacing between IRQ_HPD if needed */ - if (now < svdm_hpd_deadline[port]) - usleep(svdm_hpd_deadline[port] - now); - - /* generate IRQ_HPD pulse */ - svdm_set_hpd_gpio(port, 0); - /* - * b/171172053#comment14: since the HPD_DSTREAM_DEBOUNCE_IRQ is - * very short (500us), we can use udelay instead of usleep for - * more stable pulse period. - */ - udelay(HPD_DSTREAM_DEBOUNCE_IRQ); - svdm_set_hpd_gpio(port, 1); - } else { - svdm_set_hpd_gpio(port, lvl); - } - - /* - * Asurada can only output to 1 display port at a time. - * This implements FCFS policy by changing the aux channel. If a - * display is connected to the either port (says A), and the port A - * will be served until the display is disconnected from port A. - * It won't output to the other display which connects to port B. - */ - if (lvl && aux_port == AUX_PORT_NONE) - /* - * A display is connected, and no display was plugged on either - * port. - */ - aux_switch_port(port); - else if (!lvl) - aux_display_disconnected(port); - - - /* set the minimum time delay (2ms) for the next HPD IRQ */ - svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL; -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - - usb_mux_hpd_update(port, lvl, irq); - -#ifdef USB_PD_PORT_TCPC_MST - if (port == USB_PD_PORT_TCPC_MST) - baseboard_mst_enable_control(port, lvl); -#endif - - /* ack */ - return 1; -} - -__override void svdm_exit_dp_mode(int port) -{ -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - svdm_set_hpd_gpio(port, 0); -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - usb_mux_hpd_update(port, 0, 0); - - aux_display_disconnected(port); - -#ifdef USB_PD_PORT_TCPC_MST - if (port == USB_PD_PORT_TCPC_MST) - baseboard_mst_enable_control(port, 0); -#endif -} - -int pd_snk_is_vbus_provided(int port) -{ - return ppc_is_vbus_present(port); -} - -void pd_power_supply_reset(int port) -{ - int prev_en; - - prev_en = ppc_is_sourcing_vbus(port); - - /* Disable VBUS. */ - ppc_vbus_source_enable(port, 0); - - /* Enable discharge if we were previously sourcing 5V */ - if (prev_en) - pd_set_vbus_discharge(port, 1); - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); -} - -int pd_check_vconn_swap(int port) -{ - /* Allow Vconn swap if AP is on. */ - return chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON); -} - -int pd_set_power_supply_ready(int port) -{ - int rv; - - /* Disable charging. */ - rv = ppc_vbus_sink_enable(port, 0); - if (rv) - return rv; - - pd_set_vbus_discharge(port, 0); - - /* Provide Vbus. */ - rv = ppc_vbus_source_enable(port, 1); - if (rv) - return rv; - - /* Notify host of power info change. */ - pd_send_host_event(PD_EVENT_POWER_CHANGE); - - return EC_SUCCESS; -} - -int board_vbus_source_enabled(int port) -{ - return ppc_is_sourcing_vbus(port); -} - -- cgit v1.2.1